A gallium nitride power device with a wide operating gate voltage

Abstract

This invention discloses a gallium nitride (GaN) power device with a wide operating gate voltage. The structure includes a substrate, which, from bottom to top, comprises a substrate layer, a nucleation layer, a buffer layer, a channel layer, a barrier layer, a passivation layer, and an isolation layer. The barrier layer has a voltage-limiting region, a power region, and a discharge region. The first drain metal of the voltage-limiting region and the third gate metal of the discharge region are connected via a first interconnect metal and connected to the input gate voltage. The first source metal of the voltage-limiting region, the second gate metal of the power region, and the third drain metal of the discharge region are connected via a second interconnect metal. This invention, on the one hand, clamps the second gate metal potential of the power region using the saturation characteristics of a GaN HEMT, improving the overall gate voltage swing of the device; on the other hand, it establishes a charge discharge path for the second P-type GaN cap layer of the power region using the switching characteristics of a depletion-mode GaN PFET, enhancing the overall gate stability of the device.

Description

Technical Field

[0001] This invention belongs to the field of power semiconductor devices, specifically a gallium nitride power device with a wide operating gate voltage. Background Technology

[0002] Gallium nitride (GaN), as a typical representative of wide bandgap semiconductors, has characteristics such as wide bandgap, high breakdown electric field, high electron mobility, and high thermal conductivity. It has lower on-resistance and faster response speed, and is widely used in high-frequency and high-temperature power circuits.

[0003] Taking AlGaN / GaN heterojunctions as an example, due to the spontaneous polarization and piezoelectric polarization within the structure, a two-dimensional electron gas (2DEG) with high mobility and high electron saturation velocity can be generated on the surface of GaN without doping, exhibiting depletion-type devices under normal conditions. Considering safety and energy issues in device use, research on enhancement-type devices is more urgent, among which p-GaN technology has received widespread attention.

[0004] Traditional gallium nitride (GaN) devices with p-GaN caps and Schottky gate structures have long suffered from limited gate voltage swing due to limitations in epitaxial structure and growth process. While Si-based MOSFETs can achieve gate voltage swings up to 20V, p-GaN capped Schottky gate GaN devices have gate voltage swings limited to no more than 8V, significantly increasing the complexity of circuit design and packaging requirements. Furthermore, traditional p-GaN capped Schottky gate GaN devices effectively contain a pair of back-to-back diodes. Due to charge storage effects, the devices cannot release electrons from the p-type GaN cap in a timely manner during repeated switching, leading to threshold voltage instability. While ohmic gate GaN devices with p-GaN caps offer relatively more stable threshold voltage, their larger gate leakage current and even smaller gate voltage swing prevent stable operation under high gate voltage conditions. These issues of small gate swing and threshold voltage instability cause a series of reliability problems in system applications and severely hinder the practical application and development of p-GaN capped Schottky gate GaN devices.

[0005] In addition, in traditional GaN / AlGaN heterojunctions, two-dimensional hole gas (2DHG) can be generated on the lower surface of GaN without doping due to the spontaneous polarization and piezoelectric polarization within the structure. However, due to its low mobility, it cannot be used as the main power device in high-power circuits. Summary of the Invention

[0006] Technical problem: In view of the problems of small gate swing and unstable threshold voltage in traditional enhancement-mode gallium nitride power devices, the present invention provides a gallium nitride power device with a wide operating gate voltage, which can effectively improve the gate voltage swing of the device and enhance the threshold voltage stability of the device.

[0007] Technical solution: A gallium nitride power device with a wide operating gate voltage, the device comprising: a substrate, the substrate comprising a base, wherein a nucleation layer, a buffer layer, a channel layer, a barrier layer and a passivation layer are sequentially disposed on the base, and an isolation layer is disposed on the barrier layer, wherein a voltage limiting region, a power region and a discharge region are disposed on the barrier layer;

[0008] The voltage limiting region includes a first source metal, a first P-type gallium nitride cap layer and a first drain metal connected to the upper surface of the barrier layer, and a first gate metal is provided on the upper surface of the first P-type gallium nitride cap layer.

[0009] The power transistor region includes a second source metal, a second P-type gallium nitride cap layer and a second drain metal connected to the upper surface of the barrier layer, and a second gate metal is provided on the upper surface of the second P-type gallium nitride cap layer;

[0010] The discharge region includes a third source metal, a third P-type gallium nitride cap layer and a third drain metal connected to the upper surface of the barrier layer. The upper surface of the third P-type gallium nitride cap layer is provided with a PFET gate dielectric layer, and the upper surface of the PFET gate dielectric layer is provided with a third gate metal.

[0011] Preferably, the discharge tube region has the characteristics of a depletion-mode gallium nitride PFET device: the device is turned on when the third gate metal voltage is less than the positive threshold voltage; the device is turned off when the third gate metal voltage is greater than the positive threshold voltage.

[0012] Preferably, the thickness of the third P-type gallium nitride cap layer is 50 nm to 300 nm.

[0013] Preferably, the third P-type gallium nitride cap layer is in the shape of a groove.

[0014] Preferably, the maximum groove depth of the third P-type gallium nitride cap layer is 270 nm.

[0015] Preferably, the thickness of the PFET gate dielectric layer is 1 nm to 50 nm.

[0016] Preferably, the PFET gate dielectric layer is one or a combination of silicon nitride, aluminum nitride, aluminum oxide, and silicon oxide.

[0017] Beneficial effects: Compared with the prior art, the present invention has the following beneficial effects:

[0018] (1) Improve gate voltage swing. This invention utilizes the saturation characteristics of gallium nitride HEMTs. When the first gate metal voltage of the voltage limiting region is greater than its positive threshold voltage, the increased input gate voltage is applied between the drain and source of the voltage limiting region, so that the second gate metal voltage of the power region is stabilized within its operating voltage range, thereby significantly improving the gate voltage swing of the overall device.

[0019] (2) Enhanced threshold stability. This invention utilizes the switching characteristics of depletion-mode gallium nitride PFETs. When the third gate metal voltage in the discharge region is less than its positive threshold, a discharge channel for the charge stored in the second P-type gallium nitride cap layer in the power region is established, effectively eliminating the charge storage effect and thus significantly enhancing the threshold stability of the device.

[0020] (3) High integration and fewer parasites. In this invention, an isolation layer is introduced between the N-channel gallium nitride device and the P-channel gallium nitride device, and the devices are directly connected by metal lines, which makes the device integration higher and reduces the adverse effects caused by parasites. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of a traditional p-GaN gallium nitride power device structure;

[0022] Figure 2 This is a graph showing the transfer characteristics of the device of the present invention;

[0023] Figure 3 This is a graph showing the relationship between the second metal gate voltage and the input gate voltage of the device of the present invention.

[0024] Figure 4 This is a schematic diagram of a gallium nitride power device with a wide operating gate voltage proposed in this invention;

[0025] Figure 5 This is the equivalent circuit diagram of the present invention;

[0026] Figure 6 This is a schematic diagram of another gallium nitride power device with a wide operating gate voltage proposed in Embodiment 2 of the present invention;

[0027] Figure 7 This is an equivalent circuit diagram of another gallium nitride power device with a wide operating gate voltage proposed in Embodiment 2 of the present invention. Detailed Implementation

[0028] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0029] Example 1:

[0030] A gallium nitride power device with a wide operating gate voltage has the following structure: a substrate 10, the substrate 10 including a substrate 11, on which a nucleation layer 12, a buffer layer 13, a channel layer 14, a barrier layer 15 and a passivation layer 60 are sequentially disposed, an isolation layer 50, and a voltage limiting region 20, a power region 30 and a discharge region 40 are disposed on the barrier layer 15;

[0031] The voltage limiting region 20 includes a first source metal 21, a first P-type gallium nitride cap layer 22 and a first drain metal 24 connected to the upper surface of the barrier layer 15. The upper surface of the first P-type gallium nitride cap layer 22 is provided with a first gate metal 23.

[0032] The power transistor region 30 includes a second source metal 31, a second P-type gallium nitride cap layer 32 and a second drain metal 34 connected to the upper surface of the barrier layer 15. The upper surface of the second P-type gallium nitride cap layer 32 is provided with a second gate metal 33.

[0033] The discharge region 40 includes a third source metal 45, a third P-type gallium nitride cap layer 42 and a third drain metal 41 connected to the upper surface of the barrier layer 15. The upper surface of the third P-type gallium nitride cap layer 42 is provided with a PFET gate dielectric layer 43, and the upper surface of the PFET gate dielectric layer 43 is provided with a third gate metal 44.

[0034] The first source metal 21 and the third gate metal 44 are connected through the first interconnect metal V1 and connected to the input gate voltage. The first drain metal 24, the second gate metal 33 and the third drain metal 41 are connected through the second interconnect metal V2. The potentials of the second source metal 31 and the third source metal 45 are grounded. The first gate metal 23 is connected to a 5V potential.

[0035] The working principle of the device of the present invention is as follows: Figure 5 As shown, when the first gate metal 23 is connected to a 5V potential, the channel of the voltage limiting region 20 is fully opened. When the overall device starts to work as the voltage of the first source metal 21, i.e. the input gate voltage, increases, the voltage of the second gate metal 33 increases with the increase of the input gate voltage. Subsequently, due to the saturation characteristics of the gallium nitride HEMT device, the voltage of the second gate metal 33 is clamped within its operating voltage range, and its gate current is limited by the saturation current of the voltage limiting region. When the overall device is turned off and the input gate voltage decreases to the positive threshold voltage of the depletion-type gallium nitride PFET, the channel of the discharge region 40 is opened, and the charge stored in the second P-type gallium nitride cap layer 32 is rapidly discharged.

[0036] Example 2:

[0037] Based on the structure described in Embodiment 1, in this embodiment, the characteristic is that: the voltage limiting region can be a depletion-mode gallium nitride HEMT device, referring to... Figure 6 The voltage limiting region 20 is connected to the first source metal 21, the depletion-type gallium nitride gate dielectric layer 25 and the first drain metal 24 on the upper surface of the barrier layer 15. The upper surface of the depletion-type gallium nitride gate dielectric layer 25 is provided with a first gate metal 23.

[0038] Similar to Embodiment 1, the first source metal 21 and the third gate metal 44 are connected through the first interconnect metal V1 and connected to the input gate voltage, the first drain metal 24, the second gate metal 33 and the third drain metal 41 are connected through the second interconnect metal V2, and the potentials of the second source metal 31 and the third source metal 45 are grounded.

[0039] Unlike Example 1, in this example, the potential of the first gate metal 23 is grounded.

[0040] The voltage limiting region described in this invention improves the gate voltage swing of the device. The first gate metal potential is set to be constant and always greater than its threshold voltage, ensuring that the channel of the voltage limiting region is fully open. The leakage current on the second gate metal of the power transistor region initially increases with the increase of the input gate voltage, and then remains unchanged due to the limitation of the saturation current of the voltage limiting region. The second gate metal voltage of the power transistor region is stabilized within its operating voltage range. The increased portion of the input gate voltage is applied between the drain and source of the voltage limiting region, thereby improving the gate voltage swing of the device.

[0041] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A gallium nitride power device with a wide operating gate voltage, characterized in that, The device includes: a substrate (10), the substrate (10) including a substrate (11), on which a nucleation layer (12), a buffer layer (13), a channel layer (14), a barrier layer (15), a passivation layer (60), and an isolation layer (50) are sequentially disposed; on the barrier layer (15) a voltage limiting region (20), a power region (30), and a discharge region (40) are disposed. The voltage limiting region (20) includes a first source metal (21), a first P-type gallium nitride cap layer (22) and a first drain metal (24) connected to the upper surface of the barrier layer (15). The upper surface of the first P-type gallium nitride cap layer (22) is provided with a first gate metal (23). The power transistor region (30) includes a second source metal (31), a second P-type gallium nitride cap layer (32) and a second drain metal (34) connected to the upper surface of the barrier layer (15). The upper surface of the second P-type gallium nitride cap layer (32) is provided with a second gate metal (33). The discharge region (40) includes a third source metal (45), a third P-type gallium nitride cap layer (42) and a third drain metal (41) connected to the upper surface of the barrier layer (15). The upper surface of the third P-type gallium nitride cap layer (42) is provided with a PFET gate dielectric layer (43) and the upper surface of the PFET gate dielectric layer (43) is provided with a third gate metal (44).

2. The gallium nitride power device with a wide operating gate voltage according to claim 1, characterized in that: The discharge region (40) has the characteristics of a depletion-type gallium nitride PFET device: when the voltage of the third gate metal (44) is less than the positive threshold voltage, the device is turned on; when the voltage of the third gate metal (44) is greater than the positive threshold voltage, the device is turned off.

3. A gallium nitride power device with a wide operating gate voltage according to claim 1 or 2, characterized in that: The thickness of the third P-type gallium nitride cap layer (42) is 50 nm to 300 nm.

4. A gallium nitride power device with a wide operating gate voltage according to claim 1 or 2, characterized in that: The third P-type gallium nitride cap layer (42) is in the shape of a groove.

5. A gallium nitride power device with a wide operating gate voltage according to claim 1 or 2, characterized in that: The maximum groove depth of the third P-type gallium nitride cap layer (42) is 270 nm.

6. A gallium nitride power device with a wide operating gate voltage according to claim 1, characterized in that: The thickness of the PFET gate dielectric layer (43) is 1 nm to 50 nm.

7. A gallium nitride power device with a wide operating gate voltage according to claim 1 or 6, characterized in that: The PFET gate dielectric layer (43) is one or more combinations of silicon nitride, aluminum nitride, aluminum oxide, and silicon oxide.

8. A gallium nitride power device with a wide operating gate voltage according to claim 1, characterized in that: The first source metal (21) and the third gate metal (44) are connected through the first interconnect metal (V1) and connected to the input gate voltage. The first drain metal (24), the second gate metal (33) and the third drain metal (41) are connected through the second interconnect metal (V2). The potentials of the second source metal (31) and the third source metal (45) are grounded.

9. A gallium nitride power device with a wide operating gate voltage according to claim 1, characterized in that, The voltage limiting region (20) may also be a first source metal (21), a depletion-type gallium nitride gate dielectric layer (25) and a first drain metal (24) connected to the upper surface of the barrier layer (15), and the upper surface of the depletion-type gallium nitride gate dielectric layer (25) is provided with a first gate metal (23).

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