Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the method comprising: providing a substrate having a first region and a second region, the substrate in the first region having a first gate, and the substrate in the second region having a second gate; forming a first initial lightly doped region and a second initial lightly doped region; forming a first sidewall by selective growth on the sidewall of the second gate; performing a doping treatment on the exposed substrate in the second region to form a first source-drain region and a first lightly doped drain region; forming a second sidewall by selective growth on the sidewall of the first gate; performing a doping treatment on the exposed substrate in the first region to form a second source-drain region and a second lightly doped drain region. The doping treatment for forming the lightly doped drain region is performed after the sidewall is formed by selective growth, and by adjusting the thickness of the sidewall and the injection energy and dose of the doping treatment, the first and second lightly doped drain regions with different sizes or different doping concentrations are obtained without increasing the cost of masks, thereby providing more adjustment space for the process.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Technology

[0002] Lightly doped drain (LDD) ion implantation refers to the formation of a lightly doped extended region below the gate boundary and between the source and drain. This extended region creates an impurity concentration gradient between the source / drain and the channel, thereby reducing the peak electric field near the drain and improving the hot carrier injection (HCI) effect and device reliability.

[0003] Due to the application of high voltage, a huge electric field is generated in the depletion layer of the heavily doped (N+ / P) junction (taking NMOS as an example). Changing the drain structure can play a fundamental role. The lightly doped drain ion implantation technology transforms the originally heavily doped N+ abrupt junction into a gradually changing junction. By wrapping the drain with lightly doped N-type impurities, an N+N / P junction is formed, thereby moderating the electric field strength. It can reduce the maximum field strength by 30% to 40%, allowing the accelerated electrons to obtain relatively small kinetic energy in a single free path, thereby reducing the number of holes and achieving the function of protecting the gate.

[0004] However, the current lightly doped drain structures still need improvement. Summary of the Invention

[0005] The technical problem solved by this invention is to provide a semiconductor structure and a method for forming the same, which, without increasing the cost of the photomask, allows for adjustment of the size and doping concentration of the lightly doped drain structure, thus providing more options for semiconductor devices.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide a method for forming a semiconductor structure, comprising: providing a substrate having a first region and a second region, wherein a first gate is formed on the substrate of the first region and a second gate is formed on the substrate of the second region; forming a first initial lightly doped region and a second initial lightly doped region, wherein the first initial lightly doped region is located within the substrate on both sides of the first gate and the second initial lightly doped region is located within the substrate on both sides of the second gate; forming a first sidewall on the sidewall of the second gate by selective growth; forming a first mask layer on the substrate of the first region, wherein the first mask layer exposes the substrate of the second region; and using the first mask layer... Using a second gate layer with the first sidewall as a mask, the exposed substrate of the second region is doped to form a first source / drain region and a first lightly doped drain region; the first sidewall and the first mask layer are removed; after removing the first sidewall and the first mask layer, a second sidewall is formed on the sidewall of the first gate by selective growth; a second mask layer is formed on the substrate of the second region, the second mask layer exposing the substrate of the first region; using the second mask layer and the first gate layer with the second sidewall as a mask, the exposed substrate of the first region is doped to form a second source / drain region and a second lightly doped drain region.

[0007] Optionally, the width of the first sidewall is different from the width of the second sidewall.

[0008] Optionally, at least one of the steps of forming the first sidewall by selective growth and forming the second sidewall by selective growth includes forming a carbon layer by selective growth.

[0009] Optionally, in the step of forming a carbon layer by selective growth, a carbon layer is formed on the first gate sidewall and the second gate sidewall.

[0010] Optionally, in the step of forming a carbon layer by selective growth, the carbon layer exposes the surface of the substrate, the top of the first gate, and the top of the second gate.

[0011] Optionally, it also includes: removing the second mask layer and the second sidewall.

[0012] Optionally, in at least one of the steps of removing the first sidewall and the first mask layer and removing the second mask layer and the second sidewall, the removal method includes ashing.

[0013] Optionally, the reaction parameters for the ashing treatment include: an ashing temperature range of 15℃ to 40℃; and an ashing time range of 5 seconds to 40 seconds.

[0014] Optionally, the steps of forming the first initial lightly doped region and the second initial lightly doped region include:

[0015] The substrates on both sides of the first gate are doped to form a first initial lightly doped region;

[0016] The substrates on both sides of the second gate are doped to form a second initial lightly doped region.

[0017] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the semiconductor structure forming method described in any of the preceding claims.

[0018] The present invention also provides a method for forming a semiconductor structure, comprising: providing a substrate having a third region and a fourth region, wherein a third gate is formed on the substrate of the third region and a fourth gate is formed on the substrate of the fourth region; forming a third initial lightly doped region and a fourth initial lightly doped region, wherein the third initial lightly doped region is located within the substrate on both sides of the third gate and the fourth initial lightly doped region is located within the substrate on both sides of the fourth gate; forming a third sidewall on the sidewall of the fourth gate by selective growth; forming a third mask layer on the substrate of the third region, wherein the third mask layer exposes the substrate of the fourth region; and using the third... Using a mask layer and a fourth gate with the third sidewall formed on its sidewalls as a mask, the exposed substrate of the fourth region is doped to form a third lightly doped drain region and a transition lightly doped drain region; the third sidewall and the third mask layer are removed; after removing the third sidewall and the third mask layer, a first protective sidewall is formed on the sidewalls of the third gate and the sidewalls of the fourth gate; using the third gate and the fourth gate with the first protective sidewall formed on their sidewalls as masks, the exposed substrate of the third region and the substrate of the fourth region are doped to form a third source / drain region, a fourth lightly doped drain region, a fourth source / drain region, and a fifth lightly doped drain region.

[0019] Optionally, the width of the third sidewall is different from the width of the first protective sidewall.

[0020] Optionally, in the step of forming the third sidewall by selective growth, a carbon layer is formed by selective growth.

[0021] Optionally, in the step of forming the carbon layer by selective growth, the carbon layer is formed on the sidewalls of the third gate and the fourth gate.

[0022] Optionally, in the step of forming the carbon layer by selective growth, the carbon layer exposes the surface of the substrate, the top of the third gate, and the top of the fourth gate.

[0023] Optionally, the step of forming the first protective sidewall includes: forming an initial first protective sidewall on the substrate, the top of the third gate, the third gate sidewall, the top of the fourth gate, and the fourth gate sidewall; and performing a back etching process on the initial first protective sidewall to form a first protective sidewall located between the third gate sidewall and the fourth gate sidewall.

[0024] Optionally, in the step of forming a first protective sidewall on the sidewalls of the third gate and the fourth gate, the material of the first protective sidewall is silicon nitride.

[0025] Optionally, in the step of removing the third sidewall and the third mask layer, the removal method includes ashing treatment.

[0026] Optionally, the reaction parameters for the ashing treatment include: an ashing temperature range of 15℃ to 40℃; and an ashing time range of 5 seconds to 40 seconds.

[0027] Optionally, the steps for forming the third and fourth initial lightly doped regions include:

[0028] The substrates on both sides of the third gate are doped to form a third initial lightly doped region;

[0029] The substrates on both sides of the fourth gate are doped to form a fourth initial lightly doped region.

[0030] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the semiconductor structure forming method described in any of the preceding claims.

[0031] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0032] In the semiconductor structure formation method of the present invention, sidewalls are formed by selective growth without the need for additional photomasks. After the sidewalls are formed by selective growth, doping is performed to form lightly doped drain regions. By controlling the sidewall thickness and the injection energy and injection dose of the doping process, first lightly doped drain regions and second lightly doped drain regions with different sizes or different doping concentrations can be obtained without increasing the cost of the photomask, providing more adjustment space for semiconductor devices.

[0033] In an optional embodiment of the present invention, a carbon layer is formed by selective growth. The carbon layer is selectively grown on the sidewalls of the first and second gates, eliminating the need to deposit carbon layers on the substrate, the sidewalls of the first gate, the top of the first gate, the sidewalls of the second gate, and the top of the second gate, followed by etch-back removal of the carbon layers located on the top of the first gate, the top of the second gate, and the substrate. This avoids increasing photomask costs and reduces the complexity of the process flow. Furthermore, the carbon layer does not require additional etching removal and can be removed simultaneously with the first and second mask layers during ashing, without increasing process complexity. Attached Figure Description

[0034] Figures 1 to 3 This is a cross-sectional schematic diagram of each step in the formation process of a semiconductor structure according to an embodiment;

[0035] Figures 4 to 12 This is a cross-sectional structural schematic diagram of each step in the formation process of a semiconductor structure according to an embodiment of the present invention;

[0036] Figures 13 to 20 This is a cross-sectional schematic diagram of each step in the formation process of a semiconductor structure according to another embodiment of the present invention. Detailed Implementation

[0037] As the background technology shows, the existing lightly doped drain region structure has many limitations. This paper analyzes the reasons for these limitations using a semiconductor structure formation method as an example:

[0038] In one embodiment, a method for forming a semiconductor structure includes:

[0039] Please refer to Figure 1 A substrate 100 is provided, the substrate 100 having a first region I and a second region II, the first region I having a first gate 101 on the substrate 100, and the second region II having a second gate 102 on the substrate 100; a first initial lightly doped region 103 and a second initial lightly doped region 104 are formed, the first initial lightly doped region 103 being located in the substrate 100 on both sides of the first gate 101, and the second initial lightly doped region 104 being located in the substrate 100 on both sides of the second gate 102.

[0040] Please refer to Figure 2 A first sidewall 105 is formed on the sidewall of the first gate 101 and the sidewall of the second gate 102.

[0041] Please refer to Figure 3Using the first gate 101 and the second gate 102, on which the first sidewall 105 is formed, as a mask, the exposed substrate 100 is doped to form a first source / drain region 106, a first lightly doped drain region 107, a second source / drain region 109, and a second lightly doped drain region 108.

[0042] The first sidewall 105 is typically formed by etching away the material layers on the first gate 101, the second gate 102, the substrates 100 on both sides of the first gate 101, and the substrates 100 on both sides of the second gate 102 after forming the material layers covering the first region I and the second region II of the substrate 100, while retaining the material of the sidewall of the first gate 101 and the sidewall of the second gate 102; the first sidewall 105 of the sidewall of the first gate 101 and the first sidewall 105 of the sidewall of the second gate 102 have the same thickness.

[0043] The thickness of the first sidewall 105 of different gate sidewalls defines the size of different lightly doped drain regions. To form lightly doped drain regions of different sizes, different photomasks are required to form different sidewalls, which easily increases the number of photomasks required and increases the process cost.

[0044] The first lightly doped drain region 107 and the first source / drain region 106 are located on both sides of the first gate 101, and the second lightly doped drain region 108 and the second source / drain region 109 are located on both sides of the second gate 102. The first sidewall 105 defines the size of the first lightly doped drain region 107 along the direction perpendicular to the first gate 101 and the size of the second lightly doped drain region 108 along the direction perpendicular to the second gate 102. The first lightly doped drain region 107 and the second lightly doped drain region 108 formed by the method have the same size, which is not conducive to forming lightly doped drain regions of different sizes for different gates and is not conducive to forming lightly doped drain regions with a concentration gradient.

[0045] To solve the aforementioned technical problem, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate having a first region and a second region, wherein a first gate is formed on the substrate of the first region and a second gate is formed on the substrate of the second region; forming a first initial lightly doped region and a second initial lightly doped region, wherein the first initial lightly doped region is located within the substrate on both sides of the first gate and the second initial lightly doped region is located within the substrate on both sides of the second gate; forming a first sidewall on the sidewall of the second gate by selective growth; forming a first mask layer on the substrate of the first region, wherein the first mask layer exposes the substrate of the second region; and using the first mask layer and Using a second gate with the first sidewall as a mask, the exposed substrate of the second region is doped to form a first source / drain region and a first lightly doped drain region; the first sidewall and the first mask layer are removed; after removing the first sidewall and the first mask layer, a second sidewall is formed on the sidewall of the first gate by selective growth; a second mask layer is formed on the substrate of the second region, the second mask layer exposing the substrate of the first region; using the second mask layer and the first gate with the second sidewall as a mask, the exposed substrate of the first region is doped to form a second source / drain region and a second lightly doped drain region.

[0046] In the semiconductor structure formation method of this invention, a first sidewall is formed on the second gate sidewall by selective growth, and a second sidewall is formed on the first gate sidewall by selective growth, without the need for an additional photomask. Using the second gate with the first sidewall as a mask, the exposed substrate of the second region is doped to form a first source / drain region and a first lightly doped drain region. Using the first gate with the second sidewall as a mask, the exposed substrate of the first region is doped to form a second source / drain region and a second lightly doped drain region. By controlling the thickness of the sidewalls and the injection energy and injection dose of the doping process, first lightly doped drain regions and second lightly doped drain regions with different sizes or different doping concentrations can be obtained without increasing the cost of the photomask, providing more adjustment space for semiconductor devices.

[0047] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0048] Please refer to Figure 4 A substrate 200 is provided, the substrate 200 having a first region I and a second region II, the substrate 200 in the first region I having a first gate 201, and the substrate 200 in the second region II having a second gate 202.

[0049] The substrate 200 is made of materials including silicon, silicon germanium, silicon carbide, silicon-on-insulator (SOI), germanium-on-insulator (GOI), etc.

[0050] The first gate 201 and the second gate 202 have offset sidewalls 203 on their sidewalls. The offset sidewalls 203 are made of silicon nitride. The offset sidewalls 203 are used to protect the first gate 201 and the second gate 202.

[0051] An isolation structure (not shown) is provided between the first gate 201 and the second gate 202. The isolation structure is used to prevent electrical crosstalk between adjacent devices.

[0052] The substrate 200 of the first region I is used to form a first device, and the substrate 200 of the second region II is used to form a second device. The first device and the second device have different lightly doped drain regions.

[0053] Please refer to Figures 5 to 6 A first initial lightly doped region 204 and a second initial lightly doped region 205 are formed. The first initial lightly doped region 204 is located in the substrate 200 on both sides of the first gate 201, and the second initial lightly doped region 205 is located in the substrate 200 on both sides of the second gate 202.

[0054] In some embodiments, the doping concentration of the first initial lightly doped region 204 is different from at least one of the doping concentration and doping depth of the second initial lightly doped region 205.

[0055] In some embodiments of the present invention, the steps of forming the first initial lightly doped region 204 and the second initial lightly doped region 205 include: as follows Figure 5 As shown, the substrates 200 on both sides of the first gate 201 are doped to form a first initial lightly doped region 204; as Figure 6 As shown, the substrates 200 on both sides of the second gate 202 are doped to form a second initial lightly doped region 205.

[0056] The step of forming the first initial lightly doped region 204 includes: forming a second mask layer on the substrate 200 of the second region II, the second mask layer exposing the substrate 200 of the first region I; using the second mask layer and the first gate 201 as masks, performing a doping process on the exposed substrate 200 of the first region I to form the first initial lightly doped region 204.

[0057] The step of forming the second initial lightly doped region 205 includes: forming a first mask layer on the substrate 200 of the first region I, the first mask layer exposing the substrate 200 of the second region II; using the first mask layer and the second gate 202 as masks, performing a doping process on the exposed substrate 200 of the second region II to form the second initial lightly doped region 205.

[0058] In some other embodiments, the doping concentration of the first initial lightly doped region is the same as the doping concentration and doping depth of the second initial lightly doped region.

[0059] In other embodiments, the step of forming the first initial lightly doped region and the second initial lightly doped region further includes: using the first gate and the second gate as masks, doping the exposed substrates of the first region and the second region to form the first initial lightly doped region and the second initial lightly doped region, wherein the first initial lightly doped region is located within the substrates on both sides of the first gate, and the second initial lightly doped region is located within the substrates on both sides of the second gate. The doping concentration of the first initial lightly doped region is the same as the doping concentration of the second initial lightly doped region.

[0060] Please refer to Figure 7 A first sidewall 206 is formed on the sidewall of the second gate 202 by selective growth.

[0061] The first sidewall 206 defines the size of the subsequently formed first lightly doped drain region 209 along the direction perpendicular to the second gate 202 (i.e., along the channel direction).

[0062] In some embodiments of the present invention, the first sidewall 206 is a carbon layer, that is, in the step of forming the first sidewall 206 by selective growth, a carbon layer is formed by selective growth.

[0063] In the step of forming a carbon layer by selective growth, a carbon layer is formed on the sidewall of the first gate 201. In the step of forming a carbon layer by selective growth, the formed carbon layer exposes the surface of the substrate 200, the top of the first gate 201, and the top of the second gate 202.

[0064] The carbon layer is also selectively grown on the sidewalls of the second gate 202. The carbon layer is selectively grown on the sidewalls of the first gate 201 and the second gate 202, but not on the top of the first gate 201, the top of the second gate 202, the surface of the substrate 200 of the first region I, and the surface of the substrate 200 of the second region II. It can be formed without removing the carbon layer on the substrate 200, the top of the first gate 201, and the top of the second gate 202. The carbon layer is formed directly on the sidewalls of the first gate 201 and the sidewalls of the second gate 202, which does not increase the cost of the photomask and reduces the complexity of the process.

[0065] Please refer to Figure 8 A first mask layer 207 is formed on the substrate 200 of the first region I, and the first mask layer 207 exposes the substrate 200 of the second region II; using the first mask layer 207 and the second gate 202 with the first sidewall 206 formed on its sidewall as a mask, the exposed substrate 200 of the second region II is doped to form a first source / drain region 208 and a first lightly doped drain region 209.

[0066] The doping process forms a doped region within the substrate 200 of the second region II on both sides of the second gate 202, and the formed doped region and the second initial lightly doped region 205 (e.g. Figure 7 The overlapping portion of the second initial lightly doped region 205 with the formed doped region is suitable for forming the first source / drain region 208, and the non-overlapping portion of the second initial lightly doped region 205 with the formed doped region is suitable for forming the first lightly doped drain region 209.

[0067] The first mask layer 207 is used to protect the substrate 200 of the first region I. While the substrate 200 of the second region II is doped to form the first source / drain region 208 and the first lightly doped drain region 209, the substrate 200 of the first region I is not doped. This provides a basis for forming the first lightly doped drain region 209 and the second lightly doped drain region 212 of different sizes.

[0068] Please refer to Figure 9 Remove the first sidewall 206 (e.g.) Figure 8 (as shown) and the first mask layer 207 (as shown) Figure 8 (As shown).

[0069] The step of removing the first sidewall 206 and the first mask layer 207 includes an ashing process. The reaction parameters for the ashing process include: an ashing temperature range of 15℃ to 40℃; and an ashing time range of 5 seconds to 40 seconds.

[0070] In some embodiments, the first sidewall 206 is a carbon layer. The ashing process removes both the first sidewall 206 and the first mask layer 207 simultaneously. No additional process steps are required to remove the first sidewall 206, thus not increasing the complexity of the process and reducing the impact on subsequent processes.

[0071] Please refer to Figure 10 After removing the first sidewall 206 and the first mask layer 207, a second sidewall 210 is formed on the sidewall of the first gate 201 by selective growth.

[0072] Specifically, in some embodiments of the present invention, the thickness of the first sidewall 206 is different from the thickness of the second sidewall 210. The second sidewall 210 defines the dimension of the subsequently formed second lightly doped drain region 212 along the direction perpendicular to the first gate 201 (i.e., along the channel direction).

[0073] In other embodiments, the thickness of the first sidewall may be the same as the thickness of the second sidewall.

[0074] In the step of forming the second sidewall 210 by selective growth, a carbon layer is formed by selective growth.

[0075] In the step of forming a carbon layer by selective growth, the carbon layer exposes the surface of the substrate 200, the top of the first gate 201, and the top of the second gate 202.

[0076] In the step of forming the carbon layer by selective growth, a carbon layer is formed on the sidewall of the second gate 202. The carbon layer is also formed on the sidewall of the first gate 201. The carbon layer is selectively grown on the sidewalls of the first gate 201 and the second gate 202, but not on the top of the first gate 201, the top of the second gate 202, the surface of the substrate 200 of the first region I, and the surface of the substrate 200 of the second region II. This can be achieved without removing the carbon layer on the substrate 200, the top of the first gate 201, and the top of the second gate 202, without increasing the photomask cost and simplifying the process flow.

[0077] Please refer to Figure 11 A second mask layer 211 is formed on the substrate 200 of the second region II, and the second mask layer 211 exposes the substrate 200 of the first region I; using the second mask layer 211 and the first gate 201 with the second sidewall 210 formed on its sidewall as a mask, the exposed substrate 200 of the first region I is doped to form a second source / drain region 213 and a second lightly doped drain region 212.

[0078] The doping process forms a doped region in the substrate 200 of the first region I on both sides of the first gate 201. The doped region formed and the overlapping portion of the first initial lightly doped region 204 and the formed doped region are suitable for forming a second source / drain region 213. The non-overlapping portion of the first initial lightly doped region 204 and the formed doped region is suitable for forming a second lightly doped drain region 212.

[0079] The second mask layer 211 is used to protect the substrate 200 of the second region II. While the substrate 200 of the first region I is doped to form the second source / drain region 213 and the second lightly doped drain region 212, the substrate 200 of the second region II is not doped. This provides a basis for forming the first lightly doped drain region 209 and the second lightly doped drain region 212 of different sizes.

[0080] Please refer to Figure 12 Remove the second mask layer 211 and the second sidewall 210.

[0081] In at least one of the steps of removing the first sidewall 206 and the first mask layer 207 and removing the second mask layer 211 and the second sidewall 210, the removal method includes ashing. The reaction parameters of the ashing process include: an ashing temperature range of 15℃ to 40℃; and an ashing time range of 5 seconds to 40 seconds.

[0082] In some embodiments, the second sidewall 210 is a carbon layer. The ashing process removes both the second sidewall 210 and the second mask layer 211 simultaneously. No additional process steps are required to remove the second sidewall 210, which does not increase the complexity of the process and reduces the impact on subsequent processes.

[0083] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the above-described semiconductor structure formation method, and will not be described in detail here.

[0084] This invention also provides a method for forming a semiconductor structure, comprising: providing a substrate having a third region and a fourth region, wherein a third gate is formed on the substrate of the third region and a fourth gate is formed on the substrate of the fourth region; forming a third initial lightly doped region and a fourth initial lightly doped region, wherein the third initial lightly doped region is located within the substrate on both sides of the third gate and the fourth initial lightly doped region is located within the substrate on both sides of the fourth gate; forming a third sidewall on the sidewall of the fourth gate by selective growth; forming a third mask layer on the substrate of the third region, wherein the third mask layer exposes the substrate of the fourth region; and using the third initial lightly doped region as the basis for forming the semiconductor structure. Using a third mask layer and a fourth gate with a third sidewall as a mask, the exposed substrate of the fourth region is doped to form a third lightly doped drain region and a transition lightly doped drain region; the third sidewall and the third mask layer are removed; after removing the third sidewall and the third mask layer, a first protective sidewall is formed on the sidewall of the third gate and the sidewall of the fourth gate; using the third gate and the fourth gate with the first protective sidewall as masks, the exposed substrate of the third region and the substrate of the fourth region are doped to form a third source / drain region, a fourth lightly doped drain region, a fourth source / drain region, and a fifth lightly doped drain region.

[0085] Please refer to Figure 13 A substrate 300 is provided, the substrate 300 having a third region III and a fourth region IV, the substrate 300 in the third region III having a third gate 301, and the substrate 300 in the fourth region IV having a fourth gate 302.

[0086] The substrate 300 is made of materials including silicon, silicon germanium, silicon carbide, silicon-on-insulator (SOI), germanium-on-insulator (GOI), etc.

[0087] The third gate 301 and the fourth gate 302 have offset sidewalls 303 on their sidewalls. The offset sidewalls 303 are made of silicon nitride. The offset sidewalls 303 are used to protect the third gate 301 and the fourth gate 302.

[0088] An isolation structure (not shown) is provided between the third gate 301 and the fourth gate 302. The isolation structure is used to prevent electrical crosstalk between adjacent devices.

[0089] The substrate 300 of the third region III is used to form a third device, and the substrate 300 of the fourth region IV is used to form a fourth device. The third device and the fourth device have different lightly doped drain regions.

[0090] Please refer to Figures 14 to 15A third initial lightly doped region 304 and a fourth initial lightly doped region 305 are formed. The third initial lightly doped region 304 is located in the substrate 300 on both sides of the third gate 301, and the fourth initial lightly doped region 305 is located in the substrate 300 on both sides of the fourth gate 302.

[0091] In some embodiments, the doping concentration of the third initial lightly doped region 304 is different from at least one of the doping concentration and doping depth of the fourth initial lightly doped region 305.

[0092] In some embodiments of the present invention, the steps of forming the third initial lightly doped region 304 and the fourth initial lightly doped region 305 include: as follows Figure 14 As shown, the substrates 300 on both sides of the third gate 301 are doped to form a third initial lightly doped region 304; as Figure 15 As shown, the substrates 300 on both sides of the fourth gate 302 are doped to form a fourth initial lightly doped region 305.

[0093] The step of forming the third initial lightly doped region 304 includes: forming a fourth mask layer on the substrate 300 of the fourth region IV, the fourth mask layer exposing the substrate 300 of the third region III; using the fourth mask layer and the third gate 301 as masks, performing doping treatment on the exposed substrate 300 of the third region III to form the third initial lightly doped region 304.

[0094] The step of forming the fourth initial lightly doped region 305 includes: forming a third mask layer on the substrate 300 of the third region III, the third mask layer exposing the substrate 300 of the fourth region IV; using the third mask layer and the fourth gate 302 as masks, performing doping treatment on the exposed substrate 300 of the fourth region IV to form the fourth initial lightly doped region 305.

[0095] In some other embodiments, the doping concentration of the third initial lightly doped region is the same as the doping concentration and doping depth of the fourth initial lightly doped region.

[0096] In other embodiments, the step of forming the third initial lightly doped region and the fourth initial lightly doped region further includes: using the third gate and the fourth gate as masks, performing doping treatment on the exposed substrates of the third region and the fourth region to form the third initial lightly doped region and the fourth initial lightly doped region, wherein the third initial lightly doped region is located within the substrates on both sides of the third gate, and the fourth initial lightly doped region is located within the substrates on both sides of the fourth gate. The doping concentration of the third initial lightly doped region is the same as the doping concentration of the fourth initial lightly doped region.

[0097] Please refer to Figure 16A third sidewall 306 is formed on the sidewall of the fourth gate 302 by selective growth.

[0098] The third sidewall 306 defines the dimensions of the subsequently formed third lightly doped drain region 309 along the direction perpendicular to the fourth gate 302 (i.e., along the channel direction).

[0099] In some embodiments of the present invention, the third sidewall 306 is a carbon layer, that is, in the step of forming the third sidewall 306 by selective growth, a carbon layer is formed by selective growth.

[0100] In the step of forming a carbon layer by selective growth, a carbon layer is formed on the sidewalls of the third gate 301 and the fourth gate 302. In the step of forming a carbon layer by selective growth, the carbon layer exposes the surface of the substrate 300, the top of the third gate 301, and the top of the fourth gate 302.

[0101] The carbon layer is selectively grown on the sidewalls of the third gate 301 and the fourth gate 302, but not on the top of the third gate 301, the top of the fourth gate 302, or the substrate 300 of the third region III and the fourth region IV. It can be formed without removing the carbon layer on the substrate 300, the top of the third gate 301, and the top of the fourth gate 302. The carbon layer is formed directly on the sidewalls of the third gate 301 and the fourth gate 302, which does not increase the cost of the photomask and reduces the complexity of the process.

[0102] Please refer to Figure 17 A third mask layer 307 is formed on the substrate 300 of the third region III, and the third mask layer 307 exposes the substrate 300 of the fourth region IV; using the third mask layer 307 and the fourth gate 302 with the third sidewall 306 formed on its sidewall as masks, the exposed substrate 300 of the fourth region IV is doped to form a third lightly doped drain region 309 and a transition lightly doped drain region 308.

[0103] The doping process forms a doped region within the substrate 300 of the fourth region IV on both sides of the fourth gate 302. The formed doped region and the fourth initial lightly doped region 305 (e.g.) Figure 16 The overlapping portion of the fourth initial lightly doped region 305 with the formed doped region is suitable for forming a transition lightly doped drain region 308, and the non-overlapping portion of the fourth initial lightly doped region 305 with the formed doped region is suitable for forming a third lightly doped drain region 309.

[0104] The third mask layer 307 is used to protect the substrate 300 of the third region I. While the substrate 300 of the fourth region IV is doped to form the transition lightly doped drain region 308 and the third lightly doped drain region 309, the substrate 300 of the third region III is not doped. This provides a basis for forming lightly doped drain regions with different doping concentrations.

[0105] Please refer to Figure 18 Remove the third sidewall 306 and the third mask layer 307.

[0106] The step of removing the third sidewall 306 and the third mask layer 307 includes an ashing process. The reaction parameters for the ashing process include: an ashing temperature range of 15℃ to 40℃; and an ashing time range of 5 seconds to 40 seconds.

[0107] In some embodiments, the third sidewall 306 is a carbon layer, and the ashing process removes both the third sidewall 306 and the third mask layer 307 simultaneously. This eliminates the need for additional process steps to remove the third sidewall 306, does not increase the complexity of the process, and reduces the impact on subsequent processes.

[0108] Please refer to Figure 19 After removing the third sidewall 306 and the third mask layer 307, a first protective sidewall 310 is formed on the sidewall of the third gate 301 and the sidewall of the fourth gate 302.

[0109] The step of forming the first protective sidewall 310 includes: forming an initial first protective sidewall (not shown) on the substrate 300, the top of the third gate 301, the sidewall of the third gate 301, the top of the fourth gate 302, and the sidewall of the fourth gate 302; and performing a back etching process on the initial first protective sidewall to form the first protective sidewall 310 located on the sidewall of the third gate 301 and the sidewall of the fourth gate 302.

[0110] In the step of forming a first protective sidewall 310 on the sidewall of the third gate 301 and the sidewall of the fourth gate 302, the material of the first protective sidewall 310 is silicon nitride.

[0111] Specifically, in some embodiments of the present invention, the thickness of the third sidewall 306 is different from the thickness of the first protective sidewall 310. The first protective sidewall 310 defines the dimensions of the subsequently formed fourth lightly doped drain region 312 along the direction perpendicular to the third gate 301 (i.e., along the channel direction) and the dimensions of the fifth lightly doped drain region 314 along the direction perpendicular to the fourth gate 302 (i.e., along the channel direction).

[0112] Please refer to Figure 20Using the third gate 301 and the fourth gate 302, on which the first protective sidewall 310 is formed, as a mask, the exposed substrate 300 of the third region III and the substrate 300 of the fourth region IV are doped to form the third source / drain region 311, the fourth lightly doped drain region 312, the fourth source / drain region 313 and the fifth lightly doped drain region 314.

[0113] The doping process forms a doped region within the substrate 300 of the third region III on both sides of the third gate 301. The formed doped region and the third initial lightly doped region 304 (e.g.) Figure 19 The overlapping portion of the doped region (as shown) and the formed doped region is suitable for forming the third source / drain region 311, and the non-overlapping portion of the third initial lightly doped region 304 and the formed doped region is suitable for forming the fourth lightly doped drain region 312; the doping process forms a doped region in the substrate 300 of the fourth region IV on both sides of the fourth gate 302, and the formed doped region and the transition doped region 308 (as shown) Figure 19 The overlapping portion of the doped region (shown) with the formed doped region is suitable for forming the fourth source / drain region 313, and the non-overlapping portion of the transition doped region 308 with the formed doped region is suitable for forming the fifth lightly doped drain region 314.

[0114] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the above-described semiconductor structure formation method, and will not be described in detail here.

[0115] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided having a first region and a second region, wherein a first gate is provided on the substrate in the first region and a second gate is provided on the substrate in the second region; A first initial lightly doped region and a second initial lightly doped region are formed, wherein the first initial lightly doped region is located in the substrate on both sides of the first gate, and the second initial lightly doped region is located in the substrate on both sides of the second gate. The first sidewall is formed on the sidewall of the second gate by selective growth; A first mask layer is formed on the substrate of the first region, the first mask layer exposing the substrate of the second region; Using the first mask layer and the second gate with the first sidewall formed on its sidewall as a mask, the substrate of the exposed second region is doped to form a first source / drain region and a first lightly doped drain region; Remove the first sidewall and the first mask layer; After removing the first sidewall and the first mask layer, a second sidewall is formed on the first gate sidewall by selective growth. At least one of the steps of forming the first sidewall by selective growth and forming the second sidewall by selective growth includes forming a carbon layer by selective growth. A second mask layer is formed on the substrate of the second region, the second mask layer exposing the substrate of the first region; Using the second mask layer and the first gate with the second sidewall formed on its sidewall as a mask, the substrate of the exposed first region is doped to form a second source / drain region and a second lightly doped drain region.

2. The method for forming a semiconductor structure as described in claim 1, characterized in that, The width of the first sidewall is different from the width of the second sidewall.

3. The method for forming a semiconductor structure as described in claim 1, characterized in that, In the step of forming a carbon layer by selective growth, a carbon layer is formed on the first gate sidewall and the second gate sidewall.

4. The method for forming a semiconductor structure as described in claim 1, characterized in that, In the step of forming a carbon layer by selective growth, the carbon layer exposes the surface of the substrate, the top of the first gate, and the top of the second gate.

5. The method for forming a semiconductor structure as described in claim 1, characterized in that, Also includes: Remove the second mask layer and the second sidewall.

6. The method for forming a semiconductor structure as described in claim 1 or 5, characterized in that, In at least one of the steps of removing the first sidewall and the first mask layer and removing the second mask layer and the second sidewall, the removal method includes ashing.

7. The method for forming a semiconductor structure as described in claim 6, characterized in that, The reaction parameters for the ashing process include: ashing temperature range of 15℃ to 40℃; and ashing time range of 5 seconds to 40 seconds.

8. The method for forming a semiconductor structure as described in claim 1, characterized in that, The steps for forming the first initial lightly doped region and the second initial lightly doped region include: The substrates on both sides of the first gate are doped to form a first initial lightly doped region; The substrates on both sides of the second gate are doped to form a second initial lightly doped region.

9. A semiconductor structure, characterized in that, The semiconductor structure is formed by the semiconductor structure forming method according to claims 1 to 8.

10. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided having a third region and a fourth region, wherein a third gate is provided on the substrate in the third region and a fourth gate is provided on the substrate in the fourth region; A third initial lightly doped region and a fourth initial lightly doped region are formed, wherein the third initial lightly doped region is located in the substrate on both sides of the third gate, and the fourth initial lightly doped region is located in the substrate on both sides of the fourth gate. A third sidewall is formed on the fourth gate sidewall by selectively growing a carbon layer; A third mask layer is formed on the substrate of the third region, the third mask layer exposing the substrate of the fourth region; Using the third mask layer and the fourth gate with the third sidewall formed on the sidewall as a mask, the exposed substrate of the fourth region is doped to form a third lightly doped drain region and a transition lightly doped drain region. Remove the third sidewall and the third mask layer; After removing the third sidewall and the third mask layer, a first protective sidewall is formed on the sidewall of the third gate and the sidewall of the fourth gate. Using the third and fourth gates, whose sidewalls have the first protective sidewalls, as masks, the exposed substrates of the third and fourth regions are doped to form a third source / drain region, a fourth lightly doped drain region, a fourth source / drain region, and a fifth lightly doped drain region.

11. The method for forming a semiconductor structure as described in claim 10, characterized in that, The width of the third sidewall is different from the width of the first protective sidewall.

12. The method for forming a semiconductor structure as described in claim 10, characterized in that, In the step of forming a carbon layer by selective growth, a carbon layer is formed on the sidewalls of the third gate and the fourth gate.

13. The method for forming a semiconductor structure as described in claim 10, characterized in that, In the step of forming a carbon layer by selective growth, the carbon layer exposes the surface of the substrate, the top of the third gate, and the top of the fourth gate.

14. The method for forming a semiconductor structure as described in claim 10, characterized in that, The step of forming the first protective sidewall includes: forming an initial first protective sidewall on the substrate, the top of the third gate, the third gate sidewall, the top of the fourth gate, and the fourth gate sidewall; and performing a back etching process on the initial first protective sidewall to form a first protective sidewall located between the third gate sidewall and the fourth gate sidewall.

15. The method for forming a semiconductor structure as described in claim 10 or 14, characterized in that, In the step of forming a first protective sidewall on the sidewalls of the third gate and the fourth gate, the material of the first protective sidewall is silicon nitride.

16. The method for forming a semiconductor structure as described in claim 10, characterized in that, The removal method for the third sidewall and the third mask layer includes ashing treatment.

17. The method for forming a semiconductor structure as described in claim 16, characterized in that, The reaction parameters for the ashing process include: ashing temperature range of 15℃ to 40℃; and ashing time range of 5 seconds to 40 seconds.

18. The method for forming a semiconductor structure as described in claim 10, characterized in that, The steps for forming the third and fourth initial lightly doped regions include: The substrates on both sides of the third gate are doped to form a third initial lightly doped region; The substrates on both sides of the fourth gate are doped to form a fourth initial lightly doped region.

19. A semiconductor structure, characterized in that, The semiconductor structure is formed by the semiconductor structure forming method according to claims 10 to 18.

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