A verification environment generation method, device, equipment and storage medium

Abstract

The present application discloses a verification environment generation method, device, equipment and storage medium, which relates to the field of chip verification technology, including: obtaining a language file for describing a target verification environment framework written based on a preset verification environment framework description language; parsing the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compiler built based on the preset verification environment framework description language; rendering the tree data structure through a preset template to generate a target verification environment corresponding to the language file. In this way, the present application generates a tree data structure for the target verification environment framework through a language for describing the verification environment structure and a corresponding language compiler; verification environments of different levels and modules can be flexibly described; the target verification environment is generated by rendering the tree data structure through a preset template; and the flexibility and efficiency of generating the verification environment are improved.

Description

Technical Field

[0001] The present invention relates to the field of chip verification technology, and in particular to a verification environment generation method, device, equipment and storage medium. Background Art

[0002] As the demand for chips in society increases and market competition becomes more intense, more and more companies are beginning to focus on R&D efficiency. During the chip R&D cycle, the complexity of the design leads to an increase in the difficulty of verification, and the proportion of chip verification in the chip development cycle is getting higher and higher. How to improve verification efficiency is a point of concern for the verification group. At present, in the field of chip verification, usually for the sake of verification efficiency, each company will have its own script to automatically generate the UVM (Universal Verification Methodology) verification environment, so that verification personnel can focus on the development of the business itself, rather than the construction and debugging of the environment structure, so as to improve efficiency. However, the environment framework generated by this treatment is relatively fixed and lacks flexibility. It is difficult to meet the verification requirements at the system level and module level. Verification personnel still need to invest energy to modify the environment to meet the requirements, resulting in reduced efficiency.

[0003] It can be seen that how to improve the efficiency of setting up the verification environment is a problem to be solved in this field. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a verification environment generation method, device, equipment and storage medium, which generates a tree data structure for a target verification environment framework through a language used to describe the verification environment structure and a corresponding language compiler; can flexibly describe verification environments of different levels and modules; render the tree data structure through a preset template to generate a target verification environment; and improve the flexibility and efficiency of generating a verification environment. The specific scheme is as follows:

[0005] In a first aspect, the present application provides a verification environment generation method, comprising:

[0006] Obtaining a language file for describing a target verification environment framework written in a preset verification environment framework description language;

[0007] The language file is parsed using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compiler constructed based on the preset verification environment framework description language;

[0008] The tree data structure is rendered using a preset template to generate a target verification environment corresponding to the language file.

[0009] Optionally, before obtaining a language file for describing a target verification environment framework written in a preset verification environment framework description language, the method further includes:

[0010] The environment components are declared using custom keywords, and the hierarchical relationship between the environment components is described based on the json format to obtain the preset verification framework description language.

[0011] Optionally, the obtaining of a language file for describing a target verification environment framework written in a preset verification environment framework description language includes:

[0012] A language file for describing a target verification environment framework written in a preset verification environment framework description language is obtained through a preset interactive interface; the file format of the language file is a format that matches the preset interactive interface.

[0013] Optionally, before parsing the language file by using a preset compiler, the method further includes:

[0014] Write a corresponding grammar rule file according to the preset verification environment framework description language;

[0015] In a development environment of a preset open source syntax analyzer, a lexical analyzer and a language interpreter are constructed using the syntax rule file to construct the preset compiler.

[0016] Optionally, the using a preset compiler to parse the language file to generate a tree data structure corresponding to the target verification environment framework includes:

[0017] The preset compiler is set to a visitor mode, so that the preset compiler uses the visitor mode to parse the language file and generate a tree data structure corresponding to the target verification environment framework.

[0018] Optionally, the using a preset compiler to parse the language file to generate a tree data structure corresponding to the target verification environment framework includes:

[0019] Parsing the language file using the preset compiler to obtain a number of tree information corresponding to a number of verification components;

[0020] A tree data structure for the target verification environment framework is generated according to the plurality of tree information.

[0021] Optionally, the rendering of the tree data structure by using a preset template to generate a target verification environment corresponding to the language file includes:

[0022] The tree data structure is rendered through a Jinja2 template to generate a target verification environment corresponding to the language file.

[0023] In a second aspect, the present application provides a verification environment generation device, comprising:

[0024] A language file acquisition module, used to acquire a language file for describing a target verification environment framework written in a preset verification environment framework description language;

[0025] A language file parsing module, used to parse the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compilation tool constructed based on the preset verification environment framework description language;

[0026] A rendering module is used to render the tree data structure through a preset template to generate a target verification environment corresponding to the language file.

[0027] In a third aspect, the present application provides an electronic device, including:

[0028] Memory, used to store computer programs;

[0029] A processor is used to execute the computer program to implement the verification environment generation method as described above.

[0030] In a fourth aspect, the present application provides a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the verification environment generation method as described above.

[0031] It can be seen that the present application first obtains a language file for describing the target verification environment framework written based on a preset verification environment framework description language; then uses a preset compiler to parse the language file to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compilation tool built based on the preset verification environment framework description language; and then renders the tree data structure through a preset template to generate a target verification environment corresponding to the language file. In this way, the present application can generate a tree data structure for the target verification environment framework through a language for describing the verification environment structure and a corresponding language compiler; the verification environment of different levels and modules can be flexibly described through a programming language; and the present application can generate a corresponding target verification environment by using the obtained tree data structure through template rendering; this can improve the flexibility and efficiency of generating a verification environment. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0033] Figure 1 A flow chart of a verification environment generation method disclosed in this application;

[0034] Figure 2 A specific verification environment code diagram disclosed in this application;

[0035] Figure 3 A schematic diagram of a tree data structure disclosed in this application;

[0036] Figure 4 A flow chart of a specific verification environment generation method disclosed in this application;

[0037] Figure 5 A schematic diagram of the structure of a verification environment generating device disclosed in this application;

[0038] Figure 6 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] See also Figure 1 As shown, an embodiment of the present invention discloses a verification environment generation method, including:

[0041] Step S11: Obtain a language file written based on a preset verification environment framework description language and used to describe a target verification environment framework.

[0042] In the embodiment of the present application, a description language VerificationTDL (Testbench Description Language) for describing a verification framework may be predefined, and a language file of a corresponding target verification environment framework may be written through the description language.

[0043] In a specific embodiment, before obtaining a language file for describing a target verification environment framework written in a preset verification environment framework description language, the method may further include: declaring environment components using custom keywords, and describing the hierarchical relationship between the environment components based on the json format to obtain the preset verification framework description language. Specifically, each environment component may be declared using custom keywords, and the keywords are shown in Table 1 below:

[0044] Table 1

[0045]

[0046] Among them, the above keywords can be used to declare environment components, and array declaration is also supported; and the hierarchical relationship between environment components can be described in a format similar to json (lightweight text data exchange format).

[0047] In another specific embodiment, the acquisition of a language file for describing a target verification environment framework written in a preset verification environment framework description language may include: acquiring a language file for describing a target verification environment framework written in a preset verification environment framework description language through a preset interactive interface; the file format of the language file is a format that matches the preset interactive interface. Specifically, the description language used to describe the verification environment framework in the present application may be a structured text or a binary file, and the user or relevant staff may input a language file that matches the format supported by the interactive interface through a preset interactive interface. Figure 2 The following is the code for a specific verification environment.

[0048] Step S12: parse the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compiler constructed based on the preset verification environment framework description language.

[0049] In order to parse the language file written in the preset verification environment framework description language, a compiler for the description language needs to be constructed in this application; the above-mentioned language file is parsed by the constructed preset compiler, and a tree data structure corresponding to the target verification environment framework of the language file can be generated; in a specific embodiment, the compiler can be based on the ANTLR4 (Another Tool for Language Recognition) open source tool, which is a syntax analyzer generator for reading, processing, executing and translating structured text or binary files, widely used in building languages, tools and frameworks, and through syntax description rules, it can generate a parser that can traverse the parsing tree. In a specific embodiment, before the preset compiler is used to parse the language file, it can also include: writing a corresponding grammar rule file according to the preset verification environment framework description language; in the development environment of the pre-set open source grammar analyzer, such as the ANTLR4 Python development environment (pip install antlr-python3-runtime), the grammar rule file is used in the development environment to build a lexical analyzer and a language interpreter to build the preset compiler. In the process of building the compiler, you need to write the corresponding grammar rule file according to the preset verification environment framework description language to describe keywords and lexical specifications. Some grammar details are as follows:

[0050] Grammar Testbench;

[0051] R : 'connect'ID

[0052] ID: [a-zA-Z]+.

[0053] WS: [\t\r\n]+ -> skip;

[0054] / / other codes.

[0055] The grammar rule file can then be used in the development environment of a pre-built open source grammar analyzer to build a lexical analyzer and a language interpreter to build the final compiler.

[0056] In a specific embodiment, the use of a preset compiler to parse the language file to generate a tree data structure corresponding to the target verification environment framework may include: setting the preset compiler to a visitor mode, so that the preset compiler uses the visitor mode to parse the language file to generate a tree data structure corresponding to the target verification environment framework. Specifically, in a development environment, the visitor mode can be used to compile a grammar file that needs to be parsed, and the compiler can generate a tree data structure corresponding to the language file using the visitor mode.

[0057] In another specific embodiment, the use of a preset compiler to parse the language file to generate a tree data structure corresponding to the target verification environment framework may include: using the preset compiler to parse the language file to obtain a number of tree information corresponding to a number of verification components; generating a tree data structure for the target verification environment framework based on the number of tree information. Specifically, during the parsing of the language file, the preset compiler is used to parse the language file to obtain a number of tree information corresponding to a number of verification components; then, a tree data structure for the target verification environment framework can be generated based on these number of tree information. In a specific embodiment, part of the code for parsing a language file into a tree data structure is shown below:

[0058] def main():

[0059] lexer = testbenchLexer(antlr4.StdinStream())

[0060] stream = antlr4.CommonTokenStream(lexer)

[0061] parser = testbenchParser(stream)

[0062] root_node = parser.vistor.visit(parser)

[0063] Among them, root_node is the root node of a tree structure, and the corresponding tree data structure can be as follows Figure 3 shown.

[0064] Step S13: Rendering the tree data structure through a preset template to generate a target verification environment corresponding to the language file.

[0065] In this embodiment, after the tree data structure corresponding to the target verification environment is obtained by parsing through the above steps, the tree data structure can be rendered through a preset template system, and a target verification environment corresponding to the language file can be generated. In a specific embodiment, the rendering of the tree data structure through a preset template to generate a target verification environment corresponding to the language file can include: rendering the tree data structure through a Jinja2 template to generate a target verification environment corresponding to the language file. Specifically, Jinja2 is a template system that provides template support. The template system provides control structures, expressions and inheritance, format control and other features. It is widely used due to its flexibility, speed and high readability. Combining the code framework of the verification environment with the advantages of the Jinja2 template system, the files required for the verification environment can be quickly generated, greatly improving efficiency.

[0066] In a specific embodiment, the total number of template files used in the entire VerificationTDL-compiler (compilation of description language) process is 53. They are mainly divided into the following categories: 1. Agent files (file) template; 2. Env files template; 3. Harness files template; 4. Ral files template; 5. Refmodel files template; 6. Scoreboard files template; 7. Script files template; 8. Test files template; 9. Subenv file template.

[0067] The following takes the Agent files template as an example to introduce the rendering process of files related to the UVM verification environment and agent. Among them, the agent template file includes the template files in Table 2 below:

[0068] Table 2

[0069]

[0070] Furthermore, the uvm_agent template file corresponding to the UVM verification environment is as follows Figure 3 As shown, the content in {{}} is the content that needs to be rendered. Correspondingly, the main code of the generated file is as follows Figure 4 shown.

[0071] In a specific embodiment, Figure 4As shown, firstly, a language file for describing the verification environment is constructed based on VerificationTDL, and the language file is input into the pre-set VerificationTDL-compiler (language compiler) to parse the language file. After a detailed analysis check (Parse interpretation, Elaborate expansion, Check check), the Hierarchical Testbench Model (tree data structure of the verification environment) can be obtained. Furthermore, the obtained tree data structure is rendered through the Jinjia2 template to obtain the verification environment files (UVM Testbench Files) corresponding to the final UVM verification environment (TestbenchFiles).

[0072] It can be seen that the present application can generate a tree data structure for a target verification environment framework through a language for describing a verification environment structure and a corresponding language compiler; verification environments of different levels and modules can be flexibly described through a programming language; and the present application can generate a corresponding target verification environment using the obtained tree data structure through template rendering. This process can flexibly and automatically generate a verification environment, support the generation of different UVM verification environments, meet the needs of various verification environments, and improve the efficiency of verification.

[0073] like Figure 5 As shown, the embodiment of the present application discloses a verification environment generating device, including:

[0074] A language file acquisition module 11 is used to acquire a language file for describing a target verification environment framework written in a preset verification environment framework description language;

[0075] A language file parsing module 12, used to parse the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compilation tool constructed based on the preset verification environment framework description language;

[0076] The rendering module 13 is used to render the tree data structure through a preset template to generate a target verification environment corresponding to the language file.

[0077] It can be seen from this that the present application can generate a tree data structure for a target verification environment framework through a language used to describe the verification environment structure and a corresponding language compiler; verification environments of different levels and modules can be flexibly described through a programming language; and the present application can generate a corresponding target verification environment using the obtained tree data structure through template rendering; this can improve the flexibility and efficiency of generating a verification environment.

[0078] In a specific embodiment, the device may further include:

[0079] The description language construction module is used to declare environment components using custom keywords and describe the hierarchical relationship between the environment components based on the json format to obtain the preset verification framework description language.

[0080] In a specific embodiment, the language file acquisition module 11 may include:

[0081] The language file acquisition unit is used to acquire a language file for describing a target verification environment framework written in a preset verification environment framework description language through a preset interactive interface; the file format of the language file is a format that matches the preset interactive interface.

[0082] In a specific embodiment, the device may further include:

[0083] A grammar rule file writing module, used to write a corresponding grammar rule file according to the preset verification environment framework description language;

[0084] The compiler construction module is used to construct a lexical analyzer and a language interpreter using the grammar rule file in a development environment of a preset open source grammar analyzer, so as to construct the preset compiler.

[0085] In a specific embodiment, the language file parsing module 12 may include:

[0086] The first language file parsing unit is used to set the preset compiler to a visitor mode, so as to parse the language file by the preset compiler using the visitor mode to generate a tree data structure corresponding to the target verification environment framework.

[0087] In a specific embodiment, the language file parsing module 12 may include:

[0088] A second language file parsing unit, used for parsing the language file using the preset compiler to obtain a plurality of tree information corresponding to a plurality of verification components;

[0089] The tree data structure generating unit is used to generate a tree data structure for the target verification environment framework according to the plurality of tree information.

[0090] In a specific embodiment, the rendering module 13 may include:

[0091] The rendering unit is used to render the tree data structure through a Jinja2 template to generate a target verification environment corresponding to the language file.

[0092] Furthermore, the present application also discloses an electronic device. Figure 6 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0093] Figure 6 A schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the verification environment generation method disclosed in any of the aforementioned embodiments. In addition, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0094] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0095] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0096] The operating system 221 is used to manage and control the hardware devices on the electronic device 20 and the computer program 222, which can be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program that can be used to complete the verification environment generation method performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer program 222 can further include a computer program that can be used to complete other specific tasks.

[0097] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the aforementioned disclosed verification environment generation method. For the specific steps of the method, reference may be made to the corresponding contents disclosed in the aforementioned embodiments, and no further description will be given here.

[0098] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0099] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0100] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0101] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0102] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A verification environment generation method, characterized in that: include: Obtaining a language file for describing a target verification environment framework written in a preset verification environment framework description language; The language file is parsed using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compiler constructed based on the preset verification environment framework description language; Rendering the tree data structure through a preset template to generate a target verification environment corresponding to the language file; Before parsing the language file using a preset compiler, the method further includes: Write a corresponding grammar rule file according to the preset verification environment framework description language; In a development environment of a preset open source syntax analyzer, constructing a lexical analyzer and a language interpreter using the syntax rule file to construct the preset compiler; The method of parsing the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework includes: Setting the preset compiler to a visitor mode, so as to parse the language file by the preset compiler using the visitor mode to generate a tree data structure corresponding to the target verification environment framework; Wherein, before obtaining a language file for describing a target verification environment framework written in a preset verification environment framework description language, the method further includes: The environment components are declared using custom keywords, and the hierarchical relationship between the environment components is described based on the json format to obtain the preset verification framework description language.

2. The verification environment generation method according to claim 1, characterized in that: The obtaining of a language file for describing a target verification environment framework written in a preset verification environment framework description language includes: A language file for describing a target verification environment framework written in a preset verification environment framework description language is obtained through a preset interactive interface; the file format of the language file is a format that matches the preset interactive interface.

3. The verification environment generation method according to claim 1, characterized in that: The method of parsing the language file by using a preset compiler to generate a tree data structure corresponding to the target verification environment framework includes: Parsing the language file using the preset compiler to obtain a number of tree information corresponding to a number of verification components; A tree data structure for the target verification environment framework is generated according to the plurality of tree information.

4. The verification environment generation method according to any one of claims 1 to 3, characterized in that: The rendering of the tree data structure by using a preset template to generate a target verification environment corresponding to the language file includes: The tree data structure is rendered through a Jinja2 template to generate a target verification environment corresponding to the language file.

5. A verification environment generating device, characterized in that: include: A language file acquisition module, used to acquire a language file for describing a target verification environment framework written in a preset verification environment framework description language; A language file parsing module, used to parse the language file using a preset compiler to generate a tree data structure corresponding to the target verification environment framework; the preset compiler is a compilation tool constructed based on the preset verification environment framework description language; A rendering module, used for rendering the tree data structure through a preset template to generate a target verification environment corresponding to the language file; Wherein, the device further comprises: A grammar rule file writing module is used to write a corresponding grammar rule file according to the preset verification environment framework description language; A compiler construction module, in a development environment of a preset open source syntax analyzer, uses the syntax rule file to construct a lexical analyzer and a language interpreter to construct the preset compiler; Wherein, the language file parsing module includes: A first language file parsing unit sets the preset compiler to a visitor mode, so as to parse the language file by the preset compiler using the visitor mode to generate a tree data structure corresponding to the target verification environment framework; Wherein, the device further comprises: The description language construction module is used to declare environment components using custom keywords and describe the hierarchical relationship between the environment components based on the json format to obtain the preset verification framework description language.

6. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the verification environment generation method according to any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, implements the verification environment generation method according to any one of claims 1 to 4.

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