A threshold voltage detection system and method for LIN interface chip

Abstract

The present application discloses a threshold voltage detection system and method for a LIN interface chip, which comprises a direct current power supply, a signal generator, a data generation module and a test device, wherein the direct current power supply provides voltage to the chip under test, the signal generator provides a waveform signal to the chip under test, the data generation module provides a recessive level and an explicit level to the chip under test, the data generation module comprises an RX pin and a TX pin, and the test device detects a response signal waveform after the chip under test receives a signal; that is, the signal generator or the data generation module is used to provide a waveform signal or a recessive level and an explicit level to the chip under test, so as to realize threshold voltage detection of LIN interface chips of various specifications, thereby reducing the complexity of building threshold voltage detection circuits of LIN interface chips of different specifications, improving the threshold voltage detection efficiency of the LIN interface chip, and at the same time reducing the error introduced by building the detection circuit multiple times, thereby improving the threshold voltage detection accuracy of the LIN interface chip.

Description

Technical Field

[0001] The present application relates to the technical field of threshold voltage detection of LIN interface chips, and in particular to a threshold voltage detection system and method for a LIN interface chip. Background Art

[0002] As automobile systems become increasingly intelligent, LIN bus has emerged as a new type of automobile bus technology. LIN bus not only has important information communication functions, but also has the unique advantage of low cost. Threshold voltage is one of the important parameters of LIN interface chip. Threshold voltage is crucial to the reliability and stability of LIN bus communication. In the design of LIN interface chip, threshold voltage needs to be accurately adjusted according to the specific communication environment and hardware design. In addition, detecting whether the threshold voltage of the chip to be tested is correctly implemented within the entire specified working power supply voltage range is also an important test content of LIN interface chip.

[0003] However, there are currently different specifications of LIN interface chips, so the threshold voltage detection circuits of different specifications of LIN interface chips are relatively independent, that is, detection circuits or systems need to be built separately for different specifications of LIN interface chips, which is cumbersome and inefficient. Therefore, it is urgent to design a system or circuit with threshold voltage detection function for LIN interface chips of multiple specifications. Summary of the invention

[0004] In order to solve the above technical problems, the present application is proposed. The embodiments of the present application provide a threshold voltage detection system and method for a LIN interface chip.

[0005] According to one aspect of the present application, a threshold voltage detection system for a LIN interface chip is provided, comprising: a DC power supply, the DC power supply is connected to a chip under test and used to provide voltage to the chip under test; a signal generator, the signal generator is connected to the chip under test and used to provide a waveform signal to the chip under test; a data generation module, the data generation module is connected to the chip under test and used to provide a recessive level and a dominant level to the chip under test; wherein the data generation module comprises an RX pin and a TX pin; and a test device, the test device is connected to the chip under test and used to detect a response signal waveform after the chip under test receives the waveform signal provided by the signal generator, or the recessive level and the dominant level provided by the data generation module.

[0006] In one embodiment, a first switch is provided between the test device and a first connection point; wherein the first connection point is a connection point between the chip under test and the DC power supply.

[0007] In one embodiment, a second switch is provided between the test device and the chip under test, and a third switch is provided between the test device and the first connection point.

[0008] In one embodiment, a sampling resistor is arranged between the third switch and the second connection point; wherein the second connection point is a connection point between the chip under test and the signal generator and the data generation module.

[0009] In one embodiment, a fourth switch is provided between the chip under test and the data generating module.

[0010] In one embodiment, a fifth switch is provided between the chip under test and the signal generator.

[0011] In one embodiment, the data generation module includes a recessive voltage power supply and an explicit voltage power supply; wherein switches are respectively provided between the chip under test and the recessive voltage power supply, the explicit voltage power supply, and the TX pin.

[0012] According to another aspect of the present application, a threshold voltage detection method for a LIN interface chip is provided, which is applied to a threshold voltage detection system for a LIN interface chip as described in any one of the above items, and the threshold voltage detection method for the LIN interface chip comprises: acquiring specification information of the chip under test; determining a connection mode between the chip under test and the test device, the data generation module, and the signal generator according to the specification information of the chip under test; controlling the DC power supply to output a supply voltage, and the signal generator or the data generation module to output a test signal; wherein the test signal comprises a waveform signal output by the signal generator, or a recessive level and a dominant level output by the data generation module; detecting a response signal waveform after the chip under test receives the test signal; and determining the threshold voltage of the chip under test according to the response signal waveform.

[0013] In one embodiment, determining the connection method between the chip under test and the test device, the data generation module, and the signal generator based on the specification information of the chip under test includes: if the chip under test is a LIN interface chip with an RX pin and a TX pin, connecting the chip under test and the test device and the signal generator, and disconnecting the chip under test and the data generation module.

[0014] In one embodiment, determining the connection method between the chip under test and the test device, the data generation module, and the signal generator based on the specification information of the chip under test includes: if the chip under test is a LIN interface chip without an RX pin and a TX pin, connecting the chip under test and the test device and the data generation module, and disconnecting the chip under test and the signal generator.

[0015] The present application provides a threshold voltage detection system and method for a LIN interface chip, which is provided by setting a DC power supply, a signal generator, a data generation module and a test device, wherein the DC power supply, the signal generator, the data generation module and the test device are all connected to the chip under test, the DC power supply provides voltage to the chip under test, the signal generator provides a waveform signal to the chip under test, the data generation module provides an invisible level and an explicit level to the chip under test, the data generation module includes an RX pin and a TX pin, and the test device detects the response signal waveform after the chip under test receives the waveform signal provided by the signal generator, or the invisible level and the explicit level provided by the data generation module; that is, the signal generator or the data generation module is used to provide the chip under test with a waveform signal or an invisible level and an explicit level to realize the threshold voltage detection of LIN interface chips of various specifications, thereby reducing the cumbersomeness of building the threshold voltage detection circuit of LIN interface chips of different specifications, improving the threshold voltage detection efficiency of the LIN interface chip, and at the same time, it can also reduce the error introduced by building the detection circuit multiple times, thereby improving the threshold voltage detection accuracy of the LIN interface chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0017] Figure 1 It is a structural schematic diagram of a threshold voltage detection system of a LIN interface chip provided by an exemplary embodiment of the present application.

[0018] Figure 2 It is a flowchart of a threshold voltage detection method for a LIN interface chip provided by an exemplary embodiment of the present application.

[0019] Figure 3 It is a structural schematic diagram of a threshold voltage detection system of a LIN interface chip provided by another exemplary embodiment of the present application.

[0020] Figure 4 It is a structural schematic diagram of a threshold voltage detection system of a LIN interface chip provided by another exemplary embodiment of the present application.

[0021] Figure 5 It is a structural schematic diagram of a threshold voltage detection system of a LIN interface chip provided by another exemplary embodiment of the present application.

[0022] Figure 6It is a structural schematic diagram of a threshold voltage detection system of a LIN interface chip provided by another exemplary embodiment of the present application.

[0023] Figure 7 It is a structural diagram of an electronic device provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION

[0024] Below, the exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application, and it should be understood that the present application is not limited to the exemplary embodiments described here.

[0025] Figure 1 FIG. 1 is a schematic diagram of a threshold voltage detection system for a LIN interface chip provided by an exemplary embodiment of the present application. Figure 1 As shown, the threshold voltage detection system of the LIN interface chip includes: a DC power supply, a signal generator, a data generation module and a test device; wherein the DC power supply is connected to the chip under test to provide voltage to the chip under test, the signal generator is connected to the chip under test to provide a waveform signal to the chip under test, the data generation module is connected to the chip under test to provide an invisible level and an explicit level to the chip under test, the data generation module includes an RX pin and a TX pin, and the test device is connected to the chip under test to detect the waveform signal provided by the signal generator or the response signal waveform after the invisible level and the explicit level provided by the data generation module. This application sets a DC power supply to the chip under test ( Figure 1 Specifically, the DC power supply outputs a voltage within a voltage range of ±60V and a slope voltage signal required for detection, and a signal generator and a data generation module are provided to respectively output waveform signals (specifically square waves, triangle waves and other signals with different frequencies and different duty cycles), invisible levels and explicit levels, and at the same time, a test device is used to detect the response signal waveform of the chip under test, thereby realizing the threshold voltage detection of the chip under test, wherein the test device can be an oscilloscope, a voltmeter and other devices for detecting voltage signals.

[0026] The present application provides a threshold voltage detection system and method for a LIN interface chip, which is provided by setting a DC power supply, a signal generator, a data generation module and a test device, wherein the DC power supply, the signal generator, the data generation module and the test device are all connected to the chip under test, the DC power supply provides voltage to the chip under test, the signal generator provides a waveform signal to the chip under test, the data generation module provides an invisible level and an explicit level to the chip under test, the data generation module includes an RX pin and a TX pin, and the test device detects the response signal waveform after the chip under test receives the waveform signal provided by the signal generator, or the invisible level and the explicit level provided by the data generation module; that is, the signal generator or the data generation module is used to provide the chip under test with a waveform signal or an invisible level and an explicit level to realize the threshold voltage detection of LIN interface chips of various specifications, thereby reducing the cumbersomeness of building the threshold voltage detection circuit of LIN interface chips of different specifications, improving the threshold voltage detection efficiency of the LIN interface chip, and at the same time, it can also reduce the error introduced by building the detection circuit multiple times, thereby improving the threshold voltage detection accuracy of the LIN interface chip.

[0027] In one embodiment, if Figure 1 As shown, a first switch is set between the test equipment and the first connection point; wherein the first connection point is the connection point between the chip under test and the DC power supply.

[0028] The present application sets a first switch S1 between the test device and the first connection point to connect or disconnect the V of the test device and the chip under test. IUT Pin.

[0029] In one embodiment, if Figure 1 As shown, a second switch is set between the test device and the chip under test, and a third switch is set between the test device and the chip under test.

[0030] The present application sets a second switch between the test device and the chip under test to connect or disconnect the RX pin of the test device and the chip under test, and sets a third switch between the test device and the chip under test to connect or disconnect the V pin of the test device and the chip under test. IUT Pin.

[0031] In one embodiment, if Figure 1 As shown, a sampling resistor is arranged between the third switch and the second connection point; wherein the second connection point is a connection point between the chip under test and the signal generator and the data generation module.

[0032] The present application sets a sampling resistor R between the third switch and the second connection point. BUS , so as to use the sampling resistor to collect the voltage value on the LIN bus.

[0033] In one embodiment, if Figure 1As shown, a fourth switch is set between the chip under test and the data generating module.

[0034] The present application sets a fourth switch between the chip under test and the data generation module to connect or disconnect the test equipment, the chip under test and the data generation module.

[0035] In one embodiment, if Figure 1 As shown, a fifth switch is set between the chip under test and the signal generator.

[0036] The present application sets a fifth switch between the chip under test and the signal generator to connect or disconnect the test equipment, the chip under test and the signal generator.

[0037] In one embodiment, if Figure 1 As shown, the data generation module includes an invisible voltage power supply and an explicit voltage power supply; wherein switches are respectively set between the chip under test and the invisible voltage power supply, the explicit voltage power supply, and the TX pin.

[0038] The data generation module of the present application includes an invisible voltage power supply, an explicit voltage power supply, a TX pin and an RX pin to detect the threshold voltage of a LIN interface chip that does not have a TX pin and an RX pin, and a bidirectional switch S is set between the chip under test and the invisible voltage power supply and between the chip under test and the TX pin. W1 , to connect or disconnect the chip under test and the invisible voltage power supply, TX pin, and set a bidirectional switch S between the chip under test and the explicit voltage power supply, and between the explicit voltage power supply and the TX pin W2 , to connect or disconnect the dominant voltage power supply and the chip under test, TX pin.

[0039] Figure 2 1 is a flow chart of a threshold voltage detection method for a LIN interface chip provided by an exemplary embodiment of the present application. The threshold voltage detection method for a LIN interface chip is applied to a threshold voltage detection system for a LIN interface chip of any of the above items, such as Figure 2 As shown, the threshold voltage detection method of the LIN interface chip includes the following steps:

[0040] Step 210: Obtain specification information of the chip under test.

[0041] Specifically, the specification information of the chip under test includes a voltage value and whether it has a TX pin and an RX pin.

[0042] Step 220: Determine the connection method between the chip under test and the test equipment, data generation module, and signal generator according to the specification information of the chip under test.

[0043] After obtaining the specification information of the chip under test, the present application determines the connection method between the chip under test and the test equipment, the data generation module, and the signal generator according to the specification information of the chip under test, and controls the closing or opening of the corresponding switch based on the connection method between the chip under test and the test equipment, the data generation module, and the signal generator to realize different detection circuits, thereby realizing threshold voltage detection of LIN interface chips of different specifications.

[0044] Step 230: Control the DC power supply to output the supply voltage, and the signal generator or the data generation module to output the test signal.

[0045] The test signal includes a waveform signal output by a signal generator, or a recessive level and a dominant level output by a data generation module. The test signal for threshold voltage detection of the chip under test is obtained by controlling a DC power supply to supply power to the chip under test, and using a waveform signal output by a signal generator or a recessive level and a dominant level output by a data generation module.

[0046] Step 240: Detect the response signal waveform of the chip under test after receiving the test signal.

[0047] The chip under test will respond after receiving the test signal and send a response signal on the RX pin. The present application uses a test device to detect the response signal waveform of the chip under test to detect the threshold voltage characteristic electrical signal of the chip under test.

[0048] Step 250: Determine the threshold voltage of the chip under test according to the response signal waveform.

[0049] The present application calculates the threshold voltage of the chip under test based on the response signal waveform of the chip under test detected by the testing equipment, so as to measure the threshold voltage of the chip under test.

[0050] The present application provides a threshold voltage detection method for a LIN interface chip, which is provided by setting a DC power supply, a signal generator, a data generation module and a test device, wherein the DC power supply, the signal generator, the data generation module and the test device are all connected to the chip under test, the DC power supply provides voltage to the chip under test, the signal generator provides a waveform signal to the chip under test, the data generation module provides an invisible level and an explicit level to the chip under test, the data generation module includes an RX pin and a TX pin, and the test device detects the waveform signal provided by the signal generator or the response signal waveform after the chip under test receives the invisible level and the explicit level provided by the data generation module; the chip under test and the test device are adjusted according to the specification information of the chip under test. The invention discloses a method for connecting a test chip, a data generating module and a signal generator to realize the threshold voltage detection of the chip under test, and determines the threshold voltage of the chip under test by outputting a test signal and detecting the response signal waveform after the chip under test receives the test signal; that is, the signal generator or the data generating module is used to provide the chip under test with a waveform signal or a recessive level and an explicit level to realize the threshold voltage detection of LIN interface chips of various specifications, thereby reducing the cumbersomeness of building the threshold voltage detection circuit of the LIN interface chips of different specifications, improving the threshold voltage detection efficiency of the LIN interface chip, and at the same time reducing the error introduced by building the detection circuit for multiple times, thereby improving the threshold voltage detection accuracy of the LIN interface chip.

[0051] Figure 3 FIG. 1 is a schematic diagram of a threshold voltage detection system for a LIN interface chip provided by another exemplary embodiment of the present application. Figure 3 As shown, the specific implementation method of the above step 220 can be: if the chip under test is a 12V LIN interface chip with an RX pin and a TX pin, connect the chip under test and the test equipment and the signal generator, and disconnect the chip under test and the data generation module.

[0052] Specifically, in Figure 1 The threshold voltage detection system of the LIN interface chip shown in FIG. 1 is based on closing the switch S2 and the switch S5 and opening the other switches to obtain the following Figure 3 The circuit structure shown. At this time, the threshold voltage detection system of the LIN interface chip includes a DC power supply, a signal generator and a test device, wherein the DC power supply supplies power to the chip under test (test object) to output a voltage within the voltage range of ±60V and a slope voltage signal required for the test, and the signal generator sends square waves, triangle waves and other signals with different frequencies and duty cycles to the chip under test. After receiving the waveform signal sent by the signal generator, the chip under test sends a response signal at the RX pin, and the test device (such as an oscilloscope) detects the response signal to realize the detection of the threshold voltage characteristic electrical signal of the chip under test.

[0053] In one embodiment, if Figure 3As shown, the specific implementation method of the above step 220 can be: if the chip under test is a 24V LIN interface chip with an RX pin and a TX pin, connect the chip under test and the test equipment and the signal generator, and disconnect the chip under test and the data generation module.

[0054] Specifically, in Figure 1 Based on the threshold voltage detection system of the LIN interface chip shown in FIG. 1 , the switches S2 and S5 are closed, and the other switches are opened to obtain the following Figure 3 The circuit structure shown. At this time, the threshold voltage detection system of the LIN interface chip includes a DC power supply, a signal generator and a test device, wherein the DC power supply supplies power to the chip under test (test object) to output a voltage within the voltage range of ±60V and a slope voltage signal required for the test, and the signal generator sends square waves, triangle waves and other signals with different frequencies and duty cycles to the chip under test. After receiving the waveform signal sent by the signal generator, the chip under test sends a response signal at the RX pin, and the test device (such as an oscilloscope) detects the response signal to realize the detection of the threshold voltage characteristic electrical signal of the chip under test.

[0055] Figure 4 FIG. 1 is a schematic diagram of a threshold voltage detection system for a LIN interface chip provided by another exemplary embodiment of the present application. Figure 4 As shown, the specific implementation method of the above step 220 can be: if the chip under test is a 12V LIN interface chip without RX pin and TX pin, connect the chip under test and the test equipment, data generation module, and disconnect the chip under test and the signal generator.

[0056] Specifically, in Figure 1 Based on the threshold voltage detection system of the LIN interface chip shown in FIG. 1 , the switch S1, the switch S3 and the switch S4 are closed, and the other switches are opened to obtain the following Figure 4 The circuit structure shown. The threshold voltage detection system of the LIN interface chip at this time includes a DC power supply, a data generation module and a test device, wherein the DC power supply supplies power to the chip under test (test object) to output a voltage within the voltage range of ±60V and a slope voltage signal required for the test, and the recessive voltage power supply and the dominant voltage power supply of the data generation module provide recessive and dominant levels for the LIN bus frame signal respectively. The data generation module passes a low impedance path (S W1 ) and the high impedance path (S W2 ) Connect the LIN bus to the implicit voltage power supply and the explicit voltage power supply. The data generation module sends a LIN frame signal with an adjustable implicit / explicit level. After receiving the LIN frame signal sent by the data generation module, the chip under test sends a response signal. The test equipment (such as an oscilloscope) detects the response signal to detect the threshold voltage characteristic electrical signal of the chip under test.

[0057] Figure 5 FIG. 1 is a schematic diagram of a threshold voltage detection system for a LIN interface chip provided by another exemplary embodiment of the present application. Figure 5 As shown, the specific implementation method of the above step 220 can be: if the chip under test is a 24V LIN interface chip without RX pin and TX pin, connect the chip under test and the test equipment, data generation module, and disconnect the chip under test and the signal generator.

[0058] Specifically, in Figure 1 Based on the threshold voltage detection system of the LIN interface chip shown in FIG. 1 , the switches S3 and S4 are closed, and the other switches are opened to obtain the following Figure 5 The circuit structure shown. The threshold voltage detection system of the LIN interface chip at this time includes a DC power supply, a data generation module and a test device, wherein the DC power supply supplies power to the chip under test (test object) to output a voltage within the voltage range of ±60V and a slope voltage signal required for the test, and the recessive voltage power supply and the dominant voltage power supply of the data generation module provide recessive and dominant levels for the LIN bus frame signal respectively. The data generation module passes a low impedance path (S W1 ) and the high impedance path (S W2 ) Connect the LIN bus to the implicit voltage power supply and the explicit voltage power supply. The data generation module sends a LIN frame signal with an adjustable implicit / explicit level. After receiving the LIN frame signal sent by the data generation module, the chip under test sends a response signal. The test equipment (such as an oscilloscope) detects the response signal to detect the threshold voltage characteristic electrical signal of the chip under test.

[0059] Figure 6 FIG. 1 is a schematic diagram of a threshold voltage detection system for a LIN interface chip provided by another exemplary embodiment of the present application. Figure 6 As shown, the specific implementation method of the above step 220 can be: if the chip under test is a 24V LIN interface chip without RX pin and TX pin, connect the chip under test and the test equipment, data generation module, and disconnect the chip under test and the signal generator.

[0060] Specifically, in Figure 1 Based on the threshold voltage detection system of the LIN interface chip shown in FIG. 1 , switch S1, switch S3 and switch S4 are closed and other switches are opened to obtain the following Figure 6The circuit structure shown. The threshold voltage detection system of the LIN interface chip at this time includes a DC power supply, a data generation module and a test device, wherein the DC power supply supplies power to the chip under test (test object) to output a voltage within the voltage range of ±60V and a slope voltage signal required for the test, and the recessive voltage power supply and the dominant voltage power supply of the data generation module provide recessive and dominant levels for the LIN bus frame signal respectively. The data generation module passes a low impedance path (S W1 ) and the high impedance path (S W2 ) Connect the LIN bus to the implicit voltage power supply and the explicit voltage power supply. The data generation module sends a LIN frame signal with an adjustable implicit / explicit level. After receiving the LIN frame signal sent by the data generation module, the chip under test sends a response signal. The test equipment (such as an oscilloscope) detects the response signal to detect the threshold voltage characteristic electrical signal of the chip under test.

[0061] Below, reference Figure 7 The electronic device according to the embodiment of the present application is described. The electronic device may be any one or both of the first device and the second device or a stand-alone device independent of them, and the stand-alone device may communicate with the first device and the second device to receive the collected input signal from them.

[0062] Figure 7 A block diagram of an electronic device according to an embodiment of the present application is illustrated.

[0063] like Figure 7 As shown, the electronic device 10 includes one or more processors 11 and a memory 12 .

[0064] The processor 11 may be a central processing unit (CPU) or other forms of processing units having data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device 10 to perform desired functions.

[0065] The memory 12 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may include, for example, a read-only memory (ROM), a hard disk, a flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 11 may run the program instructions to implement the methods of the various embodiments of the present application described above and / or other desired functions. Various contents such as input signals, signal components, noise components, etc. may also be stored in the computer-readable storage medium.

[0066] In one example, the electronic device 10 may further include: an input device 13 and an output device 14 , and these components are interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0067] When the electronic device is a stand-alone device, the input device 13 may be a communication network connector, which is used to receive the collected input signals from the first device and the second device.

[0068] In addition, the input device 13 may also include, for example, a keyboard, a mouse, and the like.

[0069] The output device 14 can output various information to the outside, including determined distance information, direction information, etc. The output device 14 can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, and the like.

[0070] Of course, to simplify, Figure 7 Only some of the components related to the present application in the electronic device 10 are shown, and components such as a bus, an input / output interface, etc. are omitted. In addition, according to specific application situations, the electronic device 10 may also include any other appropriate components.

[0071] In addition to the above-mentioned methods and devices, an embodiment of the present application may also be a computer program product, which includes computer program instructions, which, when executed by a processor, enable the processor to execute the steps of the method according to various embodiments of the present application described in the above-mentioned "Exemplary Method" section of this specification.

[0072] The computer program product may be written in any combination of one or more programming languages ​​to write program codes for performing the operations of the embodiments of the present application, including object-oriented programming languages, such as Java, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as an independent software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0073] In addition, an embodiment of the present application may also be a computer-readable storage medium on which computer program instructions are stored. When the computer program instructions are executed by a processor, the processor executes the steps of the method according to various embodiments of the present application described in the above "Exemplary Method" section of this specification.

[0074] The computer readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can include, for example, but is not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above.

[0075] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.

[0076] The block diagrams of the devices, apparatuses, equipment, and systems involved in this application are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.

[0077] It should also be noted that in the apparatus, device and method of the present application, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present application.

[0078] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0079] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A threshold voltage detection system for a LIN interface chip, characterized in that: include: A direct current power supply, the direct current power supply is connected to the chip under test and is used to provide voltage to the chip under test; A signal generator, the signal generator is connected to the chip under test and is used to provide a waveform signal to the chip under test; A data generation module, the data generation module is connected to the chip under test and is used to provide a recessive level and a dominant level to the chip under test; wherein the data generation module includes an RX pin and a TX pin; A test device, the test device is connected to the chip under test, and is used to detect the response signal waveform of the chip under test after receiving the waveform signal provided by the signal generator, or the recessive level and dominant level provided by the data generation module; A first switch is provided between the test device and a first connection point; wherein the first connection point is a connection point between the chip under test and the DC power supply; A second switch is provided between the test device and the chip under test, and a third switch is provided between the test device and the first connection point; A fourth switch is provided between the chip under test and the data generating module; A fifth switch is provided between the chip under test and the signal generator.

2. The threshold voltage detection system of the LIN interface chip according to claim 1, characterized in that: A sampling resistor is arranged between the third switch and the second connection point; wherein the second connection point is a connection point between the chip under test and the signal generator and the data generation module.

3. The threshold voltage detection system of the LIN interface chip according to claim 1, characterized in that: The data generation module includes a recessive voltage power supply and an explicit voltage power supply; wherein switches are respectively arranged between the chip under test and the recessive voltage power supply, the explicit voltage power supply, and the TX pin.

4. A threshold voltage detection method for a LIN interface chip, characterized in that: A threshold voltage detection system for a LIN interface chip according to any one of claims 1 to 3, wherein the threshold voltage detection method for the LIN interface chip comprises: Obtaining specification information of the chip under test; Determining a connection mode between the chip under test and the test device, the data generation module, and the signal generator according to the specification information of the chip under test; Controlling the DC power supply to output a supply voltage, the signal generator or the data generation module to output a test signal; wherein the test signal includes a waveform signal output by the signal generator, or a recessive level and a dominant level output by the data generation module; Detecting a response signal waveform of the chip under test after receiving the test signal; Determining a threshold voltage of the chip under test according to the response signal waveform; Determining the connection mode between the chip under test and the test device, the data generation module, and the signal generator according to the specification information of the chip under test includes: If the chip under test is a LIN interface chip having an RX pin and a TX pin, the chip under test is connected to the test device and the signal generator, and the chip under test is disconnected from the data generation module; Determining the connection mode between the chip under test and the test device, the data generation module, and the signal generator according to the specification information of the chip under test includes: If the chip under test is a LIN interface chip without an RX pin and a TX pin, the chip under test is connected to the test equipment and the data generation module, and the chip under test is disconnected from the signal generator.

Images