Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel comprises a substrate, a conductive layer arranged on the substrate, a limiting layer arranged on one side of the substrate close to the conductive layer and covering the conductive layer, wherein the limiting layer comprises a pixel limiting part and a plurality of pixel openings arranged in the pixel limiting part, an isolation structure provided with a plurality of isolation openings, a projection of the pixel opening on the substrate is located in a projection of the isolation opening on the substrate, a light emitting device located at least partially in the pixel opening, a first encapsulation layer comprising an encapsulation unit arranged on a side of the light emitting device away from the substrate, adjacent encapsulation units are arranged at intervals, and a projection of the edge of the encapsulation unit on the substrate does not overlap with a projection of the conductive layer on the substrate.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel and display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices.

[0003] However, the current manufacturing process of OLED display products needs improvement. Summary of the Invention

[0004] This application provides a display panel and a display device, which aim to improve the structural stability of the display panel.

[0005] An embodiment of the first aspect of this application provides a display panel, comprising: a substrate; a conductive layer disposed on the substrate; a defining layer disposed on the side of the substrate near the conductive layer and covering the conductive layer, the defining layer including a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion; an isolation structure having a plurality of isolation openings, wherein the orthographic projection of the pixel openings on the substrate is located within the orthographic projection of the isolation openings on the substrate; a light-emitting device, at least partially located within the pixel openings; and a first encapsulation layer including encapsulation units disposed on the side of the light-emitting device away from the substrate, adjacent encapsulation units being spaced apart, wherein the orthographic projection of the edge of the encapsulation unit on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate.

[0006] According to an embodiment of the first aspect of this application, there is a gap between adjacent packaging units, and the orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the gap on the substrate, or the orthographic projection of the conductive layer on the substrate and the orthographic projection of the gap on the substrate do not overlap.

[0007] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the conductive layer on the substrate and the orthographic projection of the side surface of the isolation structure facing the isolation opening on the substrate are at least partially overlapped.

[0008] According to any of the foregoing embodiments of the first aspect of this application, the isolation structure has a first top surface on the side away from the substrate. The first top surface has a first region and a second region. The orthographic projection of the first top surface located in the first region onto the substrate is located within the orthographic projection of the conductive layer onto the substrate. There is a height difference between the first top surface in the first region and the first top surface in the second region.

[0009] According to any of the foregoing embodiments of the first aspect of this application, the minimum distance between the first top surface and the substrate in the first region is the first distance, and the minimum distance between the first top surface and the substrate in the second region is the second distance, wherein the first distance is greater than the second distance.

[0010] According to any of the foregoing embodiments of the first aspect of this application, there is a gap between adjacent packaging units, and the orthographic projection of the first top surface located in the second region on the substrate at least partially overlaps with the orthographic projection of the gap on the substrate.

[0011] According to any of the foregoing embodiments of the first aspect of this application, the packaging unit includes a first segment located on the side of the isolation structure away from the substrate, and there is a gap between adjacent packaging units. The side of the first segment away from the substrate has a second top surface, and the minimum distance between the second top surface and the substrate decreases or remains unchanged in the direction from the isolation opening to the gap.

[0012] According to any of the foregoing embodiments of the first aspect of this application, the isolation structure has a first top surface on the side facing away from the substrate, and the first segment is spaced apart from the first top surface.

[0013] According to any of the foregoing embodiments of the first aspect of this application, the second top surface has a third region and a fourth region, the fourth region being located on the side of the third region facing the gap, the minimum distance between the second top surface in the third region and the substrate is the third distance, the minimum distance between the second top surface in the fourth region and the substrate is the fourth distance, and the third distance is greater than the fourth distance.

[0014] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the second top surface located in the third region onto the substrate at least partially overlaps with the orthographic projection of the conductive layer onto the substrate.

[0015] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the conductive layer on the substrate and the orthographic projection of the pixel opening on the substrate do not overlap.

[0016] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the conductive layer on the substrate and the orthographic projection of the surface of the pixel limiting portion facing the pixel opening side on the substrate do not overlap.

[0017] According to any of the foregoing embodiments of the first aspect of this application, at least a portion of the conductive layer is projected onto the substrate by an orthogonal projection of the pixel opening onto the substrate and an orthogonal projection of the gap onto the substrate.

[0018] According to any of the foregoing embodiments of the first aspect of this application, the orthogonal projection of the conductive layer on the substrate is located between the orthogonal projection of the edge of the pixel defining portion on the substrate and the orthogonal projection of the edge of the packaging unit on the substrate.

[0019] According to any of the foregoing embodiments of the first aspect of this application, the conductive layer includes at least one of a positive power supply voltage signal line, a data line, an in-pixel trace, and a reset signal line.

[0020] According to any of the foregoing embodiments of the first aspect of this application, the defining layer includes a first planarization layer and a pixel definition layer, the first planarization layer covers the conductive layer, and the pixel definition layer is disposed on the side of the first planarization layer away from the substrate.

[0021] According to any of the foregoing embodiments of the first aspect of this application, the conductive layer includes a first sublayer and a second sublayer located on the side of the first sublayer facing the substrate.

[0022] According to any of the foregoing embodiments of the first aspect of this application, the first sub-layer includes at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line, and / or the second sub-layer includes at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line.

[0023] According to any of the foregoing embodiments of the first aspect of this application, the limiting layer further includes a second planarization layer disposed between the first sublayer and the second sublayer.

[0024] According to any of the foregoing embodiments of the first aspect of this application, the conductive layer further includes a third sublayer disposed on the side of the second sublayer facing the substrate, and the limiting layer further includes a third planarization layer disposed between the second sublayer and the third sublayer.

[0025] According to any of the foregoing embodiments of the first aspect of this application, the third sublayer includes at least one of a data line and a reset signal line.

[0026] An embodiment of the first aspect of this application also provides a display panel, comprising: a substrate; an isolation structure disposed on one side of the substrate and having a plurality of isolation openings; a light-emitting device, at least partially located within the isolation openings; and a first encapsulation layer, comprising encapsulation units disposed on the side of the light-emitting device facing away from the substrate, the encapsulation unit comprising a first segment located on the side of the isolation structure facing away from the substrate, the first segments between adjacent encapsulation units having a gap, wherein the side of the first segment facing away from the substrate has a second top surface, and in the direction from the isolation opening to the gap, the minimum distance between the second top surface and the substrate decreases or remains unchanged.

[0027] According to an embodiment of the first aspect of this application, the display panel further includes a defining layer and a conductive layer. The defining layer is disposed on the side of the substrate near the conductive layer and covers the conductive layer. The orthographic projection of the edge of the first segment toward the gap on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate.

[0028] According to any of the foregoing embodiments of the first aspect of this application, the orthogonal projection of the conductive layer on the substrate is located within the orthogonal projection of the gap on the substrate, or the orthogonal projection of the conductive layer on the substrate and the orthogonal projection of the gap on the substrate do not overlap.

[0029] According to any of the foregoing embodiments of the first aspect of this application, the second top surface has a third region and a fourth region, the fourth region being located on the side of the third region facing the gap, the minimum distance between the second top surface in the third region and the substrate is the third distance, the minimum distance between the second top surface in the fourth region and the substrate is the fourth distance, and the third distance is greater than the fourth distance.

[0030] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the second top surface located in the third region onto the substrate at least partially overlaps with the orthographic projection of the conductive layer onto the substrate.

[0031] An embodiment of the first aspect of this application also provides a display panel, comprising: a substrate; a conductive layer disposed on the substrate; a defining layer disposed on the side of the substrate near the conductive layer and covering the conductive layer, the defining layer including a pixel defining portion and a plurality of pixel openings formed in the pixel defining portion; and a light-emitting device, at least partially located within the pixel openings, wherein the orthographic projection of the conductive layer on the substrate and the orthographic projection of the pixel openings on the substrate do not overlap.

[0032] According to an embodiment of the first aspect of this application, the display panel further includes an isolation structure and a first encapsulation layer. The isolation structure has a plurality of isolation openings. The orthographic projection of the pixel openings on the substrate is located within the orthographic projection of the isolation openings on the substrate. The first encapsulation layer includes an encapsulation unit disposed on the side of the light-emitting device away from the substrate. The encapsulation unit includes a first segment located on the side of the isolation structure away from the substrate. There is a gap between the first segments of adjacent encapsulation units. The orthographic projection of the edge of the first segment toward the gap on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate.

[0033] According to an embodiment of the first aspect of this application, the orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the gap on the substrate, or the orthographic projection of the conductive layer on the substrate and the orthographic projection of the gap on the substrate do not overlap.

[0034] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the conductive layer on the substrate and the orthographic projection of the side surface of the isolation structure facing the isolation opening on the substrate are at least partially overlapped.

[0035] According to any of the foregoing embodiments of the first aspect of this application, the isolation structure has a first top surface on the side away from the substrate. The first top surface has a first region and a second region. The orthographic projection of the first top surface located in the first region onto the substrate is located within the orthographic projection of the conductive layer onto the substrate. There is a height difference between the first top surface in the first region and the first top surface in the second region.

[0036] According to any of the foregoing embodiments of the first aspect of this application, the minimum distance between the first top surface and the substrate in the first region is the first distance, and the minimum distance between the first top surface and the substrate in the second region is the second distance, wherein the first distance is greater than the second distance.

[0037] According to any of the foregoing embodiments of the first aspect of this application, the orthographic projection of the first top surface located in the second region onto the substrate and the orthographic projection of the gap onto the substrate at least partially overlap.

[0038] According to any of the foregoing embodiments of the first aspect of this application, the first segment is spaced apart from the first top surface.

[0039] According to any of the foregoing embodiments of the first aspect of this application, at least a portion of the conductive layer is projected onto the substrate by an orthogonal projection of the pixel opening onto the substrate and an orthogonal projection of the gap onto the substrate.

[0040] According to any of the foregoing embodiments of the first aspect of this application, the orthogonal projection of the conductive layer on the substrate is located between the orthogonal projection of the edge of the pixel defining portion on the substrate and the orthogonal projection of the edge of the packaging unit on the substrate.

[0041] An embodiment of the second aspect of this application provides a display device, which includes a display panel of any of the above embodiments.

[0042] In a display panel provided in this application embodiment, the display panel includes a substrate, a conductive layer, a defining layer, an isolation structure, light-emitting devices, and a first encapsulation layer. The conductive layer is disposed on the substrate and can be used to transmit signals in the display panel. The defining layer is disposed on the side of the substrate near the conductive layer and covers the conductive layer. The defining layer includes a pixel defining portion and multiple pixel openings formed in the pixel defining portion. At least some of the light-emitting devices are located within the pixel openings. The pixel defining portion can be used to divide the display panel into sub-pixels. The isolation structure has multiple isolation openings. The orthographic projection of the pixel openings on the substrate lies within the orthographic projection of the isolation openings on the substrate. The isolation structure can be used to separate the materials of the light-emitting devices between adjacent sub-pixels. The first encapsulation layer includes encapsulation units disposed on the side of the light-emitting devices away from the substrate. The encapsulation units can be used to encapsulate the light-emitting devices. Adjacent encapsulation units are spaced apart. By ensuring that the orthographic projection of the edge of the encapsulation unit on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate, the arrangement of the conductive layer is less likely to cause the isolation structure below the edge of the encapsulation unit to bulge. This makes it less likely that the edge of the encapsulation unit will be lifted by the isolation structure and detach, thereby improving the structural stability of the display panel. Attached Figure Description

[0043] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a partial structural diagram of an isolation structure provided in an embodiment of this application;

[0045] Figure 2 This is a partial structural diagram of a first encapsulation layer provided in an embodiment of this application;

[0046] Figure 3 This is a partial cross-sectional view of a display panel provided in an embodiment of this application;

[0047] Figure 4 This is a partial cross-sectional view of a display panel provided in another embodiment of this application;

[0048] Figure 5 This is a partial cross-sectional view of a display panel provided in another embodiment of this application;

[0049] Figure 6 This is a partial cross-sectional view of a display panel provided in another embodiment of this application;

[0050] Figure 7This is a partial cross-sectional view of a display panel provided in another embodiment of this application.

[0051] Explanation of reference numerals in the attached figures:

[0052] 10. Display panel;

[0053] 100, Substrate; 110, Substrate; 120, First insulating layer; 130, Second insulating layer; 140, Third planarization layer; 150, Driving circuit; 151, Transistor; 151a, Gate; 151b, Source / drain; 152, Storage capacitor; 152a, First electrode; 152b, Second electrode; 160, Second planarization layer; 170, First planarization layer;

[0054] 200. Second electrode;

[0055] 300. Pixel definition layer; 310. Pixel limiting section; 320. Pixel opening;

[0056] 400, Isolation structure; 400a, Isolation opening; 401, First region; 402, Second region; 410, First isolation section; 420, Second isolation section; 421, First top surface;

[0057] 500, Light-emitting device; 510, Light-emitting unit; 520, First electrode;

[0058] 600, First encapsulation layer; 601, Third region; 602, Fourth region; 610, Encapsulation unit; 610a, Gap; 611, First segment; 611a, Second top surface; 612, Second segment;

[0059] 700, Second encapsulation layer;

[0060] 800, third encapsulation layer;

[0061] S1, conductive layer; S11, first sublayer; S12, second sublayer; S13, third sublayer. Detailed Implementation

[0062] The features and exemplary embodiments of various aspects of this application will now be described in detail. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only configured to explain this application and are not configured to limit this application. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples of this application.

[0063] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0064] It should be understood that when describing the structure of a component, when referring to a layer or region as being "above" or "on top of" another layer or region, it can mean that it is directly above the other layer or region, or that it contains other layers or regions between it and the other layer or region. Furthermore, if the component is flipped over, that layer or region will be located "below" or "under" the other layer or region.

[0065] This application provides a display panel and a display device. The following description, in conjunction with the accompanying drawings, will illustrate various embodiments of the display panel and the display device.

[0066] Figure 1 This is a partial structural diagram of an isolation structure provided in an embodiment of this application. Figure 2 This is a partial structural diagram of a first encapsulation layer provided in an embodiment of this application. Figure 3 This is a partial cross-sectional view of a display panel provided in an embodiment of this application.

[0067] like Figures 1 to 3 As shown, an embodiment of the first aspect of this application provides a display panel 10, including: a substrate 100; a conductive layer S1 disposed on the substrate 100; a limiting layer disposed on the side of the substrate 100 near the conductive layer S1 and covering the conductive layer S1, the limiting layer including a pixel limiting portion 310 and a plurality of pixel openings 320 formed in the pixel limiting portion 310; an isolation structure 400 having a plurality of isolation openings 400a, the orthographic projection of the pixel openings 320 on the substrate 100 being located within the orthographic projection of the isolation openings 400a on the substrate 100; a light-emitting device 500, at least partially located within the pixel openings 320; and a first encapsulation layer 600 including encapsulation units 610 disposed on the side of the light-emitting device 500 away from the substrate 100, adjacent encapsulation units 610 being spaced apart, wherein the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 does not overlap with the orthographic projection of the conductive layer S1 on the substrate 100.

[0068] Optionally, there may be a gap 610a between adjacent packaging units 610, and the edge of packaging unit 610 may refer to the local surface of packaging unit 610 that is closest to another adjacent packaging unit 610.

[0069] Patents PCT / CN2023 / 134518, 202310759370.2, 202311117143.6, 202310771071.0, 202310771124.9, and 202311499823.9 describe the relevant content of the isolation structure 400 for reference.

[0070] In a display panel 10 provided in this application embodiment, the display panel 10 includes a substrate 100, a conductive layer S1, a limiting layer, an isolation structure 400, a light-emitting device 500, and a first encapsulation layer 600. The conductive layer S1 is disposed on the substrate 100 and can be used to transmit signals in the display panel 10.

[0071] A limiting layer is disposed on the side of the substrate 100 near the conductive layer S1 and covers the conductive layer S1. The limiting layer includes a pixel limiting portion 310 and a plurality of pixel openings 320 formed in the pixel limiting portion 310. At least a portion of the light-emitting devices 500 are located within the pixel openings 320. The pixel limiting portion 310 can be used to divide the sub-pixels of the display panel 10. The isolation structure 400 has a plurality of isolation openings 400a. The orthographic projection of the pixel openings 320 on the substrate 100 is located within the orthographic projection of the isolation openings 400a on the substrate 100. The isolation structure 400 can be used to isolate the material of the light-emitting devices 500 between adjacent sub-pixels.

[0072] The first encapsulation layer 600 includes an encapsulation unit 610 disposed on the side of the light-emitting device 500 facing away from the substrate 100. The encapsulation unit 610 can be used to encapsulate the light-emitting device 500. Adjacent encapsulation units 610 are spaced apart. By ensuring that the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 does not overlap with the orthographic projection of the conductive layer S1 on the substrate 100, the arrangement of the conductive layer S1 is less likely to cause the isolation structure 400 below the edge of the encapsulation unit 610 to bulge. This makes it less likely that the edge of the encapsulation unit 610 will be lifted up by the isolation structure 400 and fall off, thereby improving the structural stability of the display panel 10.

[0073] In some embodiments of this application, the limiting layer may further include a first planarization layer 170 and a pixel definition layer 300, wherein the pixel definition layer 300 may include the aforementioned pixel limiting portion 310 and pixel opening 320.

[0074] Optionally, the first planarization layer 170 may cover the conductive layer S1, and the pixel definition layer 300 may be disposed on the side of the first planarization layer 170 away from the substrate 100.

[0075] Optionally, the material of the first planarization layer 170 may include an organic material, so that the surface of the first planarization layer 170 facing away from the substrate 110 is not prone to large undulations or protrusions, so that the isolation structure 400 below the gap 610a is not prone to protrusion, thereby making the encapsulation unit 610 at the gap 610a less likely to be lifted by the isolation structure 400 and fall off, thereby improving the structural stability of the display panel 10.

[0076] In some embodiments of this application, the light-emitting device 500 may include a light-emitting unit 510 and a first electrode 520 located on the side of the light-emitting unit 510 facing away from the substrate 100.

[0077] Optionally, the light-emitting unit 510 may include a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting structure, an electron injection layer (EIL), and an electron transport layer (ETL).

[0078] Optionally, the display panel 10 may also include a second electrode 200 located on the side of the light-emitting unit 510 facing the substrate 100.

[0079] Optionally, the first electrode 520 and the second electrode 200 can serve as pixel electrode layers of the display panel 10, wherein one of the first electrode 520 and the second electrode 200 can serve as an anode and the other as a cathode to drive the light-emitting unit 510 to emit light. This application embodiment uses the first electrode 520 as the cathode of the display panel 10 and the second electrode 200 as the anode of the display panel 10 for illustrative purposes.

[0080] In some embodiments of this application, the relative positions of the isolation structure 400 and the pixel definition layer 300 can be arranged in various ways. Optionally, the isolation structure 400 may be disposed on the side of the pixel defining portion 310 facing away from the substrate 100, or the pixel defining portion 310 may have a receiving groove, with at least a portion of the isolation structure 400 located within the receiving groove, so that the isolation structure 400 does not have a large height relative to the substrate 100, thereby better reducing the thickness of the display panel 10. For ease of description, the following embodiments will be described using the example of the isolation structure 400 being disposed on the side of the pixel defining portion 310 facing away from the substrate 100.

[0081] In the embodiments of this application, the isolation structure 400 can be configured in various ways. The shape of the isolation structure 400 can be any shape of material that can block and isolate the light-emitting device 500.

[0082] In some alternative embodiments, the isolation structure 400 includes a first isolation portion 410 and a second isolation portion 420 located on the side of the first isolation portion 410 away from the substrate 100, the second isolation portion 420 being disposed protruding from the first isolation portion 410 toward the isolation opening 400a.

[0083] By providing the second isolation portion 420 protruding from the first isolation portion 410 toward the isolation opening 400a, the material of the light-emitting device 500 can be directly vapor-deposited over the entire surface when fabricating the light-emitting device 500 of the display panel 10. The second isolation portion 420 can block at least part of the material used to fabricate the light-emitting device 500, thereby isolating the material of the light-emitting device 500 between adjacent sub-pixels. This facilitates the formation of multiple spaced light-emitting devices 500 located within the isolation opening 400a. As a result, it is not necessary to use a high-precision mask when fabricating the light-emitting device 500 of the display panel 10. For example, it is not necessary to use a high-precision fine metal mask (FMM) when vapor-depositing the material of the light-emitting device 500, thereby significantly reducing the production cost of the display panel 10.

[0084] Optionally, the material of the isolation structure 400 may include a conductive material, such that the first electrodes 520 in adjacent isolation openings 400a can be interconnected through the isolation structure 400 to form surface electrodes, so as to facilitate the control of the first electrodes 520 in the display panel 10.

[0085] Optionally, the isolation structure 400 may be in the form of a grid, and the hollowed-out areas in the grid-shaped isolation structure 400 may be isolation openings 400a. Optionally, the orthographic projection of the gap 610a on the substrate 100 may be located within the orthographic projection of the isolation structure 400 on the substrate 100, and the gap 610a may also be in the form of a grid.

[0086] In some alternative embodiments, the packaging unit 610 may include a first segment 611 located on the side of the isolation structure 400 facing away from the substrate. The gap 610a between adjacent packaging units 610 may refer to the gap 610a between the first segments 611 of adjacent packaging units 610. The edge of the packaging unit 610 may refer to the edge of the first segment 611 facing the gap 610a.

[0087] Optionally, the packaging unit 610 further includes a second segment 612 located within the isolation opening 400a. The second segment 612 can cover the side surface of the light-emitting device 500 facing away from the substrate 100, so that the packaging unit 610 can better encapsulate the light-emitting device 500.

[0088] Optionally, a portion of the second segment 612 may cover the side surface of the isolation structure 400 facing the isolation opening 400a and connect with the first segment 611 to extend the moisture intrusion path and further improve the encapsulation effect of the encapsulation unit 610 on the light-emitting device 500.

[0089] Optionally, the first segment 611 may be spaced apart from the isolation structure 400. Optionally, during the fabrication of the light-emitting device 500 and the first encapsulation layer 600, for example, when patterning the materials of the light-emitting device 500 and the first encapsulation layer 600, the material of the light-emitting device 500 between the surface of the isolation structure 400 facing away from the substrate 100 and the material of the first encapsulation layer 600 is easily etched away. Therefore, after the fabrication of the light-emitting device 500 and the first encapsulation layer 600 is completed, the material of the light-emitting device 500 is not easily left between the first segment 611 and the isolation structure 400, thereby forming a structure in which the first segment 611 may be spaced apart from the isolation structure 400.

[0090] In some embodiments of this application, there are various ways to ensure that the orthographic projection of the edge of the packaging unit 610 on the substrate 100 does not overlap with the orthographic projection of the conductive layer S1 on the substrate 100.

[0091] In some alternative embodiments, such as Figure 3 As shown, the orthographic projection of the conductive layer S1 on the substrate 100 is located within the orthographic projection of the gap 610a on the substrate 100, that is, the conductive layer S1 can be located directly below the gap 610a. This makes the arrangement of the conductive layer S1 only easily affect the flatness of the isolation structure 400 below the gap 610a. For example, the arrangement of the conductive layer S1 only easily causes the isolation structure 400 below the gap 610a to bulge, but does not easily cause the isolation structure 400 below the edge of the packaging unit 610 to bulge. This makes it less likely that the edge of the packaging unit 610 will be lifted by the isolation structure 400 and fall off, thereby improving the structural stability of the display panel 10.

[0092] Figure 4 This is a partial cross-sectional view of a display panel 10 provided in another embodiment of this application.

[0093] In some other alternative embodiments, such as Figure 4As shown, the orthographic projection of the conductive layer S1 on the substrate 100 and the orthographic projection of the gap 610a on the substrate 100 do not overlap. This makes it less likely that the conductive layer S1 will affect the flatness of the isolation structure 400 below the gap 610a and below the edge of the packaging unit 610. This arrangement of the conductive layer S1 makes it less likely that the isolation structure 400 below the edge of the packaging unit 610 will bulge. As a result, the edge of the first segment 611 facing the gap 610a is less likely to be lifted by the isolation structure 400 and fall off, thereby improving the structural stability of the display panel 10.

[0094] Furthermore, compared to the scheme in the previous embodiment where the conductive layer S1 is disposed directly below the gap 610a, the scheme where the orthographic projection of the conductive layer S1 on the substrate 100 and the orthographic projection of the gap 610a on the substrate 100 do not overlap is more conducive to the arrangement of the conductive layer S1. This allows the arrangement of the conductive layer S1 to be unrestricted by the size of the gap 610a, thereby facilitating the placement of a larger conductive layer S1 to better reduce the resistance of the display panel 10.

[0095] Optionally, the material of the first encapsulation layer 600 may include inorganic materials, thereby giving the first encapsulation layer 600 better encapsulation capabilities to reduce the impact of moisture on the light-emitting device 500. Optionally, the first encapsulation layer 600 may be prepared by chemical vapor deposition (CVD).

[0096] Figure 5 This is a partial cross-sectional view of a display panel 10 provided in another embodiment of this application.

[0097] like Figure 5 As shown, in some optional embodiments, the display panel 10 further includes a second encapsulation layer 700 disposed on the side of the first encapsulation layer 600 away from the substrate 100. The second encapsulation layer 700 can also be used to encapsulate the light-emitting device 500 of the display panel 10.

[0098] Optionally, the material of the second encapsulation layer 700 may include an organic material, which allows the second encapsulation layer 700 to have good flowability and allows the surface of the second encapsulation layer 700 facing away from the substrate 100 to be relatively flat. Optionally, the second encapsulation layer 700 may be prepared by inkjet printing (IJP) technology.

[0099] Optionally, the display panel 10 may also include a third encapsulation layer 800 disposed on the side of the second encapsulation layer 700 away from the substrate 100, so as to further improve the encapsulation effect of the light-emitting device 500.

[0100] Optionally, the third encapsulation layer 800 may be made of inorganic materials, giving it better encapsulation capabilities and reducing the impact of moisture on the light-emitting device 500. Optionally, the third encapsulation layer 800 may be fabricated using a chemical vapor deposition process.

[0101] In some alternative embodiments, the orthographic projection of the conductive layer S1 on the substrate 100 at least partially overlaps with the orthographic projection of the side surface of the isolation structure 400 facing the isolation opening 400a on the substrate 100. For example, the orthographic projection of the conductive layer S1 on the substrate 100 at least partially overlaps with the orthographic projection of the side surface of the first isolation portion 410 facing the isolation opening 400a on the substrate 100.

[0102] Optionally, the isolation structure 400 has a first top surface 421 on the side facing away from the substrate 100. For example, the first top surface 421 may be the surface of the second isolation portion 420 facing away from the substrate 100. The first top surface 421 has a first region 401 and a second region 402. The orthographic projection of the first top surface 421 located in the first region 401 onto the substrate 100 lies within the orthographic projection of the conductive layer S1 onto the substrate 100. There is a height difference between the first top surface 421 in the first region 401 and the first top surface 421 in the second region 402.

[0103] Optionally, the minimum distance between the first top surface 421 in the first region 401 and the substrate 100 is the first distance, and the minimum distance between the first top surface 421 in the second region 402 and the substrate 100 is the second distance, wherein the first distance is greater than the second distance.

[0104] Optionally, the orthographic projection of the first top surface 421 located in the second region 402 onto the substrate 100 at least partially overlaps with the orthographic projection of the gap 610a onto the substrate 100.

[0105] Optionally, the first segment 611 may be spaced apart from the first top surface 421.

[0106] In some embodiments of this application, the provision of the conductive layer S1 can easily affect the flatness of the upper film layer. That is, the provision of the conductive layer S1 can easily cause the upper film layer to have a step difference. For example, the isolation structure 400 in the first region 401 where the conductive layer S1 is provided can be raised to a certain extent, while the isolation structure 400 in the second region 402 where the conductive layer S1 is not provided is shorter than the isolation structure 400 in the first region 401.

[0107] Therefore, in these optional embodiments, by at least partially overlapping the orthographic projection of the conductive layer S1 on the substrate 100 with the orthographic projection of the side surface of the isolation structure 400 facing the isolation opening 400a on the substrate 100, the edge portion of the isolation structure 400 facing the isolation opening 400a can be raised under the influence of the conductive layer S1. That is, it is easy to raise the isolation structure 400 of the first region 401 as a whole. For example, the first top surface 421 of the first region 401 can be raised. Under the constraint of the isolation structure 400 in the first region 401, the first segment 611 is not easy to fall into the isolation opening 400a. That is, the first segment 611 is not easy to fall off and hit the light-emitting device 500, thereby improving the structural stability of the display panel 10.

[0108] Figure 6 This is a partial cross-sectional view of a display panel 10 provided in another embodiment of this application.

[0109] like Figure 6 As shown, in some optional embodiments, the side of the first segment 611 facing away from the substrate 100 has a second top surface 611a. In the direction from the isolation opening 400a to the gap 610a, the minimum distance between the second top surface 611a and the substrate 100 is reduced or remains unchanged, so that the first segment 611 is less likely to tilt and fall towards the isolation opening 400a, that is, the first segment 611 is less likely to fall off and hit the light-emitting device 500, thereby improving the structural stability of the display panel 10.

[0110] In some alternative embodiments, the minimum distance between the second top surface 611a and the substrate 100 can be reduced in the direction from the isolation opening 400a to the gap 610a, due to the influence of the isolation structure 400 raised by the conductive layer S1 below the first segment 611.

[0111] Optionally, the second top surface 611a has a third region 601 and a fourth region 602. The fourth region 602 is located on the side of the third region 601 facing the gap 610a. The minimum distance between the second top surface 611a in the third region 601 and the substrate 100 is the third distance. The minimum distance between the second top surface 611a in the fourth region 602 and the substrate 100 is the fourth distance. The third distance is greater than the fourth distance.

[0112] Optionally, the orthographic projection of the second top surface 611a located in the third region 601 onto the substrate 100 at least partially overlaps with the orthographic projection of the conductive layer S1 onto the substrate 100. Optionally, the orthographic projection of the second top surface 611a located in the third region 601 onto the substrate 100 may at least partially overlap with the orthographic projection of the first top surface 421 located in the first region 401 onto the substrate 100.

[0113] In these optional embodiments, under the lifting effect of the conductive layer S1 and the first top surface 421 of the first region 401 on the isolation structure 400, the side of the first segment 611 close to the isolation opening 400a is also easily lifted by the isolation structure 400. That is, the second top surface 611a of the first segment 611 located in the third region 601 is easily lifted, making it less likely for the first segment 611 to fall into the isolation opening 400a. In other words, it can prevent the first segment 611 from falling off and hitting the light-emitting device 500, thereby improving the structural stability of the display panel 10.

[0114] In some alternative embodiments, the orthographic projection of the conductive layer S1 on the substrate 100 and the orthographic projection of the pixel opening 320 on the substrate 100 do not overlap.

[0115] Optionally, the orthographic projection of the conductive layer S1 on the substrate 100 and the orthographic projection of the surface of the pixel limiting portion 310 facing the pixel opening 320 on the substrate 100 do not overlap.

[0116] In these optional embodiments, by reasonably setting the positional relationship between the conductive layer S1 and the pixel opening 320, or reasonably setting the positional relationship between the conductive layer S1 and the surface of the pixel limiting portion 310 facing the pixel opening 320, the arrangement of the conductive layer S1 is less likely to cause a protrusion at the end of the pixel limiting portion 310 facing the pixel opening 320. This allows the first electrode 520 of the light-emitting device 500 to have better continuity on the side of the pixel limiting portion 310 away from the substrate 100, thereby improving the connection reliability between the first electrode 520 and the isolation structure 400, and thus improving the working stability of the display panel 10.

[0117] Optionally, at least a portion of the orthographic projection of the conductive layer S1 on the substrate 100 is located between the orthographic projection of the pixel opening 320 on the substrate 100 and the orthographic projection of the gap 610a on the substrate 100. For example, the orthographic projection of the conductive layer S1 on the substrate 100 is located between the orthographic projection of the edge of the pixel limiting portion 310 on the substrate 100 and the orthographic projection of the edge of the packaging unit 610 on the substrate 100. This arrangement of the conductive layer S1 ensures that it does not easily affect the connection between the first electrode 520 and the isolation structure 400, and also prevents the first segment 611 from breaking and falling off. Therefore, by reasonably setting the arrangement position of the conductive layer S1, the influence of the conductive layer S1 in the substrate 100 on the upper film structure can be effectively reduced.

[0118] In some embodiments of this application, the conductive layer S1 can be used to transmit various signals of the display panel 10 to participate in and realize the operation of the display panel 10.

[0119] In some optional embodiments, the conductive layer S1 may include at least one of a positive power supply voltage signal line, a data line, a pixel in-AA (FIAA) trace, and a reset signal line. That is, the conductive layer S1 can be used to transmit at least one of a positive power supply voltage signal (VDD signal), a data signal (DATA signal), a negative power supply voltage signal (VSS signal), and a reset signal (Vref) in the display panel 10.

[0120] In some embodiments of this application, the substrate 100 can be configured in various ways. For example, the substrate 100 may include a substrate 110 and a driving circuit 150 disposed on the substrate 110. Exemplarily, the driving circuit 150 may include a transistor 151, a storage capacitor 152, and driving signal lines for connecting various devices. The transistor 151 includes an active layer, a gate 151a, and source / drain electrodes 151b. The storage capacitor 152 includes a first electrode 152a and a second electrode 152b.

[0121] Optionally, the substrate 100 further includes a first insulating layer 120 and a second insulating layer 130 stacked together. As an example, the gate 151a and the first electrode 152a may be located on the side of the first insulating layer 120 facing the substrate 110, the second electrode 152b may be located between the first insulating layer 120 and the second insulating layer 130, and the source / drain electrode 151b may be located on the side of the second insulating layer 130 away from the substrate 110.

[0122] Figure 7 This is a partial cross-sectional view of a display panel 10 provided in another embodiment of this application.

[0123] like Figure 6 and Figure 7 As shown, optionally, at least a portion of the conductive layer S1 may be located between the transistor 151 and the first planarization layer 170, and / or, at least a portion of the conductive layer S1 may be disposed on the same layer as the source and drain electrodes 151b of the transistor 151. The conductive layer S1 located between the transistor 151 and the first planarization layer 170 may include at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line. The conductive layer S1 disposed on the same layer as the source and drain electrodes 151b of the transistor 151 may include at least one of a data line and a reset signal line.

[0124] In some optional embodiments, the conductive layer S1 may include a first sub-layer S11, and the first planarization layer 170 may cover the first sub-layer S11. Optionally, the transistor 151 may be located between the first sub-layer S11 and the substrate 110. Optionally, the first sub-layer S11 may include at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line.

[0125] like Figure 7As shown, optionally, the conductive layer S1 may also include a second sub-layer S12 located on the side of the first sub-layer S11 facing the substrate 100. The arrangement of the first sub-layer S11 and the second sub-layer S12 can easily affect the flatness of the upper film layer. That is, the arrangement of the first sub-layer S11 and the second sub-layer S12 can easily cause the upper film layer to have a step difference. Therefore, by setting the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 to not overlap with the orthographic projection of the conductive layer S1 on the substrate 100, that is, the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 to not overlap with the orthographic projection of the first sub-layer S11 and the second sub-layer S12 on the substrate 100, the first segment 611 at the gap 610a is not easily lifted by the isolation structure 400 and falls off, thereby improving the structural stability of the display panel 10.

[0126] Optionally, transistor 151 may be located between the second sub-layer S12 and the substrate 110. Optionally, the second sub-layer S12 includes at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line.

[0127] Optionally, the limiting layer may further include a second planarization layer 160 disposed between the first sublayer S11 and the second sublayer S12. Optionally, the material of the second planarization layer 160 may include an organic material, such that the surface of the second planarization layer 160 facing away from the substrate 110 is less likely to have large undulations or protrusions, so as to reduce the influence of the second sublayer S12 on the structure of the upper film layer.

[0128] In some optional embodiments, the display panel 10 may further include a third sublayer S13 disposed on the side of the second sublayer S12 facing the substrate 100, wherein the third sublayer S13 is disposed on the same layer as the source and drain electrodes 151b.

[0129] Optionally, the third sublayer S13 includes at least one of a data line and a reset signal line.

[0130] In these optional embodiments, the arrangement of the third sub-layer S13 can also affect the flatness of the upper film layer. That is, the arrangement of the third sub-layer S13 can also cause the upper film layer to have a step difference. Therefore, by setting the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 to not overlap with the orthographic projection of the conductive layer S1 on the substrate 100, that is, the orthographic projection of the edge of the encapsulation unit 610 on the substrate 100 to not overlap with the orthographic projection of the third sub-layer S13 on the substrate 100, the first segment 611 at the gap 610a is not easily lifted by the isolation structure 400 and falls off, thereby improving the structural stability of the display panel 10.

[0131] Optionally, the limiting layer further includes a third planarization layer 140 disposed between the second sub-layer S12 and the third sub-layer S13. The third planarization layer 140 may also be located between the source / drain electrode 151b of the transistor 151 and the second sub-layer S12. Optionally, the material of the third planarization layer 140 may include an organic material, such that the surface of the third planarization layer 140 facing away from the substrate 110 is less likely to have large undulations or protrusions, thereby reducing the impact of the third sub-layer S13 on the upper film structure.

[0132] Please see Figures 1 to 7 An embodiment of the first aspect of this application also provides a display panel 10, comprising: a substrate 100; an isolation structure 400 disposed on one side of the substrate 100 and having a plurality of isolation openings 400a; a light-emitting device 500, at least partially located within the isolation openings 400a; and a first encapsulation layer 600, including encapsulation units 610 disposed on the side of the light-emitting device 500 away from the substrate 100, the encapsulation unit 610 including a first segment 611 located on the side of the isolation structure 400 away from the substrate 100, and a gap 610a between the first segments 611 of adjacent encapsulation units 610, wherein the side of the first segment 611 away from the substrate 100 has a second top surface 611a, and the minimum distance between the second top surface 611a and the substrate 100 decreases or remains unchanged in the direction from the isolation openings 400a to the gaps 610a.

[0133] In a display panel 10 provided in this application embodiment, the display panel 10 includes a substrate 100, an isolation structure 400, light-emitting devices 500, and a first encapsulation layer 600. The isolation structure 400 is disposed on one side of the substrate 100 and has a plurality of isolation openings 400a. At least some of the light-emitting devices 500 are located within the isolation openings 400a. The isolation structure 400 can be used to separate the material of the light-emitting devices 500 between adjacent sub-pixels and to divide the sub-pixels of the display panel 10.

[0134] The first encapsulation layer 600 includes an encapsulation unit 610 disposed on the side of the light-emitting device 500 facing away from the substrate 100. The encapsulation unit 610 can be used to encapsulate the light-emitting device 500. The encapsulation unit 610 includes a first segment 611 located on the side of the isolation structure 400 facing away from the substrate 100, and there is a gap 610a between the first segments 611 of adjacent encapsulation units 610. The side of the first segment 611 facing away from the substrate 100 has a second top surface 611a. By being positioned in the direction from the isolation opening 400a to the gap 610a, the minimum distance between the second top surface 611a and the substrate 100 is reduced or remains unchanged, making it less likely for the first segment 611 to tilt and fall towards the isolation opening 400a. In other words, it can prevent the first segment 611 from falling off and hitting the light-emitting device 500, thereby improving the structural stability of the display panel 10.

[0135] Optionally, the display panel 10 provided in the first aspect of this application may be the display panel 10 in any of the foregoing embodiments. Therefore, the display panel 10 provided in the embodiments of this application may have the beneficial effects of the display panel 10 in any of the foregoing embodiments, and this application will not elaborate on it further.

[0136] For example, substrate 100 may be substrate 100 in any of the foregoing embodiments, and substrate 100 may include substrate 110, transistor 151, first insulating layer 120 and second insulating layer 130 in any of the foregoing embodiments. For example, light-emitting device 500 may be light-emitting device 500 in any of the foregoing embodiments. For example, isolation structure 400 may be isolation structure 400 in any of the foregoing embodiments, isolation structure 400 may include first isolation portion 410 and second isolation portion 420 in any of the foregoing embodiments, second isolation portion 420 may have first top surface 421 as described in any of the foregoing embodiments, and the morphology of first top surface 421 may affect the morphology of second top surface 611a. For example, first encapsulation layer 600 may be first encapsulation layer 600 as described in any of the foregoing embodiments, first encapsulation layer 600 may also include second segment 612 as described in any of the foregoing embodiments.

[0137] Optionally, an embodiment of the first aspect of this application also provides a display panel 10 that may include the defining layer, conductive layer S1, second encapsulation layer 700, and third encapsulation layer 800 described in any of the foregoing embodiments. For example, the defining layer may include the pixel definition layer 300, first planarization layer 170, second planarization layer 160, and third planarization layer 140 described in any of the foregoing embodiments. For example, the conductive layer S1 may be the conductive layer S1 described in any of the foregoing embodiments, and the conductive layer S1 may include at least one of a positive power supply voltage signal line, a data line, an in-pixel trace, and a reset signal line. The relative positional relationship between the conductive layer S1 and the gap 610a between the first segments 611 of adjacent encapsulation units 610 in the first encapsulation layer 600 may also be set with reference to any of the foregoing embodiments.

[0138] Please see Figures 1 to 7 An embodiment of the first aspect of this application also provides a display panel 10, including: a substrate 100; a conductive layer S1 disposed on the substrate 100; a limiting layer disposed on the side of the substrate 100 near the conductive layer S1 and covering the conductive layer S1, the limiting layer including a pixel limiting portion 310 and a plurality of pixel openings 320 formed in the pixel limiting portion 310; and a light-emitting device 500, at least partially located within the pixel openings 320, wherein the orthographic projection of the conductive layer S1 on the substrate 100 and the orthographic projection of the pixel openings 320 on the substrate 100 do not overlap.

[0139] In a display panel 10 provided in this application embodiment, the display panel 10 includes a substrate 100, a conductive layer S1, a defining layer, and a light-emitting device 500. The conductive layer S1 is disposed on the substrate 100 and can be used to transmit signals in the display panel 10.

[0140] A limiting layer is disposed on the side of the substrate 100 near the conductive layer S1 and covers the conductive layer S1. The limiting layer includes a pixel limiting portion 310 and a plurality of pixel openings 320 formed in the pixel limiting portion 310. At least a portion of the light-emitting devices 500 are located within the pixel openings 320. The limiting layer can be used to divide the sub-pixels of the display panel 10. By ensuring that the orthographic projection of the conductive layer S1 on the substrate 100 does not overlap with the orthographic projection of the pixel openings 320 on the substrate 100, the arrangement of the conductive layer S1 is less likely to cause the pixel limiting portion 310 to bulge towards the pixel openings 320. This allows the first electrode 520 of the light-emitting device 500 to have better continuity on the side of the pixel limiting portion 310 away from the substrate 100, thereby improving the operational stability and structural stability of the display panel 10.

[0141] Optionally, the display panel 10 provided in the first aspect of this application may be the display panel 10 in any of the foregoing embodiments. Therefore, the display panel 10 provided in the embodiments of this application may have the beneficial effects of the display panel 10 in any of the foregoing embodiments, and this application will not elaborate on it further.

[0142] For example, substrate 100 may be substrate 100 in any of the foregoing embodiments, and substrate 100 may include substrate 110, transistor 151, first insulating layer 120 and second insulating layer 130 in any of the foregoing embodiments. For example, conductive layer S1 may be conductive layer S1 in any of the foregoing embodiments, and conductive layer S1 may include at least one of positive power supply voltage signal line, data line, pixel in-line trace and reset signal line. For example, defining layer may be defining layer in any of the foregoing embodiments, and defining layer may include pixel definition layer 300, first planarization layer 170, second planarization layer 160 and third planarization layer 140 in any of the foregoing embodiments.

[0143] Optionally, an embodiment of the first aspect of this application also provides a display panel 10 that may include the isolation structure 400, the first encapsulation layer 600, the second encapsulation layer 700, and the third encapsulation layer 800 described in any of the foregoing embodiments. The relative positional relationship between the conductive layer S1 and the gap 610a between the first segments 611 of adjacent encapsulation units 610 in the first encapsulation layer 600 may also be set with reference to any of the foregoing embodiments. The display panel 10 also includes a touch structure, an optical film (e.g., a microlens, a polarizer), a cover plate, and other structures disposed on the light-emitting side of the display panel.

[0144] An embodiment of the second aspect of this application provides a display device, which includes the display panel 10 of any of the above embodiments. Since the display device provided by the second aspect of this application includes the display panel 10 of any of the first aspects, it has the beneficial effects of the display panel 10 of any of the first aspects, which will not be repeated here.

[0145] The display devices in this application include, but are not limited to, mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control systems, smart landline phones, control consoles, and other devices with display functions.

[0146] The embodiments described above are not exhaustive and do not limit the invention to specific examples. Clearly, many modifications and variations can be made based on the above description. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. This application is limited only by the claims and their full scope and equivalents.

Claims

1. A display panel, characterized in that, include: Substrate, the substrate including a substrate; A conductive layer is disposed on the substrate; A limiting layer is disposed on the side of the substrate near the conductive layer and covers the conductive layer. The limiting layer includes a pixel limiting portion and a plurality of pixel openings formed in the pixel limiting portion. An isolation structure is provided with multiple isolation openings. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the isolation opening on the substrate. The isolation structure has a first top surface on the side away from the substrate. The first top surface has a first region and a second region. The orthographic projection of the first top surface located in the first region on the substrate is located within the orthographic projection of the conductive layer on the substrate. The light-emitting device is at least partially located within the pixel opening; The first encapsulation layer includes encapsulation units disposed on the side of the light-emitting device facing away from the substrate, with adjacent encapsulation units spaced apart. Wherein, the orthographic projection of the edge of the packaging unit on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate, and there is a height difference between the first top surface in the first region and the first top surface in the second region; The minimum distance between the first top surface and the substrate in the first region is greater than the minimum distance between the first top surface and the substrate in the second region.

2. The display panel according to claim 1, characterized in that, There is a gap between adjacent packaging units, and the orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the gap on the substrate, or the orthographic projection of the conductive layer on the substrate and the orthographic projection of the gap on the substrate do not overlap.

3. The display panel according to claim 2, characterized in that, At least a portion of the conductive layer's orthographic projection on the substrate lies between the orthographic projection of the pixel opening on the substrate and the orthographic projection of the gap on the substrate.

4. The display panel according to claim 1, characterized in that, The orthographic projection of the conductive layer on the substrate and the orthographic projection of the side surface of the isolation structure facing the isolation opening on the substrate overlap at least partially.

5. The display panel according to claim 1, characterized in that, The minimum distance between the first top surface in the first region and the substrate is the first distance, and the minimum distance between the first top surface in the second region and the substrate is the second distance, wherein the first distance is greater than the second distance.

6. The display panel according to claim 1, characterized in that, There is a gap between adjacent packaging units, and the orthographic projection of the first top surface located in the second region on the substrate at least partially overlaps with the orthographic projection of the gap on the substrate.

7. The display panel according to claim 1, characterized in that, The packaging unit includes a first segment located on the side of the isolation structure facing away from the substrate, and there is a gap between adjacent packaging units. The first segment has a second top surface on the side facing away from the substrate. In the direction from the isolation opening to the gap, the minimum distance between the second top surface and the substrate decreases or remains unchanged.

8. The display panel according to claim 7, characterized in that, The first segment is spaced apart from the first top surface.

9. The display panel according to claim 7, characterized in that, The second top surface has a third region and a fourth region. The fourth region is located on the side of the third region facing the gap. The minimum distance between the second top surface in the third region and the substrate is the third distance. The minimum distance between the second top surface in the fourth region and the substrate is the fourth distance. The third distance is greater than the fourth distance.

10. The display panel according to claim 9, characterized in that, The orthographic projection of the second top surface located in the third region onto the substrate at least partially overlaps with the orthographic projection of the conductive layer onto the substrate.

11. The display panel according to claim 1, characterized in that, The orthographic projection of the conductive layer on the substrate and the orthographic projection of the pixel opening on the substrate do not overlap.

12. The display panel according to claim 11, characterized in that, The orthographic projection of the conductive layer on the substrate and the orthographic projection of the surface of the pixel defining portion facing the pixel opening on the substrate do not overlap.

13. The display panel according to claim 11, characterized in that, The orthographic projection of the conductive layer on the substrate lies between the orthographic projection of the edge of the pixel defining portion on the substrate and the orthographic projection of the edge of the packaging unit on the substrate.

14. The display panel according to any one of claims 1 to 13, characterized in that, The conductive layer includes at least one of a positive power supply voltage signal line, a data line, an in-pixel trace, and a reset signal line.

15. The display panel according to claim 1, characterized in that, The defining layer includes a first planarization layer and a pixel definition layer, wherein the first planarization layer covers the conductive layer, and the pixel definition layer is disposed on the side of the first planarization layer away from the substrate.

16. The display panel according to claim 15, characterized in that, The conductive layer includes a first sublayer and a second sublayer located on the side of the first sublayer facing the substrate.

17. The display panel according to claim 16, characterized in that, The first sub-layer includes at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line, and / or the second sub-layer includes at least one of a positive power supply voltage signal line, an in-pixel trace, and a reset signal line.

18. The display panel according to claim 16, characterized in that, The limiting layer further includes a second planarization layer disposed between the first sub-layer and the second sub-layer.

19. The display panel according to claim 16, characterized in that, The conductive layer further includes a third sublayer disposed on the side of the second sublayer facing the substrate, and the limiting layer further includes a third planarization layer disposed between the second sublayer and the third sublayer.

20. The display panel according to claim 19, characterized in that, The third sublayer includes at least one of a data line and a reset signal line.

21. A display panel, characterized in that, include: Substrate, the substrate including a substrate; An isolation structure is disposed on one side of the substrate and has multiple isolation openings; The light-emitting device is at least partially located within the isolation opening; The first encapsulation layer includes encapsulation units disposed on the side of the light-emitting device facing away from the substrate. Each encapsulation unit includes a first segment located on the side of the isolation structure facing away from the substrate, and there is a gap between the first segments of adjacent encapsulation units. The display panel further includes a defining layer and a conductive layer. The defining layer is disposed on the side of the substrate near the conductive layer and covers the conductive layer. The side of the first segment facing away from the substrate has a second top surface. In the direction from the isolation opening to the gap, the minimum distance between the second top surface and the substrate decreases. The second top surface has a third region and a fourth region, the fourth region being located on the side of the third region facing the gap, and the orthographic projection of the second top surface located in the third region on the substrate at least partially overlaps with the orthographic projection of the conductive layer on the substrate. The minimum distance between the second top surface and the substrate in the third region is greater than the minimum distance between the second top surface and the substrate in the fourth region.

22. The display panel according to claim 21, characterized in that, The orthographic projection of the edge of the first segment toward the gap onto the substrate does not overlap with the orthographic projection of the conductive layer onto the substrate.

23. The display panel according to claim 22, characterized in that, The orthographic projection of the conductive layer on the substrate and the orthographic projection of the gap on the substrate do not overlap.

24. The display panel according to claim 21, characterized in that, The minimum distance between the second top surface in the third region and the substrate is the third distance, and the minimum distance between the second top surface in the fourth region and the substrate is the fourth distance. The third distance is greater than the fourth distance.

25. A display panel, characterized in that, include: Substrate, the substrate including a substrate; A conductive layer is disposed on the substrate; A limiting layer is disposed on the side of the substrate near the conductive layer and covers the conductive layer. The limiting layer includes a pixel limiting portion and a plurality of pixel openings formed in the pixel limiting portion. The light-emitting device is at least partially located within the pixel opening. The display panel further includes an isolation structure and a first encapsulation layer. The isolation structure has multiple isolation openings. The orthographic projection of the pixel openings on the substrate lies within the orthographic projection of the isolation openings on the substrate. The isolation structure has a first top surface on the side facing away from the substrate. The first top surface has a first region and a second region. The orthographic projection of the first top surface located in the first region on the substrate lies within the orthographic projection of the conductive layer on the substrate. The first encapsulation layer includes an encapsulation unit disposed on the side of the light-emitting device facing away from the substrate. Wherein, the orthographic projection of the conductive layer on the substrate and the orthographic projection of the pixel opening on the substrate do not overlap, the orthographic projection of the edge of the encapsulation unit on the substrate and the orthographic projection of the conductive layer on the substrate do not overlap, and there is a height difference between the first top surface in the first region and the first top surface in the second region. The minimum distance between the first top surface and the substrate in the first region is greater than the minimum distance between the first top surface and the substrate in the second region.

26. The display panel according to claim 25, characterized in that, The packaging unit includes a first segment located on the side of the isolation structure away from the substrate, and there is a gap between the first segments of adjacent packaging units, wherein the orthographic projection of the edge of the first segment toward the gap on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate.

27. The display panel according to claim 26, characterized in that, The orthographic projection of the conductive layer on the substrate is located within the orthographic projection of the gap on the substrate, or the orthographic projection of the conductive layer on the substrate and the orthographic projection of the gap on the substrate do not overlap.

28. The display panel according to claim 26, characterized in that, The orthographic projection of the conductive layer on the substrate and the orthographic projection of the side surface of the isolation structure facing the isolation opening on the substrate overlap at least partially.

29. The display panel according to claim 25, characterized in that, The minimum distance between the first top surface in the first region and the substrate is the first distance, and the minimum distance between the first top surface in the second region and the substrate is the second distance, wherein the first distance is greater than the second distance.

30. The display panel according to claim 26, characterized in that, The orthographic projection of the first top surface located in the second region onto the substrate and the orthographic projection of the gap onto the substrate at least partially overlap.

31. The display panel according to claim 26, characterized in that, The first segment is spaced apart from the first top surface.

32. The display panel according to claim 26, characterized in that, At least a portion of the conductive layer's orthographic projection on the substrate lies between the orthographic projection of the pixel opening on the substrate and the orthographic projection of the gap on the substrate.

33. The display panel according to claim 25, characterized in that, The orthographic projection of the conductive layer on the substrate lies between the orthographic projection of the edge of the pixel defining portion on the substrate and the orthographic projection of the edge of the packaging unit on the substrate.

34. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 33.

Images