Display panel and display device

Abstract

The application provides a display panel and a display device. The display panel has a first area and a second area located on at least one side of the first area. The display panel comprises a substrate, a first conductor layer, a pixel definition layer and a first protective layer. The first conductor layer is arranged on one side of the substrate. The first conductor layer comprises a mark part located in the second area. The pixel definition layer is arranged on the side of the first conductor layer away from the substrate. The first protective layer is arranged between the pixel definition layer and the first conductor layer. The orthographic projection of the mark part on the substrate is located in the orthographic projection of the first protective layer and the pixel definition layer on the substrate. In the embodiment of the application, the mark part can be covered and shielded by the pixel definition layer and the first protective layer. Therefore, in the subsequent etching process, the mark part can be double-protected by the pixel definition layer and the first protective layer, so as to reduce the risk of damage to the mark part caused by etching, thereby improving the positioning accuracy of the subsequent process and improving the reliability of the display panel.

Description

Technical Field

[0001] This application relates to the field of display device technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels and display panels using light-emitting diode (LED) devices are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices. Summary of the Invention

[0003] This application provides a display panel and a display device that can improve the reliability of the display panel.

[0004] In a first aspect, embodiments of this application provide a display panel having a first region and a second region located at least one side of the first region. The display panel includes a substrate, a first conductive layer, a pixel defining layer, and a first protective layer. The first conductive layer is disposed on one side of the substrate and includes a marking portion located within the second region. The pixel defining layer is disposed on the side of the first conductive layer facing away from the substrate. The first protective layer is disposed between the pixel defining layer and the first conductive layer, and the orthographic projection of the marking portion onto the substrate lies within the orthographic projections of the first protective layer and the pixel defining layer onto the substrate.

[0005] In some embodiments, a first electrode layer is further included, disposed between the pixel definition layer and the first conductor layer. The first electrode layer includes a first electrode located in a first region. The pixel definition layer encloses and forms a pixel opening, and the first electrode is exposed to the pixel opening.

[0006] In some embodiments, the first conductor layer includes a first conductor portion located within a first region, wherein the orthographic projection of the first conductor portion onto the substrate lies within the orthographic projection of the first electrode onto the substrate;

[0007] In some embodiments, the first conductor portion is electrically connected to the first electrode.

[0008] In some embodiments, the first electrode layer further includes a second conductor portion located within the second region, wherein the orthographic projection of the second conductor portion onto the substrate is located within the orthographic projection of the marking portion onto the substrate;

[0009] In some embodiments, the first electrode is insulated from the second conductor portion;

[0010] In some embodiments, the second conductor portion is located between the first protective layer and the pixel definition layer.

[0011] In some embodiments, the first conductor layer includes a first electrode located within a first region, the pixel definition layer encloses to form a pixel opening, and the first electrode is exposed to the pixel opening;

[0012] In some embodiments, the marking portion is insulated from the first electrode;

[0013] In some embodiments, the first electrode is attached to the pixel definition layer, and the marker portion is spaced apart from the pixel definition layer;

[0014] In some embodiments, the first protective layer is located within the second region and outside the first region;

[0015] In some embodiments, the first protective layer is partially located within a first region and partially within a second region, and the first protective layer includes a first opening communicating with a pixel opening, through which a first electrode is exposed.

[0016] In some embodiments, an isolation structure is further provided on the side of the pixel definition layer away from the substrate, the isolation structure enclosing an isolation opening that communicates with the pixel opening;

[0017] In some embodiments, the display panel further includes a light-emitting functional layer located on the side of the first electrode layer away from the substrate, the light-emitting functional layer including a light-emitting structure disposed within a pixel opening;

[0018] In some embodiments, the display panel further includes a second electrode layer located on the side of the light-emitting functional layer away from the substrate, the second electrode layer including a second electrode disposed within an isolation opening;

[0019] In some embodiments, the isolation structure includes a conductive structure, and the second electrode is electrically connected to the conductive structure.

[0020] In some embodiments, the isolation structure includes a first isolation portion and a second isolation portion located on the side of the first isolation portion away from the substrate, wherein the orthographic projection of the first isolation portion onto the substrate is located within the orthographic projection of the second isolation portion onto the substrate.

[0021] In some embodiments, the isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, wherein the orthographic projection of the first isolation portion onto the substrate is located within the orthographic projection of the third isolation portion onto the substrate;

[0022] In some embodiments, the display panel further includes a second electrode layer located on the side of the first electrode layer away from the substrate, the second electrode layer including a second electrode disposed within an isolation opening;

[0023] The first isolation portion includes a conductive material, and the second electrode is electrically connected to the first isolation portion;

[0024] In some embodiments, the isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, wherein the orthographic projection of the first isolation portion onto the substrate is located within the orthographic projection of the third isolation portion onto the substrate;

[0025] The third isolation section includes a conductive material and is disposed in contact with the second electrode.

[0026] In some embodiments, the isolation structure includes a first isolation structure located in a first region and a second isolation structure located in a second region, wherein the orthographic projection of the marking portion onto the substrate is located within the orthographic projection of the second isolation structure onto the substrate;

[0027] In some embodiments, the marking portion is insulated from the first conductor portion;

[0028] In some embodiments, the marking portion is insulated from the second isolation structure.

[0029] In some embodiments, the invention further includes a light-emitting functional layer disposed on the side of the first electrode layer away from the substrate, and a first encapsulation layer located on the side of the light-emitting functional layer away from the substrate, the first encapsulation layer including an encapsulation portion located within an isolation opening;

[0030] In some embodiments, the first encapsulation layer comprises an inorganic material;

[0031] In some embodiments, the display panel further includes a second encapsulation layer located on the side of the first encapsulation layer opposite to the substrate, the second encapsulation layer covering a plurality of encapsulation portions;

[0032] In some embodiments, the first encapsulation layer comprises an inorganic material and the second encapsulation layer comprises an organic material;

[0033] In some embodiments, the display panel further includes a third encapsulation layer located on the side of the second encapsulation layer opposite to the substrate;

[0034] In some embodiments, the third encapsulation layer comprises an inorganic material.

[0035] In some embodiments, the first protective layer includes a first sub-part located on the side of the marking portion away from the substrate, and a second sub-part located on the periphery of the marking portion;

[0036] The first sub-part has a first surface facing away from the substrate, and the second sub-part has a second surface facing away from the substrate. The plane containing the first surface is located on the side of the plane containing the second surface facing away from the substrate.

[0037] In some embodiments, within the second region, the first protective layer is attached to the pixel definition layer;

[0038] In some embodiments, the pixel definition layer includes a third sub-part located on the side of the first sub-part facing away from the substrate, and a fourth sub-part located on the periphery of the first sub-part;

[0039] The third sub-part has a third surface facing away from the substrate, and the fourth sub-part has a fourth surface facing away from the substrate. The plane containing the third surface is located on the side of the plane containing the fourth surface facing away from the substrate.

[0040] In some embodiments, the first protective layer further includes a fifth sub-part connecting the first sub-part and the second sub-part; the fifth sub-part is fitted to the sidewall of the marking part;

[0041] In some embodiments, the first conductor layer includes a first titanium metal layer, an aluminum metal layer, and a second titanium metal layer that are sequentially stacked.

[0042] In some embodiments, the pixel definition layer includes a third sub-part located on the side of the first sub-part facing away from the substrate, a fourth sub-part located on the periphery of the first sub-part, and a sixth sub-part connecting the third sub-part and the fourth sub-part.

[0043] In some embodiments, a planarization layer is further included, which is disposed between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the planarization layer onto the substrate is located outside the orthographic projection of the marking portion onto the substrate;

[0044] In some embodiments, the planarization layer is located within the first region and outside the second region;

[0045] In some embodiments, the first conductor layer includes a first conductor portion located within a first region, and a planarization layer is disposed covering the first conductor portion.

[0046] In some embodiments, a planarization layer is further included between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the marker portion onto the substrate is located within the orthographic projection of the planarization layer onto the substrate, and the planarization layer is located between the first protective layer and the pixel definition layer.

[0047] In some embodiments, the planarization layer is partially located within the first region and partially located within the second region;

[0048] In some embodiments, the planarization layer includes a first planar portion located in a second region and a second planar portion located in the first region, wherein the first planar portion and the second planar portion are integrally connected.

[0049] In some embodiments, the planarization layer includes a first planar portion located in the second region, wherein the surface of the first planar portion facing away from the substrate is parallel to the plane of the substrate.

[0050] In some embodiments, the planarization layer includes a second planar portion located within a first region, wherein the surface of the second planar portion facing away from the substrate is on the same plane as the surface of the first planar portion facing away from the substrate.

[0051] In some embodiments, the first protective layer comprises an inorganic material and is disposed in contact with the marking portion;

[0052] In some embodiments, the pixel definition layer comprises inorganic materials;

[0053] In some embodiments, the display panel further includes a planarization layer disposed between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the marker portion onto the substrate is located within the orthographic projection of the planarization layer onto the substrate; the planarization layer comprises an organic material.

[0054] Secondly, embodiments of this application provide a display device, wherein the display panel includes the display panel as described in any of the foregoing embodiments.

[0055] This application provides a display panel and display device, in which the marking portion can be covered and shielded by a pixel definition layer and a first protective layer. In subsequent etching processes, the marking portion can be doubly protected by the two film layers of the pixel definition layer and the first protective layer, thereby reducing the risk of etching damage to the marking portion, improving the positioning accuracy of subsequent processes, and improving the reliability of the display panel. Attached Figure Description

[0056] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0057] Figure 1 This is a schematic diagram of the structure of a display panel in related technologies;

[0058] Figure 2 This is a schematic cross-sectional view of a display panel in the first region according to an embodiment of this application;

[0059] Figure 3 This is a schematic cross-sectional view of a display panel in the second region according to an embodiment of this application;

[0060] Figure 4 This is a cross-sectional structural diagram of a display panel in the second region provided in an embodiment of this application;

[0061] Figure 5 This is a cross-sectional structural diagram of a display panel in the first area provided in an embodiment of this application;

[0062] Figure 6 This is a cross-sectional structural diagram of a display panel in the first area provided in an embodiment of this application;

[0063] Figure 7 This is a cross-sectional structural diagram of a display panel in the first area provided in an embodiment of this application;

[0064] Figure 8This is a cross-sectional structural diagram of a display panel in the second region provided in an embodiment of this application;

[0065] Figure 9 This is a cross-sectional structural diagram of a display panel in the first area provided in an embodiment of this application;

[0066] Figure 10 yes Figure 2 A magnified structural diagram at region Q;

[0067] Figure 11 This is a cross-sectional structural diagram of a display panel in the second region provided in an embodiment of this application;

[0068] Figure 12 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.

[0069] Marker explanation:

[0070] 10. Substrate;

[0071] 20. First conductor layer; 21. Marking portion; 22. First conductor portion;

[0072] 30. Pixel definition layer; 31. Pixel opening; 32. Third sub-part; 33. Fourth sub-part; 34. Sixth sub-part;

[0073] 40. First protective layer; 41. First sub-section; 42. Second sub-section; 43. Fifth sub-section; 44. First opening;

[0074] 50. First electrode layer; 51. First electrode; 52. Second conductor section;

[0075] 60. Isolation structure; 61. Isolation opening; 62. First isolation section; 63. Second isolation section; 64. Third isolation section;

[0076] 71. First encapsulation layer; 711. Encapsulation unit; 72. Second encapsulation layer; 73. Third encapsulation layer;

[0077] 80. Planarization layer; 81. First planarized portion; 82. Second planarized portion;

[0078] M1, first surface; M2, second surface; M3, third surface; M4, fourth surface;

[0079] P, light-emitting structure; J, second electrode;

[0080] A1, Zone 1; A2, Zone 2. Detailed Implementation

[0081] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0082] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0083] In display panels, alignment marks are typically incorporated. These marks facilitate device identification, improve positioning, and enhance manufacturing efficiency and precision. Alignment marks are usually formed from conductive materials, and after their formation, multiple etching processes are often performed. These processes can easily damage the alignment marks, affecting their identification and positioning in subsequent manufacturing processes.

[0084] Regarding the above issues, firstly, please refer to [link / reference needed]. Figures 1 to 3 This application provides a display panel having a first region A1 and a second region A2 located at least on one side of the first region A1. The display panel includes a substrate 10, a first conductor layer 20, a pixel definition layer 30, and a first protective layer 40. The first conductor layer 20 is disposed on one side of the substrate 10 and includes a marking portion 21 located in the second region A2. The pixel definition layer 30 is disposed on the side of the first conductor layer 20 facing away from the substrate 10. The first protective layer 40 is disposed between the pixel definition layer 30 and the first conductor layer 20. The orthographic projection of the marking portion 21 onto the substrate 10 is located within the orthographic projection of the first protective layer 40 and the pixel definition layer 30 onto the substrate 10.

[0085] The display panel has at least a first area A1 and a second area A2 located around the first area A1. The first area A1 is the area in the display panel used to perform display functions, and the second area A2 is the area in the display panel that does not perform display functions. The dimensions and shapes of the first area A1 and the second area A2 are not limited in this embodiment. Optionally, the second area A2 surrounds the first area A1. More optionally, the shape of the first area A1 is adapted to the shape of the second area A2; for example, if the first area A1 is square, then the second area A2 is a square ring structure.

[0086] The substrate 10 mainly serves as a support and bearing material. Other film layers are stacked sequentially on the substrate 10. The stacking arrangement mentioned here means that the other film layers are arranged sequentially along the thickness direction of the substrate 10. The thickness direction of the other film layers on the substrate 10 is usually consistent with the thickness direction of the substrate 10 itself. Therefore, for ease of description, the thickness direction of the substrate 10 or the thickness direction of other film layers mentioned in the following embodiments of this application are all shown in the same direction.

[0087] The first conductor layer 20 is a film layer disposed on one side of the substrate 10 and including a conductor material. The first conductor layer 20 includes a marking portion 21 located in the second region A2. The marking portion 21 is a conductor structure used to realize the positioning function. The marking portion 21 can have various structural forms, and the embodiments of this application do not limit this. For example, the orthographic projection of the marking portion 21 on the substrate 10 can be cross-shaped or L-shaped, etc.

[0088] It should be noted that the first conductor layer 20 may only include the marking portion 21, that is, the first conductor layer 20 is completely located within the second region A2 and outside the first region A1. Alternatively, in addition to including the marking portion 21 located in the second region A2, the first conductor layer 20 may also include other conductor structures located in the first region A1. The specific layout of the conductor structures within the first conductor layer 20 is not limited in the embodiments of this application.

[0089] Furthermore, the specific location of the first conductor layer 20 in the thickness direction is not limited in this embodiment. Optionally, the first conductor layer 20 can be an anode layer, that is, an anode structure can be provided within the first conductor layer 20. Alternatively, the first conductor layer 20 can also be another conductor layer located on the side of the anode layer facing the substrate 10.

[0090] A pixel defining layer 30 is disposed on the side of the first conductor layer 20 facing away from the substrate 10, and a first protective layer 40 is disposed between the pixel defining layer 30 and the first conductor layer 20. That is, both the first protective layer 40 and the pixel defining layer 30 are film structures formed after the first conductor layer 20. Furthermore, the orthographic projections of the first protective layer 40 and the pixel defining layer 30 onto the substrate 10 overlap with the orthographic projection of the marking portion 21 onto the substrate 10. In other words, both the first protective layer 40 and the pixel defining layer 30 can cover the marking portion 21 to protect it. The first protective layer 40 and the marking portion 21 can be in direct contact, or other film layers may exist between them; this embodiment does not impose any limitations on this.

[0091] In related technologies, the alignment mark is usually covered and shielded only by the pixel definition layer 30. Relying solely on the pixel definition layer 30 may not be able to prevent the etching process from damaging the alignment mark, which may easily affect the positioning accuracy of subsequent processes.

[0092] In this embodiment, the marking portion 21 is covered and shielded by the pixel definition layer 30 and the first protective layer 40. In the subsequent etching process, the marking portion 21 can be doubly protected by the two film layers of the pixel definition layer 30 and the first protective layer 40, thereby reducing the risk of the marking portion 21 being damaged by etching, thereby improving the positioning accuracy of the subsequent process and improving the reliability of the display panel.

[0093] In some embodiments, such as Figure 2 and Figure 3 As shown, the display panel also includes a first electrode layer 50 disposed between the pixel definition layer 30 and the first conductor layer 20. The first electrode layer 50 includes a first electrode 51 located in the first region A1. The pixel definition layer 30 surrounds and forms a pixel opening 31, and the first electrode 51 is exposed to the pixel opening 31.

[0094] The first electrode layer 50 is disposed between the first conductor layer 20 and the pixel definition layer 30, that is, the first electrode layer 50 is formed after the first conductor layer 20 and before the pixel definition layer 30. The first electrode layer 50 includes a plurality of first electrodes 51 spaced apart, the first electrodes 51 being anodes used to drive and control whether the display panel emits light. Exemplarily, the display panel also includes a light-emitting functional layer located on the side of the first electrode layer 50 facing away from the substrate 10, and a second electrode layer located on the side of the light-emitting functional layer facing away from the substrate 10. The light-emitting functional layer includes a plurality of light-emitting structures P disposed corresponding to the plurality of first electrodes 51 and located within the pixel opening 31. The second electrode layer includes a second electrode J, the second electrode J being a cathode. The first electrodes 51 and the second electrode J together drive and control whether the light-emitting structures P emit light.

[0095] It should be noted that the first electrode layer 50 may be disposed only in the first region A1 and not in the second region A2, that is, the first electrode layer 50 may only include the first electrode 51. Alternatively, the first electrode layer 50 may be partially located in the first region A1 and partially located in the second region A2, that is, in addition to the first electrode 51, the first electrode layer 50 may also include other structures located in the second region A2. This application embodiment does not limit this.

[0096] In this embodiment, the first conductor layer 20 is another film layer located on the side of the first electrode layer 50 facing the substrate 10. Furthermore, the insulating layer between the first conductor layer 20 and the first electrode layer 50 can also be configured to cover the marking portion 21. This further enhances the protection of the marking portion 21, reduces the risk of etching damage to the marking portion 21, and improves the reliability of the display panel. The first protective layer 40 can be an insulating layer located between the first conductor layer 20 and the first electrode layer 50, or it can be any film layer other than the insulating layer; this embodiment does not impose any limitations on this.

[0097] In some embodiments, such as Figure 2 As shown, the first conductor layer 20 includes a first conductor portion 22 located in the first region A1, and the orthographic projection of the first conductor portion 22 onto the substrate 10 is located within the orthographic projection of the first electrode 51 onto the substrate 10.

[0098] In addition to the marking portion 21 located in the second region A2, the first conductor layer 20 also includes a first conductor portion 22 located in the first region A1. The first conductor portion 22 is a conductor structure that can be used to transmit specific signals to satisfy display functions. The orthographic projection of the first conductor portion 22 onto the substrate 10 overlaps with the orthographic projection of the first electrode 51 onto the substrate 10. The first conductor portion 22 can be electrically connected to the first electrode 51, or it can be insulated from the first electrode 51. Optionally, the first conductor portion 22 is electrically connected to the first electrode 51.

[0099] In some embodiments, please refer to Figure 2 and Figure 4 The first electrode layer 50 also includes a second conductor portion 52 located in the second region A2, and the orthographic projection of the second conductor portion 52 onto the substrate 10 is located within the orthographic projection of the marking portion 21 onto the substrate 10.

[0100] In addition to a first electrode 51 located in the first region A1 for controlling whether the light-emitting structure P emits light, the first electrode layer 50 also includes a second conductor portion 52 located in the second region A2. The first electrode 51 and the second conductor portion 52 may be made of the same material and formed together in the same process. The first electrode 51 and the second conductor portion 52 may be electrically connected, or they may be insulated from each other. This embodiment of the application does not impose any limitations on this.

[0101] Based on this, the embodiments of this application further configure the orthographic projection of the second conductor portion 52 on the substrate 10 to be located within the orthographic projection of the marking portion 21 on the substrate 10, so that the second conductor portion 52 covers and protects at least a part of the structure of the marking portion 21. In this way, the second conductor portion 52 further reduces the adverse effects of the process etching process on the marking portion 21, improves the positioning accuracy of subsequent processes, and improves the reliability of the display panel.

[0102] It should be noted that the marking part 21 typically functions as a positioning element in two ways. One method utilizes optical principles, employing optical equipment to identify the marking part and using the reflection of light by the marking part 21 to achieve positioning and identification. The other method utilizes the principle of step difference recognition. Specifically, because the marking part 21 has a certain thickness, its location often protrudes relative to its surrounding area during the identification process. Based on this, the step difference between the protrusion and the surrounding area can be used to achieve positioning and identification of the marking part 21.

[0103] Therefore, in this embodiment, since the second conductor portion 52 covers and obscures the marking portion 21, the marking portion 21 may not be identifiable by optical principles. Based on this, the marking portion 21 can be located and identified using the step difference identification principle. Alternatively, in some optional embodiments, the second conductor portion 52 can also act as an alignment marker, allowing the second conductor portion 52 to be identified by optical principles and the position of the marking portion 21 to be determined. Alternatively, in some optional embodiments, the orthographic projection of the marking portion onto the substrate 10 may also be located outside the orthographic projection of the second conductor portion 52 onto the substrate 10. In this way, the exposed portion of the marking portion relative to the second conductor portion 52 can also be identified by optical principles. This embodiment does not impose any limitations on these aspects.

[0104] In some embodiments, the first electrode 51 is insulated from the second conductor portion 52.

[0105] In this embodiment, the first electrode 51 and the second conductor 52 are insulated from each other, meaning that they do not need to be directly connected or electrically connected by other conductor structures. Based on this, the position of the second conductor 52 at the second region A2 can be unaffected by the first electrode 51, thereby allowing the second conductor 52 to better cover the marking part 21 and improve its protective effect on the marking part 21, which is highly practical.

[0106] In some embodiments, the second conductor portion 52 is located between the first protective layer 40 and the pixel definition layer 30.

[0107] In this embodiment, the second conductor portion 52 is sandwiched between the first protective layer 40 and the pixel definition layer 30. That is, the side of the second conductor portion 52 facing away from the substrate 10 is protected by the pixel definition layer 30, thereby reducing the adverse effects of the etching process on the second conductor portion 52. This improves the reliability of signal transmission when the second conductor portion 52 is used to transmit a specific signal. Furthermore, this design allows the marking portion 21 to be simultaneously protected by the three-layer structure of the first protective layer 40, the second conductor portion 52, and the pixel definition layer 30, thereby enhancing the protection of the marking portion 21 and improving the positioning accuracy of subsequent processes.

[0108] In some embodiments, the first conductor layer 20 includes a first electrode 51 located within a first region A1, and the pixel definition layer 30 surrounds and forms a pixel opening 31, with the first electrode 51 exposed to the pixel opening 31.

[0109] The first conductor layer 20 includes a first electrode 51, meaning the first conductor layer 20 is the film layer containing the anode. The first conductor layer 20 also includes the first electrode 51 located in the first region A1 and a marking portion 21 located in the second region A2. The first electrode 51 and the marking portion 21 may include the same material and are formed together in the same process. The pixel definition layer 30 has a plurality of pixel openings 31 formed in the first region A1. The pixel openings 31 are disposed corresponding to the first electrode 51, and the first electrode 51 is at least partially exposed through the pixel openings 31.

[0110] In related technologies, if the alignment mark is placed in the anode layer, the alignment mark is often only covered and protected by the pixel definition layer 30, which easily leads to the problem of the alignment mark being etched and damaged. However, in this embodiment, an additional first protective layer 40 is added to the display panel. The first protective layer 40 is located between the first conductor layer 20 and the pixel definition layer 30. Both the first protective layer 40 and the pixel definition layer 30 can cover and protect the marking portion 21, thereby achieving a dual protection effect for the marking portion 21, reducing the risk of the marking portion 21 being etched and damaged, improving the alignment accuracy of subsequent processes, and improving the reliability of the display panel.

[0111] It should be noted that the marking part 21 and the first electrode 51 can have various relationships. For example, the marking part 21 can be electrically connected to the first electrode 51, or the marking part 21 can be insulated from the first electrode 51. Optionally, the marking part 21 is insulated from the first electrode 51, that is, there is no need for a direct connection between the two or for electrical connection to be achieved through other conductor structures. Based on this, the position and layout of the marking part 21 in the second region A2 can be unaffected by the first electrode 51, providing greater flexibility.

[0112] Furthermore, the positional relationship between the first protective layer 40 and the first electrode 51 is not limited in this embodiment. Optionally, the first electrode 51 is attached to the pixel definition layer 30, and the marking portion 21 is spaced apart from the pixel definition layer 30. That is, the first electrode 51 and the pixel definition layer 30 are not separated by the first protective layer 40, and the orthographic projection of the first electrode 51 onto the substrate 10 is outside the orthographic projection of the first protective layer 40 onto the substrate 10. The marking portion 21 is separated from the pixel definition layer 30 by the first protective layer 40, thereby achieving dual protection for the marking portion 21 through the first protective layer 40 and the pixel definition layer 30. Further optionally, the first protective layer 40 may be completely located within the second region A2 and outside the first region A1.

[0113] Or in some other embodiments, see Figure 5 The first protective layer 40 is partially located within the first region A1 and partially within the second region A2. The first protective layer 40 includes a first opening 44 communicating with the pixel opening 31, through which the first electrode 51 is exposed. In this design, the first protective layer 40 not only separates the marking portion 21 from the pixel definition layer 30 but also covers a portion of the structure of the first electrode 51. Thus, the first protective layer 40 can have a full-surface structure, allowing it to be fabricated without a fine metal mask, thereby reducing fabrication costs.

[0114] In some embodiments, please refer to Figure 6 The display panel also includes an isolation structure 60 disposed on the side of the pixel definition layer 30 away from the substrate 10, the isolation structure 60 enclosing an isolation opening 61 that communicates with the pixel opening 31.

[0115] The isolation structure 60 is a partition structure in the display panel used to form multiple spaced portions of a partial film layer structure without the need for a fine metal mask. Optionally, the display panel also includes a light-emitting functional layer located on the side of the first electrode layer 50 facing away from the substrate 10, the light-emitting functional layer including a light-emitting structure P located within the pixel opening 31. Further optionally, the display panel also includes a second electrode layer located on the side of the light-emitting functional layer facing away from the substrate 10, the second electrode layer including a second electrode J located within the isolation opening 61. The first electrode 51 and the second electrode J are used to drive and control whether the light-emitting structure P emits light or not; exemplarily, the first electrode 51 is an anode, and the second electrode J is a cathode.

[0116] Patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, and PCT / CN2024 / 099072 describe relevant technical solutions for the isolation structure 60 (also known as a partition structure or isolation column). Their contents are incorporated herein by reference and will not be repeated in this embodiment.

[0117] The isolation structure 60 can enclose and form multiple isolation openings 61. The light-emitting structure P is at least partially located within the isolation openings 61. Here, "the light-emitting structure P is at least partially located within the isolation openings 61" means that the orthogonal projection of the light-emitting structure P onto the substrate 10 is at least partially located within the orthogonal projection of the isolation openings 61 onto the substrate 10; that is, the position of the light-emitting structure P corresponds to the position of the isolation openings 61. The second electrode J is similarly described, and will not be repeated in the embodiments of this application.

[0118] The light-emitting structure P includes, but is not limited to, at least two of the following: a red light-emitting structure P for emitting red light, a green light-emitting structure P for emitting green light, and a blue light-emitting structure P for emitting blue light. A single light-emitting structure P may include multiple stacked film layers. The composition of the film layers corresponding to the light-emitting structure P is not limited in this application. Optionally, the light-emitting structure P may include stacked film layers such as a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer, an electron transport layer (ETL), and an electron injection layer (EIL). In some other embodiments, a single light-emitting structure P may include multiple stacked light-emitting layers, with a charge generation layer between adjacent light-emitting layers.

[0119] Next, the fabrication process of the light-emitting functional layer and the second electrode layer will be described in detail in this embodiment. Taking the fabrication of the red light-emitting structure P before the fabrication of the green light-emitting structure P as an example, since the precision metal mask is eliminated, the red light-emitting material corresponding to the red light-emitting structure P and the electrode material corresponding to the red light-emitting structure P will first fall into each isolation opening 61. Then, a portion of the red light-emitting material and electrode material in the isolation opening 61 will be selectively etched away, while a portion of the red light-emitting material and electrode material in the isolation opening 61 will be retained to form the red light-emitting structure P and its corresponding first electrode 51. After this, the green light-emitting material and electrode material corresponding to the green light-emitting structure P will fall into each isolation opening 61. Then, a portion of the green light-emitting material and electrode material in the isolation opening 61 will be selectively etched away, while a portion of the green light-emitting material and electrode material in the isolation opening 61 will be retained to form the green light-emitting structure P and its corresponding first electrode 51.

[0120] In the fabrication process of multiple color-type light-emitting structures P, the fabrication of each color light-emitting structure P is often accompanied by an etching process. Therefore, the marking portion 21 is easily affected by multiple etching processes during the fabrication of the light-emitting structure P, which may lead to etching damage to the marking portion 21. In view of this, the embodiments of this application provide dual protection for the marking portion 21 through the first protective layer 40 and the pixel definition layer 30, reducing the risk of etching damage to the marking portion 21, improving the alignment accuracy of subsequent processes, and improving the reliability of the display panel.

[0121] The relative relationship between the isolation structure 60 and the second electrode J is not limited in the embodiments of this application. Optionally, the isolation structure 60 includes a conductive structure, and the second electrode J is electrically connected to the conductive structure. In this design, the conductive structure in the isolation structure 60 can be used to transmit the power signal corresponding to the second electrode J. The second electrode J can be in contact with the conductive structure to receive and transmit the power signal, thereby meeting the light emission requirement of the light-emitting structure P.

[0122] In some embodiments, such as Figure 6 As shown, the isolation structure 60 includes a first isolation portion 62 and a second isolation portion 63 located on the side of the first isolation portion 62 away from the substrate 10. The orthographic projection of the first isolation portion 62 onto the substrate 10 is located within the orthographic projection of the second isolation portion 63 onto the substrate 10.

[0123] As can be seen from the foregoing, the isolation structure 60 allows the light-emitting functional layer to form multiple spaced light-emitting junctions without the need for a fine metal mask, thereby reducing the manufacturing cost of the display panel. Specifically, the isolation structure 60 includes a first isolation portion 62 and a second isolation portion 63 arranged sequentially along a direction away from the substrate 10. The orthographic projection of the first isolation portion 62 onto the substrate 10 lies within the orthographic projection of the second isolation portion 63 onto the substrate 10. Furthermore, the orthographic projection of the second isolation portion 63 covers and extends beyond the orthographic projection of the first isolation portion 62.

[0124] The specific dimensions and shapes of the first isolation portion 62 and the second isolation portion 63 are not limited in this embodiment. For example, the longitudinal section of the isolation structure 60 can be T-shaped. This design helps to prevent the luminescent material from extending along the sidewall of the first isolation portion 62 to the sidewall of the second isolation portion 63 during the fabrication of the luminescent functional layer. This allows for the fabrication and separation of the luminescent structures P corresponding to different isolation openings 61 without the need for a fine metal mask. The fabrication of the second electrode J follows the same principle and will not be described further in this embodiment.

[0125] In some embodiments, the first isolation portion 62 includes a conductive material, and the second isolation portion 63 is electrically connected to the second electrode J. In other words, the conductive structure includes a first conductor portion 22, which can be used to transmit a power signal to the second electrode J.

[0126] It should be noted that the second electrode J can directly contact the first isolation portion 62 to achieve an electrical connection between the first isolation portion 62 and the second electrode J. Alternatively, the conductive structure may also include other structures besides the first isolation portion 62, which simultaneously contact both the first isolation portion 62 and the second electrode J, thereby achieving an electrical connection between the first isolation portion 62 and the second electrode J.

[0127] In this embodiment, the first isolation part 62, in addition to forming a T-shaped structure with the second isolation part 63 to meet the isolation requirements between different light-emitting structures P and the second electrode J, also includes a conductive material to meet the power signal transmission requirements of the second electrode J and the display requirements of the display panel, thus having strong practicality.

[0128] In some embodiments, please refer to Figure 7 The isolation structure 60 also includes a third isolation portion 64 located on the side of the first isolation portion 62 facing the substrate 10, wherein the orthographic projection of the first isolation portion 62 onto the substrate 10 lies within the orthographic projection of the third isolation portion 64 onto the substrate 10. Furthermore, the orthographic projection of the third isolation portion 64 onto the substrate 10 covers and extends beyond the orthographic projection of the first isolation portion 62 onto the substrate 10.

[0129] In this embodiment, by adding a third isolation portion 64, the second electrode J can contact the surface of the third isolation portion 64 facing away from the substrate 10, thereby increasing the contact area between the isolation structure 60 and the second electrode J. Optionally, the third isolation portion 64 includes a conductive material and is disposed in contact with the second electrode J. Thus, both the first isolation portion 62 and the third isolation portion 64 can be used to transmit power signals, which improves the reliability of power signal transmission between the isolation structure 60 and the second electrode J, and enhances the reliability of the display panel.

[0130] In some embodiments, please refer to Figure 7 and Figure 8 The isolation structure 60 includes a first isolation structure 60a located in the first region A1 and a second isolation structure 60b located in the second region A2. The orthographic projection of the marking portion 21 on the substrate 10 is located within the orthographic projection of the second isolation structure 60b on the substrate 10.

[0131] The first isolation structure 60a is a portion of the isolation structure 60 within the first region A1, and the isolation opening 61 is formed by the first isolation structure 60a. The second isolation structure 60b is a portion of the isolation structure 60 within the second region A2. The second isolation structure 60b may form an opening structure by enclosure, or it may not form an opening structure by enclosure. This application embodiment does not impose any limitations on this.

[0132] The specific film layer composition of the first isolation structure 60a and the second isolation structure 60b is not limited in the embodiments of this application. Optionally, both the first isolation structure 60a and the second isolation structure 60b include a first isolation portion 62 and a second isolation portion 63 stacked together.

[0133] Furthermore, in this embodiment, the orthographic projection of the second isolation structure 60b onto the substrate 10 overlaps with the orthographic projection of the marking portion 21 onto the substrate 10. That is, in addition to the first protective layer 40 and the pixel definition layer 30, the second isolation structure 60b can also cover and protect the marking portion 21. This can further reduce the adverse effects of the multi-etching process in the process corresponding to the light-emitting structure P on the marking portion 21, improve the structural reliability of the marking portion 21, and help improve the alignment accuracy in subsequent processes.

[0134] Of course, in other embodiments, the orthographic projection of the second isolation structure 60b onto the substrate 10 may also be located outside the orthographic projection of the mark portion 21 onto the substrate 10. This can reduce the obstruction of the mark portion 21 by the isolation structure 60, and facilitate the identification of the mark portion 21 using optical principles during the alignment process.

[0135] In some embodiments, such as Figure 6 and Figure 7As shown, the display panel also includes a light-emitting functional layer disposed on the side of the first electrode layer 50 away from the substrate 10 and a first encapsulation layer 71 located on the side of the light-emitting functional layer away from the substrate 10. The first encapsulation layer 71 includes an encapsulation portion 711 located within the isolation opening 61.

[0136] The first encapsulation layer 71 primarily serves a protective encapsulation function. The first encapsulation layer 71 includes encapsulation portions 711 corresponding to the isolation opening 61. That is, the fabrication of the first encapsulation layer 71 is influenced by the isolation junction, resulting in multiple encapsulation portions 711 corresponding to different light-emitting structures P and spaced apart, thereby achieving individual encapsulation of different light-emitting structures P and improving encapsulation reliability. The specific shape and size of the encapsulation portions 711 are not limited in this embodiment. Optionally, due to factors such as the material composition and film formation method within the first encapsulation layer 71, some structures in the encapsulation portions 711 may extend relative to the sidewall of the isolation structure 60 and extend to the side of the isolation structure 60 opposite to the substrate 10.

[0137] In this embodiment, the first encapsulation layer 71 includes a plurality of encapsulation portions 711 disposed corresponding to different light-emitting structures P and spaced apart from each other. Different encapsulation portions 711 can encapsulate and protect different light-emitting structures P, thereby improving the encapsulation and protection effect of the light-emitting structures P and reducing the risk of moisture and other substances intruding into the light-emitting structures P. Optionally, the first encapsulation layer 71 includes inorganic materials.

[0138] In some embodiments, please refer to Figure 9 The display panel also includes a second encapsulation layer 72 located on the side of the first encapsulation layer 71 opposite to the substrate 10, and the second encapsulation layer 72 covers a plurality of encapsulation portions 711.

[0139] Unlike the first encapsulation layer 71, the second encapsulation layer 72 can be a full-surface structure, covering multiple encapsulation portions 711. The material composition of the first encapsulation layer 71 and the second encapsulation layer 72 is not limited in this embodiment. Optionally, the first encapsulation layer 71 may comprise inorganic materials, and the second encapsulation layer 72 may comprise organic materials.

[0140] In some embodiments, the display panel further includes a third encapsulation layer 73 located on the side of the second encapsulation layer 72 facing away from the substrate 10, wherein both the second encapsulation layer 72 and the third encapsulation layer 73 are full-surface structures. Further, the first encapsulation layer 71, the second encapsulation layer 72, and the third encapsulation layer 73 can together constitute a thin-film encapsulation structure, thereby further improving the encapsulation reliability of the display panel. Optionally, the third encapsulation layer 73 comprises an inorganic material.

[0141] In some embodiments, please refer to Figure 10The first protective layer 40 includes a first sub-part 41 located on the side of the marking portion 21 facing away from the substrate 10, and a second sub-part 42 located on the periphery of the marking portion 21. The first sub-part 41 has a first surface M1 facing away from the substrate 10, and the second sub-part 42 has a second surface M2 facing away from the substrate 10. The plane containing the first surface M1 is located on the side of the plane containing the second surface M2 facing away from the substrate 10.

[0142] The first sub-part 41 is a portion of the first protective layer 40 that covers the marking portion 21, and the second sub-part 42 is a portion of the first protective layer located around the marking portion 21. The first sub-part 41 and the second sub-part 42 can be connected as a whole by means of other structures, or the first sub-part 41 and the second sub-part 42 can be disconnected. This application embodiment does not limit this.

[0143] The first surface M1 is the surface of the first sub-part 41 facing away from the substrate 10, and the second surface M2 is the surface of the second sub-part 42 facing away from the substrate 10. Since the marking part 21 has a certain thickness, the plane containing the first surface M1 will be located on the side of the plane containing the second surface M2 facing away from the substrate 10, thus allowing a certain step difference between the plane containing the first surface M1 and the plane containing the second surface M2. Therefore, in the positioning process, the location of the marking part 21 can be identified by utilizing the step difference between the first surface M1 and the second surface M2, thereby achieving the identification of the marking part 21, meeting the positioning identification requirements, and possessing strong practicality.

[0144] In some embodiments, such as Figure 10 As shown, in the second region A2, the first protective layer 40 is attached to the pixel definition layer 30.

[0145] In this embodiment, since the first protective layer 40 and the pixel definition layer 30 are bonded together within the second region A2, the step difference between the first surface M1 and the second surface M2 will also result in a step difference at the corresponding position of the pixel definition layer 30. Optionally, the pixel definition layer 30 includes a third sub-part 32 located on the side of the first sub-part 41 facing away from the substrate 10, and a fourth sub-part 33 located on the periphery of the first sub-part 41. The third sub-part 32 has a third surface M3 facing away from the substrate 10, and the fourth sub-part 33 has a fourth surface M4 facing away from the substrate 10. The plane containing the third surface M3 is located on the side of the plane containing the fourth surface M4 facing away from the substrate 10.

[0146] Under this design, during the positioning process, the location of the marker 21 can be identified by using the step difference between the plane where the third surface M3 is located and the plane where the fourth surface M4 is located, thereby realizing the identification of the marker 21, meeting the positioning identification needs, and having strong practicality.

[0147] In some embodiments, the first protective layer 40 further includes a fifth sub-part 43 connecting the first sub-part 41 and the second sub-part 42, the fifth sub-part 43 being fitted to the sidewall of the marking part 21.

[0148] In this embodiment of the application, the fifth sub-part 43 is used not only to achieve the integral connection with the first sub-part 41 and the second sub-part 42, but also to be fitted with the side wall of the marking part 21 to protect the side wall of the marking part 21, reduce the adverse effects of the etching process on the side wall of the marking part 21, that is, reduce the side etching effect received by the marking part 21, and further improve the structural reliability of the marking part 21.

[0149] In some embodiments, the first conductor layer 20 includes a first titanium metal layer, an aluminum metal layer, and a second titanium metal layer stacked together, that is, the marking portion 21 can be formed by stacking three titanium-aluminum-titanium layers. Typically, the aluminum metal layer is more susceptible to damage from side markings. Therefore, in this embodiment, the fifth sub-part 43 is attached to the sidewall of the marking portion 21. The fifth sub-part 43 reduces the impact of side markings on the aluminum metal layer, thereby improving reliability.

[0150] In some embodiments, the pixel definition layer 30 includes a third sub-part 32 located on the side of the first sub-part 41 away from the substrate 10, a fourth sub-part 33 located on the periphery of the first sub-part 41, and a sixth sub-part 34 connecting the third sub-part 32 and the fourth sub-part 33.

[0151] In this embodiment, both the fifth sub-part 43 and the sixth sub-part 34 can cover and protect the sidewall of the marking part 21, thereby achieving a dual protection effect on the sidewall of the marking part 21, further reducing the side marking effect on the marking part 21, improving the structural reliability of the marking part 21, and thus improving the positioning accuracy in subsequent processes.

[0152] In some embodiments, such as Figure 2 and Figure 3 As shown, the display panel also includes a planarization layer 80 disposed between the pixel definition layer 30 and the first conductor layer 20. The orthographic projection of the planarization layer 80 onto the substrate 10 is located outside the orthographic projection of the marking portion 21 onto the substrate 10.

[0153] The planarization layer 80 is a film layer in the display panel used to provide a flat surface. The surface of the planarization layer 80 away from the substrate 10 is often parallel to the plane where the substrate 10 is located. The planarization layer 80 helps to reduce the fabrication cost of other film layers formed after the planarization layer 80 and improve their fabrication accuracy.

[0154] The planarization layer 80 is disposed between the pixel definition layer 30 and the first conductor layer 20 and is at least partially located in the first region A1. The planarization layer 80 can provide a flat surface for the fabrication of the first electrode 51, thereby improving the fabrication accuracy of the first electrode 51 and reducing its fabrication difficulty.

[0155] Furthermore, in this embodiment, the planarization layer 80 is projected onto the substrate 10 outside the projection of the marker portion 21 onto the substrate 10, that is, the planarization layer 80 and the marker portion 21 are misaligned. This reduces the influence of the presence of the planarization layer 80 on the corresponding step difference at the location of the marker portion 21. In this way, the location of the marker portion 21 can be identified by the step difference during the positioning process, thus meeting the positioning requirements of the display panel.

[0156] It should be noted that the planarization layer 80 may not be located within the second region A2 at all, or the planarization layer 80 may be partially located within the second region A2, as long as the portion of the planarization layer 80 located within the second region A2 is misaligned with the marking portion 21. Optionally, the planarization layer 80 is located within the first region A1 and outside the second region A2.

[0157] In some embodiments, the first conductor layer 20 includes a first conductor portion 22 located within a first region A1, and a planarization layer 80 is disposed covering the first conductor portion 22.

[0158] In this embodiment, the first conductor portion 22 is a conductor structure located in the first region A1 of the first conductor layer 20 and used to transmit a specific signal. The planarization layer 80 can be a film structure that insulates and separates the first conductor portion 22 from the first electrode 51. In addition, the planarization layer 80 can also provide a flat surface for the fabrication of the first electrode 51, thereby improving the reliability of the first electrode 51.

[0159] In some embodiments, please refer to Figure 2 and Figure 11 The display panel also includes a planarization layer 80 disposed between the pixel definition layer 30 and the first conductor layer 20. The orthographic projection of the marker portion 21 onto the substrate 10 is located within the orthographic projection of the planarization layer 80 onto the substrate 10, and the planarization layer 80 is located between the first protective layer 40 and the pixel definition layer 30.

[0160] In this embodiment, by overlapping the orthographic projection of the planarization layer 80 onto the substrate 10 with the orthographic projection of the marking portion 21 onto the substrate 10, the marking portion 21 can be protected by the three-layer structure of the first protective layer 40, the planarization layer 80, and the pixel definition layer 30 simultaneously, thereby further improving the protection effect on the marking portion 21 and reducing the risk of damage to the marking portion 21.

[0161] Furthermore, the planarization layer 80 can be entirely located within the second region A2, or it can be partially located within the first region A1 and partially within the second region A2; this embodiment of the application does not impose any limitations on this. Optionally, the planarization layer 80 can be partially located within the first region A1 and partially within the second region A2. In this way, the portion of the planarization layer 80 located within the first region A1 can also provide a flat surface for the fabrication of the first electrode 51, thereby improving the fabrication accuracy of the first electrode 51.

[0162] In some embodiments, the planarization layer 80 includes a first planarization portion 81 located in the second region A2 and a second planarization portion 82 located in the first region A1, wherein the first planarization portion 81 and the second planarization portion 82 are integrally connected. This design allows the planarization layer 80 to have a full-surface structure, thereby reducing the difficulty of fabricating the planarization layer 80.

[0163] In some embodiments, the planarization layer 80 includes a first planar portion 81 located in the second region A2 and a second planar portion 82 located in the first region A1. The first planar portion 81 is parallel to the plane of the substrate 10 away from the surface of the substrate 10.

[0164] In this embodiment, the first flattening portion 81 can provide a flat surface for a portion of the structure within the second region A2 of the pixel definition layer 30, thereby improving the fabrication accuracy of the display panel in the second region A2. Further optionally, the planarization layer 80 includes a second flattening portion 82 located within the first region A1. The surfaces of the first flattening portion 81 facing away from the substrate 10 and the surfaces of the second flattening portion 82 facing away from the substrate 10 are located on the same plane. This eliminates the need for differentiated settings for the first flattening portion 81, thereby reducing the fabrication difficulty of the planarization layer 80.

[0165] It should be noted that since the surface of the first flat portion 81 facing away from the substrate 10 is parallel to the plane of the substrate 10, there may be no step difference in the area corresponding to the marking portion 21 on the display panel. Therefore, it is necessary to use optical principles to identify and position the marking portion 21. Based on this, the orthographic projection of the marking portion 21 onto the substrate 10 needs to be at least partially located outside the orthographic projection of the first electrode layer 50 onto the substrate 10 to meet the positioning and identification requirements.

[0166] In some embodiments, the first protective layer 40 comprises an inorganic material and is disposed in contact with the marking portion 21.

[0167] Compared to other types of materials, by providing the first protective layer 40 with inorganic materials, the penetration of water vapor and other substances into the marking part 21 through the first protective layer 40 can be reduced, thereby reducing the damage to the marking part 21 caused by water vapor and other substances and improving the structural reliability of the marking part 21.

[0168] In some embodiments, the pixel definition layer 30 includes inorganic materials, so that the two inorganic layers can provide dual protection for the marking portion 21. This not only reduces the etching damage to the marking portion 21 caused by the etching process, but also further reduces the damage to the marking portion 21 caused by moisture and other factors, thereby improving the structural reliability of the marking portion 21.

[0169] Alternatively, the orthographic projection of the marking portion 21 onto the substrate 10 is located within the orthographic projection of the planarization layer 80 onto the substrate 10, and the planarization layer 80 comprises an organic material.

[0170] In this embodiment, the first protective layer 40, the planarization layer 80, and the pixel definition layer 30 form an inorganic-organic-inorganic structure that protects the marking portion 21. This not only enhances the protection of the marking portion 21, but also forms a thin film encapsulation structure that covers the marking portion 21. With the help of this thin film structure, the risk of moisture and other substances intruding into the marking portion 21 can be further reduced, thereby improving the structural reliability of the marking portion 21.

[0171] Secondly, please refer to Figure 12 This application provides a display device, which includes a display panel as described in any of the foregoing embodiments.

[0172] While the embodiments disclosed in this application are as described above, the content is merely for the purpose of facilitating understanding of this application and is not intended to limit the invention. Any person skilled in the art to which this application pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope disclosed in this application; however, the scope of protection of this application shall still be determined by the scope defined in the appended claims.

[0173] The above description is merely a specific embodiment of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, substitutions for other connection methods described above can be made by referring to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application.

Claims

1. A display panel, characterized in that, The display panel has a first area and a second area located on at least one side of the first area, the display panel comprising: Substrate; A first conductor layer is disposed on one side of the substrate, and the first conductor layer includes a marking portion located in the second region; A pixel definition layer is disposed on the side of the first conductor layer opposite to the substrate; A first protective layer is disposed between the pixel definition layer and the first conductor layer, and the orthographic projection of the marking portion on the substrate is located within the orthographic projection of the first protective layer and the pixel definition layer on the substrate; The first protective layer is located within the second region and outside the first region, and the display panel includes a first electrode located within the first region, wherein the orthographic projection of the first electrode onto the substrate is located outside the orthographic projection of the first protective layer onto the substrate; The first protective layer includes a first sub-part located on the side of the marking portion away from the substrate, and a second sub-part located on the periphery of the marking portion. In the second region, the first protective layer is bonded to the pixel definition layer. The pixel definition layer includes a third sub-part located on the side of the first sub-part away from the substrate, a fourth sub-part located on the periphery of the first sub-part, and a sixth sub-part connecting the third sub-part and the fourth sub-part. The third sub-part has a third surface away from the substrate, and the fourth sub-part has a fourth surface away from the substrate. The plane containing the third surface is located on the side of the plane containing the fourth surface away from the substrate.

2. The display panel according to claim 1, characterized in that, It also includes a first electrode layer disposed between the pixel definition layer and the first conductor layer, the first electrode layer including a first electrode located in the first region, the pixel definition layer enclosing to form a pixel opening, and the first electrode exposed to the pixel opening.

3. The display panel according to claim 2, characterized in that, The first conductor layer includes a first conductor portion located within the first region, and the orthographic projection of the first conductor portion onto the substrate lies within the orthographic projection of the first electrode onto the substrate.

4. The display panel according to claim 3, characterized in that, The first conductor portion is electrically connected to the first electrode.

5. The display panel according to claim 2, characterized in that, The first electrode layer further includes a second conductor portion located within the second region, wherein the orthographic projection of the second conductor portion onto the substrate is located within the orthographic projection of the marking portion onto the substrate.

6. The display panel according to claim 5, characterized in that, The first electrode is insulated from the second conductor portion.

7. The display panel according to claim 1, characterized in that, The first conductor layer includes a first electrode located within the first region, and the pixel definition layer encloses a pixel opening, with the first electrode exposed to the pixel opening.

8. The display panel according to claim 7, characterized in that, The marking portion is insulated from the first electrode.

9. The display panel according to claim 7, characterized in that, The first electrode is attached to the pixel definition layer, and the marking portion is spaced apart from the pixel definition layer.

10. The display panel according to claim 2, characterized in that, It also includes an isolation structure disposed on the side of the pixel definition layer opposite to the substrate, the isolation structure enclosing an isolation opening that communicates with the pixel opening.

11. The display panel according to claim 10, characterized in that, The display panel further includes a light-emitting functional layer located on the side of the first electrode layer opposite to the substrate, and the light-emitting functional layer includes a light-emitting structure disposed within the pixel opening.

12. The display panel according to claim 11, characterized in that, The display panel further includes a second electrode layer located on the side of the light-emitting functional layer opposite to the substrate, the second electrode layer including a second electrode disposed within the isolation opening.

13. The display panel according to claim 12, characterized in that, The isolation structure includes a conductive structure, and the second electrode is electrically connected to the conductive structure.

14. The display panel according to claim 10, characterized in that, The isolation structure includes a first isolation portion and a second isolation portion located on the side of the first isolation portion away from the substrate, wherein the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate.

15. The display panel according to claim 14, characterized in that, The isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, wherein the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate.

16. The display panel according to claim 14, characterized in that, The display panel further includes a second electrode layer located on the side of the first electrode layer facing away from the substrate, the second electrode layer including a second electrode disposed within the isolation opening; The first isolation portion includes a conductive material, and the second electrode is electrically connected to the first isolation portion.

17. The display panel according to claim 16, characterized in that, The isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, wherein the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the third isolation portion on the substrate; The third isolation portion includes a conductive material and is disposed in contact with the second electrode.

18. The display panel according to claim 10, characterized in that, The isolation structure includes a first isolation structure located in the first region and a second isolation structure located in the second region, wherein the orthographic projection of the marking portion on the substrate is located within the orthographic projection of the second isolation structure on the substrate.

19. The display panel according to claim 18, characterized in that, The first conductor layer includes a first conductor portion located within the first region, and the marking portion is insulated from the first conductor portion.

20. The display panel according to claim 18, characterized in that, The marking portion is insulated from the second isolation structure.

21. The display panel according to claim 10, characterized in that, It also includes a light-emitting functional layer disposed on the side of the first electrode layer opposite to the substrate, and a first encapsulation layer located on the side of the light-emitting functional layer opposite to the substrate, the first encapsulation layer including an encapsulation portion located within the isolation opening.

22. The display panel according to claim 21, characterized in that, The first encapsulation layer comprises inorganic materials.

23. The display panel according to claim 21, characterized in that, The display panel further includes a second encapsulation layer located on the side of the first encapsulation layer opposite to the substrate, the second encapsulation layer covering a plurality of the encapsulation portions.

24. The display panel according to claim 23, characterized in that, The first encapsulation layer comprises inorganic materials, and the second encapsulation layer comprises organic materials.

25. The display panel according to claim 23, characterized in that, The display panel also includes a third encapsulation layer located on the side of the second encapsulation layer opposite to the substrate.

26. The display panel according to claim 25, characterized in that, The third encapsulation layer comprises inorganic materials.

27. The display panel according to claim 1, characterized in that, The first sub-part has a first surface facing away from the substrate, and the second sub-part has a second surface facing away from the substrate. The plane containing the first surface is located on the side of the plane containing the second surface facing away from the substrate.

28. The display panel according to claim 27, characterized in that, The first protective layer further includes a fifth sub-part connecting the first sub-part and the second sub-part; The fifth sub-part is fitted to the side wall of the marking part.

29. The display panel according to claim 28, characterized in that, The first conductor layer includes a first titanium metal layer, an aluminum metal layer, and a second titanium metal layer stacked sequentially.

30. The display panel according to claim 1, characterized in that, It also includes a planarization layer disposed between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the planarization layer on the substrate is located outside the orthographic projection of the marking portion on the substrate.

31. The display panel according to claim 30, characterized in that, The planarization layer is located within the first region and outside the second region.

32. The display panel according to claim 30, characterized in that, The first conductor layer includes a first conductor portion located within the first region, and the planarization layer is disposed covering the first conductor portion.

33. The display panel according to claim 1, characterized in that, It also includes a planarization layer disposed between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the marking portion on the substrate is located within the orthographic projection of the planarization layer on the substrate, and the planarization layer is located between the first protective layer and the pixel definition layer.

34. The display panel according to claim 33, characterized in that, The planarization layer is partially located within the first region and partially located within the second region.

35. The display panel according to claim 34, characterized in that, The planarization layer includes a first planar portion located in the second region and a second planar portion located in the first region, wherein the first planar portion and the second planar portion are integrally connected.

36. The display panel according to claim 33, characterized in that, The planarization layer includes a first planar portion located within the second region, the first planar portion being parallel to the plane of the substrate and facing away from the substrate.

37. The display panel according to claim 36, characterized in that, The planarization layer includes a second planar portion located within the first region, wherein the surface of the second planar portion facing away from the substrate is on the same plane as the surface of the first planar portion facing away from the substrate.

38. The display panel according to claim 1, characterized in that, The first protective layer comprises an inorganic material and is disposed in contact with the marking portion.

39. The display panel according to claim 38, characterized in that, The pixel definition layer comprises inorganic materials.

40. The display panel according to claim 39, characterized in that, The display panel further includes a planarization layer disposed between the pixel definition layer and the first conductor layer, wherein the orthographic projection of the marking portion on the substrate is located within the orthographic projection of the planarization layer on the substrate.

41. The display panel according to claim 40, characterized in that, The planarization layer comprises organic materials.

42. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 41.

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