An additive, reaction solution, method and application for alkaline etching and polishing of silicon wafers

Abstract

The present invention belongs to the technical field of silicon wafer processing, and relates to an additive, a reaction solution, a method and an application for alkaline etching and polishing of silicon wafers. The present invention provides an additive for alkaline etching and polishing of silicon wafers. In terms of mass percentage, the additive consists of: 0.3-1.0% of an antifoaming agent, 0.1-1.0% of a modifier, 0.1-1.0% of an accelerator, and the balance of deionized water; the antifoaming agent is selected from at least one of non-ionic surfactants, the modifier is selected from at least one of phosphorus oxide compounds containing phenyl and ester compounds containing phenyl, and the accelerator is selected from at least one of strong base weak acid salts with oxidizing properties and borates with oxidizing properties. When the additive provided by the present invention is used for alkaline etching and polishing of silicon wafers, it can make the pyramids on the back of the silicon wafers corrode smoothly and the bases of the pyramids become rounded, have excellent passivation performance and low contact resistance, and ultimately achieve the purpose of improving the battery efficiency by increasing the short-circuit current.

Description

Technical Field

[0001] The present invention belongs to the technical field of silicon wafer processing, and relates to an additive, reaction solution, method and application for alkaline etching and polishing of silicon wafers. Background Art

[0002] In the field of solar cell manufacturing, traditional production techniques rely on the mixed acid etching method of nitric acid and hydrofluoric acid to achieve precise edge etching and effective removal of the PSG (phosphosilicate glass) layer. The PSG layer is formed due to the introduction of oxygen during the diffusion process, forming a layer of SiO 2 on the silicon wafer surface, and at high temperature, POCl 3 reacts with O 2 to form P 2 O 5 . Some P atoms enter the Si to replace some Si atoms on the lattice to form an n-type semiconductor, and some remain in the SiO 2 to form PSG. The presence of the PSG layer makes the surface of the silicon wafer prone to moisture absorption in the air, resulting in a decrease in current and power attenuation. The etching and polishing process enhances the battery efficiency by gradually deepening the polishing degree, making the tips of the pyramid structure tend to be rounded and the surface smoothness significantly improved, thus achieving a delicate balance between surface passivation and optoelectronic contact characteristics, promoting the improvement of the battery conversion efficiency. However, due to its potential impact on the environment, this process is not an ideal long-term solution.

[0003] As an alternative, the alkaline etching and polishing technology demonstrates its dual advantages in environmental protection and efficiency improvement. This technology not only abandons the environmentally unfriendly acids in the traditional process to achieve green production, but also significantly improves the conversion efficiency of solar cells. Specifically, the alkaline etching and polishing process can deeply optimize the surface morphology of the battery, completely flatten the top of the pyramid structure, make the base present a regular square contour, and the surface flatness reaches an unprecedented level. Although this highly flattened surface enhances the passivation effect and is beneficial to reducing carrier recombination, it is also accompanied by a significant increase in contact resistance, which to a certain extent restricts the further improvement of the overall battery efficiency, resulting in a decrease in the overall efficiency compared to some optimized traditional processes. The higher the reflectivity, the flatter the tower base and the relatively uniform the coating. Adding additives in alkaline etching and polishing is a suitable method. Patent CN118240485A uses a compound additive such as a polishing agent and an amphoteric inorganic ion salt to obtain a silicon wafer with a reflectivity of 48.59%, but still cannot meet the pursuit of higher efficiency in this field. Therefore, when exploring more efficient and environmentally friendly solar cell production processes, how to optimize the contact characteristics while maintaining high passivation performance has become a key technical challenge to be solved urgently. Summary of the Invention

[0004] The object of the present invention is to optimize the surface topography of silicon wafers, round the bases of pyramids on the back surface of the silicon wafers after texturing, improve passivation and reduce contact resistance, thereby enhancing the battery efficiency. For this purpose, the present invention provides an additive, a reaction solution, a method and an application for alkaline etching and polishing of silicon wafers to solve this need in the art.

[0005] On the one hand, the present invention relates to an additive for alkaline etching and polishing of silicon wafers. By mass percentage, the additive consists of: 0.3 - 1.0% defoamer, 0.1 - 1.0% modifier, 0.1 - 1.0% promoter, and the balance deionized water;

[0006] The defoamer is selected from at least one of non-ionic surfactants;

[0007] The modifier is selected from at least one of phosphorus oxide compounds containing phenyl and ester compounds containing phenyl;

[0008] The promoter is selected from at least one of strong base weak acid salts with oxidizing properties and borates with oxidizing properties.

[0009] Further, in the additive for alkaline etching and polishing of silicon wafers provided by the present invention, the non-ionic surfactant is selected from polyoxyethylene polyoxypropylene pentaerythritol ether, polydimethylsiloxane, polyoxypropylene glycerol ether;

[0010] The phosphorus oxide compound containing phenyl is triphenylphosphine oxide, and the ester compound containing phenyl is ethyl o-methylbenzoate and monobenzyl phthalate;

[0011] The strong base weak acid salt with oxidizing properties is sodium hypochlorite and sodium percarbonate, and the borate with oxidizing properties is potassium perborate.

[0012] Further, in the additive for alkaline etching and polishing of silicon wafers provided by the present invention, the resistivity of the deionized water is greater than 18 MΩ.

[0013] On the other hand, the present invention relates to a reaction solution for alkaline etching and polishing of silicon wafers, which is obtained by mixing an alkaline solution with a concentration of 1 - 3 wt% and the additive.

[0014] Further, in the reaction solution for alkaline etching and polishing of silicon wafers provided by the present invention, the volume ratio of the alkaline solution to the additive in the reaction solution is 30 - 100:6.

[0015] Further, in the reaction solution for alkaline etching and polishing of silicon wafers provided by the present invention, the alkali in the reaction solution is sodium hydroxide and / or potassium hydroxide.

[0016] On the other hand, the present invention relates to a method for preparing a silicon wafer with a rounded tower base structure, comprising: subjecting the textured silicon wafer to surface treatment to remove the PSG layer, and performing alkaline etching and polishing after cleaning; the alkaline etching and polishing includes: reacting the silicon wafer in the reaction solution.

[0017] Further, in the method for preparing a silicon wafer with a rounded tower base structure provided by the present invention, the temperature of the alkaline etching and polishing is 60 - 80 °C, and the time is 150 s - 300 s.

[0018] On the other hand, the present invention relates to a silicon wafer with a rounded tower base structure, which is prepared by the method for preparing a silicon wafer with a rounded tower base structure.

[0019] Further, in the silicon wafer with a rounded tower base structure provided by the present invention, the reflectivity of the silicon wafer with a rounded tower base structure is not less than 51%, and the side length of the tower base is not higher than 9 μm.

[0020] On the other hand, the present invention relates to the application of the additive for alkaline etching and polishing of silicon wafers, or the reaction solution for alkaline etching and polishing of silicon wafers in alkaline etching and polishing of silicon wafers, and the additive or the reaction solution improves the reflectivity of the silicon wafer.

[0021] Compared with the prior art, the technical solution provided by the present invention has at least the following beneficial effects or advantages:

[0022] The present invention uses high-molecular green reagents such as defoamers, modifiers, and promoters. When used as additives for alkaline etching and polishing of silicon wafers, the reflectivity of the silicon wafers can reach more than 51%. Moreover, the pyramids on the back of the silicon wafers are corroded smoothly, the tower bases are rounded, which is different from the conventional square tower bases. The rounded tower bases have good passivation performance and low contact resistance, and can ultimately improve the efficiency by increasing the short-circuit current. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0024] Figure 1 It is the surface pyramid morphology of the back of the silicon wafer prepared in Example 1.

[0025] Figure 2 It is the surface pyramid morphology of the back of the silicon wafer prepared in Example 2.

[0026] Figure 3The surface pyramid morphology on the back side of the silicon wafer obtained in Example 3.

[0027] Figure 4 The surface pyramid morphology on the back side of the silicon wafer obtained in Comparative Example 1.

[0028] Figure 5 The surface pyramid morphology on the back side of the silicon wafer obtained in Comparative Example 2. Detailed implementation manners

[0029] Next, the technical solutions of the present invention will be described in conjunction with the embodiments. However, the present invention is not limited to the following embodiments. In each embodiment, the experimental methods and detection methods are conventional methods unless otherwise specified; the reagents and materials can be purchased on the market unless otherwise specified. The % in the following embodiments is the mass percentage unless otherwise specified. The ratios in the following embodiments are mass ratios unless otherwise specified.

[0030] Example 1

[0031] This example provides an alkali polishing additive process for preparing rounded tower bases on textured silicon wafers.

[0032] The additive is composed of the following components in terms of mass percentage: 0.3% of polyoxyethylene polyoxypropylene pentaerythritol ether, 0.1% of triphenylphosphine oxide, 0.1% of sodium hypochlorite, and the balance of deionized water (resistivity is 18 MΩ).

[0033] The preparation process is as follows:

[0034] Step 1: The textured silicon wafer is subjected to surface treatment to remove the PSG layer on the back side, and the removal solution is 1.0% hydrofluoric acid solution (mass ratio).

[0035] Step 2: The silicon wafer treated in Step 1 is placed in deionized water (resistivity is 18 MΩ) for treatment for 60 s.

[0036] Step 3: A 1.08 wt% sodium hydroxide solution is mixed with the additive to form a reaction solution. The silicon wafer obtained in Step 2 is placed in the reaction solution for reaction, and a silicon wafer with a rounded tower base structure can be obtained; the volume ratio of the alkali solution to the additive in the reaction solution is 60:6, the reaction temperature is 60 °C, and the time is 150 s.

[0037] Figure 1 The surface pyramid morphology on the back side of the silicon wafer obtained in Example 1.

[0038] Example 2

[0039] This example provides an alkali polishing additive process for preparing rounded tower bases on textured silicon wafers.

[0040] The additive is composed of the following components by mass percentage: 0.3% of polyoxyethylene polyoxypropylene pentaerythritol ether, 0.2% of polydimethylsiloxane, 0.2% of triphenylphosphine oxide, 0.3% of ethyl o-methylbenzoate, 0.3% of sodium hypochlorite, 0.3% of sodium percarbonate, and the balance of deionized water (resistivity 18 MΩ).

[0041] The preparation process is as follows:

[0042] Step 1: The surface of the textured silicon wafer is treated to remove the PSG layer on the back, and the removing solution is 1.0% hydrofluoric acid solution (mass ratio).

[0043] Step 2: The silicon wafer treated in Step 1 is placed in deionized water (resistivity 18 MΩ) for treatment for 60 s.

[0044] Step 3: A sodium hydroxide solution with a concentration of 2.05 wt% is mixed with the additive to form a reaction solution. The silicon wafer obtained in Step 2 is placed in the reaction solution for reaction, and a silicon wafer with a rounded tower base structure can be obtained; the volume ratio of the alkali solution in the reaction solution to the additive is 30:6, the reaction temperature is 70 °C, and the time is 180 s.

[0045] Figure 2 It is the surface pyramid morphology on the back of the silicon wafer obtained in Example 2.

[0046] Example 3

[0047] This example provides an alkali polishing additive process for preparing a rounded tower base on a textured silicon wafer.

[0048] The additive is composed of the following components by mass percentage: 1.0% of polyoxypropylene glycerol ether, 1.0% of monobenzyl phthalate, 1.0% of potassium perborate, and the balance of deionized water (resistivity 18 MΩ).

[0049] The preparation process is as follows:

[0050] Step 1: The surface of the textured silicon wafer is treated to remove the PSG layer on the back, and the removing solution is 1.0% hydrofluoric acid solution (mass ratio).

[0051] Step 2: The silicon wafer treated in Step 1 is placed in deionized water (resistivity 18 MΩ) for treatment for 60 s.

[0052] Step 3: A sodium hydroxide solution with a concentration of 3.01 wt% is mixed with the additive to form a reaction solution. The silicon wafer obtained in Step 2 is placed in the reaction solution for reaction, and a silicon wafer with a rounded tower base structure can be obtained; the volume ratio of the alkali solution in the reaction solution to the additive is 100:6, the reaction temperature is 80 °C, and the time is 300 s.

[0053] Figure 3 The surface pyramid morphology on the back side of the silicon wafer obtained in Example 3.

[0054] Comparative Example 1

[0055] This comparative example is intended to illustrate that each functional component in the present application is indispensable. This comparative example is the same as Example 2, except that the modifier is not added. That is, by mass percentage, the additive consists of: polyoxyethylene polyoxypropylene pentaerythritol ether 0.3%, polydimethylsiloxane 0.2%, sodium hypochlorite 0.3%, sodium percarbonate 0.3%, and the balance of deionized water (resistivity 18 MΩ).

[0056] Figure 4 The surface pyramid morphology on the back side of the silicon wafer obtained in Example 4.

[0057] The silicon wafers obtained in Examples 1 to 3 and Comparative Example 1 were tested, and the test results are shown in Table 1.

[0058] Table 1: Performance test results

[0059]

[0060] As can be seen from Table 1, by combining specific defoamers, modifiers, and promoters, the present invention has a significant impact on the morphology and performance of the silicon wafer surface. By adjusting the additives provided by the present invention, the reflection performance and surface flatness of the silicon wafer can be optimized.

[0061] Comparative Example 2

[0062] This comparative example provides a silicon wafer without adding additives. This comparative example is the same as Example 2, except that no additives are added. The test results are as Figure 5 shown. As can be Figure 5 seen, the top of the conventional alkaline polished pyramid is completely flattened, the base is square, and the surface is smoother. Although the passivation performance is improved, the contact resistance deteriorates significantly and the overall efficiency decreases.

[0063] As described above, the basic principles, main features, and advantages of the present invention are preferably described. The above embodiments and the description are only descriptions of the preferred embodiments of the present invention. The present invention is not limited by the above embodiments. Without departing from the spirit and scope of the present invention, various changes and improvements made by those of ordinary skill in the art to the technical solutions of the present invention shall fall within the protection scope determined by the present invention.

Claims

1. An additive for alkaline etching and polishing of silicon wafers, characterized in that: In terms of mass percentage, the additives are composed of: 0.3-1.0% defoamer, 0.1-1.0% modifier, 0.1-1.0% accelerator, and the balance of deionized water; The defoaming agent is selected from at least one of non-ionic surfactants; The modifier is selected from at least one of a phenyl-containing phosphorus oxide compound and a phenyl-containing ester compound; The promoter is selected from at least one of a strong base weak acid salt with oxidizing properties and a borate with oxidizing properties; The nonionic surfactant is selected from polyoxyethylene polyoxypropylene pentaerythritol ether, polydimethylsiloxane, and polyoxypropylene glycerol ether; The phenyl-containing phosphorus oxide compound is triphenylphosphine oxide, and the phenyl-containing ester compound is ethyl o-toluate and monobenzyl phthalate; The oxidizing strong base and weak acid salts are sodium hypochlorite and sodium percarbonate, and the oxidizing borate is potassium perborate; The resistivity of the deionized water is greater than 18 MΩ; The additive increases the reflectivity of the silicon wafer.

2. A reaction solution for alkaline etching and polishing of silicon wafers, characterized in that: The method is obtained by mixing an alkaline solution with a concentration of 1-3wt% and the additive according to claim 1.

3. The reaction solution for alkaline etching and polishing of silicon wafers according to claim 2, characterized in that: The volume ratio of the alkali in the reaction solution to the additive is 0.1-100:

6.

4. The reaction solution for alkaline etching and polishing of silicon wafers according to claim 2, characterized in that: The alkali in the reaction solution is sodium hydroxide and / or potassium hydroxide.

5. A method for preparing a silicon wafer having a rounded tower base structure, comprising: The silicon wafer after texturing is subjected to surface treatment to remove the PSG layer, and then subjected to alkaline etching and polishing after cleaning, wherein the alkaline etching and polishing comprises: placing the silicon wafer in the reaction solution according to any one of claims 2 to 4 for reaction.

6. The method for preparing a silicon wafer having a rounded tower base structure according to claim 5, characterized in that: The temperature of the alkaline etching polishing is 60-80° C., and the time is 150s-300s.

7. A silicon wafer having a rounded tower base structure, characterized in that: The method for preparing a silicon wafer having a rounded tower base structure according to any one of claims 5 to 6 is adopted; The reflectivity of the silicon wafer containing the rounded tower base structure is not less than 51%, and the side length of the tower base is not more than 9 μm.

8. Use of the additive according to claim 1 or the reaction solution according to any one of claims 2 to 4 in alkaline etching and polishing of silicon wafers, characterized in that: The additive or the reaction solution improves the reflectivity of the silicon wafer.

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