A PIN limiter based on GaAs technology

Abstract

The present invention discloses a PIN limiter based on GaAs process. The PIN limiter includes: a first-stage limiting circuit, a second-stage limiting circuit, a third-stage limiting circuit and a control circuit; a radio frequency input end is connected to the input end of the first-stage limiting circuit; the output end of the first-stage limiting circuit is respectively connected to the input end of the second-stage limiting circuit; the output end of the second-stage limiting circuit is connected to the input end of the third-stage limiting circuit; the output end of the third-stage limiting circuit is connected to a radio frequency output end; one end of the control circuit is connected to the output end of the first-stage limiting circuit; the other end of the control circuit is grounded. By configuring the periphery of the control circuit, the amplitude of the limited output level can be conveniently changed, so that the output level changes within a certain range, which is more flexible and can meet diverse application requirements.

Description

Technical Field

[0001] The present invention relates to the field of limiters, and in particular to a PIN limiter based on GaAs process. Background Art

[0002] As the communication system has higher and higher requirements for the linearity of the receiving link, the role of the limiter is to maximize the dynamic range, prevent the input of too high or too low signals from causing adverse effects on the equipment at the back end of the signal link, and finally control the amplitude of the received signal within a predetermined range. The GaAs limiter plays a key role in wireless communication signal transmission equipment.

[0003] At present, the main components of GaAs limiters on the market are composed of symmetric structures of Schottky diodes or PIN diodes, and the limiter function is realized by using the non-linear characteristics of the diodes. The PIN diode has one more I layer than the common PN diode. Due to the radio frequency conductivity modulation effect, the PIN diode is equivalent to a current-controlled variable resistor. When the PIN diode is forward-biased, carriers and holes are simultaneously injected into the I region, but they do not recombine immediately, but survive for a certain time. The stored charge reduces the resistance of the I region and realizes the limiter function.

[0004] According to the technical background introduction of the limiter, for the limiter based on PIN diodes, the limiting ability, that is, the final limiting output power, is mainly determined by the I layer. The thickness and doping condition of the I layer are determined by the process level of the wafer foundry. The difference is that the existing PIN limiter products have some differences in power tolerance, which depends on the number of diodes in the circuit. The more the number, the relatively higher the power that can be tolerated, and vice versa. Once the wafer foundry process is determined, the output power of the limiter chip designed by this process is basically determined under the conditions of the same frequency and the same input power. For specific requirements, such as the requirement of realizing a low-power limiting output at low power, and the requirement of obtaining a lower limiting output power than the existing products under high-power input, the existing chip products cannot be realized. Therefore, the existing limiter chip products cannot meet the dynamic adjustment requirements of the output power in diverse scenarios. Summary of the Invention

[0005] In view of the above problems, the present invention is proposed to provide a PIN limiter based on GaAs process that overcomes the above problems or at least partially solves the above problems.

[0006] According to one aspect of the present invention, there is provided a PIN limiter based on GaAs process, the PIN limiter comprising: a first-stage limiting circuit, a second-stage limiting circuit, a third-stage limiting circuit and a control circuit;

[0007] The radio frequency input end is connected to the input end of the first-stage limiting circuit;

[0008] The output end of the first-stage limiting circuit is respectively connected to the input end of the second-stage limiting circuit;

[0009] The output end of the second-stage limiting circuit is connected to the input end of the third-stage limiting circuit;

[0010] The output end of the third-stage limiting circuit is connected to the RF output end;

[0011] One end of the control circuit is connected to the output end of the first-stage limiting circuit;

[0012] The other end of the control circuit is grounded.

[0013] Optionally, the first-stage limiting circuit specifically includes:

[0014] The first limiting diode PIN1 and the second limiting diode PIN2, and the first RF transmission line M1;

[0015] The RF input end is connected to one end of the RF transmission line M1, the other end of the RF transmission line M1 is connected to the positive electrode of the first limiting diode PIN1, and the other end of the RF transmission line M1 is simultaneously connected to the negative electrode of the second limiting diode PIN2;

[0016] The negative electrode of the first limiting diode PIN1 is grounded; the positive electrode of the second limiting diode PIN2 is grounded.

[0017] Optionally, the first limiting diode PIN1 and the second limiting diode PIN2 have the same specifications.

[0018] Optionally, the second-stage limiting circuit includes: the third limiting diode PIN3 and the fourth limiting diode PIN4;

[0019] The input end of the second-stage limiting circuit is connected to the positive electrode of the third limiting diode PIN3, and the input end of the second-stage limiting circuit is simultaneously connected to the negative electrode of the fourth limiting diode PIN4;

[0020] The negative electrode of the third limiting diode PIN3 is grounded;

[0021] The positive electrode of the fourth limiting diode PIN4 is grounded.

[0022] Optionally, the third limiting diode PIN3 and the fourth limiting diode PIN4 have the same specifications.

[0023] Optionally, the third-stage limiting circuit specifically includes: the fifth limiting diode PIN5, the sixth limiting diode PIN6, and the fourth RF transmission line M4;

[0024] One end of the fourth RF transmission line M4 is connected to the RF signal output port, and the other end of the fourth RF transmission line M4 is connected to the positive terminal of the PIN5 tube. The other end of the fourth RF transmission line M4 is also connected to the negative terminal of the sixth limiter PIN6.

[0025] The negative terminal of the fifth limiter PIN5 is grounded; the positive terminal of the sixth limiter PIN6 is grounded.

[0026] Optionally, the connection between the output end of the first-stage limiter circuit and the input end of the second-stage limiter circuit specifically includes:

[0027] The output end of the first-stage limiter circuit is connected to the input end of the second-stage limiter circuit through the second RF transmission line M2 and the third RF transmission line M3;

[0028] One end of the second RF transmission line M2 is connected to the output end of the first-stage limiter circuit, and the other end of the second RF transmission line M2 is connected to one end of the third RF transmission line M3;

[0029] The other end of the third RF transmission line M3 is connected to the input end of the second-stage limiter circuit.

[0030] Optionally, the trace width, metal layer thickness, and length of the second RF transmission line M2 and the third RF transmission line M3 are the same;

[0031] The sum of the trace lengths of the transmission line M2 and the transmission line M3 is equal to one-fourth of the wavelength corresponding to the center frequency at which the limiter operates.

[0032] Optionally, the control circuit includes: a high-impedance trace Line with respect to the RF signal;

[0033] One end of the high-impedance trace Line is connected to the input end of the DC control signal, and the other end is connected to the other end of the second RF transmission line M2;

[0034] The other end of the high-impedance trace Line is also connected to one end of the third RF transmission line M3.

[0035] A PIN limiter based on GaAs technology provided by the present invention, the PIN limiter includes: a first-stage limiting circuit, a second-stage limiting circuit, a third-stage limiting circuit and a control circuit; the radio frequency input end is connected to the input end of the first-stage limiting circuit; the output end of the first-stage limiting circuit is respectively connected to the input end of the second-stage limiting circuit; the output end of the second-stage limiting circuit is connected to the input end of the third-stage limiting circuit; the output end of the third-stage limiting circuit is connected to the radio frequency output end; one end of the control circuit is connected to the output end of the first-stage limiting circuit; the other end of the control circuit is grounded. By configuring the periphery of the control circuit, the amplitude of the limited output level can be conveniently changed, so that the output level can vary within a certain range, which is more flexible and can meet diverse application requirements.

[0036] The above description is only an overview of the technical solution of the present invention. In order to be able to understand the technical means of the present invention more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable, the following specifically illustrates the specific embodiments of the present invention. Brief Description of the Drawings

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0038] Figure 1 It is the PIN tube structure and conduction equivalent circuit diagram of a PIN limiter based on GaAs technology provided by the embodiments of the present invention;

[0039] Figure 2 It is the schematic diagram of the circuit structure of an output adjustable PIN limiter chip of a PIN limiter based on GaAs technology provided by the embodiments of the present invention;

[0040] Figure 3 It is the schematic diagram of the application circuit of an output adjustable PIN limiter chip of a PIN limiter based on GaAs technology provided by the embodiments of the present invention;

[0041] Figure 4 It is the IV curve characteristic of the PIN tube provided by the embodiments of the present invention;

[0042] Figure 5 It is the topology diagram of the output adjustable limiter structure provided by the embodiments of the present invention;

[0043] Figure 6 The simulation results of the PIN tube structure limiter chip provided by the embodiments of the present invention

[0044] Figure 7 Schematic diagram of an application case of the present invention. Specific implementation manners

[0045] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.

[0046] The terms "comprising" and "having" and any variations thereof in the description and claims of the present invention and the accompanying drawings are intended to cover non-exclusive inclusion. For example, a series of steps or units are included.

[0047] The technical solutions of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0048] As Figures 1 - 3 shown, a PIN limiter chip with adjustable output level includes: a first-stage limiting circuit, a second-stage limiting circuit, a third-stage limiting circuit, and a control circuit;

[0049] The first-stage limiting circuit includes: a first limiting diode PIN1 and a second limiting diode PIN2, and a first radio frequency transmission line M1;

[0050] One end of the first radio frequency transmission line M1 is connected to the radio frequency signal input port, and the other end of the first radio frequency transmission line M1 is connected to the positive electrode of the first limiting diode PIN1. The other end of the first radio frequency transmission line M1 is also connected to the negative electrode of the second limiting diode PIN2; the negative electrode of the first limiting diode PIN1 is grounded; the positive electrode of the second limiting diode PIN2 is grounded.

[0051] The first limiting diode PIN1 and the second limiting diode PIN2 are exactly the same in size.

[0052] The second-stage limiting circuit includes: a third limiting diode PIN3 and a fourth limiting diode PIN4;

[0053] The input end of the second-stage limiting circuit is connected to the positive electrode of the third limiting diode PIN3. The input end of the second-stage limiting circuit is also connected to the negative electrode of the fourth limiting diode PIN4; the negative electrode of the third limiting diode PIN3 is grounded; the positive electrode of the fourth limiting diode PIN4 is grounded. The output end of the second-stage limiting circuit is connected to the input end of the third-stage limiting circuit.

[0054] In the second-stage limiting circuit, the third limiting diode PIN3 and the fourth limiting diode PIN4 are exactly the same in size.

[0055] The third - stage limiter circuit includes: the fifth limiter PIN diode PIN5, the sixth limiter PIN diode PIN6, and the fourth RF transmission line M4. One end of the fourth RF transmission line M4 is connected to the RF signal output port, and the other end of the fourth RF transmission line M4 is connected to the positive terminal of the fifth limiter PIN diode PIN5. The other end of the fourth RF transmission line M4 is simultaneously connected to the negative terminal of the sixth limiter PIN diode PIN6; the negative terminal of the fifth limiter PIN diode PIN5 is grounded; the positive terminal of the sixth limiter PIN diode PIN6 is grounded.

[0056] In the third - stage limiter circuit, the fifth limiter PIN diode PIN5 and the sixth limiter PIN diode PIN6 have exactly the same size.

[0057] For the PIN limiter chip with adjustable output level, the output terminal of the first - stage limiter circuit is connected to the input terminal of the second - stage limiter circuit through the second RF transmission line M2 and the third RF transmission line M3.

[0058] One end of the second RF transmission line M2 is connected to the output terminal of the first - stage limiter circuit, and the other end of the second RF transmission line M2 is connected to one end of the third RF transmission line M3; the other end of the third RF transmission line M3 is connected to the input terminal of the second - stage limiter circuit.

[0059] For the PIN limiter chip with adjustable output level, the trace widths, metal layer thicknesses, and length dimensions of the second RF transmission line M2 and the third RF transmission line M3 are exactly the same.

[0060] The sum of the trace lengths of the second RF transmission line M2 and the third RF transmission line M3 is equal to one - quarter of the wavelength corresponding to the center frequency at which the limiter operates.

[0061] The control circuit includes: a high - impedance trace Line with respect to the RF signal. One end of the high - impedance trace Line is connected to the input terminal of the DC control signal, and the other end of the trace is connected to the other end of the second RF transmission line M2. The other end of the high - impedance trace Line is connected to one end of the third RF transmission line M3.

[0062] As Figure 4 shown, it is the IV curve characteristic of the PIN diode.

[0063] As Figure 5 shown, it is the structural topology diagram of the output - adjustable limiter.

[0064] One end of a choke inductor L_Chock is externally connected to the input terminal of the chip control circuit. The other end of the choke inductor L_Chock is connected to one end of a resistor R1, and the other end of the resistor R1 is connected to a voltage source V DC ; the other end of the choke inductor L_Chock is simultaneously connected to one end of a resistor R2, and the other end of the resistor R2 is connected to ground

[0065] With an external power supply VDC Under the condition of remaining unchanged, by configuring different resistance values and ratios of resistor R1 and resistor R2, the required potential can be obtained at the chip control terminal Vctr, enabling the limiter diode to be in a pre - turn - on state in advance.

[0066] When the chip is working, the inductor L_Chock and the high - resistance line Line can effectively prevent the signal in the RF channel from leaking to the power supply terminal. When a low - power RF signal is input to the limiter, it forms a superposition with the voltage at the RF channel and the control terminal, the limiter diode turns on, and the limiting effect begins to appear. When a high - power RF signal is input to the limiter, the output power level of the limiter is lower than that of the traditional limiter.

[0067] Figure 6 It is the input - output characteristic curves of the limiter designed with the limiter structure of the present invention under the same process at the same frequency point under different Vctr conditions. It can be seen that under different Vctr conditions, the difference in the RF output power level is relatively obvious, and the output level is smaller than that of the limiter with the traditional structure.

[0068] As Figure 7 shown, in the case where the signals of two different RF links are power - combined through a 3dB combiner, the combiner has exactly the same requirements for the magnitudes of the two input signals. Otherwise, after the signals are combined, there will be adverse effects such as signal distortion or inter - modulation effects. If the limiter of the present invention is used before the signal combination, the amplitudes of the two input RF signals can be finely adjusted so that they are exactly equal before entering the combiner, thereby avoiding the adverse effects on the subsequent link caused by the combination of the two signals with unequal amplitudes. The same applies to the multi - path power combination of more than two signals.

[0069] Advantageous effects: The limiter chip of the present invention adopts a multi - stage PIN diode structure, which improves the power tolerance of the product and enhances the reliability of the product;

[0070] Through the peripheral configuration of the control circuit of the present invention, the PIN diode is in a pre - turn - on state, so that under the same conditions, a lower RF input power can also achieve the limiting effect.

[0071] Through the peripheral configuration of the control circuit of the present invention, the PIN diode is in a pre - turn - on state, so that under the condition of a high - power RF input signal, the output limiting level of the present invention is lower than that of the traditional limiter.

[0072] Through the peripheral configuration of the control circuit of the present invention, the amplitude of the limiting output level can be conveniently changed, so that the output level can vary within a certain range, which is more flexible and can meet diverse application requirements.

[0073] In the above specific embodiments, the object, technical solution and beneficial effects of the present invention have been further described in detail. It should be understood that the above are only specific embodiments of the present invention and are not used to limit the protection scope of the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A PIN limiter based on GaAs process, characterized in that, The PIN limiter includes: a first-stage limiting circuit, a second-stage limiting circuit, a third-stage limiting circuit, and a control circuit; the radio frequency input end is connected to the input end of the first-stage limiting circuit; the output end of the first-stage limiting circuit is respectively connected to the input end of the second-stage limiting circuit; the output end of the second-stage limiting circuit is connected to the input end of the third-stage limiting circuit; the output end of the third-stage limiting circuit is connected to the radio frequency output end; one end of the control circuit is connected to the output end of the first-stage limiting circuit; the other end of the control circuit is grounded; The first-stage limiting circuit specifically includes: a first limiting diode PIN1 and a second limiting diode PIN2, and a first radio frequency transmission line M1; the radio frequency input end is connected to one end of the radio frequency transmission line M1, the other end of the radio frequency transmission line M1 is connected to the positive electrode of the first limiting diode PIN1, and the other end of the radio frequency transmission line M1 is simultaneously connected to the negative electrode of the second limiting diode PIN2; the negative electrode of the first limiting diode PIN1 is grounded; the positive electrode of the second limiting diode PIN2 is grounded; The first limiting diode PIN1 and the second limiting diode PIN2 have the same specifications; The second-stage limiting circuit includes: a third limiting diode PIN3 and a fourth limiting diode PIN4; the input end of the second-stage limiting circuit is connected to the positive electrode of the third limiting diode PIN3, and the input end of the second-stage limiting circuit is simultaneously connected to the negative electrode of the fourth limiting diode PIN4; the negative electrode of the third limiting diode PIN3 is grounded; the positive electrode of the fourth limiting diode PIN4 is grounded; The third limiting diode PIN3 and the fourth limiting diode PIN4 have the same specifications; The third-stage limiting circuit specifically includes: a fifth limiting diode PIN5, a sixth limiting diode PIN6, and a fourth radio frequency transmission line M4; one end of the fourth radio frequency transmission line M4 is connected to the radio frequency signal output port, the other end of the fourth radio frequency transmission line M4 is connected to the positive electrode of the PIN5 diode, and the other end of the fourth radio frequency transmission line M4 is simultaneously connected to the negative electrode of the sixth limiting diode PIN6; the negative electrode of the fifth limiting diode PIN5 is grounded; the positive electrode of the sixth limiting diode PIN6 is grounded; The output end of the first-stage limiting circuit is respectively connected to the input end of the second-stage limiting circuit, which specifically includes: the output end of the first-stage limiting circuit is connected to the input end of the second-stage limiting circuit through a second radio frequency transmission line M2 and a third radio frequency transmission line M3; one end of the second radio frequency transmission line M2 is connected to the output end of the first-stage limiting circuit, and the other end of the second radio frequency transmission line M2 is connected to one end of the third radio frequency transmission line M3; the other end of the third radio frequency transmission line M3 is connected to the input end of the second-stage limiting circuit; The second radio frequency transmission line M2 and the third radio frequency transmission line M3 have the same trace width, metal layer thickness, and length; the sum of the trace lengths of the transmission line M2 and the transmission line M3 is equal to one quarter of the wavelength corresponding to the center frequency at which the limiter operates; The control circuit includes: a high-impedance trace Line with respect to the RF signal; one end of the high-impedance trace Line is connected to the input end of the DC control signal, and the other end is connected to the other end of the second RF transmission line M2; the other end of the high-impedance trace Line is also connected to one end of the third RF transmission line M3; When the chip is working, the inductor L_Chock and the high-impedance line Line can effectively prevent the signal in the RF channel from leaking to the power supply end; When a low-power RF signal is input to the limiter, it forms a superposition with the voltage at the control end in the RF channel, the limiter tube is turned on, and the limiting effect begins to appear; when a high-power RF signal is input to the limiter, the output power level of the limiter is lower than the output level of the traditional limiter.

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