Firmware file configuration method and apparatus, storage medium, and electronic device

Abstract

Embodiments of the present application provide a firmware file configuration method and device, a storage medium and an electronic device, and relate to the field of computers. The firmware file configuration method comprises: configuring a firmware file used by a baseboard management controller (BMC) protocol switch; wherein the protocol switch is used to implement an expansion function of a port of a target protocol, the protocol switch has N uplink ports and M downlink ports, the firmware file has a mapping relationship between the uplink ports and the downlink ports, the uplink ports are connected to a central processing unit (CPU), and the downlink ports are used to mount a hard disk that uses the target protocol to communicate, and N and M are positive integers greater than or equal to 2. The above technical solution solves the problem that the hard disk mounted by the CPU cannot be flexibly configured.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computers, and more specifically, to a method and device for configuring a firmware file, a storage medium, and an electronic device. Background Art

[0002] With the advancement of technology, large-capacity storage has become a must-have for servers. It's becoming increasingly common for a single server to be equipped with more than a dozen Non-Volatile Memory Express (NVME) drives. Typically, NVME drives are directly connected to the ports of the Central Processing Unit (CPU), using CPU0's port resources first, followed by CPU1's. NVME drives are ordered from left to right and from top to bottom, increasing in number.

[0003] However, in the related art, different wiring processes or installation processes need to be provided to meet the actual needs in different scenarios. In the hardware design process, the relationship between the corresponding NVME hard drives mounted on different ports of the CPU has been configured. Once the wiring is completed according to this configuration method, the configuration relationship cannot be changed later, and the flexibility and versatility are poor.

[0004] With respect to the problem in related technologies that the hard disk mounted on the CPU cannot be flexibly configured, no effective solution has been proposed so far. Summary of the Invention

[0005] The embodiments of the present application provide a method and device for configuring a firmware file, a storage medium, and an electronic device to at least solve the problem of being unable to flexibly configure the hard disk mounted on the CPU.

[0006] According to one embodiment of the present application, a method for configuring a firmware file is provided, comprising: configuring a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is used to implement a port expansion function of a target protocol, the protocol switch has N upstream ports and M downstream ports, the firmware file contains a mapping relationship between the upstream ports and the downstream ports, the upstream port is connected to a central processing unit, and the downstream port is used to mount a hard disk that communicates using the target protocol, wherein N and M are both positive integers greater than or equal to 2.

[0007] In an exemplary embodiment, configuring the firmware file used by the protocol switch through the baseboard management controller (BMC) includes: writing a first firmware file into a first flash memory through the BMC, wherein the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the upstream port and the downstream port; sending first indication information to a programmable device through the BMC, wherein the first indication information is used to instruct the programmable device to switch the serial peripheral interface (SPI) bus channel of the protocol switch to the first flash memory; after the serial peripheral interface (SPI) bus channel of the protocol switch is switched to the first flash memory, the protocol switch uses the first firmware file in the first flash memory.

[0008] In an exemplary embodiment, the method further includes: after configuring the protocol switch to use the first firmware file through the BMC, in case first fault information is obtained through the BMC, determining whether the protocol switch is currently using a damaged firmware file, wherein the first fault information is used to indicate that the first firmware file is damaged, and the first fault information is information sent to the BMC through a programmable device when the protocol switch determines that the first firmware file is damaged, the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the uplink port and the downlink port; in case it is determined that the protocol switch is not currently using the damaged firmware file, obtaining a second undamaged firmware file currently used by the protocol switch through the BMC, wherein the protocol switch is not currently using the damaged firmware file. When the switch determines that the first firmware file is damaged, the switch sends second indication information to the programmable device, where the second indication information is used to instruct the programmable device to switch the SPI bus channel of the protocol switch to a second flash memory, where the second flash memory stores a preset second firmware file. After the SPI bus channel of the protocol switch is switched to the second flash memory, the protocol switch uses the second firmware file in the second flash memory, where the second firmware file has a second mapping relationship between the upstream port and the downstream port. When it is determined that the protocol switch is currently using a damaged firmware file, the switch instructs the protocol switch to use a third firmware file through the BMC, where the firmware files include the third firmware file, and the third firmware file has a third mapping relationship between the upstream port and the downstream port.

[0009] In an exemplary embodiment, determining whether the protocol switch is currently using a damaged firmware file includes: when second fault information is received through the BMC within a preset time, determining that the protocol switch is currently using a damaged firmware file; when the second fault information is not received through the BMC within the preset time, determining that the protocol switch is not currently using a damaged firmware file; wherein the second fault information is used to indicate that the second firmware file is damaged, and the second fault information is information sent to the BMC through the programmable device when the protocol switch determines that the second firmware file is damaged.

[0010] In an exemplary embodiment, the method further includes: after using the first firmware file through the BMC configuration protocol switch, sending the first firmware file to a backplane programmable device corresponding to a backplane connected to the protocol switch; wherein the backplane is provided with a hard disk that communicates using the target protocol, and the backplane programmable device determines the hard disk corresponding to the virtual port pin VPP address sent by the central processing unit based on the first firmware file.

[0011] In an exemplary embodiment, when M is equal to 4 and each downstream port allows mounting 4 hard disks that communicate using the target protocol, any four adjacent hard disk slots among the 16 hard disk slots connected to the protocol switch are respectively mapped to 4 different downstream ports.

[0012] In an exemplary embodiment, configuring the firmware files used by the protocol switches through a baseboard management controller (BMC) includes: configuring P firmware files used by P protocol switches through the BMC; wherein each of the P protocol switches is connected to Z central processing units (CPUs), P is an integer greater than or equal to 1, and Z is an integer greater than or equal to 0 and less than or equal to N. The P firmware files include a target firmware file and a designated firmware file, the target firmware file is a firmware file corresponding to a target protocol switch, and the designated firmware file is a firmware file corresponding to a designated protocol switch. The target firmware file and the designated firmware file contain a mapping relationship between a target downlink port in the target protocol switch and a designated uplink port in the designated protocol switch. The P protocol switches include the target protocol switch and the designated protocol switch, the downlink port in the target protocol switch includes the target downlink port, and the target downlink port does not directly mount a hard disk, and the uplink port in the designated protocol switch includes the designated uplink port, and the designated uplink port is not connected to the CPU.

[0013] According to another embodiment of the present application, a firmware file configuration device is also provided, including: a configuration module, used to configure the firmware file used by the protocol switch through the baseboard management controller BMC; wherein, the protocol switch is used to implement the port expansion function of the target protocol, the protocol switch has N upstream ports and M downstream ports, the firmware file has a mapping relationship between the upstream port and the downstream port, the upstream port is connected to the central processing unit, and the downstream port is used to mount a hard disk that uses the target protocol for communication, and N and M are both positive integers greater than or equal to 2.

[0014] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when run.

[0015] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0016] According to another embodiment of the present application, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0017] Through this application, the baseboard management controller BMC is used to configure the firmware file used by the protocol switch. Since the firmware file reflects the mapping relationship between the upstream port and the downstream port of the protocol switch, the hardware mounted on the CPU can be flexibly adjusted by configuring the firmware file, thereby solving the problem of being unable to flexibly configure the hard disk mounted on the CPU. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0019] Figure 1 This is a hardware structure block diagram of a server device according to a firmware file configuration method of an embodiment of the present application;

[0020] Figure 2 is a flowchart of a method for configuring a firmware file according to an embodiment of the present application;

[0021] Figure 3 is a schematic diagram of an optional hard disk configuration according to an embodiment of the present application;

[0022] Figure 4 is a schematic diagram of an optional hard disk architecture according to an embodiment of the present application;

[0023] Figure 5 This is a schematic diagram of an optional partitioning mode of a protocol switch according to an embodiment of the present application;

[0024] Figure 6 This is a schematic diagram of a topological structure of an optional protocol switch according to an embodiment of the present application;

[0025] Figure 7 This is a schematic diagram of an optional protocol switch topology according to an embodiment of the present application;

[0026] Figure 8 This is a schematic diagram of an optional topology between two protocol switches according to an embodiment of the present application;

[0027] Figure 9 This is a schematic diagram of an optional topology between four protocol switches according to an embodiment of the present application;

[0028] Figure 10 This is a structural block diagram of a device for configuring a firmware file according to an embodiment of the present application;

[0029] Figure 11 It is a schematic structural diagram of an optional electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0030] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0032] The configuration method of the firmware file provided in the embodiment of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 This is a hardware structure diagram of a server device for configuring a firmware file according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1The server device shown in FIG. 1 includes one processor 102 (the processor 102 can include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the server device can further include a transmission device 106 for communication function and an input and output device 108. Those skilled in the art can understand that Figure 1 The structure shown is only schematic, which does not limit the structure of the server device. For example, the server device can further include more or less components than those shown in FIG. 1, or have a different configuration from that shown in FIG. 1. Figure 1 Figure 1 The structure shown is only schematic, which does not limit the structure of the server device. For example, the server device can further include more or less components than those shown in FIG. 1, or have a different configuration from that shown in FIG. 1.

[0033] The memory 104 can be used to store computer programs, such as software programs of application software and modules, such as the computer program corresponding to the configuration method of the firmware file in the embodiments of the present application. The processor 102 executes various functional applications and data processing by running the computer programs stored in the memory 104, that is, implements the above-mentioned method. The memory 104 can include a high-speed random access memory, and can further include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid-state memories. In some examples, the memory 104 can further include a memory remotely arranged with respect to the processor 102, and these remote memories can be connected to the server device through a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0034] The transmission device 106 is used to receive or send data via a network. The specific examples of the above-mentioned network can include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, NIC for short), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (Radio Frequency, RF for short) module, which is used to communicate with the Internet in a wireless manner.

[0035] In order to solve the above-mentioned problems in the related art, a configuration method of a firmware file is provided in the embodiments, and the execution subject of the method includes, but is not limited to, a baseboard management controller (Baseboard Management Controller, BMC for short), such as Figure 2 The flow shown in FIG. 2 includes the following steps S202:

[0036] ​Step S202: configuring a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is used to implement a port expansion function of a target protocol, the protocol switch has N upstream ports and M downstream ports, and the firmware file contains a mapping relationship between the upstream ports and the downstream ports. The upstream port is connected to a central processing unit, and the downstream port is used to mount a hard disk that communicates using the target protocol. N and M are both positive integers greater than or equal to 2.

[0037] Optionally, the protocol switch is a PCIE switch, the target protocol is a Peripheral Component Interconnect Express (PCIE) protocol, and the hard disk for communication is an NVME hard disk.

[0038] It should be noted that, in the present embodiment, the PCIE switch opens the partition mode, that is, a physical PCIE switch can be used as two virtual PCIE switches. For example, a PCIE switch with 6 ports can have two uplink ports, and the two uplink ports can be respectively connected to two different hosts (i.e., CPUs). Then, the four backplanes under the PCIE switch are two of which serve as NVME hard disk slots for CPU0, and the other two backplanes can serve as NVME hard disk slots for CPU1. In addition, the remaining 4 downlink ports of the 6 ports can be connected to any uplink port, that is, downlink port 2 and downlink port 3 can serve as the downlink of uplink port 0 or as the downlink of uplink port 1, wherein the downlink port 2 and downlink port 3 serve as the downlink of uplink port 0, i.e., an optional mapping relationship between uplink ports and downlink ports.

[0039] In the above steps, the baseboard management controller (BMC) is used to configure the firmware file used by the protocol switch. Since the firmware file reflects the mapping relationship between the uplink port and the downlink port of the protocol switch, the hardware mounted on the CPU can be flexibly adjusted by configuring the firmware file, thereby solving the problem of being unable to flexibly configure the hard disk mounted on the CPU.

[0040] In an exemplary embodiment, configuring the firmware file used by the protocol switch through the baseboard management controller BMC can be implemented by following the steps S11-S12:

[0041] Step S11: writing a first firmware file into a first flash memory through the BMC, wherein the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the upstream port and the downstream port;

[0042] Optionally, refer to Figure 6 A protocol switch has multiple flash memories, such as a first flash memory and a second flash memory, each of which stores a firmware file of the protocol switch. The BMC can modify the firmware file of the first flash memory through the Serial Peripheral Interface (SPI) bus.

[0043] Step S12: Sending first indication information to the programmable device through the BMC, wherein the first indication information is used to instruct the programmable device to switch the serial peripheral interface (SPI) bus channel of the protocol switch to the first flash memory; after the serial peripheral interface (SPI) bus channel of the protocol switch is switched to the first flash memory, the protocol switch uses the first firmware file in the first flash memory.

[0044] Optionally, the programmable device includes but is not limited to: a complex programmable logic device (CPLD) and a field programmable gate array (FPGA).

[0045] Optionally, refer to Figure 6 There are two flash memories (Flash) in the protocol switch, namely the first flash memory and the second flash memory, where the second flash memory is the default flash memory. The BMC sends a first indication message to the programmable device through the serial communication bus (Inter-Integrated Circuit, abbreviated as I2C), and the programmable device switches the serial peripheral interface SPI bus channel of the protocol switch to the first flash memory through the SPI switching circuit.

[0046] It should be noted that, through the above steps, the first indication information is sent to the programmable device through the BMC, so that the protocol switch uses the firmware files in different flash memories, thereby meeting the requirements in different scenarios, improving the flexibility of configuring the firmware file, and eliminating the need to modify the hardware device.

[0047] In an exemplary embodiment, the method further includes the following steps S21-S23:

[0048] Step S21: After configuring the protocol switch to use the first firmware file through the BMC, if first fault information is obtained through the BMC, determining whether the protocol switch is currently using a damaged firmware file, wherein the first fault information indicates that the first firmware file is damaged. The first fault information is information sent to the BMC through a programmable device when the protocol switch determines that the first firmware file is damaged. The firmware files include the first firmware file, and the first firmware file contains a first mapping relationship between the uplink port and the downlink port.

[0049] Step S22: If it is determined that the protocol switch is not currently using a damaged firmware file, obtaining, through the BMC, a second, undamaged, firmware file currently used by the protocol switch. If the protocol switch determines that the first firmware file is damaged, sending second instruction information to the programmable device, the second instruction information being used to instruct the programmable device to switch the SPI bus channel of the protocol switch to a second flash memory, where the second flash memory stores a preset second firmware file. After the SPI bus channel of the protocol switch is switched to the second flash memory, the protocol switch uses the second firmware file in the second flash memory, where the second firmware file contains a second mapping relationship between the uplink port and the downlink port.

[0050] Optionally, refer to Figure 6 In the case where the first firmware file stored in the first flash memory is damaged, the BMC instructs the programmable device to switch to the second flash memory through the SPI switching circuit, wherein the second firmware file in the second flash memory stores a second mapping relationship between the default upstream port and the downstream port written in advance.

[0051] It should be noted that the BMC instructs the programmable device to promptly switch the SPI bus channel of the protocol switch to the second flash memory, thereby using the second firmware file in the second flash memory to ensure that the topological relationship between the upstream port and the downstream port remains stable, avoiding data loss and protecting the data security of the device.

[0052] Step S23: After determining that the protocol switch currently uses a damaged firmware file, instruct the protocol switch to use a third firmware file through the BMC, wherein the firmware files include the third firmware file, and the third firmware file has a third mapping relationship between the uplink port and the downlink port.

[0053] Optionally, refer to Figure 6When the second firmware file is also damaged, the third firmware file can be written to the first flash memory through the BMC to overwrite the damaged first firmware file. After the third firmware file is written to the first flash memory through the BMC, the programmable device will switch the SPI bus channel of the protocol switch to the first flash memory through the SPI switching circuit.

[0054] Optionally, third indication information is sent to the programmable device through the BMC, wherein the third indication information is used to instruct the programmable device to switch the serial peripheral interface SPI bus channel of the protocol switch to the first flash memory; after the serial peripheral interface SPI bus channel of the protocol switch is switched to the first flash memory, the protocol switch uses the third firmware file in the first flash memory.

[0055] In an exemplary embodiment, the above-mentioned determination of whether the protocol switch currently uses a damaged firmware file includes the following steps S31-S32:

[0056] Step S31: When the second fault information is received by the BMC within a preset time, determining that the protocol switch currently uses a damaged firmware file;

[0057] It should be noted that the second fault information is information sent by the protocol switch to the BMC through the programmable device after the BMC receives the first fault information.

[0058] That is, when the BMC receives the second fault information within the preset time, it indicates that when the first firmware file is damaged, the second firmware file is also damaged.

[0059] Step S32: If the second fault information is not received by the BMC within a preset time, determine that the protocol switch is not currently using the damaged firmware file; wherein the second fault information is used to indicate that the second firmware file is damaged, and the second fault information is information sent to the BMC through the programmable device when the protocol switch determines that the second firmware file is damaged.

[0060] It should be noted that through the above steps, it is possible to quickly and accurately determine whether the protocol switch uses a damaged firmware file, thereby ensuring the security of device data.

[0061] In an exemplary embodiment, the method further includes the following steps: after using the first firmware file through the BMC configuration protocol switch, sending the first firmware file to a backplane programmable device corresponding to a backplane connected to the protocol switch; wherein the backplane is provided with a hard disk that communicates using the target protocol, and the backplane programmable device determines the hard disk corresponding to the virtual port pin VPP address sent by the central processing unit based on the first firmware file.

[0062] Optionally, refer to Figure 6 , four backplanes are mounted with sixteen NVME hard drives, and each backplane is equipped with four NVME hard drives. The BMC sends the first firmware file to the backplane programmable devices corresponding to the four backplanes through I2C. The four backplanes can thus determine the hard drive corresponding to the virtual port pin address sent by the central processor through the first firmware file, and then determine whether to light up the NVME hard drive set for each of them.

[0063] It should be noted that by having the BMC participate in the address setting of the virtual port pin VPP, the address confusion caused by the NVME hard disk lighting during topology adjustment can be corrected. The lighting is used to indicate the working status, read and write activities, error status, etc. of the NVME hard disk.

[0064] In an exemplary embodiment, when M is equal to 4 and each downstream port allows mounting 4 hard disks that communicate using the target protocol, any four adjacent hard disk slots among the 16 hard disk slots connected to the protocol switch are respectively mapped to 4 different downstream ports.

[0065] Optionally, refer to Figure 7 When the protocol switch has 4 downstream ports and each downstream port allows mounting 4 hard disks that use the target protocol for communication, the protocol switch can mount a total of 16 NVME hard disks, and each downstream port of the protocol switch can mount NVME hard disks set on different backplanes according to actual needs. For example, CPU0 is connected to the upstream port Port0 of the protocol switch, and the NVME hard disks mounted on the downstream port Port2 in the protocol switch are NVME0, NVME5, NVME9, and NVME13.

[0066] In an exemplary embodiment, configuring firmware files used by a protocol switch through a baseboard management controller (BMC) includes the following steps: configuring P firmware files used by P protocol switches through the BMC; wherein each of the P protocol switches is connected to Z central processing units (CPUs), P is an integer greater than or equal to 1, and Z is an integer greater than or equal to 0 and less than or equal to N; the P firmware files include a target firmware file and a designated firmware file, the target firmware file is a firmware file corresponding to a target protocol switch, and the designated firmware file is a firmware file corresponding to a designated protocol switch; the target firmware file and the designated firmware file contain a mapping relationship between a target downlink port in the target protocol switch and a designated uplink port in the designated protocol switch; the P protocol switches include the target protocol switch and the designated protocol switch; the downlink port in the target protocol switch includes the target downlink port, and the target downlink port does not directly mount a hard disk; the uplink port in the designated protocol switch includes the designated uplink port, and the designated uplink port is not connected to the CPU.

[0067] Optionally, when P is equal to 2, refer to Figure 8 The topology shown in the figure shows the relationship between two CPUs. Each CPU is connected to only one protocol switch. The target protocol switch is protocol switch 0, which is connected to CPU 0, and the designated protocol switch is protocol switch 1, which is connected to CPU 1. The downlink port of protocol switch 0 is connected to the uplink port of protocol switch 1, and vice versa.

[0068] It should be noted that by modifying the connection relationship between the two protocol switches, the upstream CPU corresponding to each downstream port can be adjusted. For example, downstream port port 3 of protocol switch 0 can be used as the downstream port of CPU 1, and downstream port port 4 of protocol switch 1 can be used as the downstream port of CPU 0.

[0069] Optionally, when P is equal to 4, refer to Figure 9 The figure shows the connection relationship between the four CPUs, where CPU0 is connected to protocol switch 0, CPU1 is connected to protocol switch 1, CPU2 is connected to protocol switch 2, and CPU3 is connected to protocol switch 3; in addition, the downlink port of protocol switch 0 is connected to the uplink port of protocol switch 1, the downlink port of protocol switch 1 is connected to the uplink port of protocol switch 2, and the downlink port of protocol switch 2 is connected to the uplink port of protocol switch 3.

[0070] Obviously, the embodiments described above are only part of the embodiments of the present invention, rather than all the embodiments. In order to better understand the above method, the above process is described below in conjunction with the embodiments, but it is not intended to limit the technical solutions of the embodiments of the present invention. Specifically:

[0071] First, to better understand this solution, refer to Figure 3 The NVME hard disk configuration shown is explained as follows:

[0072] In general, the NVME hard disk is directly connected to the CPU's downstream port, first using the port resources of CPU0, and then using the port resources of CPU1. Figure 3 (a) in the sequence increases by one from left to right and increases from top to bottom. Figure 3 The sorting in (b) increases by one from left to right.

[0073] Secondly, reference Figure 4 The hard disk architecture shown in the figure consists of multiple CPU modules. Each CPU module includes a CPU, independent local memory, and input / output controllers. The CPUs are connected through interconnect modules.

[0074] 1. The present invention uses a partitioning mode of a protocol switch;

[0075] The solution of the present invention uses the partition mode of PCIE SWITCH (i.e. the above-mentioned protocol switch), that is, a physical PCIE SWITCH can be used as two virtual PCIE SWITCHs. Figure 5 For example, a 6-port PCIE Switch allows two uplink ports and allows connection to two different hosts. The downlink port can be adjusted by software and connected to any uplink port.

[0076] For example, port 0 can be used as the upstream of port 2 / 3, and can also be used as the upstream of port 4 / 5; port 4 can be used as the downstream of port 0, and can also be used as the downstream of port 1, but port 4 can only have one upstream. Figure 5 As shown in the figure, there are four backplanes under the same PCIE SWITCH, two of which are used as NVME hard disk slots under CPU0, and the other two are used as NVME hard disk slots under CPU1.

[0077] Second, the present invention can flexibly adjust the topological relationship of ports;

[0078] like Figure 6As shown in the figure, uplink port 0 and port 1 of the same protocol switch are connected to CPU 0 and CPU 1, respectively. The four downstream ports output eight x4x4 interfaces, which are connected to the NVME backplane via cables. The x4x4x4x4 signals of the four adjacent hard drive slots come from four different ports on the switch. Due to the limited number of port resources on the switch, the switch cannot split the x16 signal of a downstream port and map it to two upstream ports. The port source relationship of BP1 / BP2 / BP3 must remain consistent with BP0. That is, NVME0 / 4 / 8 / 12 come from the same port, NVME1 / 5 / 9 / 13 come from the same port, NVME2 / 6 / 10 / 14 come from the same port, and NVME3 / 7 / 11 / 15 come from the same port.

[0079] Additionally, Flash0 (the first flash memory) and Flash1 (the second flash memory) store the switch's firmware files, which contain the switch's port topology settings. Flash1 contains a firmware file with default topology settings, while Flash0 contains a firmware file that the BMC can modify via the SPI bus. The CPLD can select which of these flash files to load at boot time. The BMC notifies the CPLDs on each backplane of the modified topology to avoid confusion when the hard drives are turned on.

[0080] Press Figure 6 Each backplane has four NVME hard drive slots, and the PCIE signals come from the four ports of the Switch. Through different topology settings in the Switch firmware file, any four adjacent hard drive slots can be connected to cpu0 / 0 / 0 / 0, cpu0 / 0 / 0 / 1, cpu0 / 0 / 1 / 0, cpu0 / 0 / 1 / 1, cpu0 / 1 / 0 / 0, cpu0 / 1 / 0 / 1, cpu0 / 1 / 1 / 0, cpu0 / 1 / 1 / 1, cpu1 / 0 / 0 / 0, cpu1 / 0 / 0 / 1, cpu1 / 0 / 1 / 0, cpu1 / 0 / 1 / 1, cpu1 / 0 / 0 / 0, cpu1 / 0 / 0 / 1, cpu1 / 0 / 1 / 0, cpu1 / 0 / 1 / 1, cpu1 / 1 / 0 / 0, cpu1 / 1 / 0 / 1, cpu1 / 1 / 0 / 0, cpu1 / 1 / 0 / 1, cpu1 / 1 / 0 / 0, cpu1 / 1 / 0 / 1, cpu1 / 1 / 1 / 0, cpu1 / 1 / 1 / 1, or 16 other configurations.

[0081] 3. Example 1 (the most basic implementation scheme of the present invention);

[0082] 1. Before booting, write the new topology to Flash0 through BMC.

[0083] 2. During the boot process, BMC notifies CPLD to switch the SPI channel of SWITCH to Flash0.

[0084] 3. When SWITCH is initialized, load the firmware file in Flash0 and configure the topology. For example Figure 7 , port2 / 4 is connected to CPU0, and port3 / 5 is connected to CPU1.

[0085] 4. During SWITCH initialization, if the firmware file in Flash0 is damaged or the new topology cannot be executed, SWICH notifies the CPLD to switch the SPI channel to Flash1, load the default topology, and notify the BMC of the exception.

[0086] 5. The BMC notifies the CPLD of each backplane of the topology mode to be executed during this boot. When the hard disk is turned on through the VPP mode, the backplane CPLD can accurately identify the actual hard disk slot represented by the VPP address.

[0087] 4. Example 2;

[0088] Scalable, when there are two CPUs, each CPU is connected to only one PCIE SWITCH, and the two PCIE SWITCHs are directly connected using ports. By modifying the topological relationship between the two SWITCHs, the upstream CPU corresponding to each downstream port is adjusted. Figure 8 For example, port 3 of SWITCH0 is used as the downstream port of CPU 1, and port 4 of SWITCH1 is used as the downstream port of CPU 0. The NVME hard disks connected to the two switches can be flexibly set as in the first embodiment to connect the CPU to which the NVME hard disk is connected.

[0089] 5. Example 3;

[0090] Scalable, when there are four CPUs, each CPU is only connected to one PCIE SWITCH, and the four PCIE SWITCHs are directly connected using ports. By modifying the topology of the SWITCH, an NVME hard drive on the downstream port can be connected to any of the four CPUs through a single-stage or double-stage switch. Figure 9 To illustrate, set port 5 of SWITCH0 as the downstream of port 0, and set port 4 of SWITCH3 as the downstream of port 5. Then the NVME hard disk connected to port 4 of SWITCH3 is connected to CPU0 through SWITCH3 and SWITCH0, and becomes the NVME hard disk under CPU0.

[0091] Similar to the first and second embodiments, the topology relationship is written to the Falsh0 of the four switches through the BMC before booting. When booting, the switches load new firmware files and flexibly set the CPU connected to the NVME hard disk.

[0092] It should be noted that the present invention also has the following advantages:

[0093] (1) Adjust the PCIE bus topology by modifying the SWITCH firmware file to replace different wiring processes;

[0094] (2) By modifying the SWITCH firmware file through the BMC, the NVME hard disk can adjust the CPU PCIE resources without disassembling the machine and without powering off (shut down, but AC is not powered off);

[0095] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0096] This embodiment also provides a firmware file configuration device for implementing the above-mentioned embodiments and preferred implementations. Details already described will not be repeated here. As used below, the term "module" may refer to a combination of software and / or hardware that implements a predetermined function. Although the modules described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.

[0097] Figure 10 : is a structural block diagram of a firmware file configuration device according to an embodiment of the present application, the device comprising:

[0098] Configuration module 1002 is used to configure a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is used to implement a port expansion function of a target protocol, the protocol switch has N upstream ports and M downstream ports, and the firmware file contains a mapping relationship between the upstream ports and the downstream ports, the upstream ports are connected to a central processing unit, and the downstream ports are used to mount hard disks that communicate using the target protocol, where N and M are both positive integers greater than or equal to 2.

[0099] The above-mentioned device uses a baseboard management controller (BMC) to configure the firmware file used by the protocol switch. Since the firmware file reflects the mapping relationship between the uplink port and the downlink port of the protocol switch, the hardware mounted on the CPU can be flexibly adjusted by configuring the firmware file, thereby solving the problem of being unable to flexibly configure the hard disk mounted on the CPU.

[0100] In an exemplary embodiment, the configuration module 1002 includes: a writing unit, configured to write a first firmware file into a first flash memory through the BMC, wherein the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the upstream port and the downstream port; a sending unit, configured to send first indication information to the programmable device through the BMC, wherein the first indication information is used to instruct the programmable device to switch the serial peripheral interface (SPI) bus channel of the protocol switch to the first flash memory; after the serial peripheral interface (SPI) bus channel of the protocol switch is switched to the first flash memory, the protocol switch uses the first firmware file in the first flash memory.

[0101] In an exemplary embodiment, the apparatus further includes: a processing module configured to, after configuring the protocol switch to use the first firmware file through the BMC, determine whether the protocol switch is currently using a damaged firmware file when first fault information is obtained through the BMC, wherein the first fault information is used to indicate that the first firmware file is damaged, and the first fault information is information sent to the BMC through a programmable device when the protocol switch determines that the first firmware file is damaged, the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the uplink port and the downlink port; when it is determined that the protocol switch is not currently using the damaged firmware file, obtain a second undamaged firmware file currently used by the protocol switch through the BMC, wherein When the protocol switch determines that the first firmware file is damaged, the protocol switch sends second indication information to the programmable device, where the second indication information is used to instruct the programmable device to switch the SPI bus channel of the protocol switch to a second flash memory, where the second flash memory stores a preset second firmware file. After the SPI bus channel of the protocol switch is switched to the second flash memory, the protocol switch uses the second firmware file in the second flash memory, where the second firmware file has a second mapping relationship between the upstream port and the downstream port. When it is determined that the protocol switch is currently using a damaged firmware file, the protocol switch is instructed, through the BMC, to use a third firmware file, where the firmware files include the third firmware file, and the third firmware file has a third mapping relationship between the upstream port and the downstream port.

[0102] In an exemplary embodiment, the processing module is further configured to, when second fault information is received through the BMC within a preset time, determine that the protocol switch is currently using a damaged firmware file; and when the second fault information is not received through the BMC within a preset time, determine that the protocol switch is not currently using a damaged firmware file; wherein the second fault information is used to indicate that the second firmware file is damaged, and the second fault information is information sent to the BMC through the programmable device when the protocol switch determines that the second firmware file is damaged.

[0103] In an exemplary embodiment, the above-mentioned device also includes: a sending module, which is used to send the first firmware file to a backplane programmable device corresponding to a backplane connected to the protocol switch after the BMC configures the protocol switch to use the first firmware file; wherein the backplane is provided with a hard disk that uses the target protocol for communication, and the backplane programmable device determines the hard disk corresponding to the virtual port pin VPP address sent by the central processing unit based on the first firmware file.

[0104] In an exemplary embodiment, when M is equal to 4 and each downstream port allows mounting 4 hard disks that communicate using the target protocol, any four adjacent hard disk slots among the 16 hard disk slots connected to the protocol switch are respectively mapped to 4 different downstream ports.

[0105] In an exemplary embodiment, the configuration module 1002 is further configured to configure, through the BMC, P firmware files used by P protocol switches; wherein each of the P protocol switches is connected to Z central processing units, P is an integer greater than or equal to 1, and Z is an integer greater than or equal to 0 and less than or equal to N. The P firmware files include a target firmware file and a designated firmware file, the target firmware file being a firmware file corresponding to a target protocol switch, and the designated firmware file being a firmware file corresponding to a designated protocol switch. The target firmware file and the designated firmware file contain a mapping relationship between a target downlink port in the target protocol switch and a designated uplink port in the designated protocol switch. The P protocol switches include the target protocol switch and the designated protocol switch, the downlink port in the target protocol switch includes the target downlink port, the target downlink port does not directly mount a hard disk, and the uplink port in the designated protocol switch includes the designated uplink port, which is not connected to the central processing unit.

[0106] It should be noted that the above modules can be implemented through software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0107] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any of the above method embodiments when run.

[0108] Optionally, in this embodiment, the computer program may be configured to perform the following steps:

[0109] S1, configuring a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is used to implement a port expansion function of a target protocol, the protocol switch has N upstream ports and M downstream ports, the firmware file contains a mapping relationship between the upstream ports and the downstream ports, the upstream port is connected to a central processing unit, and the downstream port is used to mount a hard disk that communicates using the target protocol, where N and M are both positive integers greater than or equal to 2.

[0110] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0111] The embodiment of the present application also provides an electronic device, such as Figure 11 As shown, the electronic device includes a memory 1102 and a processor 1104. The memory 1102 stores a computer program, and the processor 1104 is configured to execute the steps in any of the above method embodiments through the computer program.

[0112] Optionally, in this embodiment, the processor 1104 may be configured to execute the following steps through a computer program:

[0113] S1, configuring a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is used to implement a port expansion function of a target protocol, the protocol switch has N upstream ports and M downstream ports, the firmware file contains a mapping relationship between the upstream ports and the downstream ports, the upstream port is connected to a central processing unit, and the downstream port is used to mount a hard disk that communicates using the target protocol, where N and M are both positive integers greater than or equal to 2.

[0114] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0115] Alternatively, those skilled in the art will appreciate that Figure 11 The structure shown is for illustration only. Figure 11 The structure of the electronic device is not limited. For example, the electronic device may also include Figure 11 More or fewer components (such as network interfaces, etc.) as shown in, or with Figure 11 Different configurations shown.

[0116] Among them, the memory 1102 can be used to store software programs and modules, such as the program instructions / modules corresponding to the configuration method of the firmware file and the configuration device of the firmware file in the embodiment of the present application. The processor 1104 executes various functional applications and data processing by running the software programs and modules stored in the memory 1102, that is, realizes the above-mentioned configuration method of the firmware file. The memory 1102 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 1102 may further include a memory remotely located relative to the processor 1104, and these remote memories may be connected to the terminal via a network. Examples of the above-mentioned networks include but are not limited to the Internet, corporate intranets, local area networks, mobile communication networks and combinations thereof. Among them, the memory 1102 can be used specifically but not limited to store information such as system configuration files. As an example, such as Figure 11 As shown, the memory 1102 may include, but is not limited to, the configuration module 1002 in the configuration device for the firmware file. In addition, it may also include, but is not limited to, other module units in the configuration device for the firmware file, which will not be described in detail in this example.

[0117] Optionally, the transmission device 1106 is configured to receive or send data via a network. Specific examples of the network may include a wired network and a wireless network. In one embodiment, the transmission device 1106 includes a network interface controller (NIC), which can be connected to other network devices and a router via a network cable to communicate with the Internet or a local area network. In one embodiment, the transmission device 1106 is a radio frequency (RF) module, which is configured to communicate with the Internet wirelessly.

[0118] In addition, the electronic device further includes: a display 1108; and a connection bus 1110 for connecting various module components in the electronic device.

[0119] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0120] An embodiment of the present application further provides another computer program product, comprising a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of any of the above method embodiments are implemented.

[0121] An embodiment of the present application also provides a computer program, which includes computer instructions, which are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of any of the above method embodiments.

[0122] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0123] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A method for configuring a firmware file, characterized in that: include: Configure the firmware file used by the protocol switch through the baseboard management controller (BMC); The protocol switch is used to implement a port expansion function of the target protocol. The protocol switch has N upstream ports and M downstream ports. The firmware file contains a mapping relationship between the upstream ports and the downstream ports. The upstream port is connected to a central processing unit, and the downstream port is used to mount a hard disk that communicates using the target protocol. N and M are both positive integers greater than or equal to 2. The method further includes: after using the first firmware file through the BMC configuration protocol switch, sending the first firmware file to a backplane programmable device corresponding to a backplane connected to the protocol switch; wherein the backplane is provided with a hard disk that uses the target protocol for communication, and the backplane programmable device determines the hard disk corresponding to the virtual port pin VPP address sent by the central processing unit based on the first firmware file.

2. The method according to claim 1, characterized in that The firmware file used by the baseboard management controller BMC configuration protocol switch includes: Writing a first firmware file into a first flash memory through the BMC, wherein the firmware file includes the first firmware file, and the first firmware file has a first mapping relationship between the upstream port and the downstream port; First indication information is sent to the programmable device through the BMC, wherein the first indication information is used to instruct the programmable device to switch the serial peripheral interface (SPI) bus channel of the protocol switch to the first flash memory; after the serial peripheral interface (SPI) bus channel of the protocol switch is switched to the first flash memory, the protocol switch uses the first firmware file in the first flash memory.

3. The method according to claim 1, characterized in that The method further comprises: After configuring the protocol switch to use the first firmware file through the BMC, if first fault information is obtained through the BMC, determining whether the protocol switch is currently using a damaged firmware file, wherein the first fault information indicates that the first firmware file is damaged. The first fault information is information sent to the BMC through a programmable device when the protocol switch determines that the first firmware file is damaged. The firmware file includes the first firmware file, and the first firmware file includes a first mapping relationship between the uplink port and the downlink port. If it is determined that the protocol switch is not currently using a damaged firmware file, obtaining, through the BMC, a second, undamaged, firmware file currently used by the protocol switch. If the protocol switch determines that the first firmware file is damaged, sending second instruction information to the programmable device, the second instruction information being used to instruct the programmable device to switch the SPI bus channel of the protocol switch to a second flash memory, where the second flash memory stores a pre-set second firmware file. After the SPI bus channel of the protocol switch is switched to the second flash memory, the protocol switch uses the second firmware file in the second flash memory, where the second firmware file contains a second mapping relationship between the upstream port and the downstream port. After determining that the protocol switch currently uses a damaged firmware file, the BMC is used to instruct the protocol switch to use a third firmware file, wherein the firmware files include the third firmware file, and the third firmware file includes a third mapping relationship between the uplink port and the downlink port.

4. The method according to claim 3, characterized in that Determining whether the protocol switch currently uses a damaged firmware file includes: When second fault information is received through the BMC within a preset time, determining that the protocol switch currently uses a damaged firmware file; If the second fault information is not received by the BMC within a preset time, determining that the protocol switch is not currently using a damaged firmware file; The second fault information is used to indicate that the second firmware file is damaged. The second fault information is information sent to the BMC through the programmable device when the protocol switch determines that the second firmware file is damaged.

5. The method according to claim 1, wherein When M is equal to 4 and each downstream port allows mounting 4 hard disks that communicate using the target protocol, any four adjacent hard disk slots among the 16 hard disk slots connected to the protocol switch are mapped to 4 different downstream ports respectively.

6. The method according to claim 1, characterized in that The firmware file used by the baseboard management controller BMC configuration protocol switch includes: Configure P firmware files used by P protocol switches through the BMC; Each of the P protocol switches is connected to Z central processing units, where P is an integer greater than or equal to 1, and Z is an integer greater than or equal to 0 and less than or equal to N. The P firmware files include a target firmware file and a designated firmware file. The target firmware file is a firmware file corresponding to a target protocol switch, and the designated firmware file is a firmware file corresponding to a designated protocol switch. The target firmware file and the designated firmware file contain a mapping relationship between a target downlink port in the target protocol switch and a designated uplink port in the designated protocol switch. The P protocol switches include the target protocol switch and the designated protocol switch. The downlink port in the target protocol switch includes the target downlink port, and the target downlink port is not directly mounted with a hard disk. The uplink port in the designated protocol switch includes the designated uplink port, and the designated uplink port is not connected to the central processing unit.

7. A configuration device for a firmware file, characterized in that: include: A configuration module configured to configure a firmware file used by a protocol switch through a baseboard management controller (BMC); wherein the protocol switch is configured to implement a port expansion function for a target protocol, the protocol switch has N upstream ports and M downstream ports, the firmware file contains a mapping relationship between the upstream ports and the downstream ports, the upstream ports are connected to a central processing unit, and the downstream ports are configured to mount a hard disk that communicates using the target protocol, where N and M are both positive integers greater than or equal to 2; The device further includes: a sending module for sending the first firmware file to a backplane programmable device corresponding to a backplane connected to the protocol switch after the first firmware file is used by the BMC configuration protocol switch; wherein the backplane is provided with a hard disk that communicates using the target protocol, and the backplane programmable device determines the hard disk corresponding to the virtual port pin VPP address sent by the central processing unit based on the first firmware file.

8. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method according to any one of claims 1 to 6 when executed by a processor.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

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