Data reading method, data storage method, storage device and display device

Abstract

The present application provides a data reading method, a data storage method, a storage device, and a display device, relating to the field of display technology. The data reading method is applied to a driver circuit and includes: reading a pre-set target size value from a storage device; and reading multiple data pixel blocks from the storage device based on the target size value as optical compensation data; wherein the target size value and the optical compensation data are received and stored by the storage device from the optical compensation system. In this way, the driver circuit can obtain the target size value set by the optical compensation system from the storage device and read multiple data pixel blocks from the storage device based on the target size value, allowing the driver circuit to correctly read the optical compensation data. This avoids the problem in related arts where the optical compensation system changes the target size value, causing the driver circuit to be unable to read the optical compensation data.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a data reading method, a data storage method, a storage device, and a display apparatus. Background Art

[0002] During the display panel production process, due to the limitations of the thin film transistor manufacturing process, such as factors such as non-uniformity in threshold voltage and electron mobility, the display panel will form some uneven cloud spots of brightness, called mura. Demura technology can be used to repair mura.

[0003] The high-precision camera in the optical compensation system (demura system) captures the display panel image and generates optical compensation data (demura data). The demura system uses pixel block compensation. Each block is a compressed collection of compensation values ​​for m×n pixels. The compensation values ​​from multiple blocks together form the demura data. The driver circuit reads the block compensation values ​​and uses bilinear interpolation to restore them to the values ​​of each pixel.

[0004] However, the driver circuit uses a specific block size when reading demura data. If the demura system changes the block size to improve the optical compensation effect, the resulting demura data may be unreadable by the driver circuit. Summary of the Invention

[0005] The present application provides a data reading method, a data storage method, a storage device, and a display device, which can solve the current problem that the driving circuit may be unable to read the demura data when the block size is changed.

[0006] In a first aspect, the present application provides a data reading method, applied to a driving circuit, the method comprising:

[0007] Reading a preset target size value from a storage device;

[0008] According to the target size value, a plurality of data pixel blocks are read from the storage device as optical compensation data; wherein the target size value and the optical compensation data are received and stored by the storage device from the optical compensation system.

[0009] Optionally, reading a preset target size value from a storage device includes:

[0010] Read the target size value from the header file area of ​​the storage device;

[0011] The step of reading a plurality of data pixel blocks from the storage device as optical compensation data according to the target size value comprises:

[0012] According to the target size value, a plurality of the data pixel blocks are read from the data storage area of ​​the storage device as the optical compensation data.

[0013] Optionally, reading the target size value from a header file area of ​​the storage device includes:

[0014] Reading a register value of a first register in the header area as a size value of the data pixel block in a pixel row direction, and reading a register value of a second register in the header area as a size value of the data pixel block in a pixel column direction;

[0015] The target size value includes a size value of the data pixel block in the pixel row direction and a size value in the pixel column direction.

[0016] Optionally, reading a plurality of data pixel blocks from the storage device as the optical compensation data according to the target size value includes:

[0017] Reading the plurality of data pixel blocks from the storage device according to the target size value at a first reading rate, so that a total reading time of the target size value and the optical compensation data is less than a preset power-on time;

[0018] The first reading rate is determined according to the data volume of the optical compensation data, and the data volume of the optical compensation data is determined according to the target size value.

[0019] Optionally, before reading the plurality of data pixel blocks from the storage device according to the target size value at a first reading rate, the method further includes:

[0020] According to the first read rate, the clock frequency corresponding to the target read rate is adjusted so that the adjusted target read rate is the first read rate; wherein the target read rate is the data reading rate of the storage device by the driving circuit.

[0021] Optionally, adjusting a clock frequency of a target read rate according to the first read rate includes:

[0022] determining a multiple of a clock frequency corresponding to the first reading rate and a reference frequency of the driving circuit;

[0023] The clock frequency of the target read rate is adjusted to a multiple of the reference frequency according to the multiple.

[0024] Optionally, before the optical compensation data is read, the method further includes:

[0025] Setting the clock lock signal of the driving circuit to a first level; wherein the first level indicates that the driving circuit does not receive image data;

[0026] After the optical compensation data is read and before the image data is received, the method further includes:

[0027] The clock lock signal is set to a second level; wherein the second level indicates that the driving circuit receives the image data.

[0028] Optionally, before reading the preset target size value from the storage device, the method further includes:

[0029] Acquire a check code corresponding to the optical compensation data from the storage device;

[0030] Comparing the verification code with a preset value to obtain a verification result;

[0031] The step of reading a preset target size value from a storage device includes:

[0032] In a case where the verification result indicates that the storage device stores the optical compensation data, the step of reading the preset target size value from the storage device is performed.

[0033] Optionally, obtaining a check code corresponding to the optical compensation data from the storage device includes:

[0034] A checksum of the optical compensation data is read from a data storage area of ​​the storage device, and the verification code is obtained based on the checksum.

[0035] Optionally, the method further includes:

[0036] When the verification result indicates that the storage device does not store the optical compensation data, or the optical compensation data has an error, the display panel is controlled to display a reminder screen; wherein the reminder screen is used to remind the display panel that an optical compensation error exists.

[0037] In a second aspect, the present application provides a data storage method, applied to a storage device, the method comprising:

[0038] receiving a target size value and optical compensation data sent by an optical compensation system;

[0039] The target size value and the optical compensation data are stored so that a driving circuit can read the preset target size value and read a plurality of data pixel blocks according to the target size value as the optical compensation data.

[0040] Optionally, storing the target size value and the optical compensation data includes:

[0041] The target size value is stored in a header file area of ​​the storage device, and the optical compensation data is stored in a data storage area of ​​the storage device.

[0042] Optionally, the target size value includes a size value in a pixel row direction and a size value in a pixel column direction; and storing the target size value in a header file area of ​​the storage device includes:

[0043] The size value in the pixel row direction is stored in a first register in the header area, and the size value in the pixel column direction is stored in a second register in the header area.

[0044] In a third aspect, the present application provides a storage device, which is used to execute the data storage method as described in the second aspect.

[0045] Optionally, the header file area of ​​the storage device includes a first register and a second register;

[0046] The first register is used to store the size value in the pixel row direction;

[0047] The second register is used to store the size value in the pixel column direction.

[0048] In a fourth aspect, the present application provides a display device, comprising a driving circuit and a storage device; the driving circuit is used to execute the data reading method described in the first aspect; and the storage device is used to execute the data storage method described in the second aspect.

[0049] The present application provides a data reading method, data storage method, storage device, and display device, each having at least the following advantages: before reading optical compensation data, a driver circuit first reads a preset target size value from a storage device. Then, based on the target size value, multiple data pixel blocks are read from the storage device as optical compensation data. Because the target size value and optical compensation data are received and stored by the storage device from the optical compensation system, the driver circuit can obtain the target size value set by the optical compensation system from the storage device and read multiple data pixel blocks from the storage device based on the target size value, enabling the driver circuit to correctly read the optical compensation data. This avoids the problem in related art where changes in the target size value by the optical compensation system cause the driver circuit to be unable to read the optical compensation data. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application or related technologies. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0051] Figure 1 This is a flowchart of the steps of a data reading method provided in an embodiment of the present application;

[0052] Figure 2 1 is an output signal waveform diagram of a driving circuit and a storage device provided in an embodiment of the present application;

[0053] Figure 3 is a clock signal waveform diagram of a driving circuit provided in an embodiment of the present application;

[0054] Figure 4 is an output signal waveform diagram of another driving circuit and storage device provided in an embodiment of the present application;

[0055] Figure 5 is a clock signal waveform diagram of another driving circuit provided in an embodiment of the present application;

[0056] Figure 6 This is one of the signal waveform diagrams of a display device provided in an embodiment of the present application;

[0057] Figure 7 This is the second signal waveform diagram of a display device provided in an embodiment of the present application;

[0058] Figure 8 This is a timing diagram of a display device provided by an embodiment of the present application;

[0059] Figure 9 This is one of the signal waveform diagrams of a driving circuit provided in an embodiment of the present application;

[0060] Figure 10 This is the second signal waveform diagram of a driving circuit provided in an embodiment of the present application;

[0061] Figure 11 This is one of the signal waveform diagrams of another driving circuit provided in an embodiment of the present application;

[0062] Figure 12 This is the second signal waveform diagram of another driving circuit provided in an embodiment of the present application;

[0063] Figure 13This is a schematic diagram of the process of performing foolproof detection on the driving circuit provided in an embodiment of the present application;

[0064] Figure 14 1 is a flow chart of script checking performed by a signal generator provided in an embodiment of the present application;

[0065] Figure 15 This is a schematic diagram of the process of displaying a reminder screen by a driving circuit provided in an embodiment of the present application;

[0066] Figure 16 1 is a schematic diagram of a process for performing optical compensation by a driving circuit provided in an embodiment of the present application;

[0067] Figure 17 This is a step flow chart of a data storage method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0068] The following will be combined with the accompanying drawings in some embodiments to clearly and completely describe the technical solutions in some embodiments. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of this application.

[0069] During the production process of Liquid Crystal Display (LCD), LCD will form some uneven cloud spots or fine stripes, which are called mura. The Demura system uses block compensation to repair mura. Each block is compressed from the compensation values ​​of m×n pixels, where m×n is generally 4×4, 8×8, 8×16, etc. For example, if the resolution is 3840×2160 pixels, the Demura data includes 481×271 blocks, where the four vertex values ​​of each block are compressed from the compensation values ​​of the corresponding 8×8 area. The driving circuit, such as TCON DemuraIP, reads the compensation values ​​of 481×271 blocks and uses bilinear interpolation to restore them to the values ​​of 3840×2160 pixels.

[0070] Currently, demura is typically performed using a pre-defined block size, such as an 8×8 pixel block. However, due to the limitations of the 8×8 block size, mura smaller than this block cannot be effectively repaired. Related technologies have expanded demura systems to smaller blocks, such as 4×4 demura. The resulting demura data includes compensation values ​​for 961×541 blocks.

[0071] However, the block sizes that the driver circuit can read are determined during code development. If the demura system changes the block size, the resulting demura data may not be readable by the driver circuit, requiring code modification or redevelopment to adapt to the new block size. In particular, an increasing number of display devices are integrating the TCON DemuraIP into the system-on-chip (SoC). Reading compensation data for different block sizes requires reconfiguring the SoC software, significantly inconvenient for overall system development.

[0072] Figure 1 This is a flowchart of a data reading method provided by an embodiment of the present application. The data reading method is applied to a driving circuit, such as Figure 1 As shown, the method includes:

[0073] Step 101, reading a preset target size value from a storage device;

[0074] Step 102 : Read multiple data pixel blocks from a storage device according to the target size value as optical compensation data; wherein the target size value and the optical compensation data are received and stored by the storage device from the optical compensation system.

[0075] In some embodiments, the data reading method can be applied to a drive circuit connected to a display panel, where the drive circuit is used to drive the display panel to display an image. The drive circuit can be a timing control circuit, such as a timing controller (TCON). The drive circuit is connected to and communicates with a storage device, and can read the target size value and optical compensation data from the storage device. The storage device can be a dedicated memory chip, such as a flash memory. This is merely an example and is not limited in the embodiments of the present application.

[0076] In the embodiment of the present application, the driver circuit first reads the target size value from the storage device before reading the optical compensation data from the storage device. The target size value is pre-set in the optical compensation system, sent by the optical compensation system to the storage device, and stored in the storage device. In other words, the driver circuit reads the pre-set target size value.

[0077] In some embodiments, the demura system is a complete set of equipment, including a high-precision CCD camera, a PC, and supporting operating software. The demura system is connected to a storage device, such as an X-board flash memory, which is in turn connected to a driver circuit, such as a TCON. The high-precision CCD camera captures the display panel and transmits it to the PC, which then generates demura data. The PC's operating software allows for block size settings. A technician can predefine the block size, and the demura system writes the block size setting along with the demura data to the X-board flash memory.

[0078] It should be noted that when setting the block size in the demura system, the desired mura repair effect, the time it takes for the demura system to repair the display panel, and the amount of demura data generated can be comprehensively considered. An X-board flash with an appropriate storage capacity can be selected accordingly. The block size set by the demura system is the result of comprehensive consideration of these factors.

[0079] In an embodiment of the present application, the driving circuit can determine the area size of the data pixel block (Block) in the optical compensation data generated by the optical compensation system, that is, the target size value, based on the read target size value. Then, the driving circuit reads the data pixel block of the corresponding size from the storage device according to the target size value to obtain the optical compensation data. The optical compensation data includes a plurality of data pixel blocks, and the size value of each data pixel block is equal to the target size value. For example, the target size value indicates that each block is compressed from the compensation value of 4×4 pixels (pixels), then the driving circuit reads the demura data according to the 4×4 block, or, if the target size value is 8×8, the driving circuit reads the demura data according to the 8×8 block accordingly.

[0080] In some embodiments, the driver circuit can use a corresponding parsing program to perform reverse parsing on multiple data pixel blocks read at different target size values ​​to obtain optical compensation data for optical compensation of the display panel. The reverse parsing process involves data conversion, and reference can be made to the data conversion operations in the optical compensation process in related arts, which are not limited in the present embodiments. For example, the TCON generates optical compensation data by reverse parsing block data formats of different block sizes.

[0081] In an embodiment of the present application, the driving circuit may include a reading and parsing program corresponding to at least two target sizes. After the driving circuit reads multiple data pixel blocks according to the target size value, i.e., the Block Size, it reversely parses the multiple data pixel blocks to obtain optical compensation data. For example, the TCON program supports reading and parsing programs corresponding to 4×4 and 8×8 Block Sizes. This is merely an example, and the embodiment of the present application does not impose any restrictions on this. Compared to the currently used method of reading the brightness unevenness removal data, i.e., the optical compensation data, based on a single pixel block size, the data reading method provided by this embodiment has greater flexibility and practicality.

[0082] In an embodiment of the present application, the driver circuit can obtain the target size value set by the optical compensation system from a storage device and read multiple data pixel blocks from the storage device based on the target size value, allowing the driver circuit to correctly read the optical compensation data. This avoids the problem in related art where the demura system changes the block size, causing the driver circuit to be unable to read the demura data. This can improve the driver circuit's success rate in reading optical compensation data, thereby enhancing the optical compensation effect.

[0083] Optionally, step 101 may include the following steps:

[0084] Sub-step A1, reading the target size value from the header file area of ​​the storage device;

[0085] Step 102 may include the following steps:

[0086] Sub-step B1 , reading a plurality of data pixel blocks from a data storage area of ​​a storage device as optical compensation data according to a target size value.

[0087] In one embodiment of the present application, a data storage structure is provided, comprising a header area and a data storage area. A storage device uses this data storage structure to store target size values ​​and optical compensation data transmitted by an optical compensation system. The storage device stores the target size values ​​in the header area and the optical compensation data in the data storage area. For example, the data storage structure is shown in Table 1.

[0088] Table 1 Data storage structure,

[0089]

[0090]

[0091] The header file area includes the File Header, Setting CRC, Settings, and Table CRC, while the data storage area includes the Table. CRC refers to a cyclic redundancy check (CRC). A Plane is the smallest unit that can be operated based on commands such as read, write, and erase. A Plane is a storage matrix consisting of several Blocks. The number of Planes depends on the data processing limit of the TCON. High / low grayscale limits are used to prevent compensation above or below a specific grayscale value. Plane grayscale value representation.

[0092] As shown in Table 1, the driver circuit can read the block size from the Settings section of the header area as the target size value, and then read the optical compensation data for the corresponding block size from the Table section based on the target size value. The Table section, shown in Table 2, provides an example of optical compensation data stored in the data storage area.

[0093] Table 2 Optical compensation data of data storage area

[0094] address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 000000 AA 55 5A A5 9B 53 00 03 01 E1 01 0F 01 01 00 00 000010 00 00 00 00 00 00 00 00 00 00 03 E8 00 00 00 00 000020 00 00 00 00 00 00 00 00 00 64 00 F0 03 84 00 00 000030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

[0095] Optionally, sub-step A1 may include the following steps:

[0096] The register value of the first register in the header file area is read as the size value of the data pixel block in the pixel row direction, and the register value of the second register in the header file area is read as the size value of the data pixel block in the pixel column direction; wherein the target size value includes the size value of the data pixel block in the pixel row direction and the size value of the pixel column direction.

[0097] In some embodiments, a header area of ​​a storage device includes a first register and a second register, and the storage device stores target size values ​​via the first register and the second register. The target size values ​​include the size values ​​of the data pixel block in the pixel row direction and the size values ​​of the pixel column direction. The first register is used to store the size value of the data pixel block in the pixel row direction, and the second register is used to store the size value of the data pixel block in the pixel column direction.

[0098] Specifically, in the data storage structure provided in the embodiment of the present application, the first register and the second register are defined to be located at two address bits of the header file area, respectively, and different numerical values ​​are defined to represent corresponding size values. For example, the first register and the second register are located at the address bits 0x00000C and 0x00000D of the header file area, respectively. The two-digit numerical values ​​stored in the address bits 0x00000C and 0x00000D of the header file area respectively represent the size values ​​of the data pixel block in the pixel row / column direction. For example, the register address bits 0x00000C / 0x00000D in the header file area respectively represent the Block Size in the H (horizontal) and V (vertical) directions, 00 represents 4×4, and 11 represents 8×8.

[0099] Optionally, step 102 may further include the following steps:

[0100] Sub-step B2, reading a plurality of data pixel blocks from a storage device at a first reading rate according to the target size value, so that a total reading time of the target size value and the optical compensation data is less than a preset power-on time;

[0101] The first reading rate is determined according to the data volume of the optical compensation data, and the data volume of the optical compensation data is determined according to the target size value.

[0102] In an embodiment of the present application, the driver circuit reads the target size value and optical compensation data from a storage device during power-up. To ensure that the user experience during power-up is not affected, the total read duration of the read process needs to be limited. Specifically, the total read duration of the target size value and optical compensation data is less than a preset power-up duration. The preset power-up duration represents the time from when the display device is powered on to when the startup screen is displayed. For example, the power-up duration can be set to 2 seconds.

[0103] In some embodiments, different target size values ​​may result in different amounts of optical compensation data. To ensure that the total read time for the target size value and the optical compensation data is less than a preset power-on time, the target size value and the optical compensation data need to be read at a data read rate that matches the amount of optical compensation data. In this embodiment, the data read rate that matches the amount of optical compensation data is referred to as the first read rate.

[0104] For example, if the block size is 8×8, the demura data consists of 481×271 blocks, and the corresponding demura data volume is 481×271×3×12 / 8=586,579 bytes. If the block size is 4×4, the demura data consists of 961×541 blocks, and the corresponding demura data volume is 961×541×3×12 / 8=2,339,554.5 bytes. Therefore, the data volume corresponding to the 4×4 block size is four times that of the 8×8 block size. Therefore, the time required to read the optical compensation data when the driver circuit is powered on also increases by four times. Therefore, the data read rate for a 4×4 block size should be four times that for an 8×8 block size.

[0105] In this embodiment of the present application, since the first read rate is determined based on the amount of optical compensation data, and the amount of optical compensation data is determined based on the target size value, the first read rate matches the amount of optical compensation data. Thus, based on the target size value, multiple data pixel blocks are read from the storage device at the first read rate, such that the total read time for the target size value and the optical compensation data is less than the preset boot time. This prevents excessive read times from impacting the boot experience.

[0106] Optionally, before sub-step B2, the method further includes:

[0107] Step 103 , adjusting the clock frequency corresponding to the target read rate according to the first read rate, so that the adjusted target read rate is the first read rate; wherein the target read rate is the data reading rate of the drive circuit to the storage device.

[0108] In some embodiments, a data read rate, i.e., a first read rate, that matches the amount of optical compensation data can be set by adjusting the clock frequency of the drive circuit's data read rate from the storage device. Specifically, the amount of optical compensation data is determined based on the target size, and then the first read rate is determined based on the amount of optical compensation data.

[0109] In some embodiments, the target reading rate before adjustment can be the second reading rate, and the target reading rate after adjustment can be the first reading rate. The multiple relationship between the first reading rate and the second reading rate can be obtained, and then the clock frequency of the target reading rate can be changed according to the multiple relationship to obtain the first reading rate.

[0110] For example, with a clock frequency of 3.37 MHz and a block size of 8×8, the total read time is 1.4 seconds. Changing the block size from 8×8 to 4×4 increases the total read time to 5.6 seconds, exceeding the preset boot time of 2 seconds and severely impacting the boot experience. To avoid excessive data read times, without compromising system reliability, the target read rate can be increased to a clock frequency of 4 times 3.37 MHz, or 13.48 MHz. This reduces the total read time to 1.4 seconds, meeting the boot time requirement of less than 2 seconds.

[0111] Optionally, step 103 may include the following sub-steps:

[0112] Sub-step C1, determining a multiple of a clock frequency corresponding to the first reading rate and a reference frequency of the driving circuit;

[0113] Sub-step C2: adjusting the clock frequency of the target read rate to a multiple of the reference frequency according to the multiple.

[0114] In some embodiments, the clock frequency corresponding to the target read rate can be changed by setting a multiplier of the driver circuit's base frequency. For example, if the driver circuit's base frequency is 3.3 MHz and the block size is 8×8, this base frequency is used as the clock frequency for the target read rate. However, if the block size is changed from 8×8 to 4×4, the data read rate should be four times that of the 8×8 block size. Therefore, the clock frequency corresponding to the first read rate is a multiple of the driver circuit's base frequency by four.

[0115] The clock frequency of the target read rate can be adjusted to 4 times the reference frequency, i.e., 4 times the reference frequency, so that the adjusted target read rate is the first read rate, for example, 4 times 3.37 MHz is 13.48 MHz. For example, the driving circuit can be a TCON, and the clock frequency corresponding to the target read rate can be set to a multiple of the TCON's reference frequency through TCON software. This is merely an example and is not limited in the embodiments of the present application.

[0116] Figure 2 is an output signal waveform diagram of a driving circuit and a storage device provided in an embodiment of the present application, such as Figure 2 FIG. 1 shows the signal waveforms of the Flash output (Data Output, DO) pin of the X board and the Flash DO pin of the TCON board. The TCON board may include Flash and be connected to the Flash of the X board. Figure 2In FIG, the X-Flash DO waveform shows that when the Block Size is 4×4 and the clock frequency is 3.39 MHz, the total reading time Δt1 of the target size value and the optical compensation data is 5.56 s. Figure 3 is a clock signal waveform diagram of a driving circuit provided in an embodiment of the present application, Figure 3 The waveform of a clock signal having a clock frequency of 3.39 MHz is shown.

[0117] Figure 4 is an output signal waveform diagram of another driving circuit and storage device provided in an embodiment of the present application, such as Figure 4 As shown, the X-Flash DO waveform shows that when the Block Size is 4×4 and the clock frequency is 13.572 MHz, the total reading time Δt2 of the target size value and the optical compensation data is 1.39 s. Figure 5 is a clock signal waveform diagram of another driving circuit provided in an embodiment of the present application, Figure 5 The waveform of a clock signal having a clock frequency of 13.572 MHz is shown.

[0118] Figure 6 and Figure 7 is a signal waveform diagram of a display device provided in an embodiment of the present application, Figure 6 and Figure 7 The block size is 8×8, the clock frequency is 3.37MHz, and the waveforms of 3.3V, 1.2V, and 1.8V power-up, as well as reset (RESET), source driver (Sout), T-Flash DO, and X-Flash DO signals are shown during the device startup process.

[0119] Figure 8 This is a timing diagram of a display device provided in an embodiment of the present application. Figure 8 The timing of 3.3V, 1.2V, and 1.8V power-up and the RESET signal is shown. t1 represents the power-up delay for 3.3V and 1.2V, t2 represents the power-up delay for 1.2V and 1.8V, and t3 represents the delay from powering up all power supplies to the RESET signal. The minimum value of t3 is 10 milliseconds. Figure 8The timing of flash download, TX output, and demura download is also shown. Flash download includes firmware download (FW download), TCON reg download, and color comparison table download (LUT download). TX output includes mute display and normal display.

[0120] Optionally, before the optical compensation data is read, the method further includes:

[0121] Step 104: setting the clock lock signal of the driving circuit to a first level; wherein the first level indicates that the driving circuit does not receive image data;

[0122] After the optical compensation data is read and before the image data is received, the method further includes:

[0123] Step 105 : setting the clock lock signal to a second level; wherein the second level indicates that the driving circuit receives image data.

[0124] In an embodiment of the present application, the driver circuit can perform optical compensation on the display panel based on the optical compensation data, thereby reducing the uneven brightness of the display panel. For example, after the TCON reads the compensation values ​​of 481×271 blocks, it uses bilinear interpolation to restore the values ​​to 3840×2160 pixels. The driver circuit then receives the image data corresponding to the display panel and controls the display panel to display the image based on the image data. This can avoid timing conflicts between the optical compensation process and the image data reception process, which can cause abnormal display panel images.

[0125] In some embodiments, before the optical compensation data is read, the driver circuit may set the clock lock signal to a first level. The driver circuit does not receive image data when the clock lock signal is at the first level. The first level can be a high level or a low level, and this is not limited in the present embodiment. For example, the TCON may maintain the LOCKN signal for V-By-One image data at a high level before the demura data is read, so that the TCON does not receive V-By-One image data.

[0126] In some embodiments, after the optical compensation data is read and before receiving image data, the driver circuit may set the clock lock signal to a second level. The driver circuit can receive image data while the clock lock signal is at the second level. For example, after reading the demura data, the TCON may return the LOCKN signal to a low level, allowing the TCON to receive V-By-One image data. The specific time for the LOCKN signal level transition can be set by the TCON software. This is merely an example and is not a limitation of the present invention.

[0127] In this embodiment of the present application, the clock lock signal of the driver circuit is set to a first level before the optical compensation data is read; and after the optical compensation data is read and before image data is received, the clock lock signal is set to a second level. Because the first level indicates that the driver circuit is not receiving image data, and the second level indicates that the driver circuit is receiving image data, this avoids timing conflicts between the optical compensation data reading process and the image data reception process, preventing image anomalies on the display panel.

[0128] Figure 9 and Figure 10 is a signal waveform diagram of a driving circuit provided in an embodiment of the present application, such as Figure 9 and Figure 10 As shown in FIG, the signal waveform of the Novanormal mode TCON chip platform is shown. Figure 9 In the figure, HTPDN indicates that the signal line has an access identification signal, and LOCKN indicates the LOCKN signal of the V-By-One image data. Figure 10 In the SD-LOCKN signal, the source driver circuit (Source Driver) on the screen side receives the signal handshake successfully. At this time, SD can start to receive the signal sent from TCON. Figure 9 As shown in FIG, before the X-Flash DO signal is output, the LOCKN signal maintains a high level state. After the X-Flash DO signal is output, the LOCKN signal switches to a low level state. Figure 9 In FIG, the power-on time Δt3 corresponding to the power-on process from when the LOCKN signal is set to a high level state to when the Sout signal is output is 1.224s. Figure 10 In the figure, the duration Δt4 from the successful handshake between SD and TCON to the output of Sout signal is 1.024s.

[0129] Figure 11 and Figure 12 is a signal waveform diagram of a driving circuit provided in an embodiment of the present application, such as Figure 11 and Figure 12As shown in FIG, the signal waveform of the TCON chip platform in Hisi normal mode is shown. Figure 11 As shown in FIG, before the X-Flash DO signal is output, the LOCKN signal maintains a high level state. After the X-Flash DO signal is output, the LOCKN signal switches to a low level state. Figure 11 In FIG, the level conversion time Δt5 corresponding to the LOCKN signal is 1.104s. Figure 12 In the example, the duration Δt6 corresponding to the process from the output of the T-Flash DO signal to the setting of the SD-LOCKN signal to the high level state is 1.106s.

[0130] Optionally, before step 101, the method further includes:

[0131] Step 106, obtaining a check code corresponding to the optical compensation data from a storage device;

[0132] Step 107, compare the check code with a preset value to obtain a check result;

[0133] Step 101 may further include the following sub-steps:

[0134] Sub-step A2: when the verification result indicates that the storage device stores optical compensation data, executing the step of reading a preset target size value from the storage device.

[0135] In some embodiments, the driving circuit may perform an anti-fouling detection before reading the target size value to verify whether the optical compensation data is written into the storage device. If the verification result indicates that the storage device stores the optical compensation data, the step of reading the target size value from the storage device is executed.

[0136] Specifically, the driver circuit first obtains a check code corresponding to the optical compensation data from the storage device, then compares the check code with a preset value to determine whether the check code and the preset value are equal, thereby obtaining a check result. If the check code read by the driver circuit is equal to the preset value, it indicates that the optical compensation data is stored in the data storage area of ​​the storage device. If the check code is not equal to the preset value, it indicates that the optical compensation data is not stored in the data storage area or that the stored optical compensation data is erroneous.

[0137] Optionally, step 106 may include the following sub-steps:

[0138] Sub-step E1 : reading the checksum of the optical compensation data from the data storage area of ​​the storage device, and obtaining a verification code according to the checksum.

[0139] In some embodiments, the driver circuit may first read the optical compensation data from the data storage area, then calculate a checksum of the optical compensation data, and then use a specific number of bits in the checksum as a checksum. For example, the TCON reads the checksum from the data storage area and uses the last four bits as the checksum. The driver circuit may not read the optical compensation data according to the block when performing foolproof detection.

[0140] Figure 13 FIG. 1 is a flow chart of the drive circuit for performing foolproof detection according to an embodiment of the present application. Figure 13 Figure 1 shows the TCON's foolproofing process. The TCON's detection logic includes the following: After powering on, the TCON reads the demura data from the X board's flash memory and calculates a checksum, taking the last four digits as the checksum. The checksum is then compared with a preset value to obtain the verification result. If the checksum equals the preset value, the demura function is enabled, and the TCON reads the block size in the X board's flash header area. Otherwise, the demura function is disabled.

[0141] In some embodiments, a lighting machine can also perform a checksum check on the storage device to prevent the target size value in the storage device from being incorrectly set. Specifically, the lighting machine can connect to the storage device, read the checksum value in the header file area of ​​the storage device, such as the checksum value set in the Setting CRC and / or Table CRC sections in Table 1, and then compare the read checksum value with the preset checksum value to verify whether the Block Size in the Setting section in Table 1 is set incorrectly.

[0142] Figure 14 This is a flow chart of the script check performed by the signal generator provided in the embodiment of the present application. The lighting machine includes a signal generator (Pattern generator, PG), and the PG script check can be performed by the lighting machine. Figure 14 As shown, after the PG is powered on, it reads the checksum value in the header file area and then compares it with the preset checksum value. If the two are equal, the PG script check passes. If the two are not equal, it is judged as an error, that is, NG.

[0143] Optionally, the method further includes:

[0144] Step 108 : If the verification result indicates that the storage device does not store the optical compensation data or the optical compensation data has errors, control the display panel to display a reminder screen; wherein the reminder screen is used to remind the display panel that there is an optical compensation error.

[0145] In some embodiments, if the driver circuit's foolproofing check result indicates that the check code is not equal to a preset value, indicating that the storage device does not store the optical compensation data or that the optical compensation data contains an error, the driver circuit can issue an error alert via the display panel, allowing technicians to promptly address the error. Specifically, when the check code is not equal to the preset value, the driver circuit can send a screen signal corresponding to a reminder screen to the display panel, causing the display panel to display the reminder screen. The reminder screen can be a preset solid color or color screen, a screen with special characters, a screen with reminder text, etc.

[0146] For example, the reminder screen may include a reminder pattern, where the reminder pattern is a full-screen F character scrolling upward on the display panel, indicating that there is an optical compensation error on the display panel. This is only an example and the embodiments of the present application do not limit this.

[0147] Figure 15 FIG. 1 is a flow chart of the driving circuit displaying the reminder screen provided in the embodiment of the present application. Figure 15 The figure shows the TCON's DemuraNG reminder process, which includes: upon powering up the TCON, determining whether V-By-One image data has been received. If not, the driver circuit controls the display panel to display an internal test image (Normal Bist). Normal Bist can be a solid red / green image, indicating that V-By-One image data has not been received. If so, it determines whether optical compensation (Demura) is required. A null demura indicates that no optical compensation is required.

[0148] If optical compensation is not required, the image is displayed normally. If power is lost during this process, the V-By-One determination step is repeated upon power restoration. If optical compensation is required, the driver circuit performs a foolproof check. If the storage device does not store optical compensation data or the optical compensation data is erroneous, a warning pattern is displayed. Otherwise, the target size value and optical compensation data are read. This is not detailed here. Demura CS indicates that the checksum corresponding to the required optical compensation data is equal to the preset value.

[0149] The complete verification of the lighting machine on the production line requires the 12V power cord to be plugged in while the signal screen is connected. To simplify the production line inspection, only the 12V power cord is plugged in to classify the lighting failures and the inspection is performed using the pattern generated within the TCON. If the normal BIST screen appears, it is judged as OK; if the warning pattern appears, it is judged as NG.

[0150] Figure 16 FIG. 1 is a flow chart of optical compensation performed by a driving circuit according to an embodiment of the present application. Figure 16The figure shows the process of TCON performing optical compensation, including: TCON powering on the screen, TCON powering on, reading the Block Size setting value in the header file area in the X-board Flash, specifically, reading the two address bits 0x00000C and 0x00000D corresponding to the first register and the second register in the header file area to obtain the Block Size in the H and V directions. Among them, 00 represents the Demura data format of 4×4, 11 represents 8×8, and 22 represents 16×16. Then, TCON determines the Block Size setting value. When the Block Size is 4×4, TCON reads the Table in the data storage area, i.e., the optical compensation data, according to the 4×4 table, and performs optical compensation on the display panel according to the 4×4 table. When the Block Size is 8×8, TCON performs optical compensation on the display panel according to the 8×8 table.

[0151] Figure 17 This is a flowchart of the steps of a data storage method provided in an embodiment of the present application. The data storage method is applied to a storage device, and the method includes:

[0152] Step 201, receiving a target size value and optical compensation data sent by an optical compensation system;

[0153] Step 202 : storing the target size value and the optical compensation data so that the driving circuit can read the preset target size value and read a plurality of data pixel blocks according to the target size value as the optical compensation data.

[0154] In some embodiments, the storage device can be a dedicated storage chip, such as a flash memory. The optical compensation (Demura) system can include a CCD high-precision camera, a PC, and supporting operating software. The Demura system is connected to a storage device such as an X-board Flash, and the X-board Flash is connected to a driving circuit such as a TCON. The CCD high-precision camera takes a picture of the display panel and transmits it to the PC, which generates Demura data. The PC's operating software interface can set the Block Size, and the technician can define the Block Size in advance. The Demura system writes the Block Size setting value together with the Demura data into the X-board Flash.

[0155] Optionally, step 202 may include the following sub-steps:

[0156] Sub-step F1 : storing the target size value in a header file area of ​​a storage device, and storing the optical compensation data in a data storage area of ​​the storage device.

[0157] In some embodiments, a storage device uses the data storage structure described in the aforementioned embodiments to store the target size value and optical compensation data sent by the optical compensation system. The storage device stores the target size value in a header area and the optical compensation data in a data storage area. For example, as shown in Table 1, the header area includes a file header, a setting CRC, settings, and a table CRC, while the data storage area includes a table.

[0158] Optionally, the target size value includes a size value in a pixel row direction and a size value in a pixel column direction; sub-step F1 may include the following steps:

[0159] The size value in the pixel row direction is stored in a first register in the header area, and the size value in the pixel column direction is stored in a second register in the header area.

[0160] In some embodiments, a header area of ​​a storage device includes a first register and a second register, and the storage device stores target size values ​​via the first register and the second register. The target size values ​​include the size values ​​of the data pixel block in the pixel row direction and the size values ​​of the pixel column direction. The first register is used to store the size value of the data pixel block in the pixel row direction, and the second register is used to store the size value of the data pixel block in the pixel column direction.

[0161] Specifically, the first register and the second register are defined to be located at two address bits in the header file area, respectively, and different numerical values ​​are defined to represent corresponding size values. For example, the first register and the second register are located at the address bits 0x00000C and 0x00000D in the header file area, respectively. The two-digit numerical values ​​stored in the address bits 0x00000C and 0x00000D in the header file area respectively represent the size values ​​of the data pixel block in the pixel row / column direction. For example, the register address bits 0x00000C / 0x00000D in the header file area represent the Block Size in the H (horizontal) and V (vertical) directions, respectively, 00 represents 4×4, and 11 represents 8×8.

[0162] The data reading method and data storage method provided in the embodiments of the present application can be applied to optical compensation of display devices such as LCD display devices and organic light-emitting diode (OLED) display devices. This is merely an example to illustrate the embodiments of the present application and is not intended to limit this.

[0163] A data storage method provided in an embodiment of the present application can achieve the same or similar effects as the data reading method in the aforementioned embodiment, and will not be described again here to avoid repetition.

[0164] An embodiment of the present application further provides a storage device, which is used to execute the data storage method as described in the above embodiment.

[0165] Optionally, the header file area of ​​the storage device includes a first register and a second register;

[0166] The first register is used to store the size value in the pixel row direction; the second register is used to store the size value in the pixel column direction.

[0167] In some embodiments, the header area of ​​the storage device includes a first register and a second register, and the storage device stores the target size value through the first register and the second register. The target size value includes the size value of the data pixel block in the pixel row direction and the size value of the pixel column direction. The first register is used to store the size value of the data pixel block in the pixel row direction, and the second register is used to store the size value of the data pixel block in the pixel column direction. For example, the first register and the second register can be status registers in the header area of ​​the X-board Flash, which are specifically used to define the block size.

[0168] Specifically, the first register and the second register are defined to be located at two address bits in the header file area, respectively, and different values ​​are defined to represent corresponding size values. For example, the first register and the second register are located at address bits 0x00000C and 0x00000D in the header file area, respectively. The two-digit values ​​stored in address bits 0x00000C and 0x00000D in the header file area respectively represent the size values ​​of the data pixel block in the pixel row / column direction.

[0169] A storage device provided in an embodiment of the present application can achieve the same or similar effect as the data reading method in the aforementioned embodiment, which will not be described again here to avoid repetition.

[0170] An embodiment of the present application further provides a display device, comprising a driving circuit and a storage device; the driving circuit is used to execute the data reading method as described in the aforementioned embodiment; and the storage device is used to execute the data storage method as described in the aforementioned embodiment.

[0171] A display device provided in an embodiment of the present application can achieve the same or similar effects as the data reading method in the aforementioned embodiment, which will not be described again here to avoid repetition.

[0172] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0173] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0174] Although preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic inventive concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0175] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0176] The above is a detailed introduction to a data reading method, a data storage method, a storage device and a display device provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for a person skilled in the art, according to the idea of ​​the present application, there may be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A data reading method, characterized in that: Applied to a driving circuit, the method includes: Reading a preset target size value from a storage device; According to the target size value, multiple data pixel blocks are read from the storage device as optical compensation data; wherein the target size value includes the size value of the data pixel block in the pixel row direction and the size value in the pixel column direction, and the target size value and the optical compensation data are received and stored by the storage device from the optical compensation system.

2. The data reading method according to claim 1, wherein: The step of reading a preset target size value from a storage device includes: Read the target size value from the header file area of ​​the storage device; The step of reading a plurality of data pixel blocks from the storage device as optical compensation data according to the target size value comprises: According to the target size value, a plurality of the data pixel blocks are read from the data storage area of ​​the storage device as the optical compensation data.

3. The data reading method according to claim 2, wherein: The step of reading the target size value from the header file area of ​​the storage device includes: The register value of the first register in the header area is read as the size value of the data pixel block in the pixel row direction, and the register value of the second register in the header area is read as the size value of the data pixel block in the pixel column direction.

4. The data reading method according to claim 1, wherein: The step of reading a plurality of data pixel blocks from the storage device as the optical compensation data according to the target size value includes: Reading a plurality of the data pixel blocks from the storage device according to the target size value at a first reading rate, so that a total reading time of the target size value and the optical compensation data is less than a preset power-on time; The first reading rate is determined according to the data volume of the optical compensation data, and the data volume of the optical compensation data is determined according to the target size value.

5. The data reading method according to claim 4, characterized in that: Before reading the plurality of data pixel blocks from the storage device according to the target size value and at a first reading rate, the method further includes: According to the first read rate, the clock frequency corresponding to the target read rate is adjusted so that the adjusted target read rate is the first read rate; wherein the target read rate is the data reading rate of the drive circuit to the storage device.

6. The data reading method according to claim 5, characterized in that: The adjusting the clock frequency of the target reading rate according to the first reading rate includes: determining a multiple of a clock frequency corresponding to the first reading rate and a reference frequency of the driving circuit; The clock frequency of the target read rate is adjusted to a multiple of the reference frequency according to the multiple.

7. The data reading method according to claim 1, wherein: Before the optical compensation data is read, the method further includes: Setting the clock lock signal of the driving circuit to a first level; wherein the first level indicates that the driving circuit does not receive image data; After the optical compensation data is read and before the image data is received, the method further includes: The clock lock signal is set to a second level; wherein the second level indicates that the driving circuit receives the image data.

8. The data reading method according to claim 1, wherein: Before reading the preset target size value from the storage device, the method further includes: Acquire a check code corresponding to the optical compensation data from the storage device; Comparing the verification code with a preset value to obtain a verification result; The step of reading a preset target size value from a storage device includes: In a case where the verification result indicates that the storage device stores the optical compensation data, the step of reading the preset target size value from the storage device is performed.

9. The data reading method according to claim 8, characterized in that: The obtaining a check code corresponding to the optical compensation data from the storage device includes: A checksum of the optical compensation data is read from a data storage area of ​​the storage device, and the verification code is obtained based on the checksum.

10. The data reading method according to claim 8, wherein: The method further comprises: When the verification result indicates that the storage device does not store the optical compensation data, or the optical compensation data has an error, the display panel is controlled to display a reminder screen; wherein the reminder screen is used to remind the display panel that an optical compensation error exists.

11. A data storage method, characterized in that: Applied to a storage device, the method includes: receiving a target size value and optical compensation data sent by an optical compensation system; The target size value and the optical compensation data are stored so that a driving circuit can read the preset target size value and read multiple data pixel blocks according to the target size value as the optical compensation data; wherein the target size value includes the size value of the data pixel block in the pixel row direction and the size value in the pixel column direction.

12. The data storage method according to claim 11, characterized in that: The storing of the target size value and the optical compensation data comprises: The target size value is stored in a header file area of ​​the storage device, and the optical compensation data is stored in a data storage area of ​​the storage device.

13. The data storage method according to claim 12, characterized in that: The step of storing the target size value in a header file area of ​​the storage device includes: The size value in the pixel row direction is stored in a first register in the header area, and the size value in the pixel column direction is stored in a second register in the header area.

14. A storage device, characterized in that: The storage device is used to execute the data storage method according to any one of claims 11 to 13.

15. The storage device according to claim 14, wherein: The header file area of ​​the storage device includes a first register and a second register; The first register is used to store the size value in the pixel row direction; The second register is used to store the size value in the pixel column direction.

16. A display device, characterized in that: The display device includes a driving circuit and a storage device; the driving circuit is used to execute the data reading method according to any one of claims 1 to 10; and the storage device is used to execute the data storage method according to any one of claims 11 to 13.

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