A low-dropout linear regulator and its control method
By designing the mode control circuit and feedback circuit of the low dropout linear regulator, different supply voltages are output according to the power supply voltage, which solves the problem that the existing technology cannot meet the power supply requirements of integrated circuits, realizes flexible power supply for analog and digital circuits, and improves the adaptability and stability of the circuit.
Patent Information
- Application Number
- CN202411201683.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-28
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2044-08-28
AI Technical Summary
Existing low-dropout linear regulators cannot meet the power supply requirements of different modules within large-scale integrated circuits, especially in mixed-signal circuits where the actual need for multiple power supply voltages cannot be met.
Design a low-dropout linear regulator, including a low-dropout linear regulator circuit and a mode control circuit. Through the combination of a feedback circuit, an error amplification module, a reference voltage source and a power output circuit, the mode control circuit controls the feedback voltage according to the power supply voltage, and the error amplification module outputs different supply voltages through negative feedback control.
It enables the output of different power supply voltages according to different power supply voltages, meeting the different module requirements of analog and digital circuits, which is beneficial to the power supply inside large-scale integrated circuits and improves the flexibility and stability of the circuit.
Smart Images

Figure CN119105601B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of power management modules, and particularly relates to a low dropout linear regulator and its control method. Background Technology
[0002] A low dropout regulator (LDO) can stably convert a higher input voltage into a lower output voltage while minimizing the voltage difference between the input and output, thus providing a stable voltage for the chip.
[0003] As integrated circuits continue to expand in scale and increase in integration, different modules of analog and digital circuits within a chip require different input supply voltages. This is especially true in mixed-signal circuits, where multiple supply voltages are needed to support the operating modes of different modules. The supply voltage provided by low-dropout linear regulators in related technologies is no longer sufficient to meet the power supply requirements of large-scale integrated circuits. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a low dropout linear regulator and control method, which aims to solve the problem that the power supply voltage provided by the low dropout linear regulator in the related technology cannot meet the actual power supply requirements of integrated circuits.
[0005] To solve the above-mentioned technical problems, the present invention is implemented as follows: a low dropout linear regulator, comprising: a low dropout linear regulator circuit and a mode control circuit; the low dropout linear regulator circuit includes a feedback circuit, an error amplification module, a reference voltage source and a power output circuit;
[0006] The mode control circuit is used to compare the power supply voltage with a reference voltage threshold and output a target level signal of the corresponding level state according to the comparison result.
[0007] The feedback circuit is used to trigger a corresponding gating state according to the target level signal; wherein, under different gating states, the resistance value between the ground terminal of the error amplification module and the feedback circuit is different, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different.
[0008] The error amplification module is used to output a corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage generated by the reference voltage source.
[0009] The power output circuit is used to output a stable supply voltage based on the error signal.
[0010] Furthermore, the mode control circuit includes a first detection module, a second detection module, and a logic circuit. The first detection module includes a first power transistor and a Schmitt trigger, and the second detection module includes a general comparator. The level state switching sensitivity of the second detection module is greater than that of the first detection module.
[0011] The first detection module is used to compare its reference voltage threshold with the power supply voltage, and output a first level signal of the corresponding level state according to the comparison result, wherein the voltage threshold referenced by the first detection module is the threshold voltage for the first power transistor to enter the subthreshold conduction state.
[0012] The second detection module is used to compare its reference voltage threshold with the power supply voltage, and output a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module is the reference voltage input from the reference voltage source to the general comparator. The voltage threshold referenced by the first detection module is less than the voltage threshold referenced by the second detection module when the reference voltage source reaches a stable state.
[0013] The logic circuit is used to perform an AND logic operation based on the level states of the first level signal and the second level signal, and output the target level signal with the corresponding level state based on the result of the AND logic operation.
[0014] Furthermore, the first detection module also includes a Schmitt trigger. After entering the subthreshold conduction state, the first power transistor is used to output a trigger voltage based on the power supply voltage to the Schmitt trigger. The Schmitt trigger is used to compare the trigger voltage with the voltage threshold of the Schmitt trigger and output a first level signal of the corresponding level state according to the comparison result.
[0015] Furthermore, the first detection module also includes a first resistor array;
[0016] The first end of the first resistor array is used to electrically connect to the power supply voltage output terminal. The gate of the first power transistor is electrically connected to the second end of the first resistor array. The source of the first power transistor is grounded. The drain of the first power transistor is electrically connected to the input terminal of the Schmitt trigger. The input terminal of the Schmitt trigger is also electrically connected to the second end of the first resistor array. The output terminal of the Schmitt trigger is electrically connected to the input terminal of the logic circuit.
[0017] Furthermore, the second detection module also includes a second resistor array, a second power transistor, and an inverter;
[0018] The first end of the second resistor array is used to electrically connect to the power supply voltage output terminal. The positive terminal of the universal comparator is electrically connected to the second end of the second resistor array. The output terminal of the universal comparator is also electrically connected to the input terminal of the inverter. The output terminal of the inverter is electrically connected to the gate of the second power transistor. The source of the second power transistor is used to electrically connect to the power supply voltage output terminal. The gate of the second power transistor is electrically connected to the third end of the second resistor array.
[0019] Furthermore, the feedback circuit includes multiple feedback resistors and at least one switching module;
[0020] Multiple feedback resistors are connected in series and / or in parallel to form a resistance feedback array. The first end of the resistance feedback array is electrically connected to the output end of the power output circuit, the second end of the resistance feedback array is electrically connected to the input end of the error amplification module, and the third end of the resistance feedback array is grounded.
[0021] Each of the switch modules is connected in series or in parallel with at least a portion of the feedback resistors, and each of the switch modules is used to switch the switch state according to the target level signal, so that the feedback circuit triggers the corresponding gating state according to the target level signal.
[0022] Furthermore, N feedback resistors are connected in series to form the resistance feedback array, where N is a positive integer and N≥3; there is a node between any two feedback resistors, and a resistance path with different resistance values is formed between the first feedback resistor in the resistance feedback array and any node;
[0023] Each of the switch modules includes an output terminal and at least two input terminals. The output terminal of each switch module is electrically connected to the input terminal of the error amplification module. In different selection states, one input terminal of the switch module is electrically connected to the corresponding node.
[0024] This invention also provides a control method for a low-dropout linear regulator, wherein the low-dropout linear regulator includes a low-dropout linear regulator circuit and a mode control circuit; the low-dropout linear regulator circuit includes a feedback circuit, an error amplification module, a reference voltage source, and a power output circuit;
[0025] The mode control circuit compares the power supply voltage with a reference voltage threshold and outputs a target level signal for the corresponding level state based on the comparison result.
[0026] The feedback circuit triggers a corresponding gating state based on the target level signal; wherein, under different gating states, the resistance value between the ground terminal of the error amplification module and the feedback circuit is different, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different.
[0027] The error amplification module outputs a corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage generated by the reference voltage source.
[0028] The power output circuit outputs a stable supply voltage based on the error signal.
[0029] Furthermore, the mode control circuit includes a first detection module, a second detection module, and a logic circuit. The first detection module includes a first power transistor and a Schmitt trigger, and the second detection module includes a general comparator. The level state switching sensitivity of the second detection module is greater than that of the first detection module.
[0030] The first detection module compares its reference voltage threshold with the power supply voltage and outputs a first level signal of the corresponding level state according to the comparison result. The voltage threshold referenced by the first detection module is the threshold voltage for the first power transistor to enter the subthreshold conduction state.
[0031] The second detection module compares its reference voltage threshold with the power supply voltage and outputs a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module is the reference voltage input from the reference voltage source to the general comparator. The voltage threshold referenced by the first detection module is less than the voltage threshold referenced by the second detection module when the reference voltage source reaches a stable state.
[0032] The logic circuit performs an AND logic operation based on the level states of the first level signal and the second level signal, and outputs the target level signal with the corresponding level state based on the result of the AND logic operation.
[0033] Furthermore, the first detection module also includes a Schmitt trigger;
[0034] After the first power transistor enters the subthreshold conduction state, it outputs a trigger voltage based on the power supply voltage to the Schmitt trigger. The Schmitt trigger compares the trigger voltage with the voltage threshold of the Schmitt trigger and outputs a first level signal of the corresponding level state according to the comparison result.
[0035] Compared with the prior art, the low-dropout linear regulator and control method of this invention have the following advantages:
[0036] The low-dropout linear regulator of this invention has a mode control circuit that controls the feedback circuit to output different feedback voltages based on the detected power supply voltage. These feedback voltages are input to the error amplification module, which, through negative feedback control, further enables the power output circuit to output a corresponding supply voltage. This low-dropout linear regulator can output different supply voltages according to different power supply voltages, meeting the practical needs of inputting different supply voltages to different modules of analog and digital circuits, and is beneficial for realizing the internal power supply of large-scale integrated circuits. Attached Figure Description
[0037] Figure 1 This is a circuit structure block diagram of the low-dropout linear regulator in an embodiment of the present invention;
[0038] Figure 2 This is a circuit diagram of the low-dropout linear voltage regulator circuit in an embodiment of the present invention;
[0039] Figure 3 This is a circuit structure block diagram of the mode control circuit in an embodiment of the present invention;
[0040] Figure 4 This is a circuit diagram of the first detection module in an embodiment of the present invention;
[0041] Figure 5 This is a circuit diagram of the second detection module in an embodiment of the present invention;
[0042] Figure 6 This is a basic flowchart illustrating the control method of the low-dropout linear regulator in this embodiment of the invention.
[0043] In the accompanying drawings, the reference numerals indicate:
[0044] 100. Low dropout linear regulator circuit; 200. Mode control circuit; 210. First detection module; 220. Second detection module; 230. Logic circuit. Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0046] Example:
[0047] Please see Figures 1 to 5 A low-dropout linear regulator includes: a low-dropout linear regulator circuit 100 and a mode control circuit 200; the low-dropout linear regulator circuit 100 includes a feedback circuit, an error amplification module, a reference voltage source and a power output circuit;
[0048] The mode control circuit 200 is used to compare the power supply voltage with a reference voltage threshold and output a target level signal of the corresponding level state according to the comparison result;
[0049] The feedback circuit is used to trigger the corresponding gating state according to the target level signal; wherein, in different gating states, the resistance value between the ground terminal connected to the error amplification module and the feedback circuit is different, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different.
[0050] The error amplification module is used to output the corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage VREF generated by the reference voltage source.
[0051] The power output circuit is used to output a stable supply voltage based on the error signal.
[0052] In this embodiment, the mode control circuit 200 can control the feedback circuit to output different feedback voltages based on the detected power supply voltage. The feedback voltage is input to the error amplification module, and through the negative feedback control method of the error amplification module, the power output circuit further outputs the corresponding power supply voltage. This low-dropout linear regulator can output different power supply voltages according to different power supply voltages, meeting the actual needs of inputting different power supply voltages to different modules of analog and digital circuits, which is beneficial for realizing the internal power supply of large-scale integrated circuits.
[0053] As an example, such as Figure 2 As shown, the error amplification module includes an error amplifier and an output power transistor.
[0054] The reference voltage source is used to output the reference voltage VREF to the negative terminal of the error amplifier, the feedback voltage is output to the positive terminal of the error amplifier, the output terminal of the error amplifier is used to output the error signal to the gate of the output power transistor, the power supply voltage is input to the source of the output power transistor, the drain of the power output transistor is used to output the corresponding supply voltage according to the error signal, and the drain of the power output transistor is also used to output the supply voltage to the feedback circuit.
[0055] Furthermore, the feedback circuit includes multiple feedback resistors and at least one switching module;
[0056] Multiple feedback resistors are connected in series and / or in parallel to form a resistance feedback array. The first end of the resistance feedback array is electrically connected to the output end of the power output circuit, the second end of the resistance feedback array is electrically connected to the input end of the error amplifier module, and the third end of the resistance feedback array is grounded.
[0057] Each switching module is connected in series or in parallel with at least some of the feedback resistors. Each switching module is used to switch the switching state according to the target level signal, so that the feedback circuit triggers the corresponding gating state according to the target level signal.
[0058] Under different selection states, each switch module switches to the corresponding switch state, resulting in different resistance values between the ground terminal connected to the error amplification module and the feedback circuit.
[0059] Furthermore, N feedback resistors are connected in series to form a resistance feedback array, where N is a positive integer and N≥3; there is a node between any two feedback resistors, and a resistance path with different resistance values is formed between the first feedback resistor of the resistance feedback array and any node;
[0060] Each switch module includes one output terminal and at least two input terminals. The output terminal of each switch module is electrically connected to the input terminal of the error amplifier module. In different strobe states, one input terminal of the switch module is electrically connected to the corresponding node.
[0061] In this embodiment, as Figure 2 As shown, the resistor feedback array includes feedback resistors R1, R2, and R3 connected in series. There is a first node between feedback resistors R1 and R2, and a second node between feedback resistors R2 and R3. The feedback circuit includes a switching module, which is a dual-channel selector switch with two input terminals S1 and S2.
[0062] The mode control circuit 200 outputs a target level signal SEL to the control terminal of the dual-channel selection switch. The target level signal SEL controls the input terminal S1 of the dual-channel selection switch to select the first node, or the target level signal SEL controls the input terminal S2 of the dual-channel selection switch to select the second node, so that the error amplifier inputs different feedback voltages, enabling the low dropout linear regulator to output two different supply voltages VOUT_H and VOUT_L.
[0063] Specifically, such as Figure 2 As shown, the steps for a low-dropout linear regulator to output two different supply voltages are as follows:
[0064] (1) Working mode: S1 is off, S2 is on.
[0065] When the dual-channel selector switch S2 is turned on, the output power transistor MP1 converts the output level of the error amplifier EA into a current IH. At this time, the supply voltage of the regulated output of the output power transistor MP1 is:
[0066]
[0067] With the resistor feedback array set in operating mode, the feedback voltage is:
[0068]
[0069] When the output voltage is regulated, the voltages at the positive and negative terminals of the error amplifier are the same, i.e., VFB = VREF. Therefore, the first supply voltage for the low-dropout linear regulator's regulated output in operating mode is:
[0070]
[0071] (2) Hold mode: S1 is enabled, S2 is disabled
[0072] When the dual-channel selector switch S1 is turned on, the output power transistor MP1 converts the output level of the error amplifier EA into a current IL. At this time, the supply voltage of the regulated output of the output power transistor MP1 is:
[0073]
[0074] With the resistive feedback array set in hold mode, the feedback voltage is:
[0075]
[0076] When the output voltage is regulated, the voltages at the positive and negative terminals of the error amplifier EA are the same, i.e., VFB = VREF. Therefore, the second supply voltage for the low-dropout linear regulator output in hold mode is:
[0077]
[0078] Thus, by switching the dual-channel selector switches S1 and S2, the low-dropout linear regulator can have two power supply modes with regulated output, and the first power supply voltage VOUT_H > the second power supply voltage VOUT_L.
[0079] It is understood that in other embodiments, the implementation is not limited to a resistor feedback array formed by multiple feedback resistors connected in series. The feedback resistors can be variable resistors or resistors with fixed resistance values. The switching module is not limited to only one; the switching module can also be a single-pole single-throw switch or other types of switches.
[0080] Furthermore, such as Figures 3 to 5 The mode control circuit 200 includes a first detection module 210, a second detection module 220 and a logic circuit 230. The first detection module 210 includes a first power transistor and a Schmitt trigger. The second detection module 220 includes a general comparator COMP. The level state switching sensitivity of the second detection module 220 is greater than that of the first detection module 210.
[0081] The first detection module 210 is used to compare its reference voltage threshold with the power supply voltage, and output a first level signal of the corresponding level state according to the comparison result. The voltage threshold referenced by the first detection module 210 is the threshold voltage for the first power transistor to enter the subthreshold conduction state.
[0082] The second detection module 220 is used to compare its reference voltage threshold with the power supply voltage and output a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module 220 is the reference voltage VREF input from the reference voltage source to the general comparator COMP. The voltage threshold referenced by the first detection module 210 is less than the voltage threshold referenced by the second detection module 220 when the reference voltage source reaches a stable state.
[0083] The logic circuit 230 is used to perform AND logic operations based on the level states of the first level signal and the second level signal, and output the target level signal with the corresponding level state based on the result of the AND logic operation.
[0084] In this embodiment, the voltage threshold referenced by the second detection module 220 is the reference voltage VREF output when the reference voltage source reaches a stable state. During the power-on process, the power supply voltage gradually increases. Since it takes a period of time for the reference voltage to stabilize, the second detection module 220 may experience a situation where the power supply voltage is greater than the unstable reference voltage, resulting in an error in the level state of the second level signal output by the second detection module 220.
[0085] Since the voltage threshold referenced by the first detection module 210 is the threshold voltage at which the first power transistor enters the subthreshold conduction state, the threshold voltage at which the first power transistor enters the subthreshold conduction state will not fluctuate during the power-on process. Furthermore, the voltage threshold referenced by the first detection module 210 is less than the voltage threshold referenced by the second detection module 220 when the reference voltage source reaches a stable state. During the power-on process, the power supply voltage will first be compared with the voltage threshold referenced by the first detection module 210. As long as the power supply voltage does not exceed the voltage threshold referenced by the first detection module 210, the second level signal output by the second detection module 220 will not cause the feedback circuit to change its selection state. In this way, the first detection module 210 realizes the power-on detection function and can prevent the second detection module 220 from outputting a second level signal with an incorrect level state.
[0086] The level switching sensitivity of the second detection module 220 is greater than that of the first detection module 210. This is because the voltage threshold referenced by the first detection module 210 is the threshold voltage at which the first power transistor enters the subthreshold conduction state. When the gate voltage of the first power transistor is lower than the threshold voltage but still higher than the source voltage, the first power transistor enters the subthreshold conduction state. Therefore, the level switching range of the first detection module 210 is wider, and its level switching sensitivity is lower than that of the second detection module 220. However, correspondingly, the first detection module 210 has a larger voltage lock-in range, is less affected by small fluctuations in power supply voltage and noise, and can also meet the requirements of low-power design. Its cost is also lower than that of detection modules with higher level switching sensitivity, making it economical and efficient. The voltage threshold referenced by the second detection module 220 is the reference voltage VREF output when the reference voltage source reaches a stable state. The level switching of the second level signal output by the second detection module 220 is more precise, enabling the feedback circuit to accurately trigger the corresponding gating state according to the target level signal, and the power output circuit to output the corresponding supply voltage faster according to the power supply voltage.
[0087] Therefore, the mode control circuit 200 in this embodiment uses two detection modules with different level switching sensitivities and different reference voltage thresholds to make the low dropout linear regulator output a corresponding feedback voltage based on the power supply voltage more stable and accurate, ensuring that the mode control circuit 200 has no abnormal pulses and solving the instability factors in the feedback voltage regulation during power-on.
[0088] Furthermore, such as Figure 4 As shown, the first detection module 210 also includes a Schmitt trigger. The first power transistor is used to output a trigger voltage based on the power supply voltage to the Schmitt trigger after entering the subthreshold conduction state. The Schmitt trigger is used to compare the trigger voltage with the voltage threshold of the Schmitt trigger and output a first level signal of the corresponding level state according to the comparison result.
[0089] Furthermore, such as Figure 4 As shown, the first detection module 210 also includes a first resistor array;
[0090] The first end of the first resistor array is used to electrically connect to the power supply voltage output terminal. The gate of the first power transistor is electrically connected to the second end of the first resistor array. The source of the first power transistor is grounded. The drain of the first power transistor is electrically connected to the input terminal of the Schmitt trigger. The input terminal of the Schmitt trigger is also electrically connected to the second end of the first resistor array. The output terminal of the Schmitt trigger is electrically connected to the input terminal of the logic circuit 230.
[0091] In this embodiment, as Figure 4As shown, the power supply voltage VDD is divided by the first resistor array R7 and R8 to obtain the gate input voltage VL of the first power transistor MN. The drain output voltage VS of the first power transistor is sent to the input terminal of the Schmitt trigger, and the output terminal of the Schmitt trigger outputs the second level signal VR.
[0092] The threshold voltage of the first power transistor is VTH_MN. When the power supply output is not powered, or the power supply voltage VDD is low (i.e., VL < VTH_MN), the first level signal VR output by the Schmitt trigger is low. When the power supply voltage VDD increases until the gate input voltage VL of the first power transistor MN > VTH_MN, the first level signal VR output by the Schmitt trigger flips from low to high. In both of these cases, the low-dropout linear regulator is always in hold mode, and the supply voltage for the regulated output is VOUT_L.
[0093] In the first detection module 210, the Schmitt trigger is mainly used to provide hysteresis characteristics for the level flip of the first level signal. Since the subthreshold voltage of the first power transistor MN is turned on, the drain output voltage VS of the first power transistor MN is still greater than the threshold voltage of the Schmitt trigger when VL < VTH_MN. Therefore, compared with the voltage detection method of the second detection module 220 based on the general comparator COMP, the first detection module 210 has a larger voltage lock-in range.
[0094] Furthermore, such as Figure 5 As shown, the second detection module 220 also includes a second resistor array, a second power transistor, and an inverter;
[0095] The first end of the second resistor array is electrically connected to the power supply voltage output terminal. The positive terminal of the general-purpose comparator COMP is electrically connected to the second end of the second resistor array. The output terminal of the general-purpose comparator COMP is also electrically connected to the input terminal of the inverter. The output terminal of the inverter is electrically connected to the gate of the second power transistor. The source of the second power transistor is electrically connected to the power supply voltage output terminal. The gate of the second power transistor is electrically connected to the third end of the second resistor array.
[0096] In this embodiment, the power supply voltage VDD is divided by the second resistor array R4, R5, and R6 to obtain the input voltage VH at the positive terminal of the general-purpose comparator COMP. The input voltage at the negative terminal of the general-purpose comparator COMP is the reference voltage VREF, which is set as the reference threshold voltage for the first detection module 210. When the power supply voltage output is not powered, or when the power supply voltage VDD is low and VH < VREF, the second level signal VF output by the output terminal of the general-purpose comparator COMP is effectively low, and the low-dropout linear regulator outputs the first supply voltage VOUT_L.
[0097] The second detection module 220 incorporates a second power transistor MP2, which enables a hysteresis function in the switching of the second level signal VF. This means the switching of the low-dropout linear regulator's operating mode is delayed, and the switching speed is further improved. The steps by which the second power transistor enables the circuit's operating mode switching to have a hysteresis function are as follows:
[0098] (1) The low-dropout linear regulator switches from holding mode to operating mode.
[0099] When the power supply voltage output is not powered, or the power supply voltage VDD is low, the input voltage VH at the positive terminal of the general comparator COMP is less than the reference voltage VREF. That is, when VH < VREF, the second level signal VF is low, VF = 0, and the low dropout linear regulator is in hold mode.
[0100] The second-level signal is input to the gate of the second power transistor MP2 through the inverter. The second power transistor MP2 is turned off. At this time, the input voltage VH at the positive terminal of the general-purpose comparator COMP satisfies:
[0101]
[0102] As the power supply voltage VDD increases, the input voltage VH at the positive terminal of the general-purpose comparator COMP increases until VH > VREF. At this point, the second level signal VF flips to a high level, VF = 1, and the second power transistor MP2 turns on. At this time, the input voltage VH at the positive terminal of the general-purpose comparator COMP satisfies:
[0103]
[0104] As the second power transistor MP2 is turned on, VH rapidly increases from VH- to VH+, and the low dropout linear regulator quickly switches from hold mode to operating mode.
[0105] For the power supply voltage VDD, when it rises to the level satisfying VH-=VREF, the low-dropout linear regulator switches from holding mode to operating mode. The threshold voltage VSET_F+ for the positive flip of the second-level signal VF then satisfies:
[0106]
[0107] (2) The low-dropout linear regulator switches from operating mode to holding mode.
[0108] When the input voltage VH at the positive terminal of the general-purpose comparator COMP is greater than the reference voltage VREF, i.e., VH is greater than VREF, the second level signal VF is high, VF=1, the low-dropout linear regulator is in operating mode, and the second power transistor MP2 is turned on. At this time, the input voltage VH at the positive terminal of the general-purpose comparator COMP satisfies:
[0109]
[0110] As the power supply voltage VDD decreases, the input voltage VH at the positive terminal of the general comparator COMP decreases. When VH < VREF, the second level signal VF flips from high level to low level, and the second power transistor MP2 is turned off. At this time, the input voltage VH at the positive terminal of the general comparator COMP satisfies:
[0111]
[0112] With the turn-off of the second power transistor MP2, VH rapidly decreases from VH+ to VH-, and then the low dropout linear regulator quickly switches from the working mode to the holding mode.
[0113] For the power supply voltage VDD, when it decreases to satisfy VH+ = VREF, the low dropout linear regulator switches from the working mode to the holding mode. Then, the threshold voltage VSET_F- at which the second level signal VF flips negatively satisfies:
[0114]
[0115] Since the threshold voltage for the switching of the circuit working mode caused by the change in the power supply voltage VDD satisfies VSET_F- < VSET_F+, the second detection module 220 has a hysteresis function when performing mode switching, and the hysteresis voltage satisfies:
[0116]
[0117] Specifically, in this embodiment, the logic circuit 230 is an AND logic gate circuit. Only when the level states of the first level signal and the second level signal are both 1, the AND logic circuit 230 outputs a gating signal SEL = 1. The steps for the low dropout linear regulator to output a supply voltage during the power-on process are as follows:
[0118] When the power supply voltage output terminal starts to supply power for the first time, the power supply voltage VDD is low, and the power supply voltage VDD is less than the reference voltage threshold of the first detection module 210, that is, VH < , the first level signal VR is at low level, VR = 0. At this time, the AND logic gate circuit does not respond to the possible misflipping of the second level signal, and the gating signal SEL output by the AND logic gate circuit is SEL = 0. At this time, although the low dropout linear regulator operates normally, since the power supply voltage VDD and the reference voltage VREF output by the reference voltage source BG are not yet stable, at this time, the low dropout linear regulator outputs a third supply voltage, and the third supply voltage changes with the change of the reference voltage VREF.
[0119] As the power supply voltage VDD gradually increases, When the first level signal VR flips to a high level (VR=1), the first detection module 210 allows the logic gate circuit to respond to the effective flipping of the second detection module 220. At this time, the low-dropout linear regulator is in hold mode, and the reference voltage VREF output by the reference voltage source BG has also been stably established. Therefore, the low-dropout linear regulator outputs the second supply voltage VOUT_L.
[0120]
[0121] As the power supply voltage VDD increases further, until At this time, the first level signal VR remains high, VR=1, the power supply voltage VDD is greater than the reference voltage threshold of the second detection module 220, the second level signal VF flips to high, VF=1, and the strobe signal SEL output by the logic gate circuit is 1, the low dropout linear regulator switches to the working mode, and outputs the first supply voltage VOUT_H:
[0122]
[0123] Furthermore, if the power supply voltage VDD drops until VDD < When the low-dropout linear regulator switches from operating mode to holding mode, the output supply voltage decreases from VOUT_H to VOUT_L.
[0124] Therefore, the low dropout linear regulator provided in this embodiment has two operating modes under different power supply voltages VDD, and can generate two regulated power supply voltages. The low dropout linear regulator provided in this embodiment can also switch between the two different operating modes to output two different power supply voltages when the power supply voltage VDD changes, so as to flexibly meet the power supply needs of different circuit modules.
[0125] It should be understood that in other embodiments, there may be multiple first detection modules 210 and second detection modules 220, and more than two regulated power supply voltages may be achieved by setting different reference voltage thresholds, selecting different logic circuits 230, and designing switching modules in the feedback circuit to switch different resistance paths.
[0126] Since the subthreshold voltage difference of the first power transistor in the first detection module 210 is small in actual manufacturing process, and there is overlap in the subthreshold voltage range between various types of power transistors, it is preferable to use only a single first detection module 210 in practical applications.
[0127] Please see Figure 6The present invention also provides a control method for a low-dropout linear regulator, the low-dropout linear regulator including a low-dropout linear regulator circuit 100 and a mode control circuit 200; the low-dropout linear regulator circuit 100 includes a feedback circuit, an error amplification module, a reference voltage source and a power output circuit;
[0128] The mode control circuit 200 compares the power supply voltage with a reference voltage threshold and outputs a target level signal for the corresponding level state based on the comparison result.
[0129] The feedback circuit triggers the corresponding gating state according to the target level signal; among them, the resistance value between the ground terminal connected to the error amplification module and the feedback circuit is different in different gating states, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different.
[0130] The error amplification module outputs the corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage VREF generated by the reference voltage source.
[0131] The power output circuit outputs a stable supply voltage based on the error signal.
[0132] Furthermore, the mode control circuit 200 includes a first detection module 210, a second detection module 220, and a logic circuit 230. The first detection module 210 includes a first power transistor and a Schmitt trigger, and the second detection module 220 includes a general-purpose comparator COMP. The level state switching sensitivity of the second detection module 220 is greater than that of the first detection module 210.
[0133] The first detection module 210 compares its reference voltage threshold with the power supply voltage and outputs a first level signal of the corresponding level state according to the comparison result. The voltage threshold referenced by the first detection module 210 is the threshold voltage for the first power transistor to enter the subthreshold conduction state.
[0134] The second detection module 220 compares its reference voltage threshold with the power supply voltage and outputs a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module 220 is the reference voltage VREF input from the reference voltage source to the general comparator COMP. The voltage threshold referenced by the first detection module 210 is less than the voltage threshold referenced by the second detection module 220 when the reference voltage source reaches a stable state.
[0135] The logic circuit 230 performs an AND logic operation based on the level states of the first level signal and the second level signal, and outputs the target level signal with the corresponding level state based on the result of the AND logic operation.
[0136] Furthermore, the first detection module 210 also includes a Schmitt trigger;
[0137] After the first power transistor enters the subthreshold conduction state, it outputs a trigger voltage based on the power supply voltage to the Schmitt trigger. The Schmitt trigger compares the trigger voltage with the voltage threshold of the Schmitt trigger and outputs a first level signal of the corresponding level state according to the comparison result.
[0138] The control method provided in the second part of this embodiment is applied to the low-dropout linear regulator in the first part of this embodiment. The specific steps of the control method are described in the first part of this embodiment. The control method corresponds to other parts of this embodiment and can produce similar technical effects, so they will not be repeated here.
[0139] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A low-dropout linear regulator, characterized in that, include: Low dropout linear regulator circuit and mode control circuit; The low-dropout linear regulator circuit includes a feedback circuit, an error amplification module, a reference voltage source, and a power output circuit. The mode control circuit is used to compare the power supply voltage with a reference voltage threshold and output a target level signal of the corresponding level state according to the comparison result. The feedback circuit is used to trigger a corresponding gating state according to the target level signal; wherein, under different gating states, the resistance value between the ground terminal of the error amplification module and the feedback circuit is different, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different. The error amplification module is used to output a corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage generated by the reference voltage source. The power output circuit is used to output a stable power supply voltage according to the error signal; The mode control circuit includes a first detection module, a second detection module, and a logic circuit. The first detection module includes a first power transistor and a Schmitt trigger. The second detection module includes a general comparator. The level state switching sensitivity of the second detection module is greater than that of the first detection module. The first detection module is used to compare its reference voltage threshold with the power supply voltage, and output a first level signal of the corresponding level state according to the comparison result, wherein the voltage threshold referenced by the first detection module is the threshold voltage for the first power transistor to enter the subthreshold conduction state. The second detection module is used to compare its reference voltage threshold with the power supply voltage, and output a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module is the reference voltage input from the reference voltage source to the general comparator. The voltage threshold referenced by the first detection module is less than the voltage threshold referenced by the second detection module when the reference voltage source reaches a stable state. The logic circuit is used to perform an AND logic operation based on the level states of the first level signal and the second level signal, and output the target level signal with the corresponding level state based on the result of the AND logic operation.
2. The low-dropout linear regulator according to claim 1, characterized in that, The first detection module further includes a Schmitt trigger. After entering the subthreshold conduction state, the first power transistor is used to output a trigger voltage based on the power supply voltage to the Schmitt trigger. The Schmitt trigger is used to compare the trigger voltage with the voltage threshold of the Schmitt trigger and output a first level signal of the corresponding level state according to the comparison result.
3. The low-dropout linear regulator according to claim 2, characterized in that, The first detection module further includes a first resistor array; The first end of the first resistor array is used to electrically connect to the power supply voltage output terminal. The gate of the first power transistor is electrically connected to the second end of the first resistor array. The source of the first power transistor is grounded. The drain of the first power transistor is electrically connected to the input terminal of the Schmitt trigger. The input terminal of the Schmitt trigger is also electrically connected to the second end of the first resistor array. The output terminal of the Schmitt trigger is electrically connected to the input terminal of the logic circuit.
4. The low-dropout linear regulator according to claim 2, characterized in that, The second detection module also includes a second resistor array, a second power transistor, and an inverter; The first end of the second resistor array is used to electrically connect to the power supply voltage output terminal. The positive terminal of the universal comparator is electrically connected to the second end of the second resistor array. The output terminal of the universal comparator is also electrically connected to the input terminal of the inverter. The output terminal of the inverter is electrically connected to the gate of the second power transistor. The source of the second power transistor is used to electrically connect to the power supply voltage output terminal. The gate of the second power transistor is electrically connected to the third end of the second resistor array.
5. The low-dropout linear regulator according to claim 1, characterized in that, The feedback circuit includes multiple feedback resistors and at least one switching module; Multiple feedback resistors are connected in series and / or in parallel to form a resistance feedback array. The first end of the resistance feedback array is electrically connected to the output end of the power output circuit, the second end of the resistance feedback array is electrically connected to the input end of the error amplification module, and the third end of the resistance feedback array is grounded. Each of the switch modules is connected in series or in parallel with at least a portion of the feedback resistors, and each of the switch modules is used to switch the switch state according to the target level signal, so that the feedback circuit triggers the corresponding gating state according to the target level signal.
6. The low-dropout linear regulator according to claim 5, characterized in that, The N feedback resistors are connected in series to form the resistance feedback array, where N is a positive integer and N≥3; there is a node between any two feedback resistors, and a resistance path with different resistance values is formed between the first feedback resistor of the resistance feedback array and any node; Each of the switch modules includes an output terminal and at least two input terminals. The output terminal of each switch module is electrically connected to the input terminal of the error amplification module. In different selection states, one input terminal of the switch module is electrically connected to the corresponding node.
7. A control method for a low-dropout linear regulator, characterized in that, The low-dropout linear regulator includes a low-dropout linear regulator circuit and a mode control circuit; the low-dropout linear regulator circuit includes a feedback circuit, an error amplification module, a reference voltage source, and a power output circuit; The mode control circuit compares the power supply voltage with a reference voltage threshold and outputs a target level signal for the corresponding level state based on the comparison result. The feedback circuit triggers a corresponding gating state based on the target level signal; wherein, under different gating states, the resistance value between the ground terminal of the error amplification module and the feedback circuit is different, and the feedback voltage obtained by the feedback circuit based on the power supply voltage output by the power output circuit is different. The error amplification module outputs a corresponding error signal based on the feedback voltage corresponding to different gating states and the reference voltage generated by the reference voltage source. The power output circuit outputs a stable supply voltage based on the error signal; The mode control circuit includes a first detection module, a second detection module, and a logic circuit. The first detection module includes a first power transistor and a Schmitt trigger. The second detection module includes a general comparator. The level state switching sensitivity of the second detection module is greater than that of the first detection module. The first detection module compares its reference voltage threshold with the power supply voltage and outputs a first level signal of the corresponding level state according to the comparison result. The voltage threshold referenced by the first detection module is the threshold voltage for the first power transistor to enter the subthreshold conduction state. The second detection module compares its reference voltage threshold with the power supply voltage and outputs a second level signal of the corresponding level state according to the comparison result. The reference voltage threshold of the second detection module is the reference voltage input from the reference voltage source to the general comparator. The voltage threshold referenced by the first detection module is less than the voltage threshold referenced by the second detection module when the reference voltage source reaches a stable state. The logic circuit performs an AND logic operation based on the level states of the first level signal and the second level signal, and outputs the target level signal with the corresponding level state based on the result of the AND logic operation.
8. The method according to claim 7, characterized in that, The first detection module also includes a Schmitt trigger; After the first power transistor enters the subthreshold conduction state, it outputs a trigger voltage based on the power supply voltage to the Schmitt trigger. The Schmitt trigger compares the trigger voltage with the voltage threshold of the Schmitt trigger and outputs a first level signal of the corresponding level state according to the comparison result.
Citation Information
Patent Citations
Voltage correction circuit and low-dropout linear regulator system
CN104679084A
Low-dropout linear voltage stabilizing circuit
CN115202423A