Resistive variable memory structure and its formation method

Abstract

A resistive switching memory structure and its formation method are disclosed. The formation method includes: providing a substrate; forming a conductive material layer on the substrate, the conductive material layer including a first region and a second region located on the first region, the first region serving as a first electrode layer; oxidizing the second region to form an insulating oxide layer; and forming a second electrode layer on the insulating oxide layer. By oxidizing the second region of the conductive material layer to form the insulating oxide layer, the thickness of the insulating oxide layer and the distribution of oxygen vacancies in the insulating oxide layer can be precisely controlled by controlling process parameters (such as gas ratio, sputtering power, and sputtering time) during the oxidation process. Furthermore, the first electrode layer and the insulating oxide layer are an integral structure formed based on the conductive material layer, and no air layer is formed at the contact interface between them, thereby improving the stability and performance of the resistive switching memory structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a resistive variable memory structure and its formation method. Background Technology

[0002] Resistive Random Access Memory (RRAM) utilizes two or more different resistance states exhibited by certain thin film materials under the action of an external electric field to realize data storage. It is a new type of non-volatile memory that has received widespread attention from academia and industry in the past decade or so. Its typical structure is metal electrode-oxide-metal electrode.

[0003] Under the excitation of an external electric field, the device can undergo a reversible transition between high and low resistance states, and these states can be maintained even after the electric field is removed. Resistive random-access memory (RRAM) offers numerous advantages, including fast write / erase speeds, high storage density, high rewrite / erase cycles, multi-value storage, and three-dimensional storage. Under the excitation of an external electric field, the device can undergo a reversible transition between high and low resistance states, and these states can be maintained even after the electric field is removed.

[0004] The Forming process refers to the first transition of a resistive variable memory (RVM) from an initial high-resistance state to a low-resistance state. Conversely, a RVM in a low-resistance state can transition to a high-resistance state after being stimulated by a certain voltage. This transition from low to high resistance is called a Reset. After the Reset process, a RVM that has entered a high-resistance state can also transition to a low-resistance state by applying a voltage stimulus. This process, different from the initial high-resistance-to-low-resistance transition, is called a Set process.

[0005] However, existing resistive variable memory structures still have many problems. Summary of the Invention

[0006] The technical problem solved by this invention is to provide a resistive variable memory structure and its formation method to improve the stability and performance of resistive variable memory.

[0007] To address the aforementioned problems, the present invention provides a resistive switching memory structure, comprising: a substrate; a first electrode layer located on the substrate; an insulating oxide layer located on the first electrode layer, wherein the first electrode layer and the insulating oxide layer are an integral structure; and a second electrode layer formed on the insulating oxide layer.

[0008] Optionally, the thickness of the insulating oxide layer is 10 nanometers to 50 nanometers.

[0009] Optionally, it may also include: a passivation layer located on the first electrode layer, the passivation layer surrounding the insulating oxide layer.

[0010] Optionally, the material of the passivation layer includes silicon nitride or silicon oxide.

[0011] Optionally, the material of the first electrode layer includes tantalum nitride.

[0012] Optionally, the material of the insulating oxide layer includes tantalum oxynitride.

[0013] Optionally, the material of the second electrode layer includes: titanium nitride, tungsten, or an inert electrode material; the inert electrode material includes: platinum, gold, palladium, iridium, rhodium, silver, or lead.

[0014] Accordingly, the present invention also provides a method for forming a resistive switching memory structure, comprising: providing a substrate; forming a conductive material layer on the substrate, the conductive material layer comprising a first region and a second region located on the first region, the first region serving as a first electrode layer; oxidizing the second region to form an insulating oxide layer; and forming a second electrode layer on the insulating oxide layer.

[0015] Optionally, the process parameters for the oxidation treatment include: sputtering ions including oxygen ions and argon ions; the gas flow rate ratio of oxygen ions to argon ions is 1:4 to 1:1; sputtering power is 100 watts to 300 watts; sputtering time is 5 minutes to 30 minutes; target applied voltage is -400 volts to -600 volts; substrate applied voltage is 200 volts to 400 volts.

[0016] Optionally, the thickness of the insulating oxide layer is 10 nanometers to 50 nanometers.

[0017] Optionally, after forming the conductive material layer and before performing the oxidation process, the method further includes: etching the conductive material layer to form an isolation opening within the conductive material layer; and forming a passivation layer within the isolation opening.

[0018] Optionally, the material of the passivation layer includes silicon nitride or silicon oxide.

[0019] Optionally, the material of the conductive material layer includes tantalum nitride.

[0020] Optionally, the material of the insulating oxide layer includes tantalum oxynitride.

[0021] Optionally, the process for forming the conductive material layer includes chemical vapor deposition.

[0022] Optionally, the process for forming the second electrode layer includes physical vapor deposition or magnetron sputtering.

[0023] Optionally, the material of the second electrode layer includes: titanium nitride, tungsten, or an inert electrode material; the inert electrode material includes: platinum, gold, palladium, iridium, rhodium, silver, or lead.

[0024] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0025] In the resistive switching memory structure of the present invention, the first electrode layer and the insulating oxide layer are an integral structure, and no air layer is formed at the contact interface between the two, thereby improving the stability and performance of the resistive switching memory structure.

[0026] In the method for forming the resistive switching memory structure of the present invention, the second region of the conductive material layer is oxidized to form the insulating oxide layer. By controlling the process parameters (such as gas ratio, sputtering power, and sputtering time) during the oxidation process, the thickness of the insulating oxide layer and the distribution of oxygen vacancies in the insulating oxide layer can be precisely controlled. Furthermore, the first electrode layer and the insulating oxide layer are an integral structure formed based on the conductive material layer, and no air layer is formed at the contact interface between them, thereby improving the stability and performance of the resistive switching memory structure. Attached Figure Description

[0027] Figures 1 to 5 This is a schematic diagram of the steps in the method for forming a resistive variable memory structure according to an embodiment of the present invention. Detailed Implementation

[0028] As described in the background section, existing resistive random access memory (RRAM) structures still have many problems. These will be explained in detail below.

[0029] Currently, in the fabrication of resistive random access memory (RRAM), the insulating oxide layer (or dielectric layer) typically requires complex chemical or physical deposition. This deposition process is not only costly, but also makes it difficult to control the thickness of the deposited insulating oxide layer, leading to uneven film quality. Furthermore, the generation and distribution of oxygen vacancies in the deposited insulating oxide layer are difficult to control precisely. Moreover, the insulating oxide layer and electrode layer are discrete structures, making it easy for air layers to form between them, which in turn affects the stability and performance of the RRAM.

[0030] Based on this, the present invention provides a resistive switching memory structure and its formation method. By oxidizing the second region of the conductive material layer, an insulating oxide layer is formed. By controlling the process parameters during the oxidation process (such as gas ratio, sputtering power, and sputtering time), the thickness of the insulating oxide layer and the distribution of oxygen vacancies within it can be precisely controlled. Furthermore, the first electrode layer and the insulating oxide layer are an integral structure formed based on the conductive material layer; no air layer forms at the contact interface between them, thereby improving the stability and performance of the resistive switching memory structure.

[0031] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0032] Figures 1 to 5 This is a schematic diagram of the steps in the method for forming a resistive variable memory structure according to an embodiment of the present invention.

[0033] Please refer to Figure 1 Substrate 100 is provided.

[0034] In this embodiment, the substrate 100 is made of silicon.

[0035] In other embodiments, the substrate material may also be germanium, silicon germanide, or silicon carbide.

[0036] Please refer to Figure 2 A conductive material layer is formed on the substrate 100. The conductive material layer includes a first region I and a second region II located on the first region I. The first region I is used as a first electrode layer 101.

[0037] It should be noted that, in this embodiment, the first region I in the conductive material layer serves as the first electrode layer 101, therefore the conductive material layer needs to be conductive. In subsequent processes, the second region II of the conductive material layer needs to be oxidized to form an insulating oxide layer in the resistive switching memory, therefore the conductive material layer also needs to have insulating properties after oxidation.

[0038] In this embodiment, the conductive material layer is made of tantalum nitride.

[0039] In this embodiment, the conductive material layer is formed using a chemical vapor deposition process.

[0040] Please refer to Figure 3 After the conductive material layer is formed, the conductive material layer is etched to form an isolation opening (not shown) in the conductive material layer; a passivation layer 102 is formed in the isolation opening.

[0041] In this embodiment, the passivation layer 102 is used for electrical isolation between device structures. The passivation layer 102 is an insulating material, and the material of the passivation layer 102 is silicon oxide.

[0042] In other embodiments, the passivation layer may also be made of silicon nitride.

[0043] In this embodiment, the method for forming the passivation layer 102 includes: forming a passivation material layer (not shown) inside the isolation opening and on the conductive material layer; and planarizing the passivation material layer until the top surface of the conductive material layer is exposed, thereby forming the passivation layer 102.

[0044] Please refer to Figure 4 The second region II is oxidized to form an insulating oxide layer 103.

[0045] The insulating oxide layer 103 is formed by oxidizing the second region II of the conductive material layer. By controlling the process parameters (such as gas ratio, sputtering power, and sputtering time) during the oxidation process, the thickness of the insulating oxide layer 103 and the distribution of oxygen vacancies in the insulating oxide layer 103 can be precisely controlled. In addition, the first electrode layer 101 and the insulating oxide layer 103 are an integral structure formed based on the conductive material layer, and no air layer is formed at the contact interface between them, thereby improving the stability and performance of the resistive switching memory structure.

[0046] It should be noted that, in this embodiment, the point resistance of the insulating oxide layer 103 is variable. When a high voltage is applied to the insulating oxide layer 103, the oxygen ions in the insulating oxide layer 103 rearrange themselves to form conductive filaments, thereby making the insulating oxide layer 103 exhibit a low resistance state. When the applied high voltage is removed, the conductive filaments formed by the oxygen ions break, and the insulating oxide layer 103 exhibits a high resistance state.

[0047] In this embodiment, since the conductive material layer is made of tantalum nitride, the corresponding insulating oxide layer 103 is made of tantalum oxynitride.

[0048] In this embodiment, the process parameters of the oxidation treatment include: sputtering ions including oxygen ions and argon ions; the ratio of oxygen ion to argon ion gas flow rate is 1:4 to 1:1; sputtering power is 100 watts to 300 watts; sputtering time is 5 minutes to 30 minutes; target applied voltage is -400 volts to -600 volts; substrate 100 applied voltage is 200 volts to 400 volts.

[0049] It should be noted that during the sputtering process, by applying a negative bias to the target and a positive bias to the substrate 100, argon ions move towards the target, while oxygen ions move towards the substrate 100 and penetrate into the conductive material layer of the tantalum nitride material, thereby forming the insulating oxide layer 103 of the tantalum oxynitride material. The ratio of oxygen ion to argon ion gas flow rates is between 1:4 and 1:1, with a higher oxygen ion gas ratio tending to produce a thicker insulating oxide layer 103. The sputtering power is between 100 watts and 300 watts; higher power can accelerate the oxidation process, thereby forming the insulating oxide layer 103 of the required thickness in a shorter time. The sputtering time is between 5 minutes and 30 minutes; a longer sputtering time results in a thicker insulating oxide layer 103, while a shorter sputtering time results in a thinner insulating oxide layer 103.

[0050] In this embodiment, the thickness of the insulating oxide layer 103 is 10 nanometers to 50 nanometers. The thickness of the insulating oxide layer 103 is consistent with the thickness of the second region II of the conductive material layer. The thickness of the insulating oxide layer 103 can be flexibly adjusted according to the actual needs of the device. The thickness of the insulating oxide layer 103 formed can be controlled by adjusting parameters such as sputtering power and sputtering time during the oxidation process.

[0051] Please refer to Figure 5 A second electrode layer 104 is formed on the insulating oxide layer 103.

[0052] In this embodiment, the second electrode layer 104 is formed using a physical vapor deposition process.

[0053] In other embodiments, the second electrode layer can also be formed using a magnetron sputtering process.

[0054] In this embodiment, the material of the second electrode layer 104 is tungsten.

[0055] In other embodiments, the material of the second electrode layer may also be titanium nitride or an inert electrode material; the inert electrode material includes platinum, gold, palladium, iridium, rhodium, silver or lead.

[0056] Accordingly, this invention also provides a resistive variable memory structure; please refer to [the relevant documentation / reference]. Figure 5 It includes: a substrate 100; a first electrode layer 101 located on the substrate 100; an insulating oxide layer 103 located on the first electrode layer 101, wherein the first electrode layer 101 and the insulating oxide layer 103 are an integral structure; and a second electrode layer 104 is formed on the insulating oxide layer 103.

[0057] The first electrode layer 101 and the insulating oxide layer 103 are an integral structure, and no air layer is formed at the contact interface between them, which can improve the stability and performance of the resistive switching memory structure.

[0058] In this embodiment, the thickness of the insulating oxide layer 103 is 10 nanometers to 50 nanometers.

[0059] In this embodiment, it further includes a passivation layer 102 located on the first electrode layer 101, the passivation layer 102 surrounding the insulating oxide layer 103.

[0060] In this embodiment, the passivation layer 102 is made of silicon oxide.

[0061] In other embodiments, the passivation layer may also be made of silicon nitride.

[0062] In this embodiment, the material of the first electrode layer 101 is tantalum nitride.

[0063] In this embodiment, the insulating oxide layer 103 is made of tantalum oxynitride.

[0064] In this embodiment, the material of the second electrode layer 104 is tungsten.

[0065] In other embodiments, the material of the second electrode layer may also be titanium nitride or an inert electrode material; the inert electrode material includes platinum, gold, palladium, iridium, rhodium, silver or lead.

[0066] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a resistive variable memory structure, characterized in that, include: Provide substrate; A conductive material layer is formed on the substrate, the conductive material layer including a first region and a second region located on the first region, the first region being used as a first electrode layer; The second region is subjected to oxidation treatment to form an insulating oxide layer; A second electrode layer is formed on the insulating oxide layer; wherein, The conductive material layer is made of tantalum nitride. The insulating oxide layer is made of tantalum oxynitride. The process parameters for the oxidation treatment include: sputtering ions including oxygen ions and argon ions; the ratio of oxygen ion to argon ion gas flow rate is 1:4 to 1:1; sputtering power is 100 watts to 300 watts; sputtering time is 5 minutes to 30 minutes; target voltage is -400 volts to -600 volts; substrate voltage is 200 volts to 400 volts.

2. The method for forming the resistive switching memory structure as described in claim 1, characterized in that, The thickness of the insulating oxide layer is 10 nanometers to 50 nanometers.

3. The method for forming the resistive switching memory structure as described in claim 1, characterized in that, After forming the conductive material layer and before performing the oxidation process, the method further includes: etching the conductive material layer to form an isolation opening within the conductive material layer; and forming a passivation layer within the isolation opening.

4. The method for forming the resistive switching memory structure as described in claim 3, characterized in that, The passivation layer is made of silicon nitride or silicon oxide.

5. The method for forming the resistive switching memory structure as described in claim 1, characterized in that, The process for forming the conductive material layer includes chemical vapor deposition.

6. The method for forming the resistive switching memory structure as described in claim 1, characterized in that, The process for forming the second electrode layer includes physical vapor deposition.

7. The method for forming the resistive switching memory structure as described in claim 1, characterized in that, The material of the second electrode layer includes: titanium nitride, tungsten, or an inert electrode material; the inert electrode material includes: platinum, gold, palladium, iridium, rhodium, or lead.

8. A resistive switching memory structure formed using the forming method according to any one of claims 1 to 7, characterized in that, include: Substrate; The first electrode layer is located on the substrate; An insulating oxide layer is located on the first electrode layer, and the first electrode layer and the insulating oxide layer are an integral structure; A second electrode layer is formed on the insulating oxide layer; wherein, The conductive material layer is made of tantalum nitride. The insulating oxide layer is made of tantalum oxynitride.

9. The resistive switching memory structure as described in claim 8, characterized in that, The thickness of the insulating oxide layer is 10 nanometers to 50 nanometers.

10. The resistive switching memory structure as described in claim 8, characterized in that, Also includes: A passivation layer is located on the first electrode layer, and the passivation layer surrounds the insulating oxide layer.

11. The resistive switching memory structure as described in claim 10, characterized in that, The passivation layer is made of silicon nitride or silicon oxide.

12. The resistive switching memory structure as described in claim 8, characterized in that, The material of the second electrode layer includes: titanium nitride, tungsten, or an inert electrode material; the inert electrode material includes: platinum, gold, palladium, iridium, rhodium, or lead.

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