A frequency standard test expansion card for a frequency standard comparator and a corresponding test method

Abstract

This invention belongs to the field of electronic signal measurement technology, specifically disclosing a frequency standard test expansion card for a frequency standard comparator and a corresponding test method. The frequency standard test expansion card includes an instruction control module, a signal processing module, a communication interface module, and a signal interface module. The test method provided by this invention is based on the instruction control module and the signal processing module, combined with necessary flow control and data processing. It selectively outputs multiple input frequency signals, then sends the output frequency signals to an external instrument, a frequency standard comparator, for testing, and periodically acquires the test results. After data processing, the test results are encapsulated and reported. This invention can reduce costs and increase efficiency, significantly reducing the use of frequency standard comparators, improving frequency testing efficiency within the same time range, and meeting the different needs of small-batch trial production and large-scale mass production.

Description

Technical Field

[0001] This invention belongs to the field of electronic signal measurement technology, specifically relating to a frequency standard test expansion card for a frequency standard comparator and the corresponding test method. Background Technology

[0002] In industries such as defense, astronomy, physics, communications, aerospace, and instrumentation, products that generate frequency signals often require testing of their output frequency drift characteristics after manufacturing. This is due to inherent deviations in the internal physical systems of the products and varying timekeeping performance caused by different application environments, in order to screen out qualified timekeeping products. The frequency drift rate is calculated from the relative average frequency deviation between the output frequency signal of the product under test and the reference standard frequency signal, and the testing instrument used to test the relative average frequency deviation is called a frequency standard comparator.

[0003] Frequency standard comparators are divided into single-channel and multi-channel frequency standard comparators. Currently, domestic frequency standard comparators mainly include the XHTF3596K series from Chengdu Tian'ao Electronics Co., Ltd., the SYN5609 from Xi'an Tongbu Electronics, the P07D-2 series from Shijiazhuang Shuying Instruments, and the TD-45 series from Beijing Tiandou Technology Co., Ltd. Foreign products mainly include the 3120A series from Microsemi (USA), the VCH-315 series from VREMYA-CH (Russia), and the A7 series from Quartzlock (UK).

[0004] Currently, single-channel frequency standard comparators can only test one product at a time, while multi-channel frequency standard comparators can test multiple products simultaneously. However, due to limitations in portability, signal interference, heat dissipation, test accuracy, manufacturing difficulty, and cost, they are categorized by the number of channels tested simultaneously: 1, 3, 8, 10, and 16 inputs. Models with 10 inputs (such as the XHTF3596K series frequency standard comparators from Chengdu Tian'ao Electronics Co., Ltd.) are the most common. Regardless of whether a single-channel or multi-channel frequency standard comparator is used, mass production testing requires numerous test stations, frequency standard comparators, and corresponding host computer software, all of which consume significant product development and testing costs.

[0005] Furthermore, during the testing of frequency drift rate using a frequency standard comparator, due to the characteristics of frequency drift rate, the accuracy of calculation, and the requirements for confidence level, the collected frequency deviation data should be accumulated for a natural duration of more than 7 days. Simultaneously, based on the characteristics of frequency drift rate calculation and the principle of maximizing data sampling accuracy while minimizing data volume, the data sampling interval of the frequency standard comparator is generally set to 100 seconds, assuming uninterrupted frequency signal input (under the same test duration, a smaller sampling interval results in more data). The data is then processed and calculated by the host computer software to obtain the frequency drift rate. During this time, the frequency standard comparator experiences a certain degree of hardware resource idleness (the frequency standard comparator's test data feedback only occupies less than 1 second, so it spends most of its time in a waiting state). In mass production testing, the more frequency standard comparators used, the more accumulated idle resources there will be, which is inconsistent with the company's operating principles of cost reduction, efficiency improvement, and low-carbon emissions reduction. Summary of the Invention

[0006] The purpose of this invention is to provide a frequency standard test expansion card for a frequency standard comparator, which can simultaneously receive frequency signals from multiple products under test, output only the selected frequency signal at any given time, and send it to the frequency standard comparator for frequency standard comparison testing. By reducing the data sampling time interval of the frequency standard comparator, the number of frequency standard comparators used can be reduced by a factor of two within the same test duration, without affecting the final test results. It features low cost and high reliability.

[0007] Another objective of this invention is to provide a testing method that uses the frequency standard test expansion card of the aforementioned frequency standard comparator. This method enables automated control of large-scale testing, solves the problems of repetitive manual labor and low efficiency, and further improves the efficiency of automated testing.

[0008] To achieve the above objectives, the technical solution adopted by this invention is as follows:

[0009] A frequency standard test expansion card for a frequency standard comparator includes an instruction control module, a signal processing module, a communication interface module, and a signal interface module;

[0010] The signal processing module includes N signal processing sub-modules, each of which includes a sub-controller, a frequency conversion circuit, and a shunt switch module; N ≥ 2; the shunt switch module includes a multi-to-one shunt switch.

[0011] The frequency conversion signal output terminal and the channel switching signal output terminal of the instruction control module are connected to the input terminals of each sub-controller of the signal processing module. The instruction control module sends instructions to each sub-controller, and the sub-controller further sends instructions to the corresponding frequency conversion circuit and shunt switch module. The frequency conversion circuit and shunt switch module execute the frequency conversion command and the switch switching command according to the received instructions.

[0012] The input terminal of the signal processing module receives external signals through the signal receiving terminal of the signal interface module, and the signal output terminal of the signal interface module is connected to the signal input terminal of the external frequency standard comparator. The frequency conversion circuit converts the signal received from the signal receiving terminal of the signal interface module. The shunt switch selects one of the multiple signals after frequency conversion and sends it to the external frequency standard comparator through the signal output terminal of the signal interface module.

[0013] The instruction control module communicates with the external frequency standard comparator and the host computer through the communication interface module. The instruction control module obtains the test results from the frequency standard comparator through the communication interface module, encapsulates them into a test result data packet, and then sends the encapsulated test result data packet to the host computer through the communication interface module.

[0014] As a constraint, N=10; the branch circuit breaker is a 10-to-1 branch circuit breaker.

[0015] As a second limitation, the instruction control module also includes a communication signal light for indicating whether the connection with the frequency standard comparator is successful.

[0016] As a further limitation of the signal processing module, the signal processing module also includes ten instruction indicator lights for indicating the selection numbers of all branch switch signals.

[0017] A testing method, implemented using a frequency standard test expansion card of the aforementioned frequency standard comparator, includes the following steps performed sequentially:

[0018] S1. Power on, initialize;

[0019] S2. Self-test of each module and hardware;

[0020] S3. Start the signal processing module;

[0021] S4, Start command control module;

[0022] S5. The frequency conversion circuit in the signal processing module is set through the instruction control module, and the output frequency of the frequency conversion circuit is set to a preset value.

[0023] S6. Configure the branch switches in the signal processing module through the instruction control module;

[0024] S7. Perform the following two operations.

[0025] a. Each branch switch sends the selected frequency signal to the external frequency standard comparator through the signal output terminal of the signal interface module at the set time interval until the entire test process is completed.

[0026] b. Data processing

[0027] b1. The command control module periodically sends test result query commands to the frequency standard comparator through the communication interface module.

[0028] b2. Determine whether to switch the switch. If yes, proceed to step S6. Otherwise, repeat step b until the entire test process ends.

[0029] In the above process, after the instruction control module sends the test result query instruction to the frequency standard comparator for the first time through the communication interface module, if the instruction control module receives the test result returned by the frequency standard comparator through the communication interface module during the execution of step S6 or S7, it enters the interrupt routine P.

[0030] The interrupt routine P proceeds in the following order:

[0031] P1, the instruction control module performs signal transition processing on the received test results, and then encapsulates them into a test result data packet;

[0032] P2. The test result data packet is sent to the host computer through the communication interface module, and then the process returns to the steps before the interruption to continue execution.

[0033] As a limitation, after completing step S4 and before executing step S5, the instruction control module performs the following steps:

[0034] T41. Check if the communication between the instruction control module and the frequency standard comparator is normal. If it is, set the sampling time interval of the frequency standard comparator and then execute step T42. Otherwise, execute step T42 directly.

[0035] T42. Set the communication signal light to the corresponding state, and then proceed to step S5.

[0036] As a further limitation, step S6 includes the following steps performed sequentially:

[0037] S61. Set the branch switch switching sequence number to order; order∈[1,10], and the initial value is 1;

[0038] S62. Set the branch switch number to no, no∈[1,10], and the initial value is 1;

[0039] S63. Set the branch switch with number no to switch to the order branch;

[0040] S64. Determine whether the branch switch number no is equal to 10. If yes, proceed to step S65. Otherwise, increment the branch switch number no by 1 and return to step S63.

[0041] S65. Set the initial data processing start time and data processing end time;

[0042] S66. Determine whether the current time has reached the set value A from the start time of data processing. If yes, proceed to step S67; otherwise, re-execute step S66.

[0043] S67. Proceed to step S7.

[0044] As a further limitation of step S7, in step S7, before the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module each time, step S71 is executed first, and after the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module each time, step S72 is executed.

[0045] S71. Determine whether the time elapsed between the current time and the end time of data processing has reached the set value A. If so, send a query command for the test result to the frequency standard comparator through the communication interface module; otherwise, continue to execute step S71.

[0046] S72. Update the data processing end time to the current time;

[0047] The method for determining whether the switch needs to be switched in step S7 is executed in the following order:

[0048] S73. Determine whether the current time has reached the set value B from the start time of data processing. If yes, proceed to step S74; otherwise, re-enter step S7.

[0049] S74. Determine if the branch switch sequence number order is equal to 10. If it is, set order to 1 and return to step S61. Otherwise, increment order by 1 and return to step S61.

[0050] Where B > A.

[0051] As a further definition of the test result data packet, the data in the test result data packet includes the branch switch number (no), the branch switch switching sequence number (order), and the test result.

[0052] As a further limitation of step S61, in step S61, after setting the switching sequence number of the branch switch to order, the corresponding instruction signal light is set.

[0053] The present invention, by adopting the above-described technical solution, achieves the following technical advancements compared to existing technologies:

[0054] (1) The present invention can simultaneously access the frequency signals of multiple products under test, output only the selected frequency signal at the same time, and connect the output frequency signal to the frequency standard comparator for frequency standard comparison test. By reducing the data sampling time interval of the frequency standard comparator, it ensures that the number of frequency standard comparators used is reduced by a factor of two within the same test duration, without affecting the final test result. It has the characteristics of low cost and high reliability.

[0055] (2) This invention uses a frequency conversion circuit and a 10-to-1 splitter as the basis, combined with data processing, to select and output 10 of the 100 input frequency signals. An external instrument frequency standard comparator is used to test the frequency deviation of the frequency signals, and the test results are obtained at regular intervals. After signal transition processing and data packet encapsulation, the test efficiency within the same time range is improved.

[0056] (3) The frequency test expansion card provided by the present invention is simple to use and requires no additional configuration. It runs fully automatically, reducing the overall hardware investment cost. It introduces an automated switching switch and a method for obtaining test results, realizing automated control of large-scale testing, solving the problems of repetitive labor and low efficiency, and further improving the efficiency of automated testing.

[0057] (4) This invention can meet the different needs of small-batch trial production and large-batch mass production;

[0058] (5) Because the 10-to-1 switch will cause a frequency signal jump (less than 3 seconds) when switching signals, the present invention calls the data processing module branch program to process the signal jump when the data returned by the frequency standard comparator is received after the switch switching is completed, so as to avoid reporting abnormal data packets and thus affecting the final test results.

[0059] (6) The present invention is equipped with ten instruction indicator lights for indicating the signal selection number of all branch switches, which can intuitively display the selected signal output sequence number of all branch switches, which is helpful for staff to understand the working status of the frequency standard test expansion card, troubleshoot in time, and improve the testing efficiency.

[0060] (7) The present invention includes a communication signal light for indicating whether the connection with the frequency standard comparator is successful. It can intuitively display the connection status of the current frequency standard test expansion card and the frequency standard comparator, which is conducive to the staff to understand the hardware and software status in a timely manner and improves the ease of use of the device.

[0061] This invention belongs to the field of electronic signal measurement technology and can improve the efficiency of automated testing. Attached Figure Description

[0062] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof.

[0063] In the attached diagram:

[0064] Figure 1 This is a hardware principle block diagram of Embodiment 1 of the present invention;

[0065] Figure 2 This is the overall flowchart of Embodiment 2 of the present invention;

[0066] Figure 3 This is a flowchart illustrating some of the steps in Embodiment 2 of the present invention;

[0067] Figure 4 This is a comparison diagram of the timing diagrams of signals received using the time-frequency standard comparator of Example 2 and those not using Example 2. Detailed Implementation

[0068] The preferred embodiments of the present invention will now be described with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustrative and explanatory purposes only and are not intended to limit the scope of the invention.

[0069] Example 1: A frequency standard test expansion card for a frequency standard comparator

[0070] like Figure 1 As shown, this embodiment includes an instruction control module, a signal processing module, a communication interface module, and a signal interface module.

[0071] The signal processing module includes 10 signal processing sub-modules, each comprising a sub-controller, a frequency conversion circuit, and a branch switch module. The branch switch module includes a 10-to-1 branch switch. The signal processing module also includes ten LED indicator lights to show the selected signal number for each branch switch. The command control module includes an LED communication indicator light to show whether the connection with the frequency standard comparator is successful.

[0072] The frequency conversion signal output terminal and channel switching signal output terminal of the instruction control module are connected to the input terminals of each sub-controller of the signal processing module. The instruction control module sends instructions to each sub-controller, and the sub-controller further sends instructions to the corresponding frequency conversion circuit and shunt switch module. The frequency conversion circuit executes the frequency conversion command according to the received instruction, and the shunt switch module executes the switch switching command according to the received instruction and sets the corresponding LED instruction signal light status.

[0073] The input terminal of the frequency conversion circuit in the signal processing module is connected to the signal input terminal of the signal interface module. The signal output terminal after selection by the shunting switch is the signal output terminal of the signal interface module, which is then connected to the signal input terminal of the external frequency standard comparator. The multiple frequency signals to be tested pass through the signal interface input terminal and reach the frequency conversion circuit. After the frequency signals are converted into signals at the specified frequency points, they reach the shunting switch, which selects the output. Finally, the output terminal of the signal interface module is sent to the external frequency standard comparator.

[0074] The instruction control module also communicates with an external frequency standard comparator and a host computer through a communication interface module. The instruction control module obtains test results from the frequency standard comparator through the communication interface module, performs signal transition processing, encapsulates the results into a test result data packet, and finally sends the result data packet to the host computer through the communication interface module.

[0075] In this embodiment, the communication interface module uses two RS232 communication interfaces to communicate with the external frequency standard comparator and the host computer respectively; the signal interface module has 100 SMA interface signal input terminals and 10 SMA interface signal output terminals; the core circuit of the instruction control module uses the commercially available ARM microcontroller STM32F407; the signal processing module uses a Si5351 frequency conversion chip to build a frequency conversion circuit, an xc7s25 chip to build a 10-to-1 splitter switch, and an SGM48751 chip to build a sub-controller.

[0076] In this embodiment, the frequency conversion circuit is built upon a chip with frequency conversion capabilities, enabling it to convert measured frequency signals at different frequencies into frequency signals supported by an external frequency standard comparator. The shunt switch consists of ten 10-to-1 shunt switches, each selecting one of the ten input frequency signals and outputting only one signal, with the switching function executed by the sub-controller. All ten shunt switches are in the same switching sequence number at the same time. The signal processing module also includes ten LED command indicator lights, each corresponding one-to-one with the switching sequence number of the shunt switches.

[0077] The communication interface module is used to communicate with the frequency standard comparator and the host computer respectively, to perform necessary data exchanges, thereby acquiring and reporting the final test results. The signal interface module is used for the transmission of the frequency signal under test.

[0078] The instruction control module is the core control module of this embodiment. It stores relevant instructions for communication with the frequency standard comparator, communication with the host computer, and internal program control. These instructions include setting the test sampling time of the frequency standard comparator, obtaining the frequency difference test results of the frequency standard comparator, returning the current switch sequence number and the corresponding frequency difference test results, performing switch switching on the control branch switch, controlling the frequency conversion circuit to perform frequency conversion, and controlling the status of the corresponding LED instruction signal lights. It also serves as the core of the operation and control of the frequency standard test expansion card.

[0079] The frequency test expansion card provided in this embodiment is simple to use and requires no additional configuration. It operates fully automatically, reducing the overall hardware investment cost. By introducing an automated switching switch and a method for obtaining test results, it enables automated control of large-scale testing, solving the problems of repetitive manual labor and low efficiency, and further improving the efficiency of automated testing.

[0080] Example 2: A Test Method

[0081] This embodiment is implemented using Embodiment 1, such as... Figure 2 As shown, this embodiment includes the following steps performed sequentially:

[0082] S1. Power on, initialize;

[0083] S2. Self-test of each module and hardware;

[0084] S3. Start the signal processing module;

[0085] S4, Start command control module;

[0086] S5. The frequency conversion circuit in the signal processing module is set through the instruction control module, and the output frequency of the frequency conversion circuit is set to a preset value, which is positively correlated with the input frequency value of the frequency standard comparator.

[0087] S6. Configure the branch switches in the signal processing module through the instruction control module;

[0088] S7. Perform the following two operations;

[0089] a. Each branch switch sends the selected frequency signal to the external frequency standard comparator through the signal output terminal of the signal interface module at the set time interval until the entire test process is completed.

[0090] b. Data processing

[0091] b1. The command control module periodically sends test result query commands to the frequency standard comparator through the communication interface module.

[0092] b2. Determine whether to switch the switch. If yes, proceed to step S6. Otherwise, repeat step b until the entire test process ends.

[0093] In the above process, after the instruction control module sends the test result query instruction to the frequency standard comparator for the first time through the communication interface module, if the instruction control module receives the test result returned by the frequency standard comparator through the communication interface module during the execution of step S6 or S7, it enters the interrupt routine P.

[0094] The interrupt routine P proceeds in the following order:

[0095] P1, the instruction control module performs signal transition processing on the received test results, and then encapsulates them into a test result data packet;

[0096] P2. The test result data packet is sent to the host computer through the communication interface module, and then the process returns to the steps before the interruption to continue execution.

[0097] like Figure 3 As shown, after completing step S4 and before executing step S5, the instruction control module performs the following steps:

[0098] T41. Check if the communication between the instruction control module and the frequency standard comparator is normal. If it is, set the sampling time interval of the frequency standard comparator and then execute step T42. Otherwise, execute step T42 directly.

[0099] T42. Set the communication signal light to the corresponding state, and then proceed to step S5.

[0100] As a further limitation, step S6 includes the following steps performed sequentially:

[0101] S61. Set the branch switch switching sequence number to order, and set the corresponding signal indicator; order∈[1,10], and the initial value is 1;

[0102] S62. Set the branch switch number to no, no∈[1,10], and the initial value is 1;

[0103] S63. Set the branch switch with number no to switch to the order branch;

[0104] S64. Determine if the branch switch number no is equal to 10. If yes, proceed to step S65. Otherwise, increment the branch switch number no by 1 and return to step S63.

[0105] S65. Set the initial data processing start time start_time and the data processing end time end_time;

[0106] S66. Determine whether the current time has reached the set value A from the data processing start time start_time. If yes, proceed to step S67; otherwise, re-execute step S66.

[0107] S67. Proceed to step S7.

[0108] like Figure 3 As shown, in step S7, before the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module each time, step S71 is executed first, and after the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module each time, step S72 is executed.

[0109] S71. Determine whether the time elapsed between the current time and the end time of data processing has reached the set value A. If so, send a query command for the test result to the frequency standard comparator through the communication interface module; otherwise, continue to execute step S71.

[0110] S72. Update the data processing end time (end_time) to the current time.

[0111] The method for determining whether the switch needs to be switched in step S7 is executed in the following order:

[0112] S73. Determine whether the current time has reached the set value B from the data processing start time start_time. If yes, proceed to step S74; otherwise, re-enter step S7.

[0113] S74. Determine if the branch switch sequence number order is equal to 10. If it is, set order to 1 and return to step S61. Otherwise, increment order by 1 and return to step S61.

[0114] Where B > A.

[0115] In this embodiment, the data in the test result data packet includes the branch switch number no, the branch switch switching sequence number order, and the test result.

[0116] In this embodiment, A = 1 second and B = 10 seconds.

[0117] The test method of this embodiment is compared with the prior art, and the test parameters and results are shown in Table 1 below:

[0118]

[0119] The daily drift rate calculations in Table 1 were all performed using the Stable32 software tool commonly used in the time-frequency domain, and screenshots were taken. Through testing and verification, this embodiment is applicable to products with a daily drift rate ≥ 1E-12.

[0120] During testing, all six products under test simultaneously output two 10MHz frequency signals. The first frequency signal from each product under test was sent directly to frequency standard comparator A without passing through the frequency standard test expansion card, and connected to interfaces 1-6 respectively. The second frequency signal from each product under test used the frequency standard test expansion card, and after passing through the expansion card, was sent to frequency standard comparator B, connected only to interface 1. Simultaneously, the corresponding host computer software was started for data acquisition. The test lasted approximately 9 days.

[0121] Combined with Table 1 and Figure 4 The test results show that when testing the daily drift rate of products with a daily drift rate ≥1E-12, using the frequency standard test expansion card provided in Example 1 and the test method of this example can greatly save the hardware expenditure of the frequency standard comparator without affecting the final index.

[0122] As can be seen, this embodiment converts 100 input frequency signals into 10 output frequency signals, sends them to a frequency standard comparator for testing, establishes a connection with the frequency standard comparator via a serial port, obtains the test results, and reports them. After a certain period of time, another 10 signals are automatically output, the results are obtained, and reported. This cycle continues, and finally, within the same test cycle, the testing efficiency is increased from only being able to test 100 signals to being able to test 100 signals, thus multiplying the testing efficiency.

[0123] This example uses an instruction control module to program-control all frequency conversion circuits, with the aim of converting input signals at different frequencies into frequency signals (typically 10MHz) that can be used by the frequency standard comparator, thereby further expanding the applicability of the frequency standard test expansion card in Example 1.

[0124] In this embodiment, the instruction control module automates the control of each branch switch. After power-on initialization, all branch switches are switched to channel 1 by default. After a specified duration (default: 10 seconds), all switches switch to channel 2, and so on, until channel 10 runs for a specified duration, at which point they switch back to channel 1. Because switching causes frequency signal jumps (less than 3 seconds), the data processing branch of the instruction control module handles these jumps to ensure the final test results are unaffected.

[0125] This embodiment uses a mature, reliable, and stable ARM microcontroller, frequency conversion chip, branch switch, signal interface, and communication interface as its foundation. Combined with necessary operation control and data processing, it cyclically selects and outputs 10 frequency signals from 100 input frequency signals. An external frequency standard comparator is used to test the frequency deviation of the signals, and the test results are acquired periodically. After secondary data encapsulation, the results are reported. Without using the frequency standard test expansion card of this embodiment, testing 100 frequency signals for one week would require 10 frequency standard comparators. Using the frequency standard test expansion card of Embodiment 1, combined with the method provided in this embodiment, testing 100 frequency signals for one week only requires one frequency standard comparator, significantly reducing hardware costs and improving testing efficiency within the same time frame.

Claims

1. A frequency standard test expansion card for a frequency standard comparator, characterized in that, It includes an instruction control module, a signal processing module, a communication interface module, and a signal interface module; The signal processing module includes N signal processing sub-modules, each of which includes a sub-controller, a frequency conversion circuit, and a shunt switch module; N ≥ 2; the shunt switch module includes a multi-to-one shunt switch. The frequency conversion signal output terminal and the channel switching signal output terminal of the instruction control module are connected to the input terminals of each sub-controller of the signal processing module. The instruction control module sends instructions to each sub-controller, and the sub-controller further sends instructions to the corresponding frequency conversion circuit and shunt switch module. The frequency conversion circuit and shunt switch module execute the frequency conversion command and the switch switching command according to the received instructions. The input terminal of the signal processing module receives external signals through the signal receiving terminal of the signal interface module, and the signal output terminal of the signal interface module is connected to the signal input terminal of the external frequency standard comparator. The frequency conversion circuit converts the signal received from the signal receiving terminal of the signal interface module. The shunt switch selects one of the multiple signals after frequency conversion and sends it to the external frequency standard comparator through the signal output terminal of the signal interface module. The instruction control module communicates with the external frequency standard comparator and the host computer through the communication interface module. The instruction control module obtains the test results from the frequency standard comparator through the communication interface module, encapsulates them into a test result data packet, and then sends the encapsulated test result data packet to the host computer through the communication interface module.

2. The frequency standard test expansion card of the frequency standard comparator according to claim 1, characterized in that, N=10; the branch circuit breaker adopts a 10-to-1 branch circuit breaker.

3. The frequency standard test expansion card of the frequency standard comparator according to claim 1, characterized in that, The instruction control module also includes a communication signal light to indicate whether the connection with the frequency standard comparator is successful.

4. The frequency standard test expansion card of the frequency standard comparator according to claim 2, characterized in that, The signal processing module also includes ten instruction indicator lights for indicating the selection number of all branch switch signals.

5. A testing method, implemented using a frequency standard test expansion card of a frequency standard comparator as described in any one of claims 1-4, characterized in that, The testing method includes the following steps performed sequentially: S1. Power on, initialize; S2. Self-test of each module and hardware; S3. Start the signal processing module; S4, Start command control module; S5. The frequency conversion circuit in the signal processing module is set through the instruction control module, and the output frequency of the frequency conversion circuit is set to a preset value. S6. Configure the branch switches in the signal processing module through the instruction control module; S7. Perform the following two operations. a. Each branch switch sends the selected frequency signal to the external frequency standard comparator through the signal output terminal of the signal interface module at the set time interval until the entire test process is completed. b. Data processing b1. The command control module periodically sends test result query commands to the frequency standard comparator through the communication interface module. b2. Determine whether to switch the switch. If yes, proceed to step S6. Otherwise, repeat step b until the entire test process ends. In the above process, after the instruction control module sends the test result query instruction to the frequency standard comparator for the first time through the communication interface module, if the instruction control module receives the test result returned by the frequency standard comparator through the communication interface module during the execution of step S6 or S7, it enters the interrupt routine P. The interrupt routine P proceeds in the following order: P1, the instruction control module performs signal transition processing on the received test results, and then encapsulates them into a test result data packet; P2. The test result data packet is sent to the host computer through the communication interface module, and then the process returns to the steps before the interruption to continue execution.

6. The test method according to claim 5, wherein the instruction control module further includes a communication signal light for indicating whether the connection with the frequency standard comparator is successful, characterized in that, After completing step S4 and before executing step S5, the instruction control module performs the following steps: T41. Check if the communication between the instruction control module and the frequency standard comparator is normal. If it is, set the sampling time interval of the frequency standard comparator and then execute step T42. Otherwise, execute step T42 directly. T42. Set the communication signal light to the corresponding state, and then proceed to step S5.

7. The test method according to claim 5, wherein the signal processing module comprises ten signal processing sub-modules; the shunt switch is a ten-to-one shunt switch, characterized in that, Step S6 includes the following steps performed sequentially: S61. Set the branch switch switching sequence number to order; order∈[1,10], and the initial value is 1; S62. Set the branch switch number to no, no∈[1,10], and the initial value is 1; S63. Set the branch switch with number no to switch to the order branch; S64. Determine whether the branch switch number no is equal to 10. If yes, proceed to step S65. Otherwise, increment the branch switch number no by 1 and return to step S63. S65. Set the initial data processing start time and data processing end time; S66. Determine whether the current time has reached the set value A from the start time of data processing. If yes, proceed to step S67; otherwise, re-execute step S66. S67. Proceed to step S7.

8. The test method according to claim 7, characterized in that, In step S7, before the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module, step S71 is executed first, and after the instruction control module sends a query instruction for the test result to the frequency standard comparator through the communication interface module, step S72 is executed. S71. Determine whether the time elapsed between the current time and the end time of data processing has reached the set value A. If so, send a query command for the test result to the frequency standard comparator through the communication interface module; otherwise, continue to execute step S71. S72. Update the data processing end time to the current time; The method for determining whether the switch needs to be switched in step S7 is executed in the following order: S73. Determine whether the current time has reached the set value B from the start time of data processing. If yes, proceed to step S74; otherwise, re-enter step S7. S74. Determine if the branch switch sequence number order is equal to 10. If it is, set order to 1 and return to step S61. Otherwise, increment order by 1 and return to step S61. Where B > A.

9. The test method according to claim 7 or 8, characterized in that, The data in the test result data packet includes the branch switch number (no), the branch switch switching sequence number (order), and the test result.

10. The test method according to claim 7 or 8, wherein the signal processing module further comprises ten instruction indicator lights for indicating the selection numbers of all branch switch signals, characterized in that, In step S61, after setting the branch switch switching sequence number to order, the corresponding instruction signal light is set.

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