Display substrate, preparation method thereof and display device

Abstract

A display substrate includes a substrate and a plurality of sub-pixels disposed on the substrate. At least one sub-pixel comprises a light-transmitting area and a display area. The display area comprises a circuit structure layer and a light-emitting element which are arranged on the substrate, and the light-emitting element is connected with the circuit structure layer. The display substrate further comprises a plurality of insulating layers arranged on the substrate, and at least one insulating layer is hollowed out in the light-transmitting area.

Description

[0001] This application is a divisional application of an application with an application date of March 16, 2021, application number 202110281712.5, and invention name “Display substrate, preparation method thereof, and display device”. Technical Field

[0002] This article relates to but is not limited to the field of display technology, and in particular to a display substrate and a preparation method thereof, and a display device. Background Art

[0003] Transparent displays refer to displays that have a certain degree of light transmittance, which allows users to see both the image displayed on the display and the information behind the display. Currently, transparent displays have been widely used in display windows, transparent TVs, vehicles, virtual reality (VR), augmented reality (AR) and other fields. Summary of the invention

[0004] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0005] Embodiments of the present disclosure provide a display substrate and a method for preparing the same, and a display device.

[0006] On the one hand, an embodiment of the present disclosure provides a display substrate, comprising: a substrate and a plurality of sub-pixels arranged on the substrate. At least one sub-pixel includes a light-transmitting area and a display area. The display area includes: a circuit structure layer and a light-emitting element arranged on the substrate; the light-emitting element is connected to the circuit structure layer. The display substrate also includes a plurality of insulating layers arranged on the substrate, at least one insulating layer being hollowed out in the light-transmitting area.

[0007] In some exemplary embodiments, the plurality of insulating layers include: at least one organic insulating layer and a plurality of inorganic insulating layers; at least one organic insulating layer is hollowed out in the light-transmitting region, or at least one inorganic insulating layer is hollowed out in the light-transmitting region.

[0008] In some exemplary embodiments, the light-transmitting region is provided with a plurality of insulating layers, and an absolute value of a refractive index difference between adjacent insulating layers in the plurality of insulating layers is less than or equal to 0.5.

[0009] In some exemplary embodiments, the display area further includes at least one of the following: a first anti-reflection layer located on a side of the circuit structure layer close to the substrate, and a second anti-reflection layer located on a side of the circuit structure layer away from the substrate.

[0010] In some exemplary embodiments, the circuit structure layer includes: a first conductive layer, a semiconductor layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer disposed on the substrate. The plurality of insulating layers include: a first insulating layer between the substrate and the first conductive layer, a second insulating layer between the first conductive layer and the semiconductor layer, a third insulating layer between the semiconductor layer and the second conductive layer, a fourth insulating layer between the second conductive layer and the third conductive layer, a fifth insulating layer between the third conductive layer and the fourth conductive layer, a sixth insulating layer and a seventh insulating layer between the fourth conductive layer and the fifth conductive layer, and an eighth insulating layer and a ninth insulating layer between the fifth conductive layer and the second anti-reflection layer. The first to fifth insulating layers, the seventh insulating layer, and the eighth insulating layer are inorganic insulating layers; the sixth insulating layer and the ninth insulating layer are organic insulating layers.

[0011] In some exemplary embodiments, the first anti-reflection layer and the first conductive layer are an integral structure.

[0012] In some exemplary embodiments, an orthographic projection of the first anti-reflection layer on the substrate at least includes an orthographic projection of the fifth conductive layer on the substrate.

[0013] In some exemplary embodiments, a reflectivity of a surface of the first anti-reflection layer facing the substrate is at least lower than a reflectivity of a surface of the fifth conductive layer facing the substrate.

[0014] In some exemplary embodiments, the reflectivity of the material of the first anti-reflection layer is lower than the reflectivity of the material of the fifth conductive layer.

[0015] In some exemplary embodiments, an orthographic projection of the second anti-reflection layer on the substrate includes an area within the display region outside an overlapping area of ​​the light-emitting element and the fifth conductive layer on the substrate.

[0016] In some exemplary embodiments, the first insulating layer adopts a stacked structure of SiNx and SiOx, the material of the second insulating layer is SiOx, the third insulating layer adopts a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the fifth insulating layer adopts a stacked structure of SiOx and SiNx, and the materials of the seventh and eighth insulating layers are SiNx. Alternatively, the material of the first insulating layer is SiOx, the material of the second insulating layer is SiOx, the third insulating layer adopts a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the material of the fifth insulating layer is SiNx, and the materials of the seventh and eighth insulating layers are SiNx.

[0017] In some exemplary embodiments, the first insulating layer and the fifth insulating layer are hollowed out in the light-transmitting area; or, the first insulating layer to the ninth insulating layer are hollowed out in the light-transmitting area; or, the sixth insulating layer and the ninth insulating layer are hollowed out in the light-transmitting area; or, only the sixth insulating layer and the ninth insulating layer are provided in the light-transmitting area.

[0018] In some exemplary embodiments, the display substrate further comprises: an anti-reflection layer located on a side of the substrate away from the sub-pixel; an orthographic projection of the anti-reflection layer on the substrate covers the light-transmitting area and the display area.

[0019] On the other hand, an embodiment of the present disclosure provides a display device, including the display substrate as described above.

[0020] On the other hand, an embodiment of the present disclosure provides a method for preparing a display substrate, which is used to prepare the display substrate as described above, the preparation method comprising: forming a plurality of sub-pixels on a substrate, at least one sub-pixel comprising a light-transmitting area and a display area; the display area comprising: a circuit structure layer and a light-emitting element arranged on the substrate, the light-emitting element being connected to the circuit structure layer; the display area is also provided with a plurality of insulating layers, and at least one insulating layer is hollowed out in the light-transmitting area.

[0021] In some exemplary embodiments, forming a plurality of sub-pixels on a substrate includes: sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer, and a ninth insulating layer on the substrate. The semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer are located in the display area; and the sixth insulating layer and the ninth insulating layer are hollowed out in the light-transmitting area.

[0022] In some exemplary embodiments, forming a plurality of sub-pixels on the substrate further comprises: removing the first insulating layer in the light-transmitting area before forming the second insulating layer; and removing the fifth insulating layer in the light-transmitting area before forming the sixth insulating layer.

[0023] In some exemplary embodiments, forming a plurality of sub-pixels on the substrate further includes: after forming the eighth insulating layer, or after forming the ninth insulating layer, removing the first to fifth insulating layers, and the seventh and eighth insulating layers in the light-transmitting area.

[0024] In some exemplary embodiments, forming a plurality of sub-pixels on a substrate includes: sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer, and a ninth insulating layer on the substrate. The semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer are located in the display area. Before forming the sixth insulating layer, the first to fifth insulating layers in the light-transmitting area are removed, and before forming the ninth insulating layer, the seventh and eighth insulating layers in the light-transmitting area are removed.

[0025] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution of the present disclosure. The shape and size of one or more components in the accompanying drawings do not reflect the actual proportions and are only intended to illustrate the contents of the present disclosure.

[0027] Figure 1 is a plan view of an exemplary display substrate according to at least one embodiment of the present disclosure; Figure 2 is a schematic structural diagram of a display substrate according to at least one embodiment of the present disclosure; Figure 3 is another structural schematic diagram of a display substrate according to at least one embodiment of the present disclosure; Figure 4 is another structural schematic diagram of a display substrate according to at least one embodiment of the present disclosure; Figure 5 is another structural schematic diagram of a display substrate according to at least one embodiment of the present disclosure; Figure 6 is another structural schematic diagram of a display substrate according to at least one embodiment of the present disclosure; Figure 7 is a schematic diagram of a display device according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] The embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. The embodiments can be implemented in a plurality of different forms. A person skilled in the art can easily understand the fact that the method and content can be transformed into one or more forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other arbitrarily.

[0029] In the drawings, the size of one or more components, the thickness of a layer, or an area is sometimes exaggerated for the sake of clarity. Therefore, one embodiment of the present disclosure is not necessarily limited to the size, and the shape and size of each component in the drawings do not reflect the true proportion. In addition, the drawings schematically show ideal examples, and one embodiment of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0030] The ordinal numbers such as "first", "second", and "third" in the present disclosure are provided to avoid confusion of constituent elements, rather than to limit the quantity. The "plurality" in the present disclosure includes two and more than two.

[0031] In the present disclosure, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing the present specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which the constituent elements are described. Therefore, it is not limited to the words and phrases described in the specification, and can be appropriately replaced according to the situation.

[0032] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the meanings of the above terms in the present disclosure can be understood according to the circumstances.

[0033] In the present disclosure, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, a drain region, or a drain electrode) and a source electrode (source electrode terminal, a source region, or a source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In the present disclosure, the channel region refers to the region where the current mainly flows. In the case of using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in the present disclosure, the "source electrode" and the "drain electrode" can be interchanged.

[0034] In the present disclosure, "electrical connection" includes the situation where components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having one or more functions.

[0035] In the present disclosure, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, a state where the angle is greater than -5° and less than 5° may be included. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, a state where the angle is greater than 85° and less than 95° may be included.

[0036] In the present disclosure, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film" in some cases. Similarly, "insulating film" may be replaced with "insulating layer" in some cases.

[0037] The terms “about” and “substantially” in the present disclosure do not strictly define the limits, but allow for a range of process and measurement errors.

[0038] In the present disclosure, “thickness” and “height” refer to the vertical distance between the surface of the film layer away from the substrate and the surface of the film layer close to the substrate.

[0039] At least one embodiment of the present disclosure provides a display substrate, comprising: a substrate and a plurality of sub-pixels arranged on the substrate. At least one sub-pixel includes a light-transmitting area and a display area. The display area includes: a circuit structure layer and a light-emitting element arranged on the substrate. The light-emitting element is connected to the circuit structure layer. The display substrate also includes a plurality of insulating layers arranged on the substrate, at least one insulating layer being hollowed out in the light-transmitting area. The display substrate provided in this embodiment has high display transmittance and display quality.

[0040] In some exemplary embodiments, the light-emitting element may be a micro-light-emitting element, for example, a micro-light-emitting diode (Micro-LED) or a mini-diode (Mini-LED). Micro-LED technology, i.e., LED (Light Emitting Diode) miniaturization and matrix technology, refers to the integration of a high-density, micro-sized LED array on a chip. Among them, each LED can be addressed and driven to light up individually, and the pixel distance between two adjacent LEDs can be reduced from the millimeter level to the micron level, thereby improving the display effect. Micro-LED has the characteristics of self-luminous display, as well as the advantages of being all-solid-state, long life, high brightness, low power consumption, small size, ultra-high resolution, and can be applied to extreme environments such as high temperature or radiation. This exemplary embodiment uses micro-light-emitting elements to increase the service life of the display substrate and achieve better display quality.

[0041] In some exemplary embodiments, the plurality of insulating layers include: at least one organic insulating layer and a plurality of inorganic insulating layers. At least one organic insulating layer is hollowed out in the light-transmitting area, or at least one inorganic insulating layer is hollowed out in the light-transmitting area. In some examples, an inorganic insulating layer is provided in the light-transmitting area, and all organic insulating layers are hollowed out in the light-transmitting area; or, an organic insulating layer is provided in the light-transmitting area, and all inorganic insulating layers are hollowed out in the light-transmitting area. In this example, the orthographic projection of at least one insulating layer on the substrate does not overlap with the light-transmitting area. However, this embodiment is not limited to this. In this exemplary embodiment, the transmittance of the light-transmitting area can be improved by hollowing out at least a portion of the insulating layer in the light-transmitting area.

[0042] In some exemplary embodiments, the light-transmitting region is provided with a plurality of insulating layers, and the absolute value of the refractive index difference between adjacent insulating layers in the plurality of insulating layers is less than or equal to 0.5. In this exemplary embodiment, by setting the refractive index of the insulating layers in the light-transmitting region to be equivalent, it is beneficial to improve the transmittance of the light-transmitting region.

[0043] In some exemplary embodiments, the display area further includes at least one of the following: a first anti-reflection layer located on a side of the circuit structure layer close to the substrate, and a second anti-reflection layer located on a side of the circuit structure layer away from the substrate. For example, the display area may only be provided with the first anti-reflection layer or the second anti-reflection layer, or the display area may use two anti-reflection layers. However, this embodiment is not limited to this. In this exemplary embodiment, by providing an anti-reflection layer in the display area, the reflection effect of the metal in the circuit structure layer can be prevented, thereby improving the display effect.

[0044] In some exemplary embodiments, the circuit structure layer includes: a first conductive layer, a semiconductor layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer sequentially arranged on a substrate. The plurality of insulating layers include: a first insulating layer between the substrate and the first conductive layer, a second insulating layer between the first conductive layer and the semiconductor layer, a third insulating layer between the semiconductor layer and the second conductive layer, a fourth insulating layer between the second conductive layer and the third conductive layer, a fifth insulating layer between the third conductive layer and the fourth conductive layer, a sixth insulating layer and a seventh insulating layer between the fourth conductive layer and the fifth conductive layer, and an eighth insulating layer and a ninth insulating layer between the fifth conductive layer and the second anti-reflection layer. Among them, the first insulating layer to the fifth insulating layer, the seventh insulating layer, and the eighth insulating layer are inorganic insulating layers; the sixth insulating layer and the ninth insulating layer are organic insulating layers. In this exemplary embodiment, the transistor in the light-emitting drive circuit included in the circuit structure layer may be a dual-gate transistor. However, this embodiment is not limited to this. For example, the transistor in the light-emitting drive circuit may adopt a single-gate structure.

[0045] In some exemplary embodiments, the first anti-reflection layer and the first conductive layer are an integrated structure. However, this embodiment is not limited to this. For example, the first anti-reflection layer can be located on a side of the first conductive layer close to the substrate.

[0046] In some exemplary embodiments, the orthographic projection of the first anti-reflection layer on the substrate includes at least the orthographic projection of the fifth conductive layer on the substrate. In some examples, the material of the fifth conductive layer is metal copper (Cu). This exemplary embodiment can avoid the reflection effect of the fifth conductive layer, thereby improving the display effect. However, this embodiment is not limited to this. For example, the orthographic projection of the first anti-reflection layer on the substrate includes the orthographic projections of the first conductive layer to the fifth conductive layer on the substrate.

[0047] In some exemplary embodiments, the reflectivity of the surface of the first anti-reflection layer facing the substrate is at least lower than the reflectivity of the surface of the fifth conductive layer facing the substrate. This exemplary embodiment can achieve an anti-reflection effect close to the side of the substrate. However, this embodiment is not limited to this. For example, the reflectivity of the surface of the first anti-reflection layer facing the substrate can be lower than the reflectivity of the surfaces of the first conductive layer to the fifth conductive layer facing the substrate.

[0048] In some exemplary embodiments, the reflectivity of the material of the first anti-reflection layer is less than the reflectivity of the material of the fifth conductive layer. In this exemplary embodiment, the first anti-reflection layer can effectively achieve an anti-reflection effect on the fifth conductive layer by using a material with a lower reflectivity, thereby improving the display effect. Moreover, the first anti-reflection layer of this exemplary embodiment does not need to add a surface treatment process, and is easy to implement. However, this embodiment is not limited to this. For example, the reflectivity of the material of the first anti-reflection layer is less than the reflectivity of the materials of the first conductive layer to the fifth conductive layer.

[0049] In some exemplary embodiments, the orthographic projection of the second anti-reflection layer on the substrate includes an area within the display area outside the overlapping area of ​​the light-emitting element and the fifth conductive layer on the substrate. The second anti-reflection layer in this exemplary embodiment can prevent the reflection effect of the fifth conductive layer and prevent light mixing between adjacent light-emitting elements, thereby improving the display effect.

[0050] In some exemplary embodiments, the first insulating layer adopts a stacked structure of silicon nitride (SiNx) and silicon oxide (SiOx), the material of the second insulating layer is SiOx, the third insulating layer adopts a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the fifth insulating layer adopts a stacked structure of SiOx and SiNx, and the materials of the seventh and eighth insulating layers are SiNx. Alternatively, the material of the first insulating layer is SiOx, the material of the second insulating layer is SiOx, the third insulating layer adopts a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the material of the fifth insulating layer is SiNx, and the materials of the seventh and eighth insulating layers are SiNx. However, this embodiment is not limited to this.

[0051] The solution of this embodiment is illustrated below through multiple examples.

[0052] Figure 1 FIG. 1 is a plan view of a display substrate according to at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 1As shown, the display substrate includes a substrate and a plurality of sub-pixels arranged on the substrate. At least one sub-pixel includes a light-transmitting area 20 and a display area 10. Among them, the external ambient light can pass through the light-transmitting area 20, and the external ambient light cannot pass through the display area 10. This embodiment does not limit the area size of the light-transmitting area 20 and the display area 10 in the sub-pixel. In some examples, the area of ​​the light-transmitting area 20 in the sub-pixel can be larger than the area of ​​the display area 10. For example, the area of ​​the light-transmitting area 20 in the sub-pixel can be 1 to 3 times, such as 1.5 times, the area of ​​the display area 10. The larger the area of ​​the light-transmitting area 20, the greater the transmittance of the display substrate, and the clearer the image seen through the display substrate. In some examples, the total area of ​​the light-transmitting area 20 of the display substrate can account for more than 45% of the total area of ​​the display substrate, for example, it can be about 48.5%, 79.3%, 82.1% or 85%. However, this embodiment is not limited to this. In some examples, the area ratio of the light-transmitting area can be set according to actual application requirements.

[0053] Figure 2 The present invention is a schematic structural diagram of a display substrate according to at least one embodiment of the present invention. Figure 2 FIG. 4 is a cross-sectional structure of a sub-pixel. In some exemplary embodiments, Figure 2 As shown, in a plane perpendicular to the display substrate, the display area 10 includes a first anti-reflection layer, a circuit structure layer, a second anti-reflection layer, a light-emitting element, and a covering layer 400 arranged on a substrate 101. In this example, the light-emitting element is a micro-light-emitting element, such as a Micro-LED. The circuit structure layer includes at least a light-emitting drive circuit. The light-emitting drive circuit is connected to the micro-light-emitting element. The light-emitting drive circuit may include a plurality of transistors and at least one capacitor. For example, the light-emitting drive circuit may be designed as 8T2C (i.e., eight transistors and two capacitors) or 13T1C (i.e., thirteen transistors and one capacitor). Figure 2A first transistor T1 and a first capacitor C1 are used as examples for illustration. The circuit structure layers of the display area 10 include: a first conductive layer, a semiconductor layer, a second conductive layer, a third conductive layer, a fourth conductive layer and a fifth conductive layer sequentially arranged on the substrate 101. The semiconductor layer at least includes: a first active layer 120; the first conductive layer at least includes: a first gate electrode 111; the second conductive layer at least includes: a second gate electrode 121 and a first capacitor electrode 122; the third conductive layer at least includes: a second capacitor electrode 123; the fourth conductive layer at least includes: a first source electrode 124 and a first drain electrode 125; the fifth conductive layer at least includes: a connecting electrode 126, a common electrode line 127 and a signal line 128 (for example, a power line VDD). The first active layer 120, the first gate electrode 111, the second gate electrode 121, the first source electrode 124 and the first drain electrode 125 constitute the first transistor T1, and the first capacitor electrode 122 and the second capacitor electrode 123 constitute the first capacitor C1. In this example, the first transistor T1 is a dual-gate transistor, and the first gate electrode 111 is connected to the second gate electrode 121. The dual-gate transistor can enhance the driving capability, improve the current saturation of the micro-luminescent element, and prevent and reduce the occurrence of leakage current. However, this embodiment is not limited to this.

[0054] In some exemplary embodiments, Figure 2 As shown, the micro-luminescent element may include: a light-emitting portion 300, a first electrode 301 and a second electrode 302 connected to the light-emitting portion 300. The first electrode 301 is connected to the first end of the light-emitting portion 300, and the second electrode 302 is connected to the second end of the light-emitting portion 300. In some examples, the first electrode 301 of the micro-luminescent element may be an anode, and the second electrode 302 may be a cathode. The first electrode 301 may be connected to the first drain electrode 125 of the first transistor T1 through the connecting electrode 126, and the second electrode 302 of the micro-luminescent element may be connected to the common electrode line 127. However, this embodiment is not limited to this.

[0055] In some exemplary embodiments, Figure 2As shown, the first anti-reflection layer and the first conductive layer are an integral structure. In this example, in addition to serving as the gate electrode of the transistor, the first gate electrode 111 is also configured to prevent the reflection effect of the remaining conductive layers. In some examples, the orthographic projection of the first anti-reflection layer on the substrate 101 may include the orthographic projection of the fifth conductive layer on the substrate 101. The reflectivity of the surface of the first anti-reflection layer facing the substrate 101 may be less than the reflectivity of the surface of the fifth conductive layer facing the substrate 101, so as to achieve an anti-reflection effect on the side close to the substrate 101. However, this embodiment is not limited to this. In some examples, the reflectivity of the surface of the first anti-reflection layer facing the substrate 101 and the surface away from the substrate 101 may be less than the reflectivity of the surface of the fifth conductive layer facing the substrate 101, so as to achieve an anti-reflection effect on the side close to the substrate 101. In some examples, the orthographic projection of the first anti-reflection layer on the substrate 101 can cover the orthographic projections of the second conductive layer, the third conductive layer, the fourth conductive layer and the fifth conductive layer on the substrate 101, and the surface reflectivity of the first anti-reflection layer toward the substrate 101 is not greater than the surface reflectivity of the remaining conductive layers (including the second conductive layer, the third conductive layer, the fourth conductive layer and the fifth conductive layer) toward the substrate 101, so as to achieve an anti-reflection effect for multiple conductive layers, thereby improving the display effect.

[0056] In some exemplary embodiments, the reflectivity of the material of the first anti-reflection layer is at least less than the reflectivity of the material of the fifth conductive layer to achieve an anti-reflection effect, and there is no need to add a surface treatment process for the first anti-reflection layer, which is easy to achieve. However, this embodiment is not limited to this. For example, the orthographic projection of the first anti-reflection layer on the substrate 101 can cover the orthographic projections of the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer on the substrate 101, and the reflectivity of the first anti-reflection layer is not greater than the reflectivity of the remaining conductive layers (including the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer) to achieve an anti-reflection effect for multiple conductive layers, thereby improving the display effect.

[0057] In some exemplary embodiments, Figure 2As shown, a first insulating layer 201 is disposed between the substrate 10 and the first conductive layer, a second insulating layer 202 is disposed between the first conductive layer and the semiconductor layer, a third insulating layer 203 is disposed between the semiconductor layer and the second conductive layer, a fourth insulating layer 204 is disposed between the second conductive layer and the third conductive layer, a fifth insulating layer 205 is disposed between the third conductive layer and the fourth conductive layer, a sixth insulating layer 206 and a seventh insulating layer 207 are disposed between the fourth conductive layer and the fifth conductive layer, and an eighth insulating layer 208 and a ninth insulating layer 209 are disposed between the fifth conductive layer and the second anti-reflection layer 131. In some examples, the first insulating layer 201 to the fifth insulating layer 205, the seventh insulating layer 207 and the eighth insulating layer 208 may be transparent inorganic insulating layers, and the sixth insulating layer 206 and the ninth insulating layer 209 may be transparent organic insulating layers. However, this embodiment is not limited thereto.

[0058] In some exemplary embodiments, Figure 2 As shown, the second anti-reflection layer 131 may be a black matrix (BM) and is located on the side of the ninth insulating layer 209 away from the substrate 101. The orthographic projection of the second anti-reflection layer 131 on the substrate 101 partially overlaps with the orthographic projection of the fifth conductive layer on the substrate 101. The second anti-reflection layer 131 covers part of the fifth conductive layer to prevent the reflection effect of the fifth conductive layer. Moreover, the second anti-reflection layer can prevent light color mixing between adjacent micro-light-emitting elements.

[0059] In some exemplary embodiments, Figure 2 As shown, in a plane perpendicular to the display substrate, the light-transmitting area 20 includes: a substrate 101, and a first insulating layer 201, a second insulating layer 202, a third insulating layer 203, a fourth insulating layer 204, a fifth insulating layer 205, a seventh insulating layer 207, an eighth insulating layer 208 and a cover layer 400 sequentially arranged on the substrate 101. The sixth insulating layer 206 and the ninth insulating layer 209 are hollowed out in the light-transmitting area 20 at 209 to improve the transmittance of the light-transmitting area 20. In this example, the orthographic projection of the sixth insulating layer 206 on the substrate 101 does not overlap with the light-transmitting area 20, and the orthographic projection of the ninth insulating layer 209 on the substrate 101 does not overlap with the light-transmitting area 20.

[0060] The following is an exemplary explanation through the preparation process of the display substrate. The "composition process" or "patterning process" mentioned in the present disclosure includes processes such as coating photoresist, mask exposure, development, etching, and stripping photoresist for metal materials, inorganic materials, or transparent conductive materials, and includes processes such as coating organic materials, mask exposure, and development for organic materials. Deposition can be any one or more of sputtering, evaporation, and chemical vapor deposition, coating can be any one or more of spraying, spin coating, and inkjet printing, and etching can be any one or more of dry etching and wet etching, which are not limited in the present disclosure. "Thin film" refers to a layer of thin film made of a certain material on a substrate by deposition, coating or other processes. If the "thin film" does not require a patterning process during the entire production process, the "thin film" can also be called a "layer". If the "thin film" requires a patterning process during the entire production process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern".

[0061] The "A and B are arranged in the same layer" mentioned in the present disclosure means that A and B are formed simultaneously through the same patterning process, and the "thickness" of the film layer is the size of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiments of the present disclosure, "the orthographic projection of A includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0062] In some exemplary embodiments, a process of preparing a display substrate may include the following operations.

[0063] (1) Prepare a first insulating layer on a substrate.

[0064] In some exemplary embodiments, the substrate 101 may be a rigid substrate, such as a glass substrate or a quartz substrate, or may be a flexible substrate, such as an organic resin substrate. In some examples, the substrate 101 may be a glass substrate, and the thickness may be about 0.5 millimeters (mm). However, this embodiment is not limited to this.

[0065] In some exemplary embodiments, a first insulating film is deposited on the substrate 101 to form the first insulating layer 201. Figure 2As shown, the first insulating layer 201 is formed in the display area 10 and the light-transmitting area 20. The first insulating layer 201 can be called a buffer layer, which can improve the water and oxygen resistance of the substrate 101. The first insulating layer 201 can be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and can be a single layer, a multilayer, or a composite layer. For example, the first insulating layer 201 can be a stacked structure of SiNx and SiOx (for example, SiO2), wherein the thickness of SiNx is about 500 angstroms and the thickness of SiOx is about 3000 angstroms. However, this embodiment is not limited to this.

[0066] (2) Prepare the first conductive layer.

[0067] In some exemplary embodiments, a first conductive film is deposited on the substrate 101 having the aforementioned structure, and the first conductive film is patterned by a patterning process to form a first conductive layer in the display area 10. Figure 2 As shown, the first conductive layer at least includes: a first gate electrode 111. After this patterning process, the film structure of the light-transmitting region 20 does not change.

[0068] In some exemplary embodiments, the first conductive layer may be made of a metal material, for example, any one or more of aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and may be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo. In some examples, the material of the first conductive layer may be molybdenum (Mo), and the thickness may be about 500 angstroms. However, this embodiment is not limited to this.

[0069] In this exemplary embodiment, the first conductive layer also serves as a first anti-reflection layer, which can avoid the reflection effect of multiple conductive layers in the display substrate and play a role in preventing reflection to improve the display effect.

[0070] (3) Prepare the second insulating layer and the semiconductor layer in sequence.

[0071] In some exemplary embodiments, a second insulating film and a semiconductor film are sequentially deposited on the substrate 101 having the aforementioned structure, and the semiconductor film is patterned by a patterning process to form a second insulating layer 202 and a semiconductor layer in the display area 10. Figure 2 As shown, the semiconductor layer at least includes: a first active layer 120. The orthographic projection of the first active layer 120 on the substrate 101 overlaps with the orthographic projection of the first gate electrode 111 on the substrate 101. After this patterning process, the light-transmitting region 20 includes the substrate 101, and the first insulating layer 201 and the second insulating layer 202 sequentially disposed on the substrate 101.

[0072] In some exemplary embodiments, the second insulating layer 202 may be referred to as a buffer layer. The second insulating layer 202 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the material of the second insulating layer 202 may be SiOx, and the thickness may be about 1200 angstroms. However, this embodiment is not limited thereto.

[0073] In some exemplary embodiments, the semiconductor layer may be made of one or more materials such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), sexithiophene, polythiophene, etc., that is, the present disclosure is applicable to transistors manufactured based on oxide technology, silicon technology, and organic technology. For example, the material of the semiconductor layer may be polycrystalline silicon (p-Si), and the thickness may be about 470 angstroms. However, this embodiment is not limited to this.

[0074] (4) Prepare the third insulating layer and the second conductive layer in sequence.

[0075] In some exemplary embodiments, a third insulating film is deposited on the substrate 101 having the aforementioned structure, and the third insulating film is patterned by a patterning process to form a third insulating layer 203 covering the semiconductor layer. Figure 2 As shown, the third insulating layer 203 is provided with a plurality of first through holes in the display area 10 , and the second insulating layer 202 and the third insulating layer 203 in the plurality of first through holes are etched away to expose the surface of the first conductive layer.

[0076] In some exemplary embodiments, a second conductive film is deposited on the substrate 101 having the aforementioned structure, and the second conductive film is patterned by a patterning process to form a second conductive layer in the display area 10. Figure 2 As shown, the second conductive layer at least includes: a second gate electrode 121 and a first capacitor electrode 122. The orthographic projection of the second gate electrode 121 on the substrate 101 overlaps with the orthographic projection of the first active layer 120 on the substrate 101, and the orthographic projection of the second gate electrode 121 on the substrate 101 overlaps with the orthographic projection of the first gate electrode 111 on the substrate 101. The second gate electrode 121 can be electrically connected to the first gate electrode 111 through the first through hole.

[0077] After this patterning process, the light-transmitting region 20 includes a substrate 101 , and a first insulating layer 201 , a second insulating layer 202 , and a third insulating layer 203 sequentially disposed on the substrate 101 .

[0078] In some exemplary embodiments, the third insulating layer 203 may be referred to as a gate insulating (GI) layer. The third insulating layer 203 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the material of the third insulating layer 203 may be a stacked structure of SiOx and SiNx, wherein the thickness of SiOx is about 800 angstroms, and the thickness of SiNx is about 400 angstroms. However, this embodiment is not limited thereto.

[0079] In some exemplary embodiments, the second conductive layer may be made of a metal material, for example, any one or more of aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and may be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo. In some examples, the material of the second conductive layer may be molybdenum (Mo), and the thickness may be about 3100 angstroms. However, this embodiment is not limited to this.

[0080] (5) Prepare the fourth insulating layer and the third conductive layer in sequence.

[0081] In some exemplary embodiments, a fourth insulating film and a third conductive film are sequentially deposited on the substrate 101 having the aforementioned structure, and the third conductive film is patterned by a patterning process to form a fourth insulating layer 204 and a third conductive layer. Figure 2 As shown, the third conductive layer is formed in the display area 10, and at least includes: a second capacitor electrode 123. The orthographic projection of the second capacitor electrode 123 on the substrate 101 overlaps with the orthographic projection of the first capacitor electrode 122 on the substrate 101. After this patterning process, the light-transmitting area 20 includes the substrate 101, and the first insulating layer 201, the second insulating layer 202, the third insulating layer 203 and the fourth insulating layer 204 sequentially arranged on the substrate 101.

[0082] In some exemplary embodiments, the fourth insulating layer 204 may be referred to as a gate insulating layer. The fourth insulating layer 204 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the material of the fourth insulating layer 204 may be SiNx, and the thickness may be about 1400 angstroms. However, this embodiment is not limited thereto.

[0083] In some exemplary embodiments, the third conductive layer may be made of a metal material, for example, any one or more of aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure, such as Mo / Cu / Mo. In some examples, the material of the third conductive layer may be molybdenum (Mo), and the thickness may be about 3100 angstroms. In this example, the materials of the first conductive layer, the second conductive layer, and the third conductive layer may be the same. However, this embodiment is not limited to this.

[0084] (6) Prepare the fifth insulating layer and the fourth conductive layer in sequence.

[0085] In some exemplary embodiments, a fifth insulating film is deposited on the substrate 101 having the aforementioned structure, and the fifth insulating film is patterned by a patterning process to form a fifth insulating layer 205. Figure 2 As shown, the fifth insulating layer 205 is provided with a plurality of second through holes in the display area 10 , and the fifth insulating layer 205 , the fourth insulating layer 204 and the third insulating layer 203 in the plurality of second through holes are etched away to expose the surface of the semiconductor layer.

[0086] In some exemplary embodiments, a fourth conductive film is deposited on the substrate 101 having the aforementioned structure, and the fourth conductive film is patterned by a patterning process to form a fourth conductive layer in the display area 10. Figure 2 As shown, the fourth conductive layer at least includes: a first source electrode 124 and a first drain electrode 125. The first source electrode 124 is connected to one end of the first active layer 120 through a second through hole, and the first drain electrode 125 is connected to the other end of the first active layer 120 through a second through hole.

[0087] After this patterning process, the light-transmitting region 20 includes the substrate 101 , and the first insulating layer 201 , the second insulating layer 202 , the third insulating layer 203 , the fourth insulating layer 204 and the fifth insulating layer 205 sequentially disposed on the substrate 101 .

[0088] In some exemplary embodiments, the fifth insulating layer 205 may be referred to as an interlayer insulating layer. The fifth insulating layer 205 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the fifth insulating layer 205 may be a stacked structure of SiOx and SiNx, wherein the thickness of SiOx is about 2000 angstroms, and the thickness of SiNx is about 3000 angstroms. However, this embodiment is not limited thereto.

[0089] In some exemplary embodiments, the fourth conductive layer may be made of a metal material, for example, any one or more of aluminum (Al), molybdenum (Mo) and titanium (Ti), or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and may be a single-layer structure or a multi-layer composite structure. In some examples, the fourth conductive layer may be a multi-layer composite structure of Ti / Al / Ti, wherein the thickness of Ti is about 500 angstroms and the thickness of Al is about 6500 angstroms. However, this embodiment is not limited to this.

[0090] At this point, a light emitting control circuit is formed on the substrate 101. Figure 2 As shown, in the display area 10, the first active layer 120, the first gate electrode 111, the second gate electrode 121, the first source electrode 124 and the first drain electrode 125 constitute a first transistor T1, and the first capacitor electrode 122 and the second capacitor electrode 123 constitute a first capacitor C1.

[0091] (7) Prepare the sixth insulating layer.

[0092] In some exemplary embodiments, a sixth insulating film is coated on the substrate 101 having the aforementioned structure, and the sixth insulating film is patterned by a patterning process to form a sixth insulating layer 206 in the display area 10. Figure 2 As shown, a plurality of third through holes are formed on the sixth insulating layer 206, and the sixth insulating layer 206 in the plurality of third through holes is removed to expose the surface of the fourth conductive layer. After this patterning process, the film structure of the light-transmitting area 20 does not change. In this example, the sixth insulating layer 206 is hollowed out in the light-transmitting area 20. The orthographic projection of the sixth insulating layer 206 on the substrate 101 does not overlap with the light-transmitting area 20.

[0093] In some exemplary embodiments, the sixth insulating layer 206 may be referred to as a planarization (PLN) layer. The sixth insulating layer 206 may be made of an organic insulating material. For example, the sixth insulating layer 206 is made of a resin material, and the thickness of the sixth insulating layer 206 is about 2 um. However, this embodiment is not limited thereto.

[0094] (8) Prepare the seventh insulating layer.

[0095] In some exemplary embodiments, a seventh insulating film is deposited on the substrate 101 having the aforementioned structure, and the seventh insulating film is patterned by a patterning process to form a seventh insulating layer 207. Figure 2As shown, the seventh insulating layer 207 is provided with a plurality of fourth through holes and a plurality of first exhaust holes in the display area 10. The orthographic projection of the fourth through hole on the substrate 101 is located within the orthographic projection of the third through hole on the substrate 101. The seventh insulating layer 207 in the fourth through hole is removed, and the fourth through hole is connected to the third through hole, exposing the surface of the fourth conductive layer. The seventh insulating layer 207 in the first exhaust hole is etched away, exposing the surface of the sixth insulating layer 206. During the preparation process of the seventh insulating layer 207, the sixth insulating layer 206 is easily released a large amount of gas (outgas) under high temperature, and these gases can be discharged through the first exhaust hole to prevent the seventh insulating layer 207 from bursting.

[0096] After this patterning process, the light-transmitting region 20 includes: a substrate 101 , and a first insulating layer 201 , a second insulating layer 202 , a third insulating layer 203 , a fourth insulating layer 204 , a fifth insulating layer 205 and a seventh insulating layer 207 sequentially disposed on the substrate 101 .

[0097] In some exemplary embodiments, the seventh insulating layer 207 may be referred to as a passivation (PVX) layer. The seventh insulating layer 207 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the material of the seventh insulating layer 207 may be SiNx, and the thickness may be about 2000 angstroms. However, this embodiment is not limited thereto.

[0098] (9) Prepare the fifth conductive layer.

[0099] In some exemplary embodiments, on the substrate 101 having the aforementioned structure, a fifth conductive layer is formed in the display area 10 by an electroplating addition method. Figure 2 As shown, the fifth conductive layer at least includes: a connecting electrode 126, a common electrode line 127 and a signal line 128 (eg, a power line VDD). The connecting electrode 126 is connected to the first drain electrode 125 of the first transistor T1 through a fourth through hole. After this process, the film structure of the light-transmitting region 20 remains unchanged.

[0100] In some exemplary embodiments, the fifth conductive layer may be made of a metal material, such as copper (Cu), and may have a thickness of about 10 um. However, this embodiment is not limited thereto.

[0101] (10) Prepare the eighth insulating layer.

[0102] In some exemplary embodiments, an eighth insulating film is deposited on the substrate 101 having the aforementioned structure, and the eighth insulating film is patterned by a patterning process to form an eighth insulating layer 208. Figure 2As shown, the eighth insulating layer 208 is formed with a plurality of second exhaust holes in the display area 10. The eighth insulating layer 208 in the second exhaust holes is etched away, and the second exhaust holes are connected to the first exhaust holes, exposing the surface of the sixth insulating layer 206. During the preparation of the eighth insulating layer 208, the sixth insulating layer 206 is easily exposed to high temperatures and releases a large amount of gas (outgas), which can be discharged through the first exhaust holes and the second exhaust holes to prevent the seventh insulating layer 207 and the eighth insulating layer 208 from bursting.

[0103] After this patterning process, the light-transmitting region 20 includes: a substrate 101 , and a first insulating layer 201 , a second insulating layer 202 , a third insulating layer 203 , a fourth insulating layer 204 , a fifth insulating layer 205 , a seventh insulating layer 207 and an eighth insulating layer 208 sequentially disposed on the substrate 101 .

[0104] In some exemplary embodiments, the eighth insulating layer 208 may be referred to as a passivation layer. The eighth insulating layer 208 may be a combination of any one or more of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. For example, the material of the eighth insulating layer 208 may be SiNx, and the thickness may be about 2000 angstroms. However, this embodiment is not limited thereto.

[0105] (11) Prepare a ninth insulating layer.

[0106] In some exemplary embodiments, a ninth insulating film is coated on the substrate 101 having the aforementioned structure, and the ninth insulating film is patterned by a patterning process to form a ninth insulating layer 209 in the display area 10. Figure 2 As shown, a plurality of fifth through holes are opened on the ninth insulating layer 209. The ninth insulating layer 209 in the plurality of fifth through holes is removed, exposing the surface of the eighth insulating layer 208. After this patterning process, the film structure of the light-transmitting area 20 does not change. In this example, the ninth insulating layer 209 is hollowed out in the light-transmitting area 20. The orthographic projection of the ninth insulating layer 209 on the substrate 101 does not overlap with the light-transmitting area 20.

[0107] In some exemplary embodiments, the ninth insulating layer 209 may be referred to as a planarization layer. The ninth insulating layer 209 may be made of an organic insulating material. For example, the ninth insulating layer 209 may be made of a resin material, and the thickness may be greater than or equal to 2 um. The thickness of the ninth insulating layer 209 may be determined according to the thickness of the fifth conductive layer, the height of the micro-light-emitting element, etc. However, this embodiment is not limited to this.

[0108] (12) Prepare a second anti-reflection layer.

[0109] In some exemplary embodiments, a black pigment is coated or a black chromium (Cr) film is deposited on the substrate 101 forming the aforementioned structure, and the black pigment or the black chromium film is patterned by a patterning process to form a second anti-reflection layer 131. In this example, the second anti-reflection layer 131 can be called a black matrix. The black matrix can absorb the light from the micro-luminescent element to the side close to the substrate 101 (for example, including light vertically downward and obliquely downward), which can prevent the light from affecting the performance of the transistor and prevent light crosstalk between adjacent micro-luminescent elements. In this exemplary embodiment, by providing a second anti-reflection layer, the reflection effect of multiple conductive layers can be avoided to improve the display effect.

[0110] After this patterning process, the film structure of the light-transmitting area 20 remains unchanged.

[0111] (13) Prepare the sixth through hole.

[0112] In some exemplary embodiments, on the substrate 101 having the aforementioned structure, the eighth insulating layer 208 is etched, and a plurality of sixth through holes are opened on the eighth insulating layer 208 of the display area 10. The orthographic projection of the sixth through hole on the substrate 101 is located within the orthographic projection of the fifth through hole of the ninth insulating layer 209 on the substrate 101. The sixth through hole is connected to the fifth through hole, and the eighth insulating layer 208 in the sixth through hole is etched away, exposing the surface of the fifth conductive layer.

[0113] After this process, the film structure of the light-transmitting area 20 remains unchanged.

[0114] (14) Transferring micro-luminescent elements.

[0115] In some exemplary embodiments, the micro-light-emitting element may be a Micro-LED. The micro-light-emitting element includes: a first electrode 301, a second electrode 302, and a light-emitting portion 300. The first electrode 301 is connected to the first end of the light-emitting portion 300, and the second electrode 302 is connected to the second end of the light-emitting portion 300. In some examples, the first electrode 301 may be an anode, and the second electrode 302 may be a cathode. However, this embodiment is not limited to this. In some examples, a binding material (such as solder paste) is added to the fifth through hole and the sixth through hole by a dispensing machine under a vacuum environment, and the binding of the micro-light-emitting element is completed by a transfer process. The first electrode 301 of the micro-light-emitting element is bound and connected to the connecting electrode 126 through the binding material in the fifth through hole and the sixth through hole, and the second electrode 302 is bound and connected to the common electrode line 127 through the binding material in the fifth through hole and the sixth through hole. In this way, the first electrode 301 of the micro-light-emitting element is connected to the first drain electrode 125 of the first transistor T1 through the connecting electrode 126, and the second electrode 302 is connected to the common electrode line 127.

[0116] After this process, the film structure of the light-transmitting area 20 remains unchanged.

[0117] (15) Preparing a covering layer on the substrate.

[0118] In some exemplary embodiments, a cover film is coated on the substrate 10 forming the aforementioned structure to form the cover layer 400. Figure 2 As shown, the cover layer 400 can cover the display area 10 and the light-transmitting area 20. After this process, the light-transmitting area 20 includes: a substrate 101, and a first insulating layer 201, a second insulating layer 202, a third insulating layer 203, a fourth insulating layer 204, a fifth insulating layer 205, a seventh insulating layer 207, an eighth insulating layer 208 and a cover layer 400 sequentially arranged on the substrate 101.

[0119] In some examples, the absolute value of the difference between the refractive index of the cover layer 400 and the refractive index of the substrate 101 may be, for example, less than 0.1. For example, the refractive index of the cover layer 400 is approximately equal to the refractive index of the substrate 101 to reduce transmittance loss. The thickness of the cover layer 400 in the light-transmitting area 20 and the display area 10 may be different. The thickness of the cover layer 400 may be determined based on the thickness of the fifth conductive layer, the height of the micro-luminescent element, etc. For example, the distance between the surface of the cover layer 400 away from the substrate 101 and the surface of the micro-luminescent element away from the substrate 101 may be greater than or equal to 2um. However, this embodiment is not limited to this.

[0120] In this exemplary embodiment, the cover layer 400 can be provided to encapsulate and protect the micro-light emitting element without reducing the light transmittance of the light emitted by the micro-light emitting element.

[0121] In some exemplary embodiments, taking the aperture ratio of the display substrate as about 87.8% as an example, the transmittance of the film layer of the display substrate prepared according to the above preparation process is about 78.6%, and the transmittance of the display substrate is about 69.01%. In this example, the opening area of ​​the display substrate is the area not covered by the black matrix, and the aperture ratio represents the area ratio of the opening area.

[0122] The structure of the display substrate of this exemplary embodiment and its preparation process are merely exemplary. In some exemplary embodiments, the corresponding structure can be changed and the patterning process can be increased or decreased according to actual needs. For example, the first anti-reflection layer can be located on the side of the first conductive layer close to the substrate. As another example, the transistor in the display area can adopt a single-gate structure. As another example, the common electrode line can be located in the fourth conductive layer and connected to the second pole of the micro-luminescent element through a connecting electrode. However, this embodiment is not limited to this.

[0123] The display substrate of this exemplary embodiment can improve the light transmittance and display effect through the film layer design of the light-transmitting area. Moreover, the preparation process of this exemplary embodiment can be realized by using the existing mature preparation equipment, with little improvement on the existing process, and can be well compatible with the existing preparation process. The process is simple to realize, easy to implement, high in production efficiency, low in production cost, and high in yield rate.

[0124] The structure (or method) described in this embodiment mode can be combined with the structure (or method) described in other embodiment modes as appropriate.

[0125] In some exemplary embodiments, it can be seen from Table 1 that among the materials used in the above-mentioned multiple insulating layers, SiNx has a larger refractive index, and the refractive indexes of the other materials are close. Assume that the refractive index of the first medium is n1, the refractive index of the second medium is n2, and the reflectivity of the light from the first medium to the second medium is Therefore, the direct contact interface between SiNx and SiOx has a greater influence on the transmittance.

[0126] Table 1 Refractive index of different materials Film Refractive Index Covering 1.47 Flat layer 1.52 SiOx 1.5 to 1.6 SiNx 1.8 to 2.0 Glass 1.52 In some exemplary embodiments, based on Figure 2 In the display substrate shown, the material of the first insulating layer 201 can be SiOx, and the thickness is about 3000 angstroms; the material of the fifth insulating layer 205 can be SiNx, and the thickness is about 3000 angstroms. The structure and materials of the remaining film layers can refer to the description of the previous embodiment, so they are not repeated here. In this exemplary embodiment, compared with the previous embodiment, the influence of the two refractive index mismatches caused by SiOx and SiNx is eliminated. In some examples, taking the aperture ratio of the display substrate as about 87.8% as an example, the transmittance of the film layer of the display substrate of this exemplary embodiment is about 87.31%, and the transmittance of the display substrate is about 76.66%. The display substrate of this exemplary embodiment can improve the transmittance.

[0127] The relevant structure of the display substrate of this embodiment can refer to the description of the above embodiment, so it will not be repeated here. The structure (or method) shown in this embodiment can be appropriately combined with the structure (or method) shown in other embodiments.

[0128] Figure 3 FIG. 1 is another schematic diagram of the structure of a display substrate according to at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 3As shown, in a plane perpendicular to the display substrate, the light-transmitting region 20 includes: a substrate 101, and a second insulating layer 202, a third insulating layer 203, a fourth insulating layer 204, a seventh insulating layer 207, an eighth insulating layer 208 and a cover layer 400 sequentially arranged on the substrate 101. In this example, the first insulating layer 201, the fifth insulating layer 205, the sixth insulating layer 206 and the ninth insulating layer 209 are hollowed out in the light-transmitting region 20.

[0129] In some exemplary embodiments, when the material of the first insulating layer is SiOx and the material of the fifth insulating layer is SiNx, the following problems may occur: the first insulating layer without SiNx cannot effectively prevent the diffusion of Na and K ions in the glass substrate 101 from affecting the crystals of excimer laser annealing (ELA), thereby deteriorating the characteristics of the thin film transistor (TFT); the fifth insulating layer without SiOx may affect the characteristics of the TFT, resulting in a positive bias in the bias voltage thermal stability (PBTS). In view of the above situation, in this exemplary embodiment, the first insulating layer 201 may adopt a stacked structure of SiNx and SiOx, and the fifth insulating layer 205 may adopt a stacked structure of SiOx and SiNx, and the first insulating layer 201 and the fifth insulating layer 205 may be hollowed out in the light-transmitting area 20. In this way, the first insulating layer 201 and the fifth insulating layer 205 may be prevented from affecting the characteristics of the TFT due to material reasons, and the transmittance of the light-transmitting area 20 may be improved.

[0130] In some exemplary embodiments, during the preparation of the display substrate of the present embodiment, after the first insulating film is deposited on the substrate 101, the first insulating film is patterned by a patterning process to form the first insulating layer 201. Figure 3 As shown, the first insulating layer 201 is hollowed out in the light-transmitting area 20. Before forming the sixth insulating layer 206, the fifth insulating layer 205 is etched to remove the fifth insulating layer 205 in the light-transmitting area 20, so that the fifth insulating layer 205 is hollowed out in the light-transmitting area 20. However, this embodiment is not limited to this.

[0131] The rest of the structure and preparation process of the display substrate of this embodiment can be referred to Figure 2 The structure (or method) shown in this embodiment can be appropriately combined with the structure (or method) shown in other embodiments.

[0132] Figure 4 FIG. 1 is another schematic diagram of the structure of a display substrate according to at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 4As shown, on a plane perpendicular to the display substrate, the light-transmitting area 20 includes: a substrate 101 and a cover layer 400 disposed on the substrate 101. The first insulating layer 201 to the ninth insulating layer 209 are all hollowed out in the light-transmitting area 20. The structure of the display area of ​​the display substrate of this exemplary embodiment can refer to Figure 2 The description of the embodiment shown is therefore not repeated here.

[0133] In some exemplary embodiments, during the preparation of the display substrate of the present embodiment, after the eighth insulating layer 208 is formed, all the inorganic insulating layers of the light-transmitting region 20 (including the first insulating layer 201 to the fifth insulating layer 205, the seventh insulating layer 207 and the eighth insulating layer 208) are removed by a single etching process. Alternatively, after the ninth insulating layer 209 is formed, all the inorganic insulating layers of the light-transmitting region 20 (including the first insulating layer 201 to the fifth insulating layer 205, the seventh insulating layer 207 and the eighth insulating layer 208) are removed by a single etching process. Alternatively, after the second anti-reflection layer 131 is formed, all the inorganic insulating layers of the light-transmitting region 20 (including the first insulating layer 201 to the fifth insulating layer 205, the seventh insulating layer 207 and the eighth insulating layer 208) are removed by a single etching process. However, the present embodiment is not limited thereto.

[0134] In some exemplary embodiments, taking the aperture ratio of the display substrate as about 87.8% as an example, the transmittance of the film layer of the display substrate of this exemplary embodiment is about 93.30%, and the transmittance of the display substrate is about 81.92%. The display substrate of this exemplary embodiment can improve the transmittance.

[0135] The rest of the structure and preparation process of the display substrate of this embodiment can be referred to Figure 2 The structure (or method) shown in this embodiment mode can be appropriately combined with the structure (or method) shown in other embodiments mode.

[0136] Figure 5 FIG. 1 is another schematic diagram of the structure of a display substrate according to at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 5 As shown, in a plane perpendicular to the display substrate, the light-transmitting area 20 includes: a substrate 101, a cover layer 400 disposed on the substrate 101, and an anti-reflection layer 500 disposed on a side of the substrate 101 away from the cover layer 400. The anti-reflection layer 500 is located on a side of the substrate 101 away from the sub-pixel. The orthographic projection of the anti-reflection layer 500 on the substrate 101 covers the light-transmitting area 20 and the display area 10. In some examples, the material of the anti-reflection layer 500 may be SiOx, for example, SiO2; the thickness of the anti-reflection layer 500 may be greater than or equal to 2000 angstroms. However, this embodiment is not limited to this.

[0137] In this exemplary embodiment, the transmittance can be further improved by disposing an anti-reflection layer 500 on the back surface of the substrate 101 .

[0138] The rest of the structure and preparation process of the display substrate of this embodiment can be referred to Figure 4 The structure (or method) shown in this embodiment mode can be appropriately combined with the structure (or method) shown in other embodiments mode.

[0139] Figure 6 FIG. 1 is another schematic diagram of the structure of a display substrate according to at least one embodiment of the present disclosure. In some exemplary embodiments, Figure 6 As shown, in a plane perpendicular to the display substrate, the light-transmitting area 20 includes: a substrate 101, a sixth insulating layer 206, a ninth insulating layer 209 and a covering layer 400 sequentially arranged on the substrate 101. In this example, the first insulating layer 201 to the fifth insulating layer 205, the seventh insulating layer 207 and the eighth insulating layer 208 are hollowed out in the light-transmitting area 20.

[0140] In this exemplary embodiment, by providing the sixth insulating layer 206 and the ninth insulating layer 209 in the light-transmitting region 20 , the risk of etching residue due to the high step difference after etching away all the inorganic insulating layers can be avoided, and the transmittance of the light-transmitting region can be ensured.

[0141] In some exemplary embodiments, during the preparation of the display substrate of the exemplary embodiment, after forming the fifth insulating layer 205, the inorganic insulating layer (including the first insulating layer 201 to the fifth insulating layer 205) of the light-transmitting area 20 is completely removed by a single etching process, that is, the second through hole is formed in the fifth insulating layer 205 of the display area 10 by step etching, and the inorganic insulating layer of the light-transmitting area 20 is hollowed out. Alternatively, during the formation of the fifth insulating layer 205, the second through hole is formed in the fifth insulating layer 205 of the display area 10 by a single etching process, and the inorganic insulating layer of the light-transmitting area 20 is completely hollowed out. During the formation of the sixth insulating layer 206, the sixth insulating layer 206 covers the display area 10 and the light-transmitting area 20 to avoid forming a high step difference in the light-transmitting area 20. During the formation of the eighth insulating layer 208, the fifth through hole is formed in the eighth insulating layer 208 of the display area 10, and then the seventh insulating layer 207 and the eighth insulating layer 208 of the light-transmitting area 20 are removed by a single etching process. Alternatively, during the formation of the eighth insulating layer 208, a fifth through hole is formed in the eighth insulating layer 208 of the display area 10 by a single etching process, and the seventh insulating layer 207 and the eighth insulating layer 208 of the light-transmitting area 20 are completely dug out. During the formation of the ninth insulating layer 209, the ninth insulating layer 209 covers the display area 10 and the light-transmitting area 20 to avoid forming a high step difference in the light-transmitting area 20. However, this embodiment is not limited to this.

[0142] The rest of the structure and preparation process of the display substrate of this embodiment can be referred to Figure 2 The structure (or method) shown in this embodiment can be appropriately combined with the structure (or method) shown in other embodiments.

[0143] At least one embodiment of the present disclosure provides a method for preparing a display substrate, which is used to prepare the display substrate as described above. The preparation method includes: forming a plurality of sub-pixels on a substrate. At least one sub-pixel includes a light-transmitting area and a display area. The display area includes: a circuit structure layer and a light-emitting element arranged on the substrate, and the light-emitting element is connected to the circuit structure layer. The display area is also provided with a plurality of insulating layers, and at least one insulating layer is hollowed out in the light-transmitting area.

[0144] In some exemplary embodiments, forming a plurality of sub-pixels on a substrate includes: sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer, and a ninth insulating layer on the substrate. The semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer are located in the display area. The sixth insulating layer and the ninth insulating layer are hollowed out in the light-transmitting area.

[0145] In some exemplary embodiments, forming a plurality of sub-pixels on the substrate further includes: removing the first insulating layer in the light-transmitting area before forming the second insulating layer; and removing the fifth insulating layer in the light-transmitting area before forming the sixth insulating layer.

[0146] In some exemplary embodiments, forming a plurality of sub-pixels on the substrate further includes: after forming the eighth insulating layer, or after forming the ninth insulating layer, removing the first to fifth insulating layers, and the seventh and eighth insulating layers in the light-transmitting area.

[0147] In some exemplary embodiments, forming a plurality of sub-pixels on a substrate includes: sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer, and a ninth insulating layer on the substrate. The semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer are located in the display area. Before forming the sixth insulating layer, the first to fifth insulating layers in the light-transmitting area are removed, and before forming the ninth insulating layer, the seventh and eighth insulating layers in the light-transmitting area are removed.

[0148] The preparation method of this embodiment can refer to the description of the aforementioned embodiment, so it will not be described again here.

[0149] Figure 7 FIG. 1 is a schematic diagram of a display device according to at least one embodiment of the present disclosure. Figure 7 As shown, this embodiment provides a display device 91, including: a display substrate 910. The display substrate 910 is the display substrate provided in the above embodiment. Among them, the display substrate 910 can be a Micro-LED display substrate or a Mini-LED display substrate. The display device 91 can be: a car window glass, a shopping mall cabinet, an augmented reality (AR, Augmented Reality) device, a virtual reality (VR, Virtual Reality) device, and any other product or component with a transparent display function. However, this embodiment is not limited to this.

[0150] The drawings in this disclosure only relate to the structures involved in this disclosure, and other structures may refer to the general design. In the absence of conflict, the embodiments of this disclosure and the features in the embodiments may be combined with each other to obtain new embodiments.

[0151] Those skilled in the art should understand that the technical solutions of the present disclosure may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present disclosure, and all should be included in the scope of the claims of the present disclosure.

Claims

1. A display substrate, characterized in that: include: A substrate and a plurality of sub-pixels disposed on the substrate; At least one sub-pixel among the plurality of sub-pixels comprises a light-transmitting area and a display area; The display area includes: a circuit structure layer and a light-emitting element arranged on the substrate; the light-emitting element is connected to the circuit structure layer; The display substrate further comprises a plurality of insulating layers disposed on the base, and at least one insulating layer among the plurality of insulating layers is hollowed out in the light-transmitting area; The circuit structure layer includes: a first conductive layer and a fifth conductive layer arranged on the substrate, the fifth conductive layer is arranged on a side of the first conductive layer away from the substrate, and the orthographic projection of the first conductive layer on the substrate at least includes the orthographic projection of the fifth conductive layer on the substrate; the material of the fifth conductive layer includes copper, and the reflectivity of the material of the first conductive layer is less than the reflectivity of the material of the fifth conductive layer.

2. The display substrate according to claim 1, characterized in that: The multiple insulating layers include: at least one organic insulating layer and multiple inorganic insulating layers; at least one organic insulating layer is hollowed out in the light-transmitting area, or at least one inorganic insulating layer is hollowed out in the light-transmitting area.

3. The display substrate according to claim 1, characterized in that: The light-transmitting area is provided with a plurality of insulating layers, and an absolute value of a refractive index difference between adjacent insulating layers in the plurality of insulating layers is less than or equal to 0.

5.

4. The display substrate according to claim 1, characterized in that: The display area further includes at least one of the following: a first anti-reflection layer located on a side of the circuit structure layer close to the substrate, and a second anti-reflection layer located on a side of the circuit structure layer away from the substrate.

5. The display substrate according to claim 4, characterized in that: The first anti-reflection layer and the first conductive layer are an integrated structure.

6. The display substrate according to claim 4, characterized in that: The orthographic projection of the second anti-reflection layer on the substrate includes an area within the display region outside an overlapping area of ​​the light-emitting element and the fifth conductive layer on the substrate.

7. The display substrate according to claim 4, characterized in that: The circuit structure layer further includes: a semiconductor layer, a second conductive layer, a third conductive layer and a fourth conductive layer arranged on the substrate; The plurality of insulating layers include: a second insulating layer located between the first conductive layer and the semiconductor layer, a third insulating layer located between the semiconductor layer and the second conductive layer, a fourth insulating layer located between the second conductive layer and the third conductive layer, a fifth insulating layer located between the third conductive layer and the fourth conductive layer, a sixth insulating layer and a seventh insulating layer located between the fourth conductive layer and the fifth conductive layer, and an eighth insulating layer and a ninth insulating layer located between the fifth conductive layer and the second anti-reflection layer; Among them, the second to fifth insulating layers, the seventh insulating layer and the eighth insulating layer are inorganic insulating layers; and the sixth insulating layer and the ninth insulating layer are organic insulating layers.

8. The display substrate according to claim 7, characterized in that: The material of the second insulating layer is SiOx, the third insulating layer is a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the fifth insulating layer is a stacked structure of SiOx and SiNx, and the material of the seventh insulating layer and the eighth insulating layer is SiNx; Alternatively, the material of the second insulating layer is SiOx, the third insulating layer adopts a stacked structure of SiOx and SiNx, the material of the fourth insulating layer is SiNx, the material of the fifth insulating layer is SiNx, and the material of the seventh insulating layer and the eighth insulating layer are SiNx.

9. The display substrate according to claim 7, characterized in that: The fifth insulating layer is hollowed out in the light-transmitting area; or the second to ninth insulating layers are hollowed out in the light-transmitting area; or the sixth insulating layer and the ninth insulating layer are hollowed out in the light-transmitting area; or only the sixth insulating layer and the ninth insulating layer are arranged in the light-transmitting area.

10. The display substrate according to claim 7, characterized in that: The multiple insulating layers also include: a first insulating layer located between the substrate and the first conductive layer, the first insulating layer being an inorganic insulating layer; the first insulating layer adopts a stacked structure of SiNx and SiOx, or the material of the first insulating layer is SiOx.

11. The display substrate according to claim 10, characterized in that: The first insulating layer is hollowed out in the light-transmitting area.

12. The display substrate according to claim 1, characterized in that: The display substrate further comprises: an anti-reflection layer located at a side of the substrate away from the sub-pixel; the orthographic projection of the anti-reflection layer on the substrate covers the light-transmitting area and the display area.

13. A display device, characterized in that: The display substrate comprises the display substrate as claimed in any one of claims 1 to 12.

14. A method for preparing a display substrate, characterized in that: A display substrate for preparing any one of claims 1 to 12, the preparation method comprising: forming a plurality of sub-pixels on a substrate, at least one of the plurality of sub-pixels comprising a light-transmitting area and a display area; the display area comprising: a circuit structure layer and a light-emitting element arranged on the substrate, the light-emitting element being connected to the circuit structure layer, the circuit structure layer comprising: a first conductive layer and a fifth conductive layer arranged on the substrate, the fifth conductive layer being arranged on a side of the first conductive layer away from the substrate, the orthographic projection of the first conductive layer on the substrate at least including the orthographic projection of the fifth conductive layer on the substrate, the material of the fifth conductive layer comprising copper, the reflectivity of the material of the first conductive layer being less than the reflectivity of the material of the fifth conductive layer; the display area is further provided with a plurality of insulating layers, at least one of the plurality of insulating layers being hollowed out in the light-transmitting area.

15. The preparation method according to claim 14, characterized in that: The method of forming a plurality of sub-pixels on a substrate comprises: sequentially forming a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer and a ninth insulating layer on the substrate; the semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer and the fifth conductive layer are located in the display area; the sixth insulating layer and the ninth insulating layer are hollowed out in the light-transmitting area.

16. The preparation method according to claim 15, characterized in that: The forming of a plurality of sub-pixels on the substrate further comprises: before forming the sixth insulating layer, removing the fifth insulating layer in the light-transmitting area.

17. The preparation method according to claim 15, characterized in that:The forming of a plurality of sub-pixels on the substrate further includes: after forming the eighth insulating layer, or after forming the ninth insulating layer, removing the second insulating layer to the fifth insulating layer, and the seventh insulating layer and the eighth insulating layer in the light-transmitting area.

18. The preparation method according to claim 14, characterized in that: The forming of a plurality of sub-pixels on the substrate comprises: sequentially forming a first conductive layer, a second insulating layer, a semiconductor layer, a third insulating layer, a second conductive layer, a fourth insulating layer, a third conductive layer, a fifth insulating layer, a fourth conductive layer, a sixth insulating layer, a seventh insulating layer, a fifth conductive layer, an eighth insulating layer and a ninth insulating layer on the substrate; the semiconductor layer, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer and the fifth conductive layer are located in the display area; Before forming the sixth insulating layer, the second to fifth insulating layers in the light-transmitting area are removed, and before forming the ninth insulating layer, the seventh and eighth insulating layers in the light-transmitting area are removed.

19. The preparation method according to any one of claims 15 to 18, characterized in that: The forming of a plurality of sub-pixels on the substrate further comprises: Before forming the first conductive layer, forming a first insulating layer on the substrate; Before forming the second insulating layer, the first insulating layer in the light-transmitting area is removed; or when removing the second to fifth insulating layers in the light-transmitting area, the first insulating layer in the light-transmitting area is removed.

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