A high-heat-dissipation sapphire-based heterojunction half-bridge device

By introducing trench regions and thermally conductive dielectric layers into sapphire-based gallium nitride devices, the problem of poor heat dissipation performance was solved, resulting in higher heat dissipation performance and a more compact structural design.

CN119133229BActive Publication Date: 2025-12-12SOUTHEAST UNIV +1
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Patent Information

Application Number
CN202411293152.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-09-14
Publication Date
2025-12-12
Estimated Expiration
2044-09-14

AI Technical Summary

Technical Problem

Sapphire-based gallium nitride devices have poor heat dissipation performance, which affects device performance and reliability.

Method used

In sapphire-based gallium nitride devices, a trench region is introduced between the low-sound and high-sound regions. A thermally conductive dielectric layer with high thermal conductivity, including Cu, Ag, SiC, or diamond, is placed in the trench region, and SiO2 or Si3N4 is placed in the insulating dielectric layer to form a compact heterojunction half-bridge structure.

Benefits of technology

The heat dissipation performance of the device has been improved, and the increased integration has resulted in a smaller footprint and a more compact structure for the half-bridge circuit.

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Abstract

The application discloses a high-heat-dissipation sapphire-based heterojunction half-bridge device, which comprises a substrate, a low-measuring area which is composed of a first buffer layer, a first channel layer, a first heterojunction channel, a first barrier layer, a first metal source electrode, a first metal drain electrode and a first metal gate electrode, a high-measuring area which is composed of a second buffer layer, a second channel layer, a second heterojunction channel, a second barrier layer, a second metal source electrode, a second metal drain electrode and a second metal gate electrode, and a groove area which is composed of an insulating medium layer and a heat-conducting medium layer. The device can dissipate heat in the device body through the groove area, and the heat dissipation performance of the device can be improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor power devices, in particular to a high-heat-dissipation sapphire-based heterojunction half-bridge device. BACKGROUND

[0002] Gallium nitride, as one of the representatives of the third generation of wide bandgap semiconductor materials, has the advantages of wide bandgap, high critical breakdown field, high electron mobility, high saturated electron velocity, etc., which makes the gallium nitride transistor have the characteristics of low on-resistance, high working frequency and fast switching speed, and has broad development prospects in high temperature, high frequency and high power fields, and has been widely used in the field of power devices.

[0003] At present, gallium nitride devices mainly use sapphire, silicon and silicon carbide as substrate materials for growing epitaxial layers, among which sapphire substrate is suitable for large-scale industrial production due to its high crystalline quality and low cost, and is mainly used in the field of LED. However, the thermal conductivity of sapphire is poor, and for high-power devices, the heat dissipation performance of the device is a key factor affecting the performance and reliability of the equipment. Therefore, improving the heat dissipation capacity is an important direction for the future development of sapphire-based gallium nitride devices. SUMMARY

[0004] Technical problem: In view of the above problems of traditional sapphire-based gallium nitride devices, the present application provides a high-heat-dissipation sapphire-based heterojunction half-bridge device, which can effectively improve the heat dissipation performance of the sapphire-based gallium nitride half-bridge device.

[0005] Technical solution: The technical method adopted by the high-heat-dissipation sapphire-based heterojunction half-bridge device of the present application is as follows:

[0006] A substrate, a low measurement area and a high measurement area are arranged on the upper surface of the substrate, and a groove area is arranged between the low measurement area and the high measurement area;

[0007] The low measurement area includes a first buffer layer, a first channel layer and a first barrier layer stacked from bottom to top, a first heterojunction channel with high electron mobility is generated between the first channel layer and the first barrier layer due to polarization effect, a first metal source electrode, a first p-GaN layer and a first metal drain electrode are arranged on the upper surface of the first barrier layer, and a first metal gate electrode is arranged on the upper surface of the first p-GaN layer.

[0008] The high measurement area includes a second buffer layer, a second channel layer and a second barrier layer stacked from bottom to top, a second heterojunction channel with high electron mobility is generated between the second channel layer and the second barrier layer due to polarization effect, a second metal source electrode, a second p-GaN layer and a second metal drain electrode are arranged on the upper surface of the second barrier layer, and a second metal gate electrode is arranged on the upper surface of the second p-GaN layer.

[0009] The trench area comprises an insulating medium layer and a heat-conducting medium layer.

[0010] The heat-conducting medium layer in the trench area is a high-heat-conducting material, which can be Cu, Ag, SiC or diamond.

[0011] The heat-conducting medium layer in the trench area can have a straight strip structure, an edge groove structure or an S-shaped structure.

[0012] The heat-conducting medium layer in the trench area is located between the low-measurement area and the high-measurement area.

[0013] The heat-conducting medium layer in the trench area is located between the insulating medium layer and the low-measurement area and the high-measurement area.

[0014] The insulating medium layer in the trench area is an insulating material, which can be SiO2 or Si3N4.

[0015] Advantages: Compared with the prior art, the present application has the following advantages:

[0016] Improved heat dissipation performance. The device of the present application can conduct the heat accumulated in the trench to the outside through the heat-conducting medium layer, thereby improving the heat dissipation performance of the sapphire-based gallium nitride half-bridge device.

[0017] Improved integration. The upper and lower half-bridge devices of the present application are grown on the same substrate, and the leakage between the upper and lower half-bridge devices is avoided by the isolation deep trench, so that the area occupied by the half-bridge circuit is smaller, the structure is more compact, and the integration of the device is improved. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A three-dimensional structure schematic diagram of a high-heat-dissipation sapphire-based heterojunction half-bridge device is provided.

[0019] Figure 2 A two-dimensional cross-sectional schematic diagram of the sapphire-based heterojunction half-bridge device is provided.

[0020] Figure 3 A three-dimensional structure schematic diagram of another sapphire-based heterojunction half-bridge device is provided.

[0021] Figure 4 A three-dimensional structure schematic diagram of another sapphire-based heterojunction half-bridge device is provided. DETAILED DESCRIPTION

[0022] The present application will be further described in detail below in conjunction with the drawings and specific embodiments. It should be understood that the embodiments described herein are only used to illustrate and explain the present application, and are not used to limit the present application.

[0023] Example 1:

[0024] The structure comprises: a substrate 1, a low measurement area A and a high measurement area B provided on the upper surface of the substrate 1, and a groove area C provided between the low measurement area A and the high measurement area B.

[0025] The low measurement area A comprises a first buffer layer 2a, a first channel layer 3a and a first barrier layer 5a stacked from bottom to top, a first heterojunction channel 4a with high electron mobility generated between the first channel layer 3a and the first barrier layer 5a due to polarization effect, a first metal source electrode 6a, a first p-GaN layer 7a and a first metal drain electrode 8a provided on the upper surface of the first barrier layer 5a, and a first metal gate electrode 9a provided on the upper surface of the first p-GaN layer 7a.

[0026] The high measurement area B comprises a second buffer layer 2b, a second channel layer 3b and a second barrier layer 5b stacked from bottom to top, a second heterojunction channel 4b with high electron mobility generated between the second channel layer 3b and the second barrier layer 5b due to polarization effect, a second metal source electrode 6b, a second p-GaN layer 7b and a second metal drain electrode 8b provided on the upper surface of the second barrier layer 5b, and a second metal gate electrode 9b provided on the upper surface of the second p-GaN layer 7b.

[0027] The groove area C comprises an insulating medium layer 10 and a heat-conducting medium layer 11.

[0028] The heat-conducting medium layer 11 in the groove area C is a material with high heat conductivity, which can be Cu, Ag, SiC or diamond.

[0029] The heat-conducting medium layer 11 in the groove area C has a straight strip structure.

[0030] The heat-conducting medium layer 11 in the groove area C is located between the low measurement area A and the high measurement area B.

[0031] The heat-conducting medium layer 11 in the groove area C is located between the insulating medium layer 10 and the low measurement area A and the high measurement area B.

[0032] The insulating medium layer 10 in the groove area C is an insulating material, which can be SiO2 or Si3N4.

[0033] Embodiment 2:

[0034] Based on the structure described in Embodiment 1, in this embodiment, the heat-conducting medium layer 11 has an edge groove structure, as shown in Figure 3 The edge groove of the heat-conducting medium layer increases the surface area of the heat-conducting medium layer and enhances its heat conduction capacity.

[0035] Embodiment 3:

[0036] Based on the structure described in Embodiment 1, in this embodiment, it is characterized in that the heat-conducting medium layer 11 is in an S-shaped structure, referring to Figure 3 . The contact area of the heat-conducting medium layer and the insulating medium layer is increased, and the ability to conduct heat is enhanced.

Claims

1. A high-heat-dissipation sapphire-based heterojunction half-bridge device, the structure of which includes: A substrate (1) has a low-measurement area (A) and a high-measurement area (B) on its upper surface, and a trench area (C) is provided between the low-measurement area (A) and the high-measurement area (B). The low-voltage region (A) includes a first buffer layer (2a), a first channel layer (3a) and a first barrier layer (5a) stacked from bottom to top. A first heterojunction channel (4a) with high electron mobility is generated between the first channel layer (3a) and the first barrier layer (5a) due to the polarization effect. A first metal source electrode (6a), a first p-GaN layer (7a) and a first metal drain electrode (8a) are provided on the upper surface of the first barrier layer (5a). A first metal gate electrode (9a) is provided on the upper surface of the first p-GaN layer (7a). The high-sensitivity region (B) includes a second buffer layer (2b), a second channel layer (3b), and a second barrier layer (5b) stacked from bottom to top. A second heterojunction channel (4b) with high electron mobility is generated between the second channel layer (3b) and the second barrier layer (5b) due to the polarization effect. A second metal source electrode (6b), a second p-GaN layer (7b), and a second metal drain electrode (8b) are provided on the upper surface of the second barrier layer (5b). A second metal gate electrode (9b) is provided on the upper surface of the second p-GaN layer (7b). The trench region (C) includes an insulating dielectric layer (10) and a thermally conductive dielectric layer (11).

2. The high heat dissipation sapphire-based heterojunction half-bridge device according to claim 1, characterized in that: The thermally conductive medium layer (11) in the trench region (C) is a material with high thermal conductivity, such as Cu, Ag, SiC or diamond.

3. The high heat dissipation sapphire-based heterojunction half-bridge device according to claim 1, characterized in that: The thermally conductive medium layer (11) in the groove region (C) has a straight strip structure, an edge groove structure, and an S-shaped structure.

4. The high heat dissipation sapphire-based heterojunction half-bridge device according to claim 1, characterized in that: The thermally conductive medium layer (11) in the trench region (C) is located between the low-measurement region (A) and the high-measurement region (B).

5. The high heat dissipation sapphire-based heterojunction half-bridge device according to claim 1, characterized in that: The thermally conductive medium layer (11) in the trench region (C) is located between the insulating medium layer (10) and the low-measurement region (A) and the high-measurement region (B).

6. The high heat dissipation sapphire-based heterojunction half-bridge device according to claim 1, characterized in that: The insulating dielectric layer (10) in the trench region (C) is an insulating material, namely SiO2 or Si3N4.

Citation Information

Patent Citations

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