Fiber optic transmission system for high-speed image data

Abstract

The present invention relates to the field of image data transmission, and in particular to a fiber optic transmission system for high-speed image data, comprising a detector, a serial-to-parallel conversion module, a multi-channel data cache memory, a non-uniformity correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter, and an optical fiber module. The specific positions of a line head identifier and a line end identifier are set according to a count value of a read operation counter and a combination of an image data valid indication cycle count signal detected when the count value of the read operation counter is 0, and the rising edge and falling edge positions of a FIFO read phase enable signal are set at the same time. Except for setting the specific positions of the line head identifier and the line end identifier, the remaining positions are set to data read out by the FIFO when the read enable delay signal of the FIFO is at a high level, and the remaining positions are set to synchronization codes. The present invention can ensure that stable and reliable transmission of high-speed image data can be achieved under various relative phase relationships.

Description

Technical Field

[0001] The present invention relates to the technical field of image data transmission, in particular to an optical fiber transmission system for high-speed image data based on space applications. Background Art

[0002] For high-speed image data transmission, such as at a peak data rate of 16 Gbps, using 2711 transmission with a 100 MHz reference clock would require 10 simultaneous 2711 channels. However, using optical fiber with a transmission rate of 10 Gbps only requires two channels. To improve transmission efficiency, 64B66B encoding significantly improves data transmission efficiency compared to 8B10B encoding. High-speed image data is prone to bit errors during transmission. To enhance image data reliability, RS (Reed-Solomon) encoding is performed before 64B66B encoding. This redundant error-correcting code verifies the correctness of image data transmission and corrects potential errors during transmission. The RS encoding, 64 / 66 encoding, and scrambler require precise timing coordination. The image data valid signal fed to the scrambler must maintain a constant duty cycle, and the count signal fed to the GTX module must continuously change without blanking or a fixed value. Otherwise, transmission errors may occur or excessive memory resources may be consumed.

[0003] like Figure 1 As shown in the figure, conventional high-speed image data is usually transmitted in units of lines. A line header identifier needs to be added before the first valid data in each line, and a line end identifier needs to be added after the last valid data. The valid data is indicated by a high level. However, the line header identifier and the line end identifier are not RS-encoded, so they can only be added after RS-encoding. In addition, as Figure 2a-2e As shown, although the line start and line end identifiers are not image data and are not represented by the image data valid indicator signal like image data, they must remain at a high level during the scrambling code valid level indication phase. In other words, the duty cycle of the scrambler data valid indicator signal is constant, and the synchronization code can appear in both the high and low phases of the scrambler data valid indicator signal. However, valid image data, the line start and line end identifiers must appear at a high level on the scrambler data valid indicator signal.

[0004] For imaging applications, the line cycle length of each line changes at any time. Therefore, the count value of the scrambler data valid indication counter corresponding to the starting position of each line may be different, which may cause the positions where the line head identifier and the line end identifier are set to correspond to the low level of the scrambler data valid indication signal. In addition, the first or last valid data read may correspond to the low level of the scrambler data valid indication signal. These states will cause errors in the transmission of high-speed image data, such as the loss of the line head, the loss of the line end, or the loss of the first or last valid data. Summary of the Invention

[0005] In response to the above technical problems, the present invention aims to provide a high-speed optical fiber transmission system for image data. To solve the above technical problems, the present invention adopts the following technical solutions:

[0006] The present invention provides a high-speed image data optical fiber transmission system, comprising a detector, a serial-to-parallel conversion module, a multi-channel data cache memory, a non-uniformity correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter, and an optical fiber module. The high-speed serial image data output by the detector is converted into 64-bit parallel image data by the serial-to-parallel conversion module, and simultaneously written into the multi-channel data cache memory in parallel. The image data is read out channel by channel and sent to the non-uniformity correction module for non-uniformity correction. The image data after non-uniformity correction is sent to the Reed-Solomon encoder for encoding. The encoded image data is passed through the 64B66B interval adjuster and output as pre-scrambled image data. The pre-scrambled image data and a scrambler data valid indication signal are simultaneously sent to the scrambler to output the scrambled image data. The scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are jointly sent to the GTX transmitter. The high-speed serial differential data output by the GTX transmitter is sent to the optical fiber module to output a modulated signal.

[0007] The read operation of the 64B66B interval adjuster is implemented using a read operation counter. When the count value of the read operation counter is 0, the detected image data indicates that the cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the length of the valid data output in one row is p more than an integer multiple of 32, where p is an integer less than 32. There are four working modes in the 33 combination states:

[0008] The first working mode: the row header identifier and valid data are transmitted in different 32 combination states, the row header identifier is set in the current set of count values, and the valid data is set in the next set of count values. The position of the row header identifier alone in the current set of count values ​​is one count value position ahead of the position of the row header identifier and valid data in the same set of count values; the rising edge position of the corresponding read phase enable signal when the row header identifier alone is in the current set of count values ​​is one count value position ahead of the rising edge position of the corresponding read phase enable signal when the row header identifier and valid data are in the same set of count values;

[0009] The second operating mode: the row head identifier and valid data are transmitted in different 31-p combination states, the position of the row head identifier lags one position compared to the position of the row head identifier in the first operating mode; the rising edge position of the read phase enable signal lags one position compared to the rising edge position of the read phase enable signal in the first operating mode;

[0010] The third working mode: The end-of-line identifier and valid data are transmitted in 32 different combinations. The valid data is set in the current set of count values, and the end-of-line identifier is set in the next set of count values. The position of the end-of-line identifier in the next set of count values ​​lags by one count value compared to the position of the end-of-line identifier and valid data in the same set of count values.

[0011] The fourth working mode: the end-of-row identifier and valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

[0012] Furthermore, there are eight Reed-Solomon encoders, and the 64-bit parallel image data is divided into eight groups and sent to the eight Reed-Solomon encoders for encoding. The number of valid image data continuously written by each Reed-Solomon encoder each time is m. If a row of valid image data is less than m, redundant data is added to make it an integer multiple of m, and finally k groups of encoded data groups containing n image data are formed; the minimum number of clocks between two adjacent continuous write operations of each Reed-Solomon encoder is 2 (nm) + 1.

[0013] Furthermore, the 64B66B interval adjuster is implemented using a first-in-first-out queue, and the read and write clocks of the first-in-first-out queue use the data synchronization clock returned by the GTX transmitter; the write enable of the first-in-first-out queue is the data valid signal output by the Reed-Solomon encoder; the read operation of the first-in-first-out queue is started by detecting the falling edge position of the empty state flag signal of the first-in-first-out queue, and the falling edge of the empty state flag signal is used to reset the read operation counter; the read enable operation of the first-in-first-out queue is started by the two clock cycle advance signal of the scrambler data valid indication signal and the result of the AND operation of the read phase enable signal.

[0014] Furthermore, the minimum capacity of the FIFO queue cache is 33mk / 32-2n+m-1.

[0015] Furthermore, in the first working mode, the row header identifier is set at the 31st count value of the current group of count values, and the 32 valid data following the row header identifier are set at the 0th to 31st count values ​​of the next group of count values.

[0016] Furthermore, in the third working mode, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier behind the 32 valid data is set at the position of the 0th count value of the next group of count values.

[0017] Compared with the prior art, the present invention can achieve the following beneficial effects:

[0018] (1) By counting the valid image data transmitted in a line, the number of remainders outside the complete number of groups transmitted is calculated. Then, according to the relative starting phase relationship between the counter of each line read operation and the valid indication counter of the scrambler data, the corresponding line head identifier and line end identifier setting position are determined, including the rising and falling edge positions of the FIFO read phase enable signal, so as to ensure that high-speed image data can be transmitted stably and reliably under various relative phase relationships; by statistically determining the counting range that needs to be adjusted, a maximum of four working modes are formed, which can reduce the testing workload and improve work efficiency.

[0019] (2) By using the RS coding function, it is possible to detect in real time whether there are errors in the image data transmission process, and at the same time correct the errors in the image data transmission process; by using the scrambling function combined with 64B66B coding, the transmission efficiency of effective image data can be improved compared with 8B10B coding, and at the same time avoid transmission errors caused by imbalance of high and low levels in image data transmission; by synchronous detection of the ready state flag signals of 8 Reed-Solomon encoders, it is ensured that 8 groups of 8-bit parallel data are operated synchronously.

[0020] (3) Using a first-in-first-out queue to cache RS-encoded data and pre-scrambled data with different duty cycles requires less storage resources to overcome the difference in duty cycles compared to using RAM resources to cache the entire row of data.

[0021] (4) Ping-pong caching of high-speed image data and intermittent reading of RS-encoded data are performed through a large-capacity RAM, and RS-encoded intermittent data and 64B66B-encoded intermittent data are cached through a small-capacity FIFO. Data can be read continuously and at a low resource occupancy rate while meeting the transmission protocol. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of conventional image data transmission in the prior art;

[0023] Figure 2a-2e This is a schematic diagram of the optical fiber image data transmission form based on 64B66B encoding in the prior art; wherein, Figure 2a The figure shows that the line head identifier and the line end identifier (simplified as line head and line end in the figure) and the valid image data (simplified as valid data in the figure) are transmitted in 32 different combination states; Figure 2b It shows that the end-of-line identifier and valid data are transmitted in the same 32 combinations, with a total length of 32 count positions; Figure 2c It shows that the end-of-line identifier and valid data are transmitted in the same 32 combinations, with a total length of less than 32 count positions; Figure 2d It shows that the line head identifier and valid data are transmitted in the same 32 combination states, with a total length of 32 count positions; Figure 2e It shows that the line header identifier and valid data are transmitted in the same 32 combinations, with a total length of less than 32 count positions;

[0024] Figure 3 2 is a schematic structural diagram of a high-speed optical fiber transmission system for image data provided according to an embodiment of the present invention.

[0025] Explanation of the reference numerals: detector 1, serial-to-parallel conversion module 2, multi-channel data cache memory 3, non-uniformity correction module 4, Reed-Solomon encoder 5, 64B66B interval adjuster 6, scrambler 7, GTX transmitter 8, optical fiber module 9. DETAILED DESCRIPTION

[0026] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the following description, identical modules are denoted by identical reference numerals. In the case of identical reference numerals, their names and functions are also identical. Therefore, their detailed description will not be repeated.

[0027] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and do not constitute a limitation of the present invention.

[0028] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments.

[0029] like Figure 3 As shown, an embodiment of the present invention provides a high-speed image data optical fiber transmission system, comprising a detector 1, a serial-to-parallel conversion module 2, a multi-channel data cache memory 3, a non-uniformity correction module 4, a Reed-Solomon encoder 5, a 64B66B interval adjuster 6, a scrambler 7, a GTX transmitter 8 and an optical fiber module 9; wherein the high-speed serial image data output by the detector 1 is converted into 64-bit parallel image data by the serial-to-parallel conversion module 2, and the 64-bit parallel image data is written in parallel to the multi-channel data cache memory 3. When the parallel write operation ends, the image data is read out channel by channel from the multi-channel data cache memory 3. The image data is sent to the non-uniformity correction module 4 for non-uniformity correction, and the image data after non-uniformity correction is sent to the Reed-Solomon encoder 5 for encoding. The encoded image data is output after passing through the 64B66B interval adjuster 6, and the image data before scrambling is output; the image data before scrambling and the scrambler data valid indication signal are simultaneously sent to the scrambler 7, and the scrambler 7 outputs the scrambled image data. The scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are all sent to the GTX transmitter 8. The high-speed serial differential data output by the GTX transmitter 8 is sent to the optical fiber module 9, and the optical fiber module 9 outputs the modulated laser signal.

[0030] There are eight Reed-Solomon encoders 5 (one is shown in the figure), and the 64-bit parallel image data is divided into eight groups and sent to the eight Reed-Solomon encoders respectively. The write enable operation of the Reed-Solomon encoder is performed intermittently, that is, when it is detected that the ready state flag signals of the eight Reed-Solomon encoders 5 are all valid and the image data of the row has not been completed, the image data input continues. When it is detected that the ready flag signal is invalid or the image data of the row has been completed, the image data input is stopped. For the (m,n) Reed-Solomon encoder such as (129,133), the number of valid image data written continuously each time is m. If the number of valid image data in a row is less than m, redundant data must be added to make it an integer multiple of m, and finally k groups of encoded data groups containing n data are formed; the minimum number of clocks between two adjacent consecutive write operations of each Reed-Solomon encoder is 2 (nm) + 1.

[0031] The 64B66B interval adjuster 6 caches RS-encoded intermittent data and 64B66B-encoded intermittent data with different transmission ratios for valid image data. This is implemented using a small-capacity FIFO (First Input First Output) queue. The FIFO's read and write clocks are both based on the data synchronization clock returned by the GTX transmitter. The FIFO's write enable is the data valid signal output by the Reed-Solomon encoder. The 64B66B interval adjuster 6 implements a read operation counter. This FIFO read operation is initiated by detecting the falling edge of the FIFO's empty status flag. This falling edge resets the read operation counter, which then increments. The read operation counter stops counting when the image data for that row has been read. The FIFO's read enable is initiated by the AND operation of the scrambler's data valid indicator signal, two clock cycles ahead, and the read phase enable signal.

[0032] The minimum capacity of the FIFO buffer is 33mk / 32-2n+m-1.

[0033] The line head identifier, line end identifier and synchronization code are added in the FIFO readout stage. The specific positions of the line head identifier and line end identifier are set according to the count value of the read operation counter and the combination of the image data valid indication cycle count signal detected when the count value of the read operation counter is 0, and the rising edge and falling edge positions of the FIFO read phase enable signal are set at the same time; except for setting the specific positions of the line head identifier and line end identifier, when the FIFO read enable delay signal (which has a delayed relationship with the read phase enable signal, and the two have the same source but different phases) is high, it is set to the data read out by the FIFO, and the remaining positions (the positions remaining after removing the positions of the read image data) are set to the synchronization code.

[0034] When the count value of the read operation counter is 0, the detected image data valid indication cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the length of the valid data output in one row is p more than an integer multiple of 32 (p is an integer less than 32 and may be 0). There are four working modes in the 33 combination states.

[0035] The first working mode: the row header identifier and valid data are transmitted in different 32 combination states, the row header identifier is set in the current group of count values, and the valid data is set in the next group of count values. The position of the row header identifier alone in the current group of count values ​​is 1 count value position ahead of the position of the row header identifier and valid data in the same group of count values; the rising edge position of the corresponding read phase enable signal when the row header identifier alone is in the current group of count values ​​is 1 count value position ahead of the rising edge position of the corresponding read phase enable signal when the row header identifier and valid data are in the same group of count values.

[0036] It should be noted that the count value of the read operation counter changes cyclically from 0 to 32, that is, it changes in a regular pattern of 0, 1, 2, 3, 4, 5, ... 30, 31, 32, 0, 1, 2 ... Among the 33 count values ​​0 to 32, valid data can be transmitted only in the 32 count positions 0 to 31, while the 32nd count position cannot transmit valid data. This count position will be considered as invalid data by the scrambler and ignored. In the present invention, in order to facilitate the distinction between invalid data and valid data, synchronization codes are placed at the positions of invalid data. The row header identifier and valid data can only be distributed in the 32 count positions 0 to 31, so there are 32 combination states between the row header identifier and the valid data.

[0037] The row header identifier is set in the current set of count values, and the valid data is set in the next set of count values. In fact, the row header identifier is set at the 31st count value of the current set of count values, and the 32 valid data after the row header identifier are set at the 0th to 31st count values ​​of the next set of count values.

[0038] The second working mode: the row head identifier and valid data are transmitted in different 31-p combination states, and the position of the row head identifier lags one position compared to the position of the row head identifier in the first working mode; the rising edge position of the read phase enable signal lags one position compared to the rising edge position of the read phase enable signal in the first working mode.

[0039] The third working mode: the end-of-line identifier and valid data are transmitted in different 32 combination states. The valid data is set in the current set of count values, and the end-of-line identifier is set in the next set of count values. The position of the end-of-line identifier in the next set of count values ​​lags behind the position of the end-of-line identifier and valid data in the same set of count values ​​by 1 count value position.

[0040] The valid data is set in the count value of the current group, and the end-of-line identifier is set in the count value of the next group. Actually, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier after the 32 valid data is set at the position of the 0th count value of the next group of count values.

[0041] The fourth working mode: the end-of-row identifier and valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

[0042] Compared with the first three working modes (the valid data of an incomplete group is distributed in two different groups of count values), the fourth working mode (the valid data of an incomplete group is distributed in the same group of count values) has a falling edge position of the read phase enable signal in the fourth working mode that lags behind by one count position relative to the falling edge position of the read phase enable signal in the first three working modes, and the position of the end-of-row identifier is the same as that in the third working mode.

[0043] The position of the end-of-row identifier and the falling edge position of the read phase enable signal not mentioned in the first and second working modes remain unchanged, and the position of the head-of-row identifier and the rising edge position of the read phase enable signal not mentioned in the third and fourth working modes remain unchanged.

[0044] The operation embodiment of Table 1 is 33 combinations when the length of valid data outputted in each row is 8 more than an integer multiple of 32.

[0045] Table 1 Operation Example

[0046]

[0047] In Table 1, the position of the row head identifier assignment, the position of the row end identifier assignment, the rising edge position of the read phase enable signal, and the falling edge position of the read phase enable signal are expressed in decimal.

[0048] The present invention calculates the number of remainders beyond the number of complete groups transmitted by counting the valid image data transmitted in a row, and then determines the corresponding row head identifier and row end identifier setting positions, including the rising and falling edge positions of the FIFO read phase enable signal, based on the relative starting phase relationship between the counter of each row read operation and the scrambler data valid indication counter, thereby ensuring stable and reliable transmission of high-speed image data under various relative phase relationships. The present invention also determines the counting range that needs to be adjusted by statistics, forming up to four working modes, which can reduce the testing workload and improve work efficiency.

[0049] The present invention uses the RS encoding function to detect in real time whether there are errors in the image data transmission process and correct the errors in the image data transmission process. The scrambling function combined with 64B66B encoding can improve the transmission efficiency of effective image data compared with 8B10B encoding, while avoiding transmission errors caused by imbalance of high and low levels in image data transmission. The synchronous detection of the ready state flag signals of 8 Reed-Solomon encoders ensures that 8 groups of 8-bit parallel data are operated synchronously.

[0050] The present invention uses a first-in-first-out queue to cache RS coded data and pre-scrambled data with different duty cycles. Compared with using RAM resources to cache the entire row of data, only fewer storage resources are needed to overcome the difference in duty cycles between the two.

[0051] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved. This is not limited herein.

[0052] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A high-speed optical fiber transmission system for image data, characterized in that: The device comprises a detector, a serial-to-parallel conversion module, a multi-channel data cache memory, a non-uniformity correction module, a Reed-Solomon encoder, a 64B66B interval adjuster, a scrambler, a GTX transmitter, and an optical fiber module. The high-speed serial image data output by the detector is converted into 64-bit parallel image data by the serial-to-parallel conversion module, and simultaneously written into the multi-channel data cache memory in parallel. The image data is read out channel by channel and sent to the non-uniformity correction module for non-uniformity correction. The image data after non-uniformity correction is sent to the Reed-Solomon encoder for encoding. The encoded image data is passed through the 64B66B interval adjuster and the image data before scrambling is output. The image data before scrambling and the scrambler data valid indication signal are simultaneously sent to the scrambler to output the scrambled image data. The scrambled image data, the image data valid indication signal, and the image data valid indication cycle count signal are jointly sent to the GTX transmitter. The high-speed serial differential data output by the GTX transmitter is sent to the optical fiber module to output a modulated signal. The read operation of the 64B66B interval adjuster is implemented using a read operation counter. When the count value of the read operation counter is 0, the detected image data indicates that the cycle count signal has 33 combination states, that is, the count value is 0 to 32, and the length of the valid data output in one row is p more than an integer multiple of 32, where p is an integer less than 32. There are four working modes in the 33 combination states: The first working mode: The line header identifier and valid data are transmitted in 32 different combinations. The line header identifier is set in the current set of count values, and the valid data is set in the next set of count values. The position of the line header identifier alone in the current set of count values ​​is one count value ahead of the position of the line header identifier and valid data in the same set of count values. When the row head identifier is alone in the current set of count values, the rising edge position of the read phase enable signal is earlier by one count value position than the rising edge position of the read phase enable signal when the row head identifier and valid data are in the same set of count values; The second operating mode: the row head identifier and valid data are transmitted in different 31-p combination states, the position of the row head identifier lags one position compared to the position of the row head identifier in the first operating mode; the rising edge position of the read phase enable signal lags one position compared to the rising edge position of the read phase enable signal in the first operating mode; The third working mode: The end-of-line identifier and valid data are transmitted in 32 different combinations. The valid data is set in the current set of count values, and the end-of-line identifier is set in the next set of count values. The position of the end-of-line identifier in the next set of count values ​​lags by one count value compared to the position of the end-of-line identifier and valid data in the same set of count values. The fourth working mode: the end-of-row identifier and valid data are transmitted in different P combination states, and the falling edge position of the read phase enable signal corresponds to the end position of the read operation of the last valid data.

2. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: There are eight Reed-Solomon encoders. The 64-bit parallel image data is divided into eight groups and sent to eight Reed-Solomon encoders for encoding. The number of valid image data written continuously by each Reed-Solomon encoder is m. If a line of valid image data is less than m, redundant data is added to make it an integer multiple of m, and finally k groups of encoded data containing n image data are formed; the minimum number of clocks between two adjacent continuous write operations of each Reed-Solomon encoder is 2 (nm) + 1.

3. The optical fiber transmission system for high-speed image data according to claim 2, characterized in that: The 64B66B interval adjuster is implemented using a first-in-first-out queue. The read and write clocks of the first-in-first-out queue use the data synchronization clock returned by the GTX transmitter. The write enable of the first-in-first-out queue is the data valid signal output by the Reed-Solomon encoder. The read operation of the first-in-first-out queue is initiated by detecting the falling edge position of the empty state flag signal of the first-in-first-out queue, and the falling edge of the empty state flag signal is used to reset the read operation counter. The read enable operation of the first-in-first-out queue is initiated by the two clock cycle advance signal of the scrambler data valid indication signal and the result of the AND operation of the read phase enable signal.

4. The optical fiber transmission system for high-speed image data according to claim 3, characterized in that: The minimum capacity of the FIFO queue cache is 33mk / 32-2n+m-1.

5. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: In the first working mode, the row header identifier is set at the 31st count value of the current group of count values, and the 32 valid data following the row header identifier are set at the 0th to 31st count values ​​of the next group of count values.

6. The optical fiber transmission system for high-speed image data according to claim 1, characterized in that: In the third working mode, 32 valid data are set at the positions of the 0th to 31st count values ​​of the current group of count values, and the end-of-line identifier behind the 32 valid data is set at the position of the 0th count value of the next group of count values.

Images