Low-stress piezoelectric wafer and preparation method thereof

Abstract

The invention relates to a low-stress piezoelectric wafer and a preparation method thereof. The piezoelectric wafer comprises a substrate layer, a bottom electrode layer, at least one stress release layer and a piezoelectric film layer which are stacked from bottom to top, the stress release layer is made of a perovskite phase oxide; the piezoelectric film layer is made of Pb (ZrxTi1-x) O3, and the value of x is 0.2-0.8. According to the piezoelectric wafer provided by the invention, through the arrangement of the stress release layer, the stress of the piezoelectric wafer is adjusted, and the stress value of the piezoelectric wafer can be effectively reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of functional thin film materials, and relates to a piezoelectric material, and in particular to a low-stress piezoelectric wafer and a preparation method thereof. Background Art

[0002] Piezoelectric materials have excellent piezoelectric, dielectric, ferroelectric and pyroelectric properties and are widely used in military, aerospace, automotive, biomedical and consumer electronics fields. They are functional materials with a wide range of uses. As devices develop towards miniaturization, piezoelectric wafers gradually replace piezoelectric ceramics and become the mainstream of application. However, the introduction and heat treatment of substrates during the preparation of piezoelectric wafers will also introduce a large amount of stress, which will seriously affect the performance and service life of various devices. Therefore, it is very necessary to develop a low-stress piezoelectric wafer.

[0003] CN113445005A discloses a method for preparing a low-stress TiW film, which is to grow a relatively thin seed film layer at a low deposition rate on a substrate to be deposited with a film, and grow a main film layer at a high deposition rate, and by controlling the thickness and rate of growth, the two layers of film are optimally combined to obtain a low-stress TiW film. The present invention deposits a TiW film on a substrate in steps, the seed film layer grown at a low deposition rate has a high density, and obtains an interface with high reliability by mutual fusion with substrate atoms; the main film layer grown at a high deposition rate, the film grown on the basis of the seed layer buffer has enhanced adhesion, so that the thickness of the TiW film is stable and evenly distributed, the stress on the substrate is weakened and dissipated, the deformation is small, and a low-stress and high-quality TiW film is obtained.

[0004] Although CN113445005A can deposit two layers of TiW film by a step-by-step method, it is limited by the ratio between the two layers of film. When a very thin sample is required, the density of the first layer of TiW film will be affected and it is difficult to play the role of a seed layer. Moreover, in a multi-layer film scenario, using a two-step method to deposit each layer of film will inevitably greatly reduce production efficiency, and once a seed layer fails, it will lead to an increase in R&D costs and cycles.

[0005] CN102361006A discloses a method for preparing a low-stress tantalum-nitrogen film, which combines a low-stress tantalum-nitrogen film-forming process and a physical reverse etching process. Under the premise of ensuring that the horizontal distribution of the plasma in the film-forming process and the reverse etching process is consistent or close, the uniformity of the tantalum-nitrogen film is effectively controlled, and a low film stress of less than 600MPa can be obtained. However, the stress of the film obtained by this method is still relatively high; in addition, it requires the use of a certain element gas in the film. For oxide films, the flow rate of oxygen is closely related to the film quality, film yield, etc., and it is difficult to take into account both stress and film quality. Moreover, if dangerous gas elements are used, it will also bring safety hazards.

[0006] Therefore, it is necessary to provide a low-stress piezoelectric wafer with a simple structure and less residual stress and a method for preparing the same. Summary of the invention

[0007] The object of the present invention is to provide a low-stress piezoelectric wafer and a preparation method thereof. The piezoelectric wafer has a lower initial stress value through structural adjustment.

[0008] In order to achieve the purpose of the invention, the present invention adopts the following technical solutions:

[0009] In a first aspect, the present invention provides a piezoelectric wafer, the piezoelectric wafer comprising a base layer, a bottom electrode layer, at least one stress release layer and a piezoelectric film layer stacked from bottom to top;

[0010] The material of the stress release layer includes any one of aluminum oxide, aluminum nitride, lead dioxide, zirconium dioxide, titanium dioxide or perovskite phase oxide, or a combination of at least two thereof;

[0011] The material of the piezoelectric film layer is Pb(Zr x Ti 1-x )O3, the value of x satisfies 0.2-0.8.

[0012] The stress level determines the performance and service life of the piezoelectric wafer to a certain extent. If the stress cannot be well controlled, the device will be damaged during the preparation stage of the piezoelectric wafer. The present invention achieves the purpose of reducing the initial stress of the piezoelectric wafer by changing the structure of the piezoelectric wafer and arranging a stress release layer composed of oxide between the bottom electrode layer and the piezoelectric film layer.

[0013] The present invention uses oxide as the material of the stress release layer, which has good thermal matching and lattice constant matching with the piezoelectric film layer, and can well reduce the stress from the substrate or the piezoelectric wafer preparation process, thereby reducing the initial stress of the piezoelectric wafer.

[0014] The "low stress" mentioned in the present invention means that the average stress is ≤ +200MPa.

[0015] Preferably, the material of the base layer includes any one of single crystal silicon, silicon carbide, magnesium oxide or strontium titanate, or a combination of at least two thereof.

[0016] Preferably, the material of the bottom electrode layer includes any one of titanium, platinum, gold, molybdenum, chromium or copper, or a combination of at least two thereof.

[0017] Preferably, the material of the stress release layer includes any one of strontium titanate, strontium ruthenate, lanthanum nickelate or lead titanate, or a combination of at least two thereof.

[0018] Preferably, the thickness of the base layer is 525-725 μm.

[0019] Preferably, the thickness of the bottom electrode is 50-100 nm.

[0020] Preferably, the thickness of each stress release layer is 50-300 nm.

[0021] Preferably, the piezoelectric film layer has a thickness of 1-5 μm.

[0022] In a second aspect, the present invention provides a method for preparing the piezoelectric wafer as described in the first aspect, the preparation method comprising the following steps:

[0023] A bottom electrode layer is prepared on the surface of the substrate layer, and then at least one stress release layer and a piezoelectric film layer are prepared to obtain the piezoelectric wafer.

[0024] Preferably, the step of preparing the bottom electrode layer comprises:

[0025] An adhesion layer and a bottom electrode layer are sequentially deposited on the surface of the substrate layer to complete the preparation of the bottom electrode layer.

[0026] Preferably, the method for preparing the stress release layer comprises magnetron sputtering.

[0027] Preferably, when preparing the stress release layer, the temperature of magnetron sputtering is 180-220°C.

[0028] Preferably, when preparing the stress release layer, the heating rate of magnetron sputtering is 10-15° C. / min.

[0029] Preferably, when preparing the stress release layer, the absolute pressure of magnetron sputtering is 1-2Pa.

[0030] Preferably, when preparing the stress release layer, the coating power of magnetron sputtering is 1.5-2.5 W / cm 2 .

[0031] Preferably, when preparing the stress release layer, the holding time of magnetron sputtering is 12-18 minutes.

[0032] Preferably, when preparing the stress release layer, the cooling rate of magnetron sputtering is ≤15° C. / min.

[0033] Preferably, the method for preparing the piezoelectric thin film layer comprises magnetron sputtering.

[0034] Preferably, when preparing the piezoelectric thin film layer, the temperature of magnetron sputtering is 480-520°C.

[0035] Preferably, when preparing the piezoelectric thin film layer, the heating rate of magnetron sputtering is 14-16° C. / min.

[0036] Preferably, when preparing the piezoelectric thin film layer, the absolute pressure of magnetron sputtering is 0.5-1Pa.

[0037] Preferably, when preparing the piezoelectric thin film layer, the coating power of magnetron sputtering is 2-2.5 W / cm 2 .

[0038] Preferably, when preparing the piezoelectric thin film layer, the holding time of magnetron sputtering is 5-30 minutes.

[0039] Preferably, when preparing the piezoelectric thin film layer, the cooling rate of magnetron sputtering is ≤16° C. / min.

[0040] As a preferred technical solution of the preparation method described in the second aspect, the preparation method comprises the following steps:

[0041] (1) depositing an adhesion layer and a bottom electrode layer on the surface of the substrate layer in sequence to complete the preparation of the bottom electrode layer;

[0042] (2) preparing at least one stress release layer, wherein the method for preparing each stress release layer comprises magnetron sputtering: heating to 180-220°C at a rate of 10-15°C / min, at an absolute pressure of 1-2 Pa and a power of 1.5-2.5 W / cm 2 The coating is carried out under the conditions of to obtain a stress release layer of the required thickness, and then the temperature is kept for 12-18 minutes, and then the temperature is lowered at a rate of ≤15℃ / min;

[0043] (3) preparing a piezoelectric thin film layer, the method for preparing the piezoelectric thin film layer includes magnetron sputtering: heating to 480-520°C at a rate of 14-16°C / min, at an absolute pressure of 0.5-1 Pa and a power of 2-2.5 W / cm 2 The film is plated under the conditions of to obtain a piezoelectric film layer of desired thickness, and then kept warm for 5-30 minutes, and then cooled at a rate of ≤16°C / min.

[0044] Compared with the prior art, the present invention has the following beneficial effects:

[0045] The present invention changes the structure of the piezoelectric wafer and arranges a stress release layer composed of perovskite phase oxide between the bottom electrode layer and the piezoelectric film layer. The stress release layer composed of perovskite phase oxide is used to achieve good thermal matching and lattice constant matching between the piezoelectric film layer and the substrate or the piezoelectric wafer preparation process, thereby reducing the initial stress of the piezoelectric wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A schematic diagram of the piezoelectric wafer structure provided for Comparative Example 1;

[0047] Figure 2 A schematic diagram of the piezoelectric wafer structure provided in Example 1;

[0048] Figure 3 A schematic diagram of the piezoelectric wafer structure provided in Example 4;

[0049] Figure 4 A stress distribution diagram of a piezoelectric wafer provided for comparative example 1;

[0050] Figure 5 A stress distribution diagram of the piezoelectric wafer provided in Example 1;

[0051] Figure 6 This is the stress distribution diagram of the piezoelectric wafer provided in Example 4.

[0052] Wherein: 100, substrate layer; 101, bottom electrode layer; 102, piezoelectric film layer; 201, stress release layer; 301, SiO2 layer. DETAILED DESCRIPTION

[0053] The technical solution of the present invention is further described below by specific implementation methods. It should be understood by those skilled in the art that the embodiments are only to help understand the present invention and should not be regarded as specific limitations of the present invention.

[0054] A certain embodiment of the present invention provides a piezoelectric wafer, wherein the piezoelectric wafer includes a base layer, a bottom electrode layer, at least one stress release layer and a piezoelectric film layer stacked from bottom to top;

[0055] The material of the stress release layer includes any one of aluminum oxide, aluminum nitride, lead dioxide, zirconium dioxide, titanium dioxide or perovskite phase oxide, or a combination of at least two thereof;

[0056] The material of the piezoelectric film layer is Pb(Zr x Ti 1-x )O3, the value of x satisfies 0.2-0.8, for example, it can be 0.2, 0.3, 0.4, 0.5, 0.6, 0.7 or 0.8, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0057] The stress level determines the performance and service life of the piezoelectric wafer to a certain extent. If the stress cannot be well controlled, the device will be damaged during the preparation stage of the piezoelectric wafer. The present invention achieves the purpose of reducing the initial stress of the piezoelectric wafer by changing the structure of the piezoelectric wafer and arranging a stress release layer composed of oxide between the bottom electrode layer and the piezoelectric film layer.

[0058] The present invention uses oxide as the material of the stress release layer, which has good thermal matching and lattice constant matching with the piezoelectric film layer, and can well reduce the stress from the substrate or the piezoelectric wafer preparation process, thereby reducing the initial stress of the piezoelectric wafer.

[0059] The stress is largely caused by the mismatch between the thermal expansion coefficient and the lattice constant of the substrate layer and the piezoelectric film layer. In the preparation process of most piezoelectric film layers, heat treatment is required. Due to the difference in thermal expansion coefficients, the layers will expand or contract during the heating and cooling process, thereby causing stress. The present invention can effectively control the initial stress by selecting a suitable substrate material.

[0060] In some embodiments, the material of the base layer includes any one of single crystal silicon, silicon carbide, silicon dioxide, magnesium oxide or strontium titanate, or a combination of at least two of them. Typical but non-limiting combinations include a combination of single crystal silicon and silicon carbide, a combination of silicon carbide and magnesium oxide, a combination of single crystal silicon and silicon dioxide, a combination of silicon carbide and silicon dioxide, a combination of single crystal silicon, silicon carbide and silicon dioxide, a combination of single crystal silicon and strontium titanate, or a combination of single crystal silicon, silicon carbide, magnesium oxide and strontium titanate.

[0061] In some embodiments, the material of the bottom electrode layer includes any one of titanium, platinum, gold, molybdenum, chromium or copper, or a combination of at least two of them. Typical but non-limiting combinations include a combination of titanium and platinum, a combination of gold and molybdenum, a combination of chromium and copper, a combination of titanium, platinum and gold, a combination of molybdenum, chromium and copper, or a combination of titanium, platinum, gold, molybdenum, chromium and copper.

[0062] The material of the stress release layer of the present invention includes perovskite phase oxide, which has good thermal matching and lattice matching with the material of the piezoelectric film layer, and can reduce the stress from the substrate or heat treatment.

[0063] In some embodiments, the material of the stress release layer includes any one of strontium titanate, strontium ruthenate, lanthanum nickelate or lead titanate, or a combination of at least two of them. Typical but non-limiting combinations include a combination of strontium titanate and strontium ruthenate, a combination of lanthanum nickelate and lead titanate, a combination of strontium titanate and lanthanum nickelate, a combination of strontium ruthenate and lead titanate, or a combination of strontium titanate, strontium ruthenate, lanthanum nickelate and lead titanate.

[0064] The present invention can effectively reduce the initial stress value of the piezoelectric wafer by selecting appropriate thicknesses of the substrate layer, the bottom electrode, the stress release layer and the piezoelectric film layer.

[0065] In some embodiments, the thickness of the base layer is 525-725 μm, for example, 525 μm, 550 μm, 575 μm, 600 μm, 650 μm, 700 μm or 725 μm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0066] In some embodiments, the thickness of the bottom electrode is 50-200nm, for example, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 150nm or 200nm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0067] In some embodiments, the thickness of each stress release layer is 50-300 nm, for example, 50 nm, 100 nm, 150 nm, 200 nm, 250 nm or 300 nm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0068] In some embodiments, the thickness of the piezoelectric film layer is 1-5 μm, for example, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 4 μm or 5 μm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0069] In some embodiments, a buffer layer is further disposed between the substrate layer and the bottom electrode layer.

[0070] In some embodiments, the material of the buffer layer includes any one of silicon dioxide, silicon carbide, or SOI (Silicon-on-Insulator) or a combination of at least two thereof.

[0071] In some embodiments, the thickness of the buffer layer is 180-220 nm, typical but non-limiting combinations include 180 nm, 190 nm, 200 nm, 210 nm or 220 nm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0072] A certain embodiment of the present invention provides a method for preparing the piezoelectric wafer described in certain embodiments, and the preparation method comprises the following steps:

[0073] A bottom electrode layer is prepared on the surface of the substrate layer, and then at least one stress release layer and a piezoelectric film layer are prepared to obtain the piezoelectric wafer.

[0074] In some embodiments, the step of preparing the bottom electrode layer comprises:

[0075] An adhesion layer and a bottom electrode layer are sequentially deposited on the surface of the substrate layer to complete the preparation of the bottom electrode layer.

[0076] Exemplarily, the material of the adhesion layer includes any one of TiO2, Ti, ZrO2 or Al2O3 or a combination of at least two of them. Typical but non-limiting combinations include a combination of TiO2 and Ti, a combination of ZrO2 and Al2O3, a combination of Ti and Al2O3, or a combination of TiO2, Ti, ZrO2 and Al2O3.

[0077] In some embodiments, the thickness of the adhesion layer is 15-25 nm, for example, 15 nm, 16 nm, 18 nm, 20 nm, 21 nm, 24 nm or 25 nm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0078] Exemplarily, the method of depositing the adhesion layer includes magnetron sputtering: in an argon atmosphere of 35-45 sccm, heating to 45-55°C at a rate of 10-15°C / min, at an absolute pressure of 0.3-0.6 Pa and a power of 1.5-2.5 W / cm 2 The coating is carried out under the conditions of , the target substrate distance is 32-36mm, and the adhesion layer of the required thickness is obtained, and then the temperature is kept for 12-18min, and then the temperature is reduced at a rate of 10-15℃ / min.

[0079] Exemplarily, the method for depositing the bottom electrode layer includes magnetron sputtering: in an argon atmosphere of 35-45 sccm, heating to 45-55°C at a rate of 10-15°C / min, at an absolute pressure of 0.3-0.6 Pa and a power of 1.5-2.5 W / cm 2 The coating is carried out under the conditions of , the target substrate distance is 32-36mm, and the adhesion layer of the required thickness is obtained, and then the temperature is kept for 12-18min, and then the temperature is reduced at a rate of 10-15℃ / min.

[0080] In some embodiments, the method of preparing the stress release layer comprises magnetron sputtering.

[0081] When preparing the stress release layer, the present invention reduces the initial stress of the finally obtained piezoelectric wafer by setting the heating and cooling rates and the holding time.

[0082] In some embodiments, when preparing the stress release layer, the target-substrate distance is 28-32 mm, for example, 28 mm, 29 mm, 30 mm, 31 mm or 32 mm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0083] In some embodiments, when preparing the stress release layer, the sputtering atmosphere is a mixture of argon and oxygen, and the volume ratio of argon to oxygen is (1.2-1.8):1, for example, it can be 1.2:1, 1.3:1, 1.4:1, 1.5:1, 1.6:1 or 1.8:1, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0084] In some embodiments, when preparing the stress release layer, the temperature of magnetron sputtering is 180-220°C, for example, it can be 180°C, 190°C, 200°C, 210°C or 220°C, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0085] In some embodiments, when preparing the stress release layer, the heating rate of magnetron sputtering is 10-15°C / min, for example, it can be 10°C / min, 11°C / min, 12°C / min, 13°C / min, 14°C / min or 15°C / min, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0086] In some embodiments, when preparing the stress release layer, the absolute pressure of magnetron sputtering is 1-2Pa, for example, 1Pa, 1.2Pa, 1.5Pa, 1.8Pa or 2Pa, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0087] In some embodiments, when preparing the stress release layer, the coating power of magnetron sputtering is 1.5-2.5 W / cm 2 , for example, it can be 1.5W / cm 2 , 1.6W / cm 2 、1.8W / cm 2 , 2W / cm 2 , 2.1W / cm 2 , 2.4W / cm 2 or 2.5W / cm 2 , but not limited to the listed values, other unlisted values ​​within the numerical range are also applicable.

[0088] In some embodiments, when preparing the stress release layer, the holding time of magnetron sputtering is 12-18 minutes, for example, it can be 12 minutes, 14 minutes, 15 minutes, 16 minutes or 18 minutes, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0089] In some embodiments, when preparing the stress release layer, the cooling rate of magnetron sputtering is ≤15°C / min, for example, it can be 8°C / min, 10°C / min, 11°C / min, 12°C / min, 13°C / min, 14°C / min or 15°C / min, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0090] In some embodiments, the method of preparing the piezoelectric thin film layer includes magnetron sputtering.

[0091] When preparing the piezoelectric film layer, the present invention reduces the initial stress of the finally obtained piezoelectric wafer by setting the heating and cooling rates and the holding time.

[0092] In some embodiments, when preparing the piezoelectric film layer, the target-substrate distance is 38-42 mm, for example, 38 mm, 39 mm, 40 mm, 41 mm or 42 mm, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0093] In some embodiments, when preparing the piezoelectric thin film layer, the sputtering atmosphere is a mixture of argon and oxygen, and the volume ratio of argon to oxygen is (3-3.5):1, for example, it can be 3:1, 3.1:1, 3.2:1, 3.3:1, 3.4:1 or 3.5:1, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0094] In some embodiments, when preparing the piezoelectric thin film layer, the temperature of magnetron sputtering is 480-520°C, for example, it can be 480°C, 490°C, 500°C, 510°C or 520°C, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0095] In some embodiments, when preparing the piezoelectric thin film layer, the heating rate of magnetron sputtering is 14-16°C / min, for example, it can be 14°C / min, 14.5°C / min, 15°C / min, 15.5°C / min or 16°C / min, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0096] In some embodiments, when preparing the piezoelectric thin film layer, the absolute pressure of magnetron sputtering is 0.5-1Pa, for example, it can be 0.5Pa, 0.6Pa, 0.8Pa, 0.9Pa or 1Pa, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0097] In some embodiments, when preparing the piezoelectric thin film layer, the coating power of magnetron sputtering is 2-2.5 W / cm 2 , for example, it can be 2W / cm2 , 2.1W / cm 2 , 2.2W / cm 2 , 2.3W / cm 2 , 2.4W / cm 2 or 2.5W / cm 2 , but not limited to the listed values, other unlisted values ​​within the numerical range are also applicable.

[0098] In some embodiments, when preparing the piezoelectric thin film layer, the holding time of magnetron sputtering is 5-30 minutes, for example, it can be 5 minutes, 10 minutes, 15 minutes, 20 minutes, 25 minutes or 30 minutes, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0099] In some embodiments, when preparing the piezoelectric thin film layer, the cooling rate of magnetron sputtering is ≤16°C / min, for example, it can be 12°C / min, 14°C / min, 14.5°C / min, 15°C / min, 15.5°C / min or 16°C / min, but is not limited to the listed values, and other unlisted values ​​within the numerical range are also applicable.

[0100] In certain embodiments, the preparation method comprises the following steps:

[0101] (1) depositing an adhesion layer and a bottom electrode layer on the surface of the substrate layer in sequence to complete the preparation of the bottom electrode layer;

[0102] (2) preparing at least one stress release layer, wherein the method for preparing each stress release layer comprises magnetron sputtering: heating to 180-220°C at a rate of 10-15°C / min, at an absolute pressure of 1-2 Pa and a power of 1.5-2.5 W / cm 2 The coating is carried out under the conditions of to obtain a stress release layer of the required thickness, and then the temperature is kept for 12-18 minutes, and then the temperature is lowered at a rate of ≤15℃ / min;

[0103] (3) preparing a piezoelectric thin film layer, the method for preparing the piezoelectric thin film layer includes magnetron sputtering: heating to 480-520°C at a rate of 14-16°C / min, at an absolute pressure of 0.5-1 Pa and a power of 2-2.5 W / cm 2 The film is plated under the conditions of to obtain a piezoelectric film layer of desired thickness, and then kept warm for 5-30 minutes, and then cooled at a rate of ≤16°C / min.

[0104] In a specific embodiment of the present invention, the test method for the average stress of the piezoelectric wafer is the laser curvature method. Taking a six-inch wafer as an example, the stress on six diameters is measured once every 60° and the average value is taken.

[0105] Example 1

[0106] This embodiment provides a piezoelectric wafer, which includes a base layer 100, a bottom electrode layer 101, a stress release layer 201 and a piezoelectric film layer 102 stacked from bottom to top.

[0107] The base layer 100 is made of single crystal silicon and has a thickness of 600 μm;

[0108] The bottom electrode layer 101 is made of Mo and has a thickness of 150 nm;

[0109] The stress release layer 201 is made of strontium titanate and has a thickness of 200 nm;

[0110] The material of the piezoelectric film layer 102 is Pb(Zr x Ti 1-x )O3, x=0.52, thickness 2 μm;

[0111] The method for preparing the piezoelectric wafer described in this embodiment includes the following steps:

[0112] (1) depositing an adhesion layer and a bottom electrode layer 101 on the surface of the substrate layer 100 in sequence to complete the preparation of the bottom electrode layer 101;

[0113] The material of the adhesion layer is TiO2;

[0114] The method for depositing the adhesion layer includes magnetron sputtering: in an argon atmosphere of 40 sccm, the temperature is increased to 50°C at a rate of 12°C / min, at an absolute pressure of 0.5 Pa and a power of 2 W / cm 2 The coating was carried out under the conditions of , the target substrate distance was 35mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 15min, and then the temperature was reduced at a rate of 12℃ / min;

[0115] The method for depositing the bottom electrode layer 101 includes magnetron sputtering: in an argon atmosphere of 40 sccm, the temperature is raised to 50°C at a rate of 12°C / min, and the absolute pressure is 0.5 Pa and the power is 2 W / cm 2 The coating was carried out under the conditions of , the target substrate distance was 35mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 15min, and then the temperature was reduced at a rate of 12℃ / min;

[0116] (2) Preparing the stress release layer 201. The method for preparing the stress release layer 201 includes magnetron sputtering: in a mixed atmosphere of argon and oxygen, heating to 200° C. at a rate of 12° C. / min, at an absolute pressure of 1.5 Pa and a power of 2 W / cm 2 The coating is carried out under the conditions of , to obtain a stress release layer 201 of the desired thickness, and then the temperature is kept at 15 minutes, and then the temperature is lowered at a rate of 12°C / min;

[0117] The volume ratio of argon to oxygen is 3:2;

[0118] (3) Preparing the piezoelectric thin film layer 102. The method for preparing the piezoelectric thin film layer 102 includes magnetron sputtering: in a mixed atmosphere of argon and oxygen, the temperature is raised to 500° C. at a rate of 15° C. / min, and the absolute pressure is 0.8 Pa and the power is 2.3 W / cm 2 The film is plated under the conditions of , to obtain a piezoelectric film layer 102 of desired thickness, and then the temperature is kept at 20 minutes, and then the temperature is lowered at a rate of 15° C. / min;

[0119] The volume ratio of argon to oxygen is 3.5:1.

[0120] The structural schematic diagram of the piezoelectric wafer obtained in this embodiment is as follows Figure 2 The stress distribution diagram is shown in Figure 5 shown.

[0121] Example 2

[0122] This embodiment provides a piezoelectric wafer, which includes a base layer, a bottom electrode layer, a stress release layer, and a piezoelectric film layer stacked from bottom to top.

[0123] The base layer is made of single crystal silicon and has a thickness of 525 μm;

[0124] The bottom electrode layer is made of Mo and has a thickness of 50 nm;

[0125] The stress release layer is made of strontium titanate and has a thickness of 50 nm;

[0126] The material of the piezoelectric film layer is Pb(Zr x Ti 1-x )O3, x=0.52, thickness 1 μm;

[0127] The method for preparing the piezoelectric wafer described in this embodiment includes the following steps:

[0128] (1) depositing an adhesion layer and a bottom electrode layer on the surface of the substrate layer in sequence to complete the preparation of the bottom electrode layer;

[0129] The material of the adhesion layer is TiO2;

[0130] The method for depositing the adhesion layer includes magnetron sputtering: in an argon atmosphere of 35 sccm, the temperature is increased to 45°C at a rate of 10°C / min, at an absolute pressure of 0.3 Pa and a power of 1.5 W / cm 2 The coating was carried out under the conditions of , the target substrate distance was 32mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 12min, and then the temperature was reduced at a rate of 10℃ / min;

[0131] The method for depositing the bottom electrode layer includes magnetron sputtering: in an argon atmosphere of 35 sccm, the temperature is raised to 45°C at a rate of 10°C / min, at an absolute pressure of 0.3 Pa and a power of 1.5 W / cm 2 The coating was carried out under the conditions of , the target substrate distance was 32mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 12min, and then the temperature was reduced at a rate of 10℃ / min;

[0132] (2) preparing a stress release layer, wherein the method for preparing the stress release layer comprises magnetron sputtering: in a mixed atmosphere of argon and oxygen, heating to 180° C. at a rate of 10° C. / min, at an absolute pressure of 1 Pa and a power of 1.5 W / cm 2 The coating was carried out under the conditions of , to obtain a stress release layer of the required thickness, and then the temperature was kept for 12 minutes, and then the temperature was lowered at a rate of 10°C / min;

[0133] The volume ratio of argon to oxygen is 1.2:1;

[0134] (3) preparing a piezoelectric thin film layer, wherein the method for preparing the piezoelectric thin film layer comprises magnetron sputtering: in a mixed atmosphere of argon and oxygen, heating to 480° C. at a rate of 14° C. / min, at an absolute pressure of 0.5 Pa and a power of 2 W / cm 2 The film is plated under the conditions of to obtain a piezoelectric film layer of the desired thickness, and then kept warm for 5 minutes, and then cooled at a rate of 14°C / min;

[0135] The volume ratio of argon to oxygen is 3:1.

[0136] Example 3

[0137] This embodiment provides a piezoelectric wafer, which includes a base layer, a bottom electrode layer, a stress release layer, and a piezoelectric film layer stacked from bottom to top.

[0138] The base layer is made of single crystal silicon and has a thickness of 725 μm;

[0139] The bottom electrode layer is made of Mo and has a thickness of 200 nm;

[0140] The material of the stress release layer is strontium titanate, and the thickness is 300nm;

[0141] The material of the piezoelectric film layer is Pb(Zr x Ti 1-x )O3, x=0.52, thickness 5 μm;

[0142] The method for preparing the piezoelectric wafer described in this embodiment includes the following steps:

[0143] (1) depositing an adhesion layer and a bottom electrode layer on the surface of the substrate layer in sequence to complete the preparation of the bottom electrode layer;

[0144] The material of the adhesion layer is TiO2;

[0145] The method for depositing the adhesion layer includes magnetron sputtering: in an argon atmosphere of 45 sccm, the temperature is increased to 55°C at a rate of 15°C / min, at an absolute pressure of 0.6 Pa and a power of 2.5 W / cm 2 The coating was carried out under the conditions of , the target-substrate distance was 36mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 18min, and then the temperature was reduced at a rate of 15℃ / min;

[0146] The method for depositing the bottom electrode layer includes magnetron sputtering: in an argon atmosphere of 45 sccm, the temperature is raised to 55°C at a rate of 15°C / min, at an absolute pressure of 0.6 Pa and a power of 2.5 W / cm 2 The coating was carried out under the conditions of , the target-substrate distance was 36mm, and the adhesion layer of the required thickness was obtained, and then the temperature was kept for 18min, and then the temperature was reduced at a rate of 15℃ / min;

[0147] (2) preparing a stress release layer, wherein the method for preparing the stress release layer comprises magnetron sputtering: in a mixed atmosphere of argon and oxygen, heating to 220° C. at a rate of 15° C. / min, at an absolute pressure of 2 Pa and a power of 2.5 W / cm 2 The coating was carried out under the conditions of , to obtain a stress release layer of the required thickness, and then the temperature was kept for 18 minutes, and then the temperature was lowered at a rate of 15°C / min;

[0148] The volume ratio of argon to oxygen is 1.8:1;

[0149] (3) preparing a piezoelectric thin film layer, wherein the method for preparing the piezoelectric thin film layer comprises magnetron sputtering: in a mixed atmosphere of argon and oxygen, heating to 520° C. at a rate of 16° C. / min, at an absolute pressure of 1 Pa and a power of 2.5 W / cm 2 The film is plated under the conditions of to obtain a piezoelectric film layer of the desired thickness, and then kept warm for 30 minutes, and then cooled at a rate of 16°C / min;

[0150] The volume ratio of argon to oxygen is 3.2:1.

[0151] Example 4

[0152] This embodiment provides a piezoelectric wafer, which is the same as the first embodiment except that a 200 nm thick SiO2 layer 4 is provided on the surface of the base layer.

[0153] The structural schematic diagram of the piezoelectric wafer obtained in this embodiment is as follows Figure 3 The stress distribution diagram is shown in Figure 6 shown.

[0154] Comparative Example 1

[0155] This comparative example provides a piezoelectric wafer, which is the same as Example 1 except that the stress release layer 201 is not provided.

[0156] The structural schematic diagram of the piezoelectric wafer obtained in this embodiment is as follows Figure 1 The stress distribution diagram is shown in Figure 4 shown.

[0157] The average stress of the piezoelectric wafers provided in Examples 1-4 and Comparative Example 1 is shown in Table 1.

[0158] Table 1

[0159] Average stress (MPa) Example 1 +121 Example 2 +143 Example 3 +171 Example 4 +84 Comparative Example 1 +350

[0160] In Examples 5-7, except that the material of the base layer is changed as shown in Table 2, the rest is the same as Example 1.

[0161] Table 2

[0162]

[0163] In Examples 8-9, except that the cooling rate during the preparation of the stress release layer is changed as shown in Table 3, the rest is the same as in Example 1.

[0164] Table 3

[0165] Cooling rate (℃ / min) Average stress (MPa) Example 1 12 +121 Example 8 10 +115 Example 9 15 +134 Example 10 8 +106 Embodiment 11 18 +151

[0166] In Examples 12-16, except that the holding time during the preparation of the stress release layer is changed as shown in Table 4, the rest is the same as in Example 1.

[0167] Table 4

[0168]

[0169]

[0170] In Examples 17-20, except that the cooling rate during the preparation of the piezoelectric film layer is changed as shown in Table 5, the rest is the same as Example 1.

[0171] Table 5

[0172] Cooling rate (℃ / min) Average stress (MPa) Example 1 15 +121 Embodiment 17 14 +115 Embodiment 18 16 +129 Embodiment 19 12 +108 Embodiment 20 18 +134

[0173] In Examples 21-16, except that the holding time during the preparation of the piezoelectric film layer is changed as shown in Table 6, the rest is the same as in Example 1.

[0174] Table 6

[0175]

[0176]

[0177] In summary, the present invention changes the structure of the piezoelectric wafer and arranges a stress release layer composed of perovskite phase oxide between the bottom electrode layer and the piezoelectric film layer. The stress release layer composed of oxide is used to achieve better thermal matching and lattice constant matching between the piezoelectric film layer and the piezoelectric wafer, and can effectively reduce the stress from the substrate or the piezoelectric wafer preparation process, thereby reducing the initial stress of the piezoelectric wafer.

[0178] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention are within the protection scope and disclosure scope of the present invention.

Claims

1. A low-stress piezoelectric wafer, characterized in that: The piezoelectric wafer comprises a base layer, a bottom electrode layer, at least one stress release layer and a piezoelectric film layer stacked from bottom to top; The material of the stress release layer includes any one of aluminum oxide, aluminum nitride, lead dioxide, zirconium dioxide, titanium dioxide or perovskite phase oxide, or a combination of at least two thereof; The material of the piezoelectric film layer is Pb(Zr x Ti 1-x )O3, the value of x satisfies 0.2-0.

8.

2. The piezoelectric wafer according to claim 1, characterized in that: The material of the base layer includes any one of single crystal silicon, silicon carbide, magnesium oxide or strontium titanate, or a combination of at least two thereof.

3. The piezoelectric wafer according to claim 1 or 2, characterized in that: The material of the bottom electrode layer includes any one of titanium, platinum, gold, molybdenum, chromium or copper, or a combination of at least two thereof.

4. The piezoelectric wafer according to any one of claims 1 to 3, characterized in that: The material of the stress release layer includes any one of strontium titanate, strontium ruthenate, lanthanum nickelate or lead titanate, or a combination of at least two of them.

5. The piezoelectric wafer according to any one of claims 1 to 4, characterized in that: The thickness of the base layer is 525-725 μm; Preferably, the thickness of the bottom electrode is 50-100 nm; Preferably, the thickness of each stress release layer is 50-300 nm; Preferably, the piezoelectric film layer has a thickness of 1-5 μm.

6. A method for preparing a low-stress piezoelectric wafer as claimed in any one of claims 1 to 5, characterized in that: The preparation method comprises the following steps: A bottom electrode layer is prepared on the surface of the substrate layer, and then at least one stress release layer and a piezoelectric film layer are prepared to obtain the piezoelectric wafer.

7. The preparation method according to claim 6, characterized in that: The step of preparing the bottom electrode layer comprises: An adhesion layer and a bottom electrode layer are sequentially deposited on the surface of the substrate layer to complete the preparation of the bottom electrode layer.

8. The preparation method according to claim 6 or 7, characterized in that: The method for preparing the stress release layer comprises magnetron sputtering; Preferably, when preparing the stress release layer, the temperature of magnetron sputtering is 180-220°C; Preferably, when preparing the stress release layer, the heating rate of magnetron sputtering is 10-15°C / min; Preferably, when preparing the stress release layer, the absolute pressure of magnetron sputtering is 1-2 Pa; Preferably, when preparing the stress release layer, the coating power of magnetron sputtering is 1.5-2.5 W / cm 2 ; Preferably, when preparing the stress release layer, the holding time of magnetron sputtering is 12-18 minutes; Preferably, when preparing the stress release layer, the cooling rate of magnetron sputtering is ≤15°C / min.

9. The preparation method according to any one of claims 6 to 8, characterized in that: The method for preparing the piezoelectric thin film layer includes magnetron sputtering; Preferably, when preparing the piezoelectric thin film layer, the temperature of magnetron sputtering is 480-520° C.; Preferably, when preparing the piezoelectric thin film layer, the heating rate of magnetron sputtering is 14-16°C / min; Preferably, when preparing the piezoelectric thin film layer, the absolute pressure of magnetron sputtering is 0.5-1 Pa; Preferably, when preparing the piezoelectric thin film layer, the coating power of magnetron sputtering is 2-2.5 W / cm 2 ; Preferably, when preparing the piezoelectric thin film layer, the holding time of magnetron sputtering is 5-30 minutes; Preferably, when preparing the piezoelectric thin film layer, the cooling rate of magnetron sputtering is ≤16°C / min.

10. The preparation method according to any one of claims 6 to 9, characterized in that: The preparation method comprises the following steps: (1) depositing an adhesion layer and a bottom electrode layer on the surface of the substrate layer in sequence to complete the preparation of the bottom electrode layer; (2) preparing at least one stress release layer, wherein the method for preparing each stress release layer comprises magnetron sputtering: heating to 180-220°C at a rate of 10-15°C / min, at an absolute pressure of 1-2 Pa and a power of 1.5-2.5 W / cm 2 The coating is carried out under the conditions of to obtain a stress release layer of the required thickness, and then the temperature is kept for 12-18 minutes, and then the temperature is lowered at a rate of ≤15℃ / min; (3) preparing a piezoelectric thin film layer, the method for preparing the piezoelectric thin film layer includes magnetron sputtering: heating to 480-520°C at a rate of 14-16°C / min, at an absolute pressure of 0.5-1 Pa and a power of 2-2.5 W / cm 2 The film is plated under the conditions of to obtain a piezoelectric film layer of desired thickness, and then kept warm for 5-30 minutes, and then cooled at a rate of ≤16°C / min.

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