Method for optimizing service of lithographic apparatus

By optimizing the maintenance plan of lithography equipment and using productivity and error index data, the loss of productivity by repair operations is reduced, the productivity problems caused by lithography equipment maintenance are solved, and product quality and production efficiency are improved.

CN119137542APending Publication Date: 2024-12-13ASML NETHERLANDS BV
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Patent Information

Application Number
CN202380037748.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-01-25
Filing Date
2023-04-12
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Productivity loss caused by lithography equipment maintenance operations, especially overlapping errors caused by changes in the feature identification of replacement parts, affecting production efficiency and product quality.

Method used

By obtaining productivity data and error metric data, optimize the number of layers to be gradually stopped and repair plan indicators are reduced, and productivity losses are determined using conversion models and drive models to determine uncorrectable components to develop an effective repair plan.

Benefits of technology

Reduces the negative impact of lithography equipment maintenance actions on productivity, improves production efficiency and product quality, and reduces the need for rework and calibration loop reset.

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Abstract

A method of optimizing servicing of a lithographic apparatus is disclosed. The method includes obtaining productivity data related to productivity of the lithographic apparatus and error indicator data related to an effect of service action on exposure performance. The productivity data and the error indicator data are used to determine one or both of the following such that a loss of productivity indicators is reduced or minimized: the number of layers to be dropped in production of an integrated circuit prior to performing the repair action on the lithographic apparatus, lithographically exposing the layer on each of a plurality of substrates using the lithographic apparatus; and / or a maintenance plan indicator related to the frequency of execution of the maintenance action.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to European application No. 22173630.9 filed on May 16, 2022, European application No. 22174095.4 filed on May 18, 2022, and European application No. 23153278.9 filed on January 25, 2023, and the entire contents of these European applications are incorporated herein by reference. Technical Field

[0003] The present invention relates to methods and apparatus which may be used to manufacture devices, for example by photolithography, and to methods of manufacturing devices using photolithography. Background Art

[0004] A lithographic apparatus is a machine that applies a desired pattern to a substrate, usually to a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that case, a pattern forming device, alternatively referred to as a mask or reticle, can be used to produce a circuit pattern to be formed on a separate layer of the IC. This pattern can be transferred to a target portion (e.g., a portion including a die, a die, or multiple dies) on a substrate (e.g., a silicon wafer). The transfer of the pattern is usually performed via imaging onto a layer of radiation-sensitive material (resist) disposed on the substrate. Typically, a single substrate will include a network of adjacent target portions that are patterned in succession. These target portions are typically referred to as "fields."

[0005] In the manufacture of complex devices, many lithographic patterning steps are typically performed, thereby forming functional features in successive layers on a substrate. Therefore, a key aspect of the performance of a lithographic apparatus is the ability to correctly and accurately place an applied pattern relative to features placed in a previous layer (either by the same apparatus or by a different lithographic apparatus). For this purpose, the substrate is provided with one or more sets of alignment marks. Each mark is a structure whose position can be measured later using a position sensor (typically an optical position sensor). The lithographic apparatus comprises one or more alignment sensors, by which the position of the mark on the substrate can be accurately measured. Different types of marks and different types of alignment sensors from different manufacturers and different products of the same manufacturer are well known.

[0006] In other applications, metrology sensors are used to measure exposed structures on a substrate (or in a resist and / or after etching). A fast and non-invasive form of a specific inspection tool is a scatterometer, in which a radiation beam is directed onto a target on the surface of a substrate and the properties of the scattered or reflected beam are measured. Examples of known scatterometers include angle-resolved scatterometers of the type described in US2006033921A1 and US2010201963A1. In addition to measurement of feature shapes by reconstruction, such devices can also be used to measure diffraction-based overlays, as described in published patent application US2006066855A1. Diffraction-based overlay measurements using dark field imaging of diffraction orders enable overlay measurements of smaller targets. Examples of dark field imaging metrology can be found in international patent applications WO 2009 / 078708 and WO 2009 / 106279, the documents of which are hereby incorporated by reference in their entirety. Further developments of the technology have been described in published patent publications US20110027704A, US20110043791A, US2011102753A1, US20120044470A, US20120123581A, US20130258310A, US20130271740A and WO2013178422A1. These targets may be smaller than the illumination spot and may be surrounded by product structures on the wafer. Multiple gratings may be measured in one image using a composite grating target. The contents of all these applications are also incorporated herein by reference.

[0007] It is necessary to routinely perform maintenance actions on the lithography in order to replace degraded parts. It may be necessary to phase out (temporarily stop production) one or more layers in preparation for the maintenance action, because when different layers of the same substrate have been exposed before and after the maintenance action, the fingerprint or impact of the replaced part may cause larger overlay errors than the replaced part.

[0008] It is desirable to mitigate the impact of these maintenance actions on productivity. Summary of the invention

[0009] In a first aspect, the present invention provides a method for optimizing the maintenance of a lithographic device, the method comprising: obtaining productivity data related to the productivity of the lithographic device; obtaining error indicator data related to the impact of the maintenance action on the exposure performance; and using the productivity data and the error indicator data to determine one or both of the following items so that the loss of productivity indicator is reduced or minimized: the number of layers to be phased out in the production of integrated circuits before performing the maintenance action on the lithographic device, using the lithographic device to photolithographically expose the layers on each of a plurality of substrates; and / or a maintenance plan indicator related to the frequency of execution of the maintenance action.

[0010] In a second aspect, the present invention provides a method for determining maintenance plan indicators related to a plan of maintenance actions to be performed on a lithographic device, the method comprising: obtaining lithographic device monitoring data; obtaining layer cycle time data related to the time required for gradually shutting down multiple layers on each of multiple substrates using the lithographic device in a photolithographic manner; using a conversion model to convert the lithographic device monitoring data into error indicator data; using a drive model for the lithographic device to determine an uncorrectable component of the error indicator data; and determining the maintenance plan indicator based on performance criteria, the layer cycle time data and the uncorrectable component of the error indicator.

[0011] A computer program and a lithographic apparatus are also disclosed, the computer program and the lithographic apparatus being operable to perform the method of the first aspect or the second aspect.

[0012] The above and other aspects of the invention will be understood from consideration of the examples described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0014] Figure 1 Describe the lithographic equipment;

[0015] Figure 2 Schematically illustrated Figure 1 Measurement and exposure processes in devices;

[0016] Figure 3 (a) conceptually illustrates the canceling effect of the overlap of wafer stage feature marks in each layer in the absence of wafer stage swapping, and Figure 3 (b) conceptually illustrates the performance impact of such wafer stage swapping overlap;

[0017] Figure 4 is a graph of cumulative batches of wafers produced versus time, the graph illustrating the concept of C-time;

[0018] Figure 5 (a) and Figure 5 (b) Graphs each showing cumulative batches of wafers produced versus time for two different strategies of repair actions;

[0019] Figure 6 is a graph of C time versus number of layers phased out, the graph illustrating an embodiment of the present invention;

[0020] Figure 7 is a flow chart describing a method for planning maintenance actions according to an embodiment; and

[0021] Figure 8 yes Figure 7 Flowchart of the refinement of the method. DETAILED DESCRIPTION

[0022] Before describing embodiments of the present invention in detail, it is instructive to present an example environment in which embodiments of the present invention may be implemented.

[0023] Figure 1 A lithographic apparatus LA is schematically depicted. The apparatus comprises an illumination system (illuminator) IL configured to condition a radiation beam B (e.g. UV radiation or DUV radiation), a patterning device support or support structure (e.g. mask table) MT configured to support a patterning device (e.g. mask) MA and connected to a first positioner PM configured to accurately position the patterning device according to certain parameters, two substrate tables (e.g. wafer stages) WTa and WTb each configured to hold a substrate (e.g. resist coated wafer) W and each connected to a second positioner PW configured to accurately position the substrate according to certain parameters, and a projection system (e.g. refractive projection lens system) PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion C (e.g. comprising one or more dies) of the substrate W. A reference frame RF connects the various elements and serves as a reference for setting and measuring the position of the patterning device and substrate and the positions of features on the patterning device and substrate.

[0024] The illumination system may include various types of optical components for directing, shaping, or controlling radiation, such as refractive, reflective, magnetic, electromagnetic, electrostatic, or other types of optical components, or any combination thereof.

[0025] The patterning device support MT holds the patterning device in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions (such as whether the patterning device is held in a vacuum environment). The patterning device support may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device. The patterning device support MT may be, for example, a frame or table that may be fixed or movable as required. The patterning device support may ensure that the patterning device is in a desired position, for example relative to a projection system.

[0026] The term "patterning device" as used herein should be broadly interpreted as referring to any device that can be used to impart a radiation beam with a pattern in its cross-section so as to produce a pattern in a target portion of the substrate. It should be noted that, for example, if the pattern imparted to the radiation beam includes phase-shifting features or so called assist features, the pattern may not exactly correspond to the desired pattern in the target portion of the substrate. Typically, the pattern imparted to the radiation beam will correspond to a particular functional layer in a device (such as an integrated circuit) produced in the target portion.

[0027] As depicted herein, the apparatus is of the transmissive type (e.g., employing a transmissive patterning device). Alternatively, the apparatus may be of the reflective type (e.g., using a programmable mirror array of the type mentioned above, or using a reflective mask). Examples of patterning devices include masks, programmable mirror arrays, and programmable LCD panels. Any use of the term "reticle" or "mask" herein may be considered synonymous with the more general term "patterning device". The term "patterning device" may also be interpreted as referring to a device that stores pattern information in digital form for controlling the programmable patterning device.

[0028] The term "projection system" as used herein should be broadly interpreted as covering any type of projection system suitable for the exposure radiation used or for other factors such as the use of an immersion liquid or the use of a vacuum, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof. Any use of the term "projection lens" herein should be considered synonymous with the more general term "projection system".

[0029] The lithographic apparatus may also be of a type in which at least a portion of the substrate may be covered by a liquid having a relatively high refractive index, such as water, so as to fill the space between the projection system and the substrate. Immersion liquid may also be applied to other spaces in the lithographic apparatus, such as the space between the mask and the projection system. Immersion techniques are well known in the art for increasing the numerical aperture of a projection system.

[0030] In operation, the illuminator IL receives a radiation beam from a radiation source SO. For example, when the radiation source is an excimer laser, the radiation source and the lithographic apparatus may be separate entities. In these cases, the radiation source is not considered to form part of the lithographic apparatus, and the radiation beam is transferred from the radiation source SO to the illuminator IL by means of a beam delivery system BD comprising, for example, suitable directional mirrors and / or a beam expander. In other cases, for example, when the radiation source is a mercury lamp, the radiation source may be an integral part of the lithographic apparatus. The radiation source SO and the illuminator IL together with the beam delivery system BD may be referred to as a radiation system where necessary.

[0031] The illuminator IL may, for example, comprise an adjuster AD for adjusting the angular intensity distribution of the radiation beam, an integrator IN and a condenser CO. The illuminator may be used to condition the radiation beam, to have a desired uniformity and intensity distribution in its cross-section.

[0032] The radiation beam B is incident on a patterning device MA held on a patterning device support MT and is patterned by the patterning device. Having traversed the patterning device (e.g. a mask) MA, the radiation beam B passes through a projection system PS which focuses the beam onto a target portion C of the substrate W. With the aid of a second positioner PW and a position sensor IF (e.g. an interferometer, a linear encoder, a 2D encoder or a capacitive sensor), the substrate table WTa or WTb can be accurately moved, for example in order to position a different target portion C in the path of the radiation beam B. Similarly, the first positioner PM and a further position sensor (the further position sensor is not in the Figure 1 ) can be used to accurately position the patterning device (eg, mask) MA relative to the path of the radiation beam B, for example after mechanical retrieval from a mask library or during scanning.

[0033] Mask alignment marks M1, M2 and substrate alignment marks P1, P2 can be used to align the pattern forming device (e.g., mask) MA and substrate W. Although the substrate alignment marks occupy dedicated target portions as shown, the marks can be located in the spaces between target portions (these marks are called scribe alignment marks). Similarly, in the case where more than one die is set on the pattern forming device (e.g., mask) MA, the mask alignment marks can be located between the dies. Smaller alignment marks can also be included in the die among the device features, in which case it is desirable to make the markers as small as possible and without any imaging or process conditions that are different from adjacent features. An alignment system for detecting alignment marks is further described below.

[0034] The depicted apparatus can be used in a variety of modes. In scanning mode, the pattern forming device support (e.g., mask table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam is projected onto a target portion C (i.e., a single dynamic exposure). The speed and direction of the substrate table WT relative to the pattern forming device support (e.g., mask table) MT can be determined by the (re)magnification and image reversal characteristics of the projection system PS. In scanning mode, the maximum size of the exposure field limits the width of the target portion (in the non-scanning direction) in a single dynamic exposure, while the length of the scanning movement determines the height of the target portion (in the scanning direction). As is well known in the art, other types of lithographic apparatus and operating modes are possible. For example, stepping modes are well known. In so-called "maskless" lithography, the programmable pattern forming device is held stationary but with a changing pattern, and the substrate table WT is moved or scanned.

[0035] Combinations and / or variations on the above-described modes of use or entirely different modes of use may also be used.

[0036] The lithographic apparatus LA is of the so-called dual platform type, which has two substrate tables WTa, WTb and two stations - an exposure station EXP and a measurement station MEA - between which the substrate table can be exchanged. While exposing a substrate on one table at the exposure station, another substrate can be loaded onto another substrate table at the measurement station and various preparatory steps can be performed. This enables the production capacity of the apparatus to be increased to a large extent. The preparatory steps may include using a horizontal sensor LS to map the surface height profile of the substrate, and using an alignment sensor AS to measure the position of the alignment mark on the substrate. If the position sensor IF is not able to measure the position of the substrate table when it is at the measurement station and at the exposure station, a second position sensor can be provided to enable the position of the substrate table relative to the reference system RF to be tracked at the two stations. Instead of the dual platform arrangement shown, other arrangements are well known and available. For example, other lithographic apparatuses that provide a substrate table and a measurement table are well known. These substrate tables and measurement tables are docked together when performing preparatory measurements, and then separated when the substrate table is exposed.

[0037] Figure 2 The target portion (e.g., die) is exposed to Figure 1200 , a new substrate W' is loaded into the apparatus by a mechanism not shown. The two substrates are processed in parallel in order to increase the throughput of the lithographic apparatus.

[0038] Reference is first made to a reloaded substrate W', which may be a previously unprocessed substrate which has been prepared with a new photoresist for a first exposure in the apparatus. Typically, however, the lithographic process described will be only one step in a series of exposure and processing steps, such that the substrate W' has passed through this apparatus and / or other lithographic apparatus several times and may also have subsequent processes to undergo. With particular regard to the problem of improving overlay performance, the task is to ensure that the new pattern is accurately applied in the correct position on a substrate that has been subjected to one or more cycles of patterning and processing. These processing steps gradually introduce deformations in the substrate which must be measured and corrected to achieve satisfactory overlay performance.

[0039] Previous and / or subsequent patterning steps may be performed in other lithographic equipment as just mentioned and may even be performed in different types of lithographic equipment. For example, some layers in the device manufacturing process that are very demanding in terms of parameters such as resolution and overlap may be performed in more advanced lithographic tools than other layers that are less demanding. Thus, some layers may be exposed in immersion lithographic tools, while other layers are exposed in "dry" tools. Some layers may be exposed in tools operating at DUV wavelengths, while other layers are exposed using EUV wavelength radiation.

[0040] At 202, alignment measurements using substrate marks P1 etc. and an image sensor (not shown) are used to measure and record the alignment of the substrate relative to the substrate table WTa / WTb. In addition, an alignment sensor AS will be used to measure a number of alignment marks across the substrate W'. In one embodiment, these measurements are used to establish a "wafer grid" that very accurately maps the distribution of the marks across the substrate, including any deformations from the nominal rectangular grid.

[0041] At step 204, a level sensor LS is also used to measure the wafer height (Z) map relative to the XY position. Conventionally, the height map is only used to achieve accurate focus on the exposed pattern. In addition, the height map can be used for other purposes.

[0042] When the substrate W' is loaded, the recipe data 206 is received, which defines the exposure to be performed and also defines the properties of the wafer and the previously generated pattern and the pattern to be generated on the wafer. The measurements of the wafer position, wafer grid and height map obtained at 202, 204 are added to these recipe data so that the complete set of recipe and measurement data 208 can be transferred to the exposure station EXP. The measurements of the alignment data include, for example, the X position and Y position of the alignment target formed in a fixed or nominally fixed relationship with the product pattern of the product of the lithography process. These alignment data obtained just before the exposure are used to generate an alignment model with parameters that fit the model to the data. These parameters and the alignment model will be used during the exposure operation to correct the position of the pattern applied in the current lithography step. The model in use interpolates the position deviations between the measured positions. Conventional alignment models may include four, five or six parameters, which together define the translation, rotation and scaling of the "ideal" grid at different sizes. Advanced models using more parameters are well known.

[0043] At 210, wafers W' and W are exchanged so that the measured substrate W' becomes the substrate W entering the exposure station EXP. Figure 1 In the example apparatus of , this exchange is performed by exchanging supports WTa and WTb within the apparatus so that the substrates W, W' remain accurately clamped and positioned on those supports to preserve the relative alignment between the substrate table and the substrate itself. Therefore, once the tables have been exchanged, determining the relative position between the projection system PS and the substrate table WTb (formerly WTa) is necessary to control the exposure step using the measurement information 202, 204 for the substrate W (formerly W'). At step 212, reticle alignment is performed using the mask alignment marks M1, M2. In steps 214, 216, 218, scanning movements and radiation pulses are applied at successive target locations across the substrate W so as to complete the exposure of a certain number of patterns.

[0044] By using the alignment data and height map obtained at the measurement station in performing the exposure step, these patterns are accurately aligned relative to the desired locations and in particular relative to features previously placed on the same substrate. The exposed substrate, now labeled W'', is unloaded from the equipment at step 220 to undergo etching or other processes according to the exposed pattern.

[0045] Those skilled in the art will recognize that the above description is a simplified overview of the multiple very detailed steps involved in one example of a real manufacturing situation. For example, there will often be separate stages of coarse and fine measurements using the same or different markings, rather than measuring alignment in a single pass. The coarse and / or fine alignment measurement steps may be performed before the height measurement or after the height measurement, or interleaved.

[0046] Lithographic equipment or scanners require regular maintenance actions, such as to replace hardware components that are subject to degradation over time. By way of specific example, the wafer stage of a scanner degrades and requires periodic replacement. These hardware replacements and / or maintenance actions may result in an impact on performance.

[0047] exist Figure 3 Such an impact on performance is conceptually illustrated in . Overlap is an important parameter that describes the proper placement of a layer relative to the previously exposed (lower) layer. Each wafer stage imposes a wafer clamping effect or clamping feature mark on the substrate clamped to it, which should be corrected. However, as the wafer stage wears over time, the associated wafer clamping effect is affected (usually becomes larger), which will affect the positioning of the exposed structure on the substrate. Therefore, degradation of the wafer stage (and other elements) will lead to position errors; these errors can be divided into: lower frequency errors or correctable errors (CE), which can be measured and corrected within the scanner via a process correction loop (e.g., called advanced process correction or APC loop) (using suitable metrology tools); and higher frequency errors or uncorrectable errors (NCE), which cannot be corrected via APC because the effect of the error cannot be measured using a fast enough measurement and / or because the required correction cannot be actuated within the scanner, the effect of the error is captured by the model used to represent the metrology data.

[0048] In the absence of wafer stage swapping, the wafer clamping effect changes slowly enough that there is essentially no significant change between exposures of different layers on a single wafer. Because overlap is a relative measure between two layers, the NCE caused by this effect in each layer largely cancels itself out. Figure 3 (a), The lines for the first layer L1 and the second layer L2 represent the high frequency components of the wafer grid effect of a degraded wafer stage. While this degradation causes relatively large magnitude disturbances in the local placement of features in each exposure layer, these disturbances are generally similar enough in each layer to cancel themselves out in the overlap (i.e., the position errors are the same in each layer, which means that the misalignment between layers caused by this effect is relatively small). Therefore, the overlap NCE caused by such wafer stage feature identification in each layer will be small. In contrast, Figure 3(b) Conceptually illustrates the situation should there be a wafer stage swap between exposures of layers L1 and L2. The new stage produces an overall smaller wafer grid effect due to wafer stage imperfections; however, the effect of the old stage is present in the layer L1 exposure. Therefore, there is no longer a cancellation of this effect, resulting in a significantly larger NCE overlap penalty. This can cause APC uncorrectable jumps due to the difference in these feature identities, which can be large enough to affect yield (the fact that the error is uncorrectable means that these wafers cannot be recovered via rework).

[0049] This overlap penalty caused by hardware maintenance during wafer processing (i.e., between exposing different layers on the wafer) is generally referred to as the wafer work-in-process (WIP) effect. One strategy to mitigate this WIP effect is to "wind down" the exposure of several layers in the preparation phase of this maintenance action in order to reduce the number of wafers in process (wafers with only some of the required layers exposed) at the time of the activity. This wind down typically includes stopping the exposure of one or more layers in the weeks prior to the maintenance action, such as stopping the exposure of each layer in sequence from the bottom layer every few days to weeks or weeks between the wind down of each consecutive layer. Not all layers may be winded down, and optimizing the number of layers to be winded down is a goal of at least some of the methods disclosed herein. This wind down of layers represents a loss of productivity relative to continuing wafer production at the rate before the wind down was initiated.

[0050] In addition to the wind-down effect, there will be an accompanying wind-down effect (i.e., compared to full production rate) when restarting production after a repair action. For example, production of each layer that was winded down will need to be restarted before production of higher layers in the stack can begin. In addition, the correction loop or APC loop will need to be restarted because there is no (or insufficient) metrology data for the post-repair system. As a result, many of the first wafers exposed after the repair action will be non-compliantly exposed and will therefore require rework (stripping of the exposed resist, re-covering, and re-exposure).

[0051] This combination of ramp-down and ramp-up times produces what is often called C-time: the effect of these ramp-down and ramp-up periods relative to the time with no ramp-up or ramp-down. C-time is the time in addition to A-time (the nominal downtime for the actual maintenance action) and B-time (the margin applied to A-time).

[0052] Figure 4is a graph of the cumulative number of batches "#batches" versus time, the graph showing the production rate for a production cycle (solid line) including a gradual shutdown period, a maintenance action, and a gradual resumption period. The A+B time is the period of the actual maintenance action including the margin, during which the productivity is zero (machine downtime). The dotted line represents the nominal production rate in the absence of a gradual shutdown or gradual resumption time, and production continues at a constant rate until the maintenance action is reached, and production is restarted immediately after the activity. The C time is the time difference between the two graphs after the gradual resumption is completed and production has reached a roughly stable rate. It can be understood that the C time is usually much greater than the A+B time, and is also greater than the time illustrated in such a graph.

[0053] There are several different methods and strategies for handling maintenance actions. Figure 5 (a) and Figure 5 (b) The two extremes shown; these two extremes are known to be currently used. Other current strategies include strategies between the two extremes.

[0054] Figure 5 (a) is a graph of the cumulative number of batches "# batches" versus time, which illustrates the production rate for a first extreme strategy. This strategy may group several interventions together and perform maintenance actions MA only at a rate determined by the expected maximum useful life of the weakest part (e.g., wafer stage) (e.g., approximately two years). This approach will typically require all critical layers to be completely phased out over an extended phase-out period, since the now highly degraded wafer stage (and possibly other components) will be assigned a wafer grid feature signature that is very different than its replacement. This situation is limited by the wafer fab's cycle time (e.g., total turnaround time TAT, which determines the phase-out rate (and therefore the phase-in rate)).

[0055] Figure 5 (b) is an equivalent graph for a strategy at the other extreme, where maintenance actions MA are performed relatively frequently (e.g., multiple times a year), where there is no layer ramp-down at all. The ramp-up time will also be short and not limited by the fab cycle time. However, this strategy will result in a large number of WIP batches to be completed (and a specific APC thread will need to be reset for a large number of WIP batches), and at the same time a large number of new batches for which the APC needs to be restarted.

[0056] None of these extremes is likely to be optimal (e.g., producing a minimized C time). Therefore, a method is proposed to optimize or determine the level of gradual shutdown and / or maintenance action plan in order to find the amount of optimized (e.g., minimized or reduced) C time. This method can be based on the optimization / determination of the C time (or related indicator) cost function. More specifically, the proposed method can optimize or determine the number of layers to be gradually shut down and / or the maintenance action plan so that the productivity loss (e.g., according to the loss of productivity indicators, such as C time, or wafers / batches lost per day) is minimized or reduced. Depending on the use case, this can mean that the gradual shutdown time or the gradual resumption time dominates. In an embodiment, the optimization can include the joint optimization of the number of layers to be gradually shut down and the time between the maintenance action / maintenance action frequency (e.g., the maintenance action frequency indicator). Alternatively, the time between maintenance actions can be fixed, and the number of layers to be gradually shut down is optimized for a given maintenance action plan. In another alternative, the number of layers to be gradually shut down can be calculated based on the time between the optimized maintenance actions and the error indicator.

[0057] Input parameters to the cost function may include:

[0058] ● layer cycle time data relating to the time required for the layer to be phased out. This may be an average across all layers (e.g. total turnaround time or phase-out time divided by the number of layers), or may alternatively include the corresponding layer cycle time for each layer (in practice, each layer will have a different associated phase-out or cycle time);

[0059] • Baseline throughput parameters or baseline rate parameters related to the baseline production rate (eg, in terms of wafers per day or batches) prior to any phase-out. Layer cycle times and baseline rate parameters may be collectively referred to as productivity data.

[0060] ● Error indicators, such as correctable error indicators that describe (or represent) the expected APC correctable process variations for each layer (or more generally process variations that can be corrected via a process control loop used in the lithography process) , and / or an uncorrectable error metric describing (or representing) the expected APC uncorrectable process variations (or more generally, process variations that are not correctable via a process control loop used in the lithography process) for each layer Any of these error indicators can be determined based on experience from previous interventions and / or predicted / modeled based on scanner measurements such as leveling data due to root causes of wafer stages, lens measurements due to root causes of lenses. Such scanner data can be measured and converted to overlapping effects due to process drift due to component degradation, which will be removed when the degraded component is replaced, causing the process jump. This correctable and / or uncorrectable process jump can be determined layer by layer. Figure 7 To describe a novel method for determining such (correctable and / or uncorrectable) error indicators.

[0061] • Maintenance planning indicators, such as the time between maintenance actions (eg hardware component replacement). Alternatively, such parameters may be optimized for use in conjunction with the optimization of the number of tiers to be phased out.

[0062] Much of this data is measurable or can be obtained from (current or historical) scanner data or a virtual computing platform.When not optimized, maintenance planning indicators can be selected by the user.

[0063] Thus, an objective function may be constructed based on the input parameters listed above and an indicator describing the number of layers to be phased out. The cost of such a function (e.g., loss of productivity indicator) may be minimized in terms of finding the optimal number of layers to be phased out, and optionally also in terms of finding the optimal time between maintenance actions. The loss of productivity indicator may include C-time or related indicators such as lost wafers per day (WPD) or lost critical wafers per day. Critical wafers per day refers to wafer exposures on layers that are critical, for example, for overlap, and therefore require "cleaning" in order to avoid yield degradation caused by WIP effects. It is commonly observed that these layers are phased out, wherein the "released" scanner capacity is used to expose lower specification layers, so that the total scanner output remains stable. Thus, the loss of productivity indicator may appear as a reduction in critical WPD before / after a hardware swap, wherein the total WPD remains the same.

[0064] Just an exemplary cost function can be used to calculate the cost in terms of lost wafers per day or critical wafers per day. Calculated as:

[0065]

[0066] in: The baseline production rate before the phase-out (e.g. Figure 4 ), as described by the dotted line on is the turnaround time or total winding down time (see Figure 4 ), (# layers) is the total number of layers, is the number of layers to be phased out of production, TBA is the time between maintenance actions (reference Figure 5 (b)), is the number of layers that require APC circuit reset, where , is the expected APC correctable transition for layer i, and The number of wafers that need to be reworked for each layer. If the APC correctable jump is greater than the correctable error threshold (e.g., between 0.1 nm and 0.5 nm, between 0.2 nm and 0.4 nm, or between 0.25 nm and 0.35 nm), then only the APC loop needs to be reset. This will determine how many rework iterations per layer will need to be used for APC reset. Therefore, For example, a step function or a Heaviside function (i.e., 0 is below the correctable error threshold , and 1 is equal to and above the correctable error threshold ) function.

[0067] It can be appreciated that the first term relates primarily to a gradual shutdown and the second term relates primarily to a gradual resumption. The factor 2 of the first term allows for the fact that a gradual shutdown will also require a corresponding gradual resumption.

[0068] As already described, the cost The number of layers to be phased out can be optimized aspects are minimized, or are minimized to jointly optimize the time between maintenance actions TBA and the number of layers to be phased out .

[0069] In an alternative embodiment, the cost can be minimized in terms of optimizing the time TBA between maintenance actions. In this embodiment, the number of layers to be phased out The number of layers to be phased out may be determined based on an error indicator, more specifically an uncorrectable error indicator. In such an approach, the number of layers to be phased out may be determined as the number of all layers that are calculated to cause a transition that is uncorrectable (e.g., uncorrectable via the APC loop) error, the uncorrectable error being above an uncorrectable error threshold indicating an acceptable amount of uncorrectable error. Thus, the number of layers to be phased out may be determined as ,in, is the expected APC uncorrectable transition for layer i, and is a function such as a step function or a Heaviside function (i.e., 0 is below the uncorrectable error threshold , and 1 is equal to and above the uncorrectable error threshold ) function.

[0070] Therefore, the proposed method can be used to make decisions about the optimal moment of exchange in terms of C-time and / or to minimize C-time by balancing the gains and costs of C-time ramp-up and / or ramp-down solutions.

[0071] Figure 6 is the C time relative to the number of layers to be phased out . The two white points plotted relate to the extreme strategies described, namely, frequent maintenance actions with zero layers tapered off and maximizing time between maintenance actions with all layers tapered off. It can be seen that neither of these strategies is optimal in minimizing C-time. The minimum C-time is found at a point between these two extremes (black points), and can be determined using the methods disclosed herein. For lower numbers of layers tapered off from this C-time minimum point, tapered-on time dominates, and for higher numbers of layers tapered off from this point, tapered-off time dominates.

[0072] Figure 7 is a flow chart illustrating an alternative embodiment for making maintenance action decisions based on C-time predictions. This approach proposes predicting uncorrectable WIP effects based on inline monitoring mechanisms (scanner monitoring data 700) such as, for example, wafer stage quality assessment data, leveling data, lens model drift data, etc. Such scanner monitoring data 700 can be converted 710 into overlay (or other parameter of interest) effects using a suitable model such as a physical conversion model (e.g., a "Z2XY" model that determines deformation-induced overlay from leveling data and aberration sensitivity (aberration sensitivity can be calculated using lithography simulation)).

[0073] In the next step, the uncorrectable error portion of the overlap effect is calculated 720 using the drive model of the scanner. Such a step may include combining such uncorrectable effects into a decomposition of node overlap performance so as to predict the total overlap effect under the actual process control performance assumption. Conventional production data for multiple batches collected across different layers before and after the maintenance action can be used to assess node overlap performance. Such data can be used to assess variability on the product and its improvement due to the maintenance action (e.g., new scanner hardware). Because conventional production data is used, this does not include any WIP effects. The data can then be combined with the expected WIP effects determined based on the scanner data (e.g., Z2XY data). This can be achieved by means of a root mean square determination in terms of overlap effects, or by combining variability feature identification on the product with WIP impact feature identification and then using a die-in-spec statistical method to determine the potential yield impact.

[0074] Based on the current per-layer performance criteria (e.g., overlap specifications) and the number of layers and the total turnaround time or ramp-down time 730, the resulting productivity / C-time impact can be calculated 740. Based on the number of layers that will ultimately be out of compliance and the total turnaround time, a decision can be made 750 as to whether a maintenance action should be performed.

[0075] This approach allows direct prediction of improvements to the status quo. For example, in the case of a wafer stage swap, the WIP and C-time impact can be predicted by converting the leveling data into predicted overlay data via a gradient-based calculation (Z2XY).

[0076] It will be appreciated that the uncorrectable error indicator of the previous embodiment may be determined by performing such embodiment's steps 700, 710, and 720. Similarly, it will be appreciated that the correctable error indicator of the previous embodiment may be determined by performing steps 700 and 710, followed by a variation of step 720 in which the correctable error portion of the overlap effect (rather than the NCE portion) is calculated.

[0077] Figure 8 It is shown Figure 7 Flowchart of an extension of the described method. Historical scanner monitoring data 800 (e.g., of the same type as scanner monitoring data 700) may be fed to a machine learning model 810 (e.g., a recurrent neural network, such as a long short-term memory LSTM model) to predict overlap and / or NCE data 820 (e.g., equivalent to the output of steps 710 and / or 720 of the previous embodiment). This predicted overlap and / or NCE data 820 may be used together with the historical scanner monitoring data 800 to forecast 830 a "trend" in hardware degradation and / or predict NCE / C time impact at a given point in time in the future.

[0078] This forecast of future "trends" of degradation and C-time impact enables optimal planning of maintenance actions that require partial ramp down of a layer due to expected WIP / uncorrectable impacts. This optimal plan can balance ramp down, ramp back up, and APC resets to minimize WPD impacts.

[0079] In some cases, the effect of degradation of a component within a lithographic apparatus on an error metric may only be known at the full component level and not at the sub-component level. For example, the effect of degradation or drift of an individual lens element (sub-component) within a projection lens system on an error metric (data) may not be derived from typically acquired data, such as aberration data measured by a sensor within the lithographic apparatus. The acquired (measured) data typically relates to the total effect of all sub-components (in this case, all lens elements making up the projection lens system).

[0080] However, it is possible that the degradation of the whole component is dominated by the degradation of subcomponents, which are also usually replaceable (can be exchanged). For example, individual lens elements may degrade faster than other elements and it is therefore well known to determine the degradation rate of the entire projection lens system. Since the direct impact of lens elements on error indicators (e.g., aberrations and / or their induced overlay errors) is not well known, it is proposed to perform optical simulations or data-driven modeling of the lens system at multiple degradation stages of individual lens elements. By performing such simulations, it is possible to disentangle the total (system) effect and the specific impact of the lens element on the error indicator. This disentanglement is important because the impact on the error indicator is an important predictor for planning hardware (lens element) replacements and / or any gradual shutdown activities that can reduce WIP impacts and thus improve C time.

[0081] Therefore, it is proposed to develop a method for predicting the impact of degradation of a subcomponent on the error indicators (aberration level and / or uncorrectable overlay error) and to use this prediction for planning any other activities.

[0082] The first stage of the proposed method is based on separating the observed impact of the whole component on the error index and the sub-component by making use of the following data: i) component supplier data; ii) historical and current metrology data acquired by the lithographic apparatus; and iii) data indicating the point in time when a hardware replacement of a sub-component was performed. The supplier data relates to the impact of a certain sub-component on the performance of the whole component. For example, a supplier of a projection lens system may provide a degradation model of one or more individual lens elements and the impact on the aberration level of the whole projection lens system, typically based on the performance of a physical simulation model (e.g., ray tracing) and preferably based on (offline) metrology data characterizing one or more degraded lens elements. The aberration level is part of the historical and current metrology data acquired by the lithographic apparatus and by correlating such metrology data with data indicating the point in time when one or more lens elements were replaced, it is possible to construct a predictive model of what impact the replacement of individual lens elements will have on the aberration level at a certain point in time.

[0083] The subcomponent degradation model may be further improved by exploiting (lithography) usage data included in the productivity data of the lithographic apparatus. In the example where the subcomponent is a lens element, the usage data may include parameters indicative of the exposure dose, reticle transmission and illumination settings (pupil shape) used during an exposure operation of the lithographic apparatus. The mentioned parameters have a significant impact on the degradation mechanisms associated with the lens element(s), and knowledge of these parameters may significantly improve the accuracy of the lens element degradation model. The degradation model may, for example, be configured to predict feature signatures of error indicators across an image field of the lithographic apparatus.

[0084] Therefore, by using productivity data, component supplier data, metrology data or error indicator data (e.g., aberration data before and after a lens element swap activity) and hardware swap data, an aberration level or overlap prediction model can be established that can accurately predict the impact of a certain lens element swap on the error indicator (aberration / overlap) data at a certain point in time.

[0085] In the case where the error indicator data is aberration data, it may be beneficial to convert the aberration data into an impact on the error indicator (such as uncorrectable on-product overlay) after the aberration level prediction. In an example, this may be achieved by converting the predicted aberration level into a shift or drift of one or more patterns to be exposed by the lithographic apparatus before and after swapping of the individual lens element(s).

[0086] Thus, by using a lens element degradation model and translating the expected impact of lens element exchange on performance on the product, it can be determined at which point in time the impact of lens element exchange on, for example, overlay error will become too large to guarantee an acceptable impact on WIP and / or C-time. Thus, the user of the lithographic apparatus can make an educated assessment of the preferred moment to start tapering off one or more (critical) layers and prepare for the actual exchange of lens elements.

[0087] While specific embodiments of the invention have been described above, it will be appreciated that the invention may be practiced otherwise than as described.

[0088] Other embodiments of the invention are disclosed in the following list of numbered aspects:

[0089] 1. A method for optimizing maintenance of a lithographic apparatus, the method comprising:

[0090] obtaining productivity data related to productivity of the lithographic apparatus;

[0091] Obtaining error indicator data related to the effect of the maintenance action on exposure performance; and using the productivity data and the error indicator data to determine one or both of the following, such that the loss of productivity indicator is reduced or minimized: the number of layers to be phased out in the production of integrated circuits before performing the maintenance action on the lithographic equipment, using the lithographic equipment to photolithographically expose the layers on each of a plurality of substrates; and / or a maintenance plan indicator related to the frequency of performing the maintenance action.

[0092] 2. The method according to aspect 1, wherein the productivity data comprises:

[0093] Layer cycle time data relating to the time required to gradually decommission each layer; and

[0094] Baseline rate parameter data related to the baseline production rate.

[0095] 3. The method of clause 2, wherein the layer cycle time data comprises: an average layer cycle time value for each layer.

[0096] 4. The method of aspect 2, wherein the layer cycle time data comprises: a corresponding layer cycle time value for each layer.

[0097] 5. A method according to any one of aspects 2 to 4, wherein the loss of productivity indicators includes: the number of substrates lost relative to the baseline production rate, the number of critical substrates lost relative to the baseline production rate, and / or the time lost due to the gradual shutdown and corresponding gradual resumption compared to the baseline production rate.

[0098] 6. A method according to any preceding aspect, wherein the determining step comprises optimizing a cost function relating the loss of productivity index to the number of layers to be phased out, productivity data, maintenance plan index and error index data.

[0099] 7. A method according to aspect 6, wherein the cost function includes: a gradual shutdown term that describes the impact of a layer that is gradually shut down before the maintenance action on the loss of the productivity indicator, and a gradual resumption term that describes the impact of a layer that is gradually resumed after the maintenance action on the loss of the productivity indicator.

[0100] 8. A method according to any preceding aspect, comprising: obtaining lithography equipment monitoring data; and determining the error indicator data from the lithography equipment monitoring data.

[0101] 9. A method according to any preceding aspect, wherein the error indicator data is used to determine the number of layers of a corrective loop that requires reset following the maintenance action.

[0102] 10. The method of clause 9, wherein the error indicator data comprises correctable error indicator data including a correctable component of the error indicator data.

[0103] 11. A method according to clause 10, comprising determining the number of layers for which the correction loop needs to be reset as all layers calculated to cause a jump in the correctable error component above a correctable error threshold indicating an acceptable magnitude of the correctable error.

[0104] 12. The method according to aspect 10 or 11 comprises: obtaining lithography equipment monitoring data; converting the lithography equipment monitoring data into error indicator data using a conversion model; and determining a correctable component of the error indicator data using a drive model for the lithography equipment.

[0105] 13. The method of any of clauses 9 to 12, wherein the determining step comprises combining the determined number of layers for which the correction loop requires resetting with the number of substrates requiring rework due to the effects of the repair action.

[0106] 14. The method according to any preceding aspect, wherein the determining step optimizes the number of layers to be phased out and further uses a selected maintenance planning indicator related to the frequency of execution of the maintenance actions.

[0107] 15. The method according to any one of aspects 1 to 13, wherein the determining step is optimized maintenance plan index, and the number of layers to be phased out is determined based on error index data.

[0108] 16. The method of clause 15, wherein the error indicator data comprises uncorrectable error indicator data including an uncorrectable component of the error indicator data.

[0109] 17. The method of clause 16, comprising determining the number of layers to be phased out as all layers calculated to cause a jump in the uncorrectable error component above an uncorrectable error threshold indicative of an acceptable magnitude of uncorrectable error.

[0110] 18. A method according to aspect 16 or 17, comprising: obtaining lithography equipment monitoring data; converting the lithography equipment monitoring data into error indicator data using a conversion model; and determining an uncorrectable component of the error indicator data using a drive model for the lithography equipment.

[0111] 19. The method according to any one of aspects 1 to 13, wherein the determining step comprises: jointly optimizing the number of the layers to be phased out and a maintenance plan indicator.

[0112] 20. The method of clause 14 or 19, further comprising performing the winding down according to an optimized number of layers to be wound down.

[0113] 21. The method according to any one of aspects 15 to 19, further comprising: executing the maintenance action according to the optimized maintenance plan indicator.

[0114] 22. The method of any preceding aspect, wherein the correctable error indicator relates to overlay error.

[0115] 23. The method according to any preceding aspect, wherein the step of determining such that the loss of productivity index is reduced comprises determining such that the loss of productivity index is minimized.

[0116] 24. A method for determining maintenance plan indicators related to a plan of maintenance actions to be performed on a lithographic device, the method comprising: obtaining lithographic device monitoring data; obtaining layer cycle time data related to the time required to gradually shut down the production of multiple layers on each of multiple substrates being photolithographically exposed using the lithographic device; using a conversion model to convert the lithographic device monitoring data into error indicator data; using a drive model for the lithographic device to determine an uncorrectable component of the error indicator data; determining the maintenance plan indicator based on performance criteria, the layer cycle time data and the uncorrectable component of the error indicator.

[0117] 25. A method according to aspect 24, wherein the lithography equipment monitoring data includes historical lithography equipment monitoring data, and the conversion model includes a machine learning model; and the method also includes: using the model to predict one or both of the following: future trends in degradation of hardware components of the lithography equipment, the maintenance actions being related to the hardware components; and / or future trends in loss of productivity indicators and / or uncorrectable components of error indicators.

[0118] 26. A computer program comprising program instructions operable to perform the method according to any one of clauses 1 to 25 when run on a suitable device.

[0119] 27. A non-transitory computer program carrier comprising a computer program according to clause 26.

[0120] 28. A processing system comprising a processor and storage means comprising a computer program according to clause 26.

[0121] 29. A lithographic apparatus comprising the processing system according to clause 28.

[0122] 30. The lithographic apparatus of clause 29, further comprising: a patterning device support for supporting the patterning device; a projection optical device for projecting a pattern onto the patterning device; and a substrate support for supporting the substrate.

[0123] 31. The method according to aspect 1, further comprising:

[0124] obtaining a degradation model for a subcomponent, the subcomponent being a portion of a component having an overall contribution to the error index data, wherein the degradation model predicts a contribution of degradation of the subcomponent to the overall contribution at a plurality of time points; and

[0125] In addition to the production rate data and the error indicator data, the degradation model is used to determine a future point in time to implement a gradual shutdown of the number of layers and / or to perform a maintenance action on the sub-component.

[0126] 32. The method according to aspect 31 also includes: obtaining usage data of the lithographic equipment related to one or more characteristics of the lithographic equipment that affect the degradation rate of the subcomponent; and using the usage data as input to the obtained degradation model to enhance the determination of future time points.

[0127] 33. A method according to clause 31 or 32, wherein the degradation model is based on a physical model of the sub-components and components.

[0128] 34. A method according to clause 33, wherein the degradation model is additionally based on measurement data associated with the subcomponent, preferably measurement data relating to one or more degradation levels.

[0129] 35. A method according to any of clauses 31 to 34, wherein the degradation model is configured to predict the impact of the degradation on feature identification of the lithographic apparatus.

[0130] Although specific reference may be made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention may be used in other applications (e.g., imprint lithography) and is not limited to optical lithography where the context permits. In imprint lithography, a topography in a patterning device defines a pattern produced on a substrate. The topography of the patterning device may be pressed into a layer of resist supplied to a substrate on which the resist is cured by applying electromagnetic radiation, heat, pressure, or a combination thereof. After the resist has cured, the patterning device is removed from the resist, leaving a pattern in the resist.

[0131] As used herein, the terms "radiation" and "beam" encompass all types of electromagnetic radiation, including ultraviolet (UV) radiation (e.g., having a wavelength of at or about 365 nm, 355 nm, 248 nm, 193 nm, 157 nm, or 126 nm) and extreme ultraviolet (EUV) radiation (e.g., having a wavelength in the range of 1 nm to 100 nm), as well as particle beams, such as ion beams or electron beams.

[0132] The term "lens", where the context permits, may refer to any one or combination of various types of optical components, including refractive, reflective, magnetic, electromagnetic, and electrostatic types. Reflective components may be used in devices operating in the UV and / or EUV range.

[0133] The breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A method for optimizing maintenance of a lithographic apparatus, the method comprising: obtaining productivity data related to productivity of the lithographic apparatus; Obtain error indicator data related to the impact of maintenance actions on exposure performance; and The productivity data and error indicator data are used to determine the number of layers to be phased out in the production of integrated circuits before the maintenance action is performed on the lithography equipment, so that the loss of productivity indicator is reduced. The lithography equipment is used to photolithographically expose the layers on each of a plurality of substrates.

2. The method according to claim 1, wherein: The productivity data and the error index data are further used to determine a maintenance planning index related to a frequency of performance of the maintenance action.

3. The method according to claim 1, wherein: The productivity data includes: Layer cycle time data relating to the time required to gradually decommission each layer; and Baseline rate parameter data related to the baseline production rate.

4. The method according to claim 3, wherein: The layer cycle time data includes an average layer cycle time value for each layer.

5. The method according to claim 3, wherein: The layer cycle time data includes a corresponding layer cycle time value for each layer.

6. The method according to claim 3, wherein: The loss of productivity indicator includes: the number of substrates lost relative to the baseline production rate, the number of critical substrates lost relative to the baseline production rate, and / or the time lost due to the winding down and corresponding winding back up compared to the baseline production rate.

7. The method according to claim 2, wherein: The determining step includes optimizing a cost function relating the loss of the productivity index to the number of layers to be phased out, productivity data, maintenance plan index, and error index data.

8. The method according to claim 7, wherein: The cost function includes: a gradual shutdown term describing the impact of a layer that is gradually shut down before the maintenance action on the loss of the productivity index, and a gradual resumption term describing the impact of a layer that is gradually resumed after the maintenance action on the loss of the productivity index.

9. The method according to claim 1, further comprising: Obtain lithography equipment monitoring data; and determining the error indicator data from the lithographic equipment monitoring data.

10. The method according to claim 1, wherein: The error indicator data is used to determine the number of layers at which the correction loop needs to be reset following the maintenance action.

11. The method according to claim 10, wherein: The error indicator data includes correctable error indicator data including a correctable component of the error indicator data.

12. The method according to claim 11, comprising: The number of layers for which the correction loop needs to be reset is determined as all layers calculated to cause a jump in the correctable error component above a correctable error threshold indicating an acceptable magnitude of a correctable error.

13. The method according to claim 11, comprising: Obtain lithography equipment monitoring data; Using a conversion model to convert the lithography equipment monitoring data into error indicator data; as well as A correctable component of the error index data is determined using a drive model for the lithographic apparatus.

14. The method according to claim 2, wherein: The determining step includes: jointly optimizing the number of the layers to be gradually shut down and the maintenance plan indicator.

15. The method according to claim 1, further comprising: obtaining a degradation model for a subcomponent, the subcomponent being a portion of a component having an overall contribution to the error index data, wherein the degradation model predicts a contribution of degradation of the subcomponent to the overall contribution at a plurality of time points; and The degradation model is used in addition to the production rate data and the error indicator data to determine a future point in time at which a gradual shutdown of the number of layers is implemented.

16. The method according to claim 2, further comprising: obtaining a degradation model for a subcomponent, the subcomponent being a portion of a component having an overall contribution to the error index data, wherein the degradation model predicts a contribution of the subcomponent to the overall contribution at a plurality of points in time; and The degradation model is used in addition to the productivity data and the error index data to determine a future point in time at which to implement the maintenance action on the subcomponent.

17. The method according to claim 15, further comprising: obtaining usage data of the lithographic apparatus related to one or more characteristics of the lithographic apparatus that affect a degradation rate of the subcomponent; and using said usage data as an input to said derived degradation model to enhance said determination of said future point in time to implement a gradual decommissioning of said number of layers.

18. The method according to claim 16, further comprising: obtaining usage data of the lithographic apparatus related to one or more characteristics of the lithographic apparatus that affect a degradation rate of the subcomponent; and using the usage data as an input to the derived degradation model to enhance the determination of the future point in time at which to implement the maintenance action on the subcomponent.

19. A computer program comprising program instructions operable to perform the method according to any one of claims 1 to 18 when run on a suitable device.

20. A non-transitory computer program carrier comprising a computer program according to claim 19.

Citation Information

Patent Citations

  • Method and apparatus for angular-resolved spectroscopic lithography characterization

    US20060033921A1

  • Method and apparatus for angular-resolved spectroscopic lithography characterization

    US20060066855A1

  • Inspection Apparatus, Lithographic Apparatus, Lithographic Processing Cell and Inspection Method

    US20100201963A1

  • Methods and Scatterometers, Lithographic Systems, and Lithographic Processing Cells

    US20110027704A1

  • Metrology Method and Apparatus, Lithographic Apparatus, Device Manufacturing Method and Substrate

    US20110043791A1