Array substrate, light-emitting substrate and display device

Abstract

The invention provides an array substrate, a light-emitting substrate and a display device. The array substrate comprises a substrate body, a conducting layer located on one side of the substrate body, a light adjusting layer located on the side, away from the substrate body, of the conducting layer, a plurality of signal lines located on the side, away from the conducting layer, of the substrate body, and a protection layer located between the light adjusting layer and the substrate body. The conductive layer comprises a plurality of bonding pads, and the bonding pads are used for being electrically connected with electronic elements. The orthographic projection of at least part of the light adjusting layer on the substrate is not overlapped with the orthographic projection of the conductive layer on the substrate, and the light adjusting layer is located in a gap between the orthographic projections of the adjacent signal lines on the substrate. The orthographic projection of the protection layer on the substrate at least covers the orthographic projection of at least part of the light adjusting layer on the substrate.

Description

Array substrate, light-emitting substrate, and display device Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate, a light-emitting substrate, and a display device. Background Art

[0002] Mini-LED and Micro LED are new LED display technologies derived from fine-pitch LEDs, also known as submillimeter light-emitting diodes. They are trending in the display field due to their superior display quality, lightweight design, high contrast, and long lifespan.

[0003] Summary of the Invention

[0004] The present application provides an array substrate, a light-emitting substrate, and a display device.

[0005] According to a first aspect of an embodiment of the present application, an array substrate is provided. The array substrate comprises:

[0006] substrate;

[0007] a conductive layer located on one side of the substrate, the conductive layer comprising a plurality of pads for electrically connecting to electronic components;

[0008] a light adjustment layer located on a side of the conductive layer facing away from the substrate;

[0009] a plurality of signal lines located on a side of the substrate facing away from the conductive layer; an orthographic projection of at least a portion of the light adjustment layer on the substrate having no overlap with an orthographic projection of the conductive layer on the substrate, and located in a gap between orthographic projections of adjacent signal lines on the substrate;

[0010] A protective layer is located between the light adjustment layer and the substrate, and an orthographic projection of the protective layer on the substrate at least covers an orthographic projection of the at least partial area on the substrate.

[0011] In one embodiment, the protective layer is made of a conductive material, and the protective layer is connected to a constant electrical signal.

[0012] In one embodiment, the orthographic projection of the protection layer on the substrate covers a gap between any two adjacent orthographic projections of the signal lines on the substrate.

[0013] In one embodiment, the protection layer includes a plurality of protection portions, and an orthographic projection of one protection portion on the substrate covers an orthographic projection of one gap on the substrate.

[0014] In one embodiment, an edge of an orthographic projection of the protection portion on the substrate is located outside an edge of an orthographic projection of one of the gaps on the substrate.

[0015] In one embodiment, the protective layer includes at least one protective part group, the protective part group includes a plurality of the protective parts arranged in parallel; the array substrate includes at least one signal line group, the signal line group includes a plurality of the signal lines arranged in parallel, and the arrangement direction of the signal lines of the signal line group is the same as the arrangement direction of the protective parts of the protective part group; the protective layer also includes a connecting part, and at least two of the protective parts in the same protective part group are connected through the connecting part.

[0016] In one embodiment, ends of the protection portions of the same protection portion group located on the same side are respectively connected to the connecting portion.

[0017] In one embodiment, the protection layer is located on a side of the conductive layer away from the light adjustment layer.

[0018] In one embodiment, the protective layer is made of a conductive material, and the array substrate further includes an insulating layer located between the protective layer and the conductive layer.

[0019] In one embodiment, the conductive layer includes a wire connected to a constant signal, the insulating layer is provided with a through hole, and the wire is connected to the protective layer through the through hole.

[0020] In one embodiment, the material of the protective layer is a non-conductive material, and the orthographic projection of the protective layer on the substrate covers the orthographic projection of the light adjustment layer on the substrate.

[0021] In one embodiment, the conductive layer includes a first sub-conductive layer and a second sub-conductive layer located on a side of the first sub-conductive layer facing away from the substrate, and the pad is located in the second sub-conductive layer.

[0022] According to a second aspect of an embodiment of the present application, a light-emitting substrate is provided, which includes an electronic component and the above-mentioned array substrate; the electronic component is connected to the pad; and the electronic component includes a light-emitting component.

[0023] In one embodiment, the light-emitting element is a Mini LED or a Micro LED.

[0024] According to a third aspect of the embodiments of the present application, a display device is provided, comprising the above-mentioned light-emitting substrate.

[0025] The array substrate, light-emitting substrate, and display device provided by the embodiments of the present application, by disposing a protective layer between the light-adjusting layer and the substrate, wherein the orthographic projection of at least a portion of the light-adjusting layer on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate, and is located in the gap between the orthographic projections of adjacent signal lines on the substrate, the orthographic projection of the protective layer on the substrate covers the orthographic projection of at least a portion of the light-adjusting layer on the substrate. When the laser used to prepare the signal lines propagates to the protective layer, the energy of the laser is weakened. Consequently, when the laser is transmitted to the at least portion of the light-adjusting layer, the energy of the laser is weaker. This can prevent the at least portion of the light-adjusting layer from absorbing a large amount of laser energy, causing bulging, discoloration, or peeling from adjacent film layers. For areas where the orthographic projection of the conductive layer on the substrate does not overlap with the orthographic projection of the protective layer on the substrate, the conductive layer can also weaken the laser energy when the laser is transmitted to this area, preventing other areas of the light-adjusting layer from absorbing a large amount of laser energy, causing bulging, discoloration, or peeling from adjacent film layers. It can be seen that the embodiments of the present application can improve the reliability of the array substrate and increase product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] FIG1 is a partial cross-sectional view of an array substrate provided by an exemplary embodiment of the present application;

[0027] FIG2 is a schematic diagram of a partial structure of an array substrate provided by an exemplary embodiment of the present application;

[0028] FIG3 is a schematic diagram of a partial structure of a first sub-conductive layer provided by an exemplary embodiment of the present application;

[0029] FIG4 is a partial cross-sectional view of an array substrate provided by another exemplary embodiment of the present application;

[0030] FIG5 is a schematic diagram of a partial structure of a protective layer provided by an exemplary embodiment of the present application;

[0031] FIG6 is a partial cross-sectional view of an array substrate provided by yet another exemplary embodiment of the present application. DETAILED DESCRIPTION

[0032] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0033] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. As used in this application and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0034] It should be understood that although the terms first, second, third, etc. may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0035] The embodiments of the present application provide an array substrate, a light-emitting substrate, and a display device. The array substrate, light-emitting substrate, and display device in the embodiments of the present application are described in detail below with reference to the accompanying drawings. The features of the following embodiments may complement or be combined with each other unless they conflict.

[0036] The present invention provides an array substrate. As shown in FIG1 , the array substrate includes a substrate 10 , a conductive layer 20 , a light adjustment layer 30 , a plurality of signal lines, and a protective layer 40 .

[0037] The conductive layer 20 is located on one side of the substrate 10 and includes a plurality of solder pads 201 for electrically connecting to electronic components. The light adjustment layer 30 is located on the side of the conductive layer 20 facing away from the substrate 10. The plurality of signal lines are located on the side of the substrate 10 facing away from the conductive layer 20 and are electrically connected to the solder pads 201. The orthographic projection of at least a portion of the light adjustment layer 30 on the substrate 10 does not overlap with the orthographic projection of the conductive layer 20 on the substrate 10, and is located in the gap between the orthographic projections of adjacent signal lines on the substrate 10. The protective layer 40 is located between the light adjustment layer 30 and the substrate 10, and the orthographic projection of the light adjustment layer 30 on the substrate 10 at least covers the orthographic projection of at least a portion of the area on the substrate 10; the protective layer 40 is configured to attenuate the energy of the laser used to prepare the signal lines when the laser propagates to the protective layer 40.

[0038] A plurality of signal lines are provided on the side of the substrate 10 facing away from the conductive layer 20. As shown in FIG2 , there are gaps 52 between adjacent signal lines 51. When preparing the signal lines 51 located on the side of the substrate 10 facing away from the conductive layer 20, a large area of ​​a conductive material layer is first formed on the side of the substrate 10 facing away from the conductive layer 20. The conductive material layer is then laser etched. The retained area is the signal line 51, and the area etched away by the laser is the gap 52 between adjacent signal lines. In other words, the path of the laser etching is the gap 52 between adjacent signal lines 51. During the process of laser etching the conductive material layer, it will propagate through the substrate 10 toward the light adjustment layer 30.

[0039] In an array substrate provided by an embodiment of the present application, a light adjustment layer is provided on a side of the conductive layer facing away from the substrate. The light adjustment layer can reduce the effect of the reflective effect of the conductive layer on the luminous effect of the light-emitting substrate on which the array substrate is located, thereby helping to improve the color shift problem of the light-emitting substrate. A protective layer is provided between the light adjustment layer and the substrate. The orthographic projection of at least a portion of the light adjustment layer on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate and is located in the gap between the orthographic projections of adjacent signal lines on the substrate. The orthographic projection of the protective layer on the substrate covers the orthographic projection of the at least portion of the light adjustment layer on the substrate. When the laser used to prepare the signal line propagates to the protective layer, the energy of the laser is weakened. Consequently, the laser energy is weaker when the laser is transmitted to the at least portion of the light adjustment layer, thereby preventing the at least portion of the light adjustment layer from absorbing a large amount of laser energy and causing problems such as bulging, discoloration, and peeling from adjacent film layers. For areas where the orthographic projection of the conductive layer on the substrate does not overlap with the orthographic projection of the protective layer on the substrate, the conductive layer can also weaken the laser energy when the laser is transmitted to these areas, thereby preventing other areas of the light adjustment layer from absorbing a large amount of laser energy and causing problems such as bulging, discoloration, and peeling from adjacent film layers. It can be seen that the embodiments of the present application can improve the reliability of the array substrate and increase the product yield.

[0040] In one embodiment, the substrate 10 can be a flexible substrate or a rigid substrate. The material of the flexible substrate can include one or more of polyimide, polyethylene terephthalate, polycarbonate, and organic resin materials. The organic resin material can include epoxy resin, triazine, silicone resin, or polyimide. The rigid substrate includes any one of a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, etc.; or any one of a semiconductor substrate such as a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, or an SOI (Silicon On Insulator) substrate.

[0041] In one embodiment, as shown in FIG1 , the protective layer 40 is located on the side of the conductive layer 20 facing away from the light-adjusting layer 30. This configuration allows the shape and position of the protective layer 40 to be tailored to the area of ​​the light-adjusting layer 30 that needs to be protected, without regard to the position of the conductive layer 20. This helps prevent problems such as bulging, discoloration, and separation of the light-adjusting layer 30 from adjacent layers.

[0042] In one embodiment, as shown in Figure 1, the array substrate further includes a buffer layer 50 located between the conductive layer 20 and the substrate 10. The buffer layer 50 may be made of an inorganic material, such as at least one of silicon oxide and silicon nitride.

[0043] In one embodiment, the electronic component electrically connected to the pad 201 includes a light-emitting element having a size of 100 microns or less, and the electronic component may also include a driver chip having a size of 100 microns or less. The light-emitting element having a size of 100 microns or less can be a mini LED or a micro LED. The size of a mini LED ranges from approximately 100 μm to 500 μm, while the size of a micro LED is less than 100 μm. The driver chip can be a chip used to provide a signal to the light-emitting element to cause it to emit light.

[0044] In one embodiment, the first sub-conductive layer 21 is generally used to arrange various signal lines, such as common voltage lines, drive voltage lines, source power lines, source address lines, data lines, etc. Optionally, the thickness of the first sub-conductive layer 21 ranges from 1.5 to 7 μm, and its material includes copper. For example, a stacked material such as MoNb / Cu / MoNb can be formed by sputtering, where the bottom layer MoNb is used to improve adhesion, the middle layer Cu is used to transmit electrical signals, and the top layer MoNb is used for oxidation prevention. The first sub-conductive layer can also be formed by electroplating, first forming a seed layer MoNiTi to increase the grain nucleation density, and then forming an oxidation prevention layer MoNiTi after electroplating.

[0045] In one embodiment, as shown in FIG. 1 , the conductive layer 20 includes a first sub-conductive layer 21 and a second sub-conductive layer 22 located on a side of the first sub-conductive layer 21 facing away from the substrate.

[0046] In one embodiment, as shown in FIG3 , the signal lines 211 located in the first sub-conductive layer 21 are arranged in parallel along a first direction X, and the signal lines 211 extend along a second direction Y. The signal lines 211 located in the first sub-conductive layer 21 can be divided into a plurality of signal line groups 202 , each signal line group 202 including five different adjacently arranged signal lines 211 . The signal lines 211 in each signal line group 202 can be used to provide signals to the same column of light-emitting elements.

[0047] In one embodiment, each signal line of the first sub-conductive layer 21 is connected to a signal line on the side of the substrate 10 away from the conductive layer 20 via a routing line provided on the side of the array substrate. This arrangement helps to reduce the frame size of the array substrate and improve the user experience.

[0048] In one embodiment, the second sub-conductive layer 22 includes a plurality of pads 201 and a plurality of connecting wires, which are, for example, arranged to connect a plurality of light-emitting devices of the same light-emitting unit in series. Optionally, the thickness of the second sub-conductive layer is approximately The material can be, for example, a stacked material of MoNb / Cu / CuNi, where the bottom layer MoNb is used to improve adhesion, the middle layer Cu is used to transmit electrical signals, and the top layer CuNi can take into account both anti-oxidation and solid crystal firmness.

[0049] In one embodiment, as shown in FIG1 , the array substrate further includes a first insulating material layer 60 positioned between the first sub-conductive layer 21 and the second sub-conductive layer 22. The first insulating material layer 60 is provided with a first opening 601, through which the first sub-conductive layer 21 overlaps the second sub-conductive layer 22. The first insulating material layer 60 insulates portions of the first sub-conductive layer 21 and the second sub-conductive layer 22 that do not require electrical connection, and ensures that the capacitance between the connecting traces and the signal lines meets requirements. Another insulating layer may also be provided between the first sub-conductive layer 21 and the second sub-conductive layer 22.

[0050] In one embodiment, as shown in FIG1 , the first insulating material layer 60 includes a first organic layer 61 . The first opening 601 includes a first sub-opening 611 disposed in the first organic layer 61 .

[0051] In one embodiment, as shown in Figure 1, the first insulating material layer 60 further includes a first inorganic layer 62 located on a side of the first organic layer 61 away from the substrate 10. The first opening 601 includes a second sub-opening 621 located in the first inorganic layer 62. The edge of the orthographic projection of the second sub-opening 621 on the substrate 10 is located inward of the edge of the orthographic projection of the first sub-opening 611 on the substrate. With this arrangement, the first inorganic layer 62 covers the side surfaces of the first sub-opening 611 in the first organic layer 61, helping to block moisture and reduce the amount of moisture intrusion into the first sub-conductive layer, thereby improving the reliability of the array substrate.

[0052] In one embodiment, as shown in Figure 1, the first insulating material layer 60 further includes a second inorganic layer 63 located on the side of the first organic layer 61 closer to the substrate 10. The first opening 601 further includes a third sub-opening 631 disposed on the second inorganic layer 63. The orthographic projection of the third sub-opening 631 on the substrate 10 coincides with the orthographic projection of the second sub-opening 621 on the substrate 10. With this arrangement, the first inorganic layer 62 and the second inorganic layer 63 can be fabricated using the same mask, which helps reduce the manufacturing cost of the array substrate.

[0053] In one embodiment, as shown in FIG1 , the array substrate further includes a second insulating material layer 70 located on a side of the second sub-conductive layer 22 facing away from the substrate 10. The second insulating material layer 70 is provided with a second opening 701, which exposes the pad 201. The second insulating material layer 70 can protect the conductive layer 20.

[0054] In one embodiment, as shown in FIG1 , the second insulating material layer 70 includes a second organic layer 71 . The second opening 701 includes a fourth sub-opening 711 disposed in the second organic layer 71 .

[0055] In one embodiment, as shown in Figure 1, the second insulating material layer 70 further includes a third inorganic layer 72 located on a side of the second organic layer 71 away from the substrate 10. The second opening 701 includes a fifth sub-opening 721 disposed in the third inorganic layer 72. The edge of the orthographic projection of the fifth sub-opening 721 on the substrate 10 is located inward of the edge of the orthographic projection of the fourth sub-opening 711 on the substrate. With this arrangement, the third inorganic layer 72 covers the side surfaces of the fourth sub-opening 711 in the second organic layer 71, helping to block moisture and reduce the amount of moisture intrusion into the second sub-conductive layer, thereby improving the reliability of the array substrate.

[0056] In one embodiment, as shown in Figure 1, the second insulating material layer 70 further includes a fourth inorganic layer 73 located on the side of the second organic layer 71 closest to the substrate 10. The second opening 701 further includes a sixth sub-opening 731 disposed on the fourth inorganic layer 73. The orthographic projection of the sixth sub-opening 731 on the substrate 10 coincides with the orthographic projection of the fifth sub-opening 721 on the substrate 10. With this arrangement, the third inorganic layer 72 and the fourth inorganic layer 73 can be fabricated using the same mask, which helps reduce the manufacturing cost of the array substrate.

[0057] In one embodiment, as shown in FIG1 , the light adjustment layer 30 is located between the fourth inorganic layer 73 and the second organic layer 71 , and the light adjustment layer 30 is provided with a third opening 301 , which exposes the solder pad 201 . The light adjustment layer 30 may be provided with a plurality of third openings 301 , and the third openings 301 may correspond one to one with the solder pad 201 . The edge of the orthographic projection of the fifth sub-opening 721 on the substrate 10 is located on the inner side of the edge of the orthographic projection of one of the third openings 301 on the substrate . In this manner, the third inorganic layer 72 covers the side of the third opening 301 of the light adjustment layer 30 , which helps to block water vapor and reduce the amount of water vapor intruding into the second sub-conductive layer, thereby helping to improve the reliability of the array substrate.

[0058] In one embodiment, the light adjustment layer 30 may be black.

[0059] In one embodiment, the protective layer 40 is made of a conductive material. As shown in FIG1 , the array substrate further includes an insulating layer 80 located between the conductive layer 20 and the protective layer 40. The insulating layer 80 insulates the conductive layer 20 from the protective layer 40. The insulating layer 80 can be made of an inorganic material, such as at least one of silicon nitride and silicon oxide.

[0060] In one embodiment, as shown in FIG1 , the protective layer 40 is not connected to electrical signals and includes a plurality of spaced protective structures 42. This arrangement allows each protective structure 42 to have a smaller area. This reduces the associated capacitance formed in the overlapping region between the protective structure and the conductive layer 20, thereby minimizing the impact on the electrical performance of the array substrate. Furthermore, the smaller area of ​​the protective layer 40 prevents arcing and burns of the electrodes of the dry etching equipment during dry etching of the insulating film layer on the side of the protective layer facing away from the substrate, due to the larger area of ​​the protective layer 40.

[0061] In another embodiment, the protective layer 40 is made of a conductive material and is connected to a constant electrical signal. This configuration can prevent the formation of associated capacitance in the overlapping area between the protective structure and the conductive layer 20, thereby preventing the protective layer 40 from affecting the electrical performance of the array substrate.

[0062] Furthermore, as shown in FIG4 , the conductive layer 20 includes a wire 23 connected to a constant signal, and the insulating layer 80 is provided with a through-hole 801, through which the wire 23 is connected to the protective layer 40. With this arrangement, the protective layer 40 is connected to the constant electrical signal by being electrically connected to the wire 23 of the conductive layer 20. This helps simplify the manufacturing process and structural complexity of the array substrate, compared to a solution that requires an additional signal line connected to the protective layer 40 for connecting the constant electrical signal.

[0063] Furthermore, the conductive line 23 may be a common voltage line. The conductive line 23 is located in the first sub-conductive layer 21 .

[0064] In one embodiment, the orthographic projection of the protective layer 40 on the substrate 10 covers the gap between the orthographic projections of any two adjacent signal lines on the side of the substrate 10 facing away from the conductive layer 20. With this configuration, the laser used to etch the conductive material between any two adjacent signal lines passes through the protective layer 40 and has its energy attenuated during its propagation toward the light modulation layer 30.

[0065] In one embodiment, as shown in FIG5 , the protective layer 40 includes a plurality of protective portions 41 , and the orthographic projection of one protective portion 41 on the substrate 10 covers the orthographic projection of one gap on the substrate 10 . In this way, the area of ​​the protective layer 40 can be reduced while effectively preventing the light adjustment layer 30 from bulging, discoloring, or peeling off from adjacent film layers. This prevents arcing from being generated during dry etching of the insulating film layer of the array substrate located on the side of the protective layer facing away from the substrate, thereby preventing the electrodes of the dry etching equipment from being burned due to the large area of ​​the protective layer 40 . In some embodiments, the protective portions 41 can correspond one to one to the gaps between adjacent signal lines, and the orthographic projection of each protective portion 41 on the substrate 10 covers the orthographic projection of the corresponding gap on the substrate 10 .

[0066] Furthermore, the edge of the orthographic projection of the protection portion 41 on the substrate 10 is located outside the edge of one of the gaps. With this arrangement, when the laser passes through the corresponding protection portion 41, the protection portion 41 better attenuates the laser energy, thereby further helping to improve the reliability and yield of the array substrate.

[0067] Furthermore, the distance between the edge of the orthographic projection of the protective layer 40 on the substrate 10 and the edge of the orthographic projection of the corresponding gap on the substrate 10 is approximately 10 μm. This configuration can prevent the area of ​​the protective layer 40 from being too large while ensuring the protective layer's effect of attenuating laser energy.

[0068] In one embodiment, the protective layer 40 includes at least one protective portion group. FIG5 shows a partial structure of a protective portion group. As shown in FIG5 , the protective portion group includes a plurality of protective portions 41 arranged in parallel. The array substrate includes at least one signal line group, and FIG2 shows a schematic diagram of a partial structure of the signal line group. A signal line group includes a plurality of signal lines 51 arranged in parallel, and the arrangement direction of the signal lines 51 of the signal line group is the same as the arrangement direction of the protective portions 41 of the protective portion group 401. The protective layer 40 also includes a connecting portion 43, and at least two protective portions 41 in the same protective portion group 401 are connected by the connecting portion. By providing at least two protective portions 41 in the same protective portion group 401 to be electrically connected by the connecting portion 43, by connecting one of the protective portions 41 connected to the same connecting portion to a constant electrical signal, each protective portion 41 connected to the same connecting portion can be connected to a constant electrical signal, which helps to simplify the structure of the array substrate.

[0069] Furthermore, the ends of the protection portions 41 of the same protection portion group 401 located on the same side are respectively connected to the connection portion 43. That is, the protection portions 41 of the same protection portion group 401 are electrically connected via the connection portion 43. Connecting one protection portion 41 to a constant electrical signal allows all protection portions 41 of the protection portion group 401 to be connected to a constant electrical signal, further simplifying the structure of the array substrate.

[0070] In one embodiment, as shown in FIG5 , at least one of the protective portions 41 in the same protective portion group 401 includes a lap joint 411. The orthographic projection of the through hole 801 of the insulating layer 80 on the substrate 10 falls within the orthographic projection of the lap joint 411 on the substrate 10. The conductor 23 connected to the constant signal laps the lap joint 411 through the through hole 801 of the insulating layer 80. In the embodiment shown in FIG5 , only one protective portion 41 in the same protective portion group 401 includes a lap joint 411. In other embodiments, multiple protective portions 41 in the same protective portion group 401 may include lap joints, each lap joint laps the conductor 23 through a through hole in the insulating layer.

[0071] In one embodiment, when the protective layer 40 is made of a conductive material, it may comprise a metal material with a high reflectivity, such as copper. In some embodiments, the protective layer 40 may be made of copper. This allows the protective layer 40 to reflect at least a portion of the laser light when it propagates through the protective layer, reducing the laser light energy reaching the light conditioning layer 30. Furthermore, the protective layer is relatively stable, preventing the protective layer 40 from bulging or separating from adjacent film layers when the laser light propagates through it.

[0072] In one embodiment, the protective layer 40 is made of a non-conductive material, and the orthographic projection of the protective layer 40 on the substrate 10 covers the orthographic projection of the light adjustment layer 30 on the substrate 10. When the protective layer 40 is made of a non-conductive material, there is no need to provide an insulating layer between the protective layer 40 and the conductive layer 20, which helps to simplify the preparation process and structural complexity of the array substrate.

[0073] 6 , the orthographic projection of the protective layer 40 on the substrate 10 can cover the substrate 10. In other words, the protective layer is a full-surface film layer, and no patterning process is required when forming the protective layer 40, which helps to simplify the basic preparation process of the array.

[0074] Furthermore, the thickness of the protective layer 40 is greater than or equal to 1000 angstroms. In this way, the protective layer 40 effectively weakens the energy of the laser.

[0075] In some embodiments, the protective layer 40 is made of amorphous silicon. This ensures that the protective layer 40 effectively attenuates the energy of the laser and maintains a relatively stable property. When the laser is transmitted to the protective layer 40, the protective layer 40 will not bulge or separate from adjacent film layers due to the effect of the laser, thereby improving the reliability of the array substrate.

[0076] An embodiment of the present application further provides a light-emitting substrate, which includes an electronic component and the array substrate described in any of the above embodiments; the electronic component is connected to the pad; and the electronic component includes a light-emitting component.

[0077] In one embodiment, the light-emitting element is a Mini LED or a Micro LED.

[0078] In one embodiment, the light emitting element further includes a driving chip, which may be a chip used to provide a signal to the light emitting element to enable the light emitting element to emit light.

[0079] An embodiment of the present application further provides a display device, which includes the above-mentioned light-emitting substrate.

[0080] In some embodiments, the display device may be a liquid crystal display device comprising a liquid crystal panel and a backlight source disposed on a non-display side of the liquid crystal panel, wherein the backlight source comprises the light-emitting substrate described in any of the foregoing embodiments.

[0081] In another embodiment, the light-emitting substrate in the display device is used as a display substrate. When the light-emitting substrate is used as a display substrate, each light-emitting element serves as a sub-pixel.

[0082] This application does not impose any specific restrictions on the applicability of display devices. It can be any product or component with flexible display function, such as televisions, laptops, tablets, wearable display devices, mobile phones, car displays, navigation, e-books, digital photo frames, advertising light boxes, etc.

[0083] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0084] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the contents disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0085] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. An array substrate, characterized in that: The array substrate comprises: substrate; A conductive layer located on one side of the substrate, the conductive layer comprising a plurality of pads, the pads being used to be electrically connected to electronic components; a light adjustment layer located on a side of the conductive layer away from the substrate; A plurality of signal lines are located on a side of the substrate away from the conductive layer; the orthographic projection of at least a portion of the light adjustment layer on the substrate does not overlap with the orthographic projection of the conductive layer on the substrate, and is located in a gap between the orthographic projections of adjacent signal lines on the substrate; A protective layer is located between the light regulating layer and the substrate, wherein an orthographic projection of the protective layer on the substrate at least covers an orthographic projection of at least a portion of the light regulating layer on the substrate.

2. The array substrate according to claim 1, characterized in that: The material of the protection layer is a conductive material, and the protection layer is connected to a constant electrical signal.

3. The array substrate according to claim 2, characterized in that: The orthographic projection of the protection layer on the substrate covers the gap between any two adjacent orthographic projections of the signal lines on the substrate.

4. The array substrate according to claim 3, characterized in that: The protection layer includes a plurality of protection portions, and an orthographic projection of one of the protection portions on the substrate covers an orthographic projection of one of the gaps on the substrate.

5. The array substrate according to claim 4, characterized in that: An edge of an orthographic projection of the protection portion on the substrate is located outside an edge of an orthographic projection of the gap on the substrate.

6. The array substrate according to claim 4, characterized in that: The protective layer includes at least one protective part group, and the protective part group includes a plurality of protective parts arranged in parallel; the array substrate includes at least one signal line group, and the signal line group includes a plurality of signal lines arranged in parallel, and the arrangement direction of the signal lines of the signal line group is the same as the arrangement direction of the protective parts of the protective part group; the protective layer also includes a connecting part, and at least two of the protective parts in the same protective part group are connected through the connecting part.

7. The array substrate according to claim 6, characterized in that: Ends of the protection parts of the same protection part group located on the same side are respectively connected to the connection parts.

8. The array substrate according to claim 1, characterized in that: The protection layer is located on a side of the conductive layer away from the light adjustment layer.

9. The array substrate according to claim 8, characterized in that: The material of the protection layer is a conductive material, and the array substrate further includes an insulating layer located between the protection layer and the conductive layer.

10. The array substrate according to claim 9, characterized in that: The conductive layer includes a wire connected to a constant signal, the insulating layer is provided with a through hole, and the wire is overlapped with the protective layer through the through hole.

11. The array substrate according to claim 1, characterized in that: The material of the protective layer is a non-conductive material, and the orthographic projection of the protective layer on the substrate covers the orthographic projection of the light adjustment layer on the substrate.

12. The array substrate according to claim 1, characterized in that: The conductive layer includes a first sub-conductive layer and a second sub-conductive layer located at a side of the first sub-conductive layer away from the substrate, and the pad is located at the second sub-conductive layer.

13. A light-emitting substrate, characterized in that: The light-emitting substrate comprises an electronic component and the array substrate according to any one of claims 1 to 12; the electronic component is connected to the pad; and the electronic component comprises a light-emitting component.

14. The light emitting substrate according to claim 13, characterized in that: The light emitting element is Mini LED or Micro LED.

15. A display device, characterized in that: The display device comprises the light-emitting substrate according to claim 13 or 14.

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