Video encoding and video decoding using operational constraints

By introducing the ability constraints of multiplication and accumulation operations in the video encoding process, the problem of excessive operations in the neural network decoder design is solved, and more efficient video decoding is achieved.

CN119137959APending Publication Date: 2024-12-13INTERDIGITAL CE PATENT HOLDINGS SAS
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Patent Information

Application Number
CN202380032497.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-04-12
Filing Date
2023-04-04
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

In the existing video encoding methods, the neural network-based decoder design involves a large number of multiplication and accumulation operations, resulting in the number of operations far exceeding the traditional solution, which makes the decoder implementation complex and difficult.

Method used

By introducing capability constraints, specifically including indications of the number of multiplication accumulation operations, adjusting the video encoding process to implement new operation constraints during standard decoding, improving encoding efficiency and improving codec consistency.

Benefits of technology

Effectively reduce the number of multiplication and accumulation operations during decoding, simplify the implementation of decoder, and improve coding efficiency and consistency.

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Abstract

It is presented at least one method and apparatus for encoding or decoding a video conforming to a capability constraint comprising an indication related to the number of multiply-accumulate operations required for decoding a video stream. For example, a video stream is defined to include encoded data representing a sequence of images, an indication of a configuration file that the encoded data conforms to among a plurality of configuration files, and an indication of a level that the encoded data conforms to among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify a capability constraint for decoding the encoded data, and wherein the capability constraint includes an indication related to a number of multiply-accumulate operations required to decode the encoded data.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of European Application No. 22305528.6 filed on April 12, 2022, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] At least one of the embodiments of the present invention generally relates to a method or apparatus for video encoding or video decoding, and more specifically, to a method or apparatus for implementing a capability constraint, wherein the capability constraint includes an indication related to the number of multiplication-accumulation operations required for decoding a video stream. Background Art

[0004] In order to achieve high compression efficiency, image and video coding schemes usually use prediction (including motion vector prediction) and transformation to exploit spatial and temporal redundancy in video content. Typically, intra-frame prediction or inter-frame prediction is used to exploit intra-frame correlation or inter-frame correlation, and then the difference between the original image and the predicted image (usually expressed as prediction error or prediction residual) is transformed, quantized and entropy encoded. In order to reconstruct the video, the compressed data is decoded by the inverse process corresponding to entropy coding, quantization, transformation and prediction.

[0005] Recently developed methods for encoding and decoding (e.g., neural network NN-based methods) exhibit a large number of multiply-accumulate (MAC) operations, resulting in a number of MACs far exceeding the number required in traditional video coding solutions, making decoder implementation increasingly difficult. Therefore, there is a need to improve the existing technology. Summary of the invention

[0006] In this application, the disclosed concept is based on the number of MAC operations used as a complexity metric. It can be generalized to other complexity metrics such as number of operations ((OPs)), number of floating point operations ((FLOPs)), number of uses per sample.

[0007] The shortcomings and deficiencies of the prior art are addressed and addressed by the general aspects described herein.

[0008] According to a first aspect, there is provided a video stream comprising encoded data representing a sequence of images, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the encoded data, and wherein the capability constraints include an indication relating to a number of multiplication-accumulation operations required to decode the encoded data.

[0009] According to a second aspect, a method is provided. The method includes determining the ability of a decoder to decode a video stream, wherein the video stream includes: encoded data representing a sequence of images, an indication of a profile to which the encoded data complies among multiple profiles, and an indication of a level to which the encoded data complies among multiple levels. Multiple profiles and multiple levels specify capability constraints for decoding the compliant encoded data, and advantageously, the capability constraints include an indication related to the number of multiplication-accumulation operations required to decode the encoded data. Determining the ability of a decoder to decode a video stream also includes: parsing an indication of the profile to which the encoded data complies; parsing an indication of the level to which the encoded data complies; and in response to determining that the decoder supports the profile and the decoder supports the level, determining the number of multiplication-accumulation operations that the decoder can perform required to decode the encoded data.

[0010] According to a third aspect, a method is provided. The method comprises video decoding by first determining a capability of a decoder to decode the video stream according to any of the disclosed variants, and in response to determining that the decoder is capable of decoding the video stream, decoding the video stream.

[0011] According to a fourth aspect, a second method is provided. The method comprises performing video encoding by generating a bitstream according to any of the disclosed embodiments and a variation of a capability constraint specifying an indication regarding a number of multiply-accumulate operations required to decode the generated bitstream.

[0012] According to another aspect, an apparatus is provided. The apparatus comprises one or more processors, wherein the one or more processors are configured to implement a video decoding method according to any of its variants. According to yet another aspect, an apparatus for video decoding comprises a device for implementing any of the video decoding variants.

[0013] According to another aspect, another apparatus is provided. The apparatus comprises one or more processors, wherein the one or more processors are configured to implement a video decoding method according to any variation thereof. According to yet another aspect, an apparatus for video decoding comprises a device for implementing any variation of the video decoding variation.

[0014] According to another general aspect of at least one embodiment, there is provided an apparatus comprising: an apparatus according to any of the decoding embodiments; and at least one of: (i) an antenna configured to receive a signal, the signal comprising a video block, (ii) a band limiter configured to limit the received signal to a frequency band comprising the video block, or (iii) a display configured to display an output representing the video block.

[0015] According to yet another general aspect of at least one embodiment, a non-transitory computer-readable medium is provided that contains data content generated according to any of the described encoding embodiments or variations.

[0016] According to another general aspect of at least one embodiment, a signal is provided, the signal comprising: encoded data representing an image sequence, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the encoded data, and wherein the capability constraints include an indication related to a number of multiplication-accumulation operations required to decode the encoded data.

[0017] According to yet another general aspect of at least one embodiment, there is provided a computer program product comprising instructions which, when executed by a computer, cause the computer to perform any of the described encoding / decoding embodiments or variations.

[0018] These and other aspects, features and advantages of the general aspects will become apparent from the following detailed description of illustrative embodiments, which is to be read in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In the drawings, several examples of embodiments are shown.

[0020] Figure 1 A block diagram is shown of an example apparatus in which various aspects of the embodiments may be implemented.

[0021] Figure 2 A block diagram of an embodiment of a video encoder is shown in which various aspects of the embodiments may be implemented.

[0022] Figure 3 A block diagram of an embodiment of a video decoder is shown in which various aspects of the embodiments may be implemented.

[0023] Figure 4 A block diagram illustrating a method of determining a decoder's ability to decode a video stream in accordance with a general aspect of at least one embodiment.

[0024] Figure 5 A block diagram is shown for determining a decoder's ability to decode a video stream in accordance with a general aspect of at least one embodiment.

[0025] Figure 6 A general decoding method according to a general aspect of at least one embodiment is shown.

[0026] Figure 7 A general encoding method according to a general aspect of at least one embodiment is shown. DETAILED DESCRIPTION

[0027] Various embodiments relate to a video coding system, wherein, in at least one embodiment, it is proposed to adjust the video coding process to implement new operation constraints in the standard video decoding process, in particular regarding the number of operations (MACs) required in the decoding process. Different embodiments are proposed below, introducing some signaling and consistency modifications to improve coding efficiency and improve codec consistency when the decoding method may exhibit a large number of multiplication-accumulation (MAC) operations. Among them, encoding methods, decoding methods, encoding devices, and decoding devices based on the present principles are proposed.

[0028] Furthermore, although principles related to specific drafts of VVC (Universal Video Coding) or HEVC (High Efficiency Video Coding) specifications or ECM (Enhanced Compression Model) reference software are described, these aspects are not limited to VVC or HEVC or ECM, but can be applied to, for example, other standards and recommendations, whether existing or developed in the future, and extensions of any such standards and recommendations (including VVC and HEVC and ECM). Unless otherwise specified or technically excluded, the aspects described in this application can be used alone or in combination.

[0029] The acronyms used herein reflect the current state of video coding development and should therefore be considered examples of naming that may be renamed at a later stage while still denoting the same technology.

[0030] Figure 1 A block diagram of an example of a system in which various aspects and embodiments can be implemented is shown. System 100 can be implemented as a device including various components described below, and is configured to perform one or more aspects of the aspects described in this application. Examples of such devices include, but are not limited to, various electronic devices, such as personal computers, laptop computers, smart phones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected household appliances and servers. The elements of system 100 can be embodied in a single integrated circuit, multiple ICs and / or discrete components, either alone or in combination. For example, in at least one embodiment, the processing and encoder / decoder elements of system 100 are distributed over multiple ICs and / or discrete components. In various embodiments, system 100 is connected to other systems or other electronic devices via, for example, a communication bus or by a dedicated input and / or output port communication type. In various embodiments, system 100 is configured to implement one or more aspects of the aspects described in this application.

[0031] The system 100 includes at least one processor 110 configured to execute instructions loaded therein for implementing, for example, various aspects described in the present application. The processor 110 may include embedded memory, input-output interfaces, and various other circuits known in the art. The system 100 includes at least one memory 120 (e.g., a volatile memory device and / or a non-volatile memory device). The system 100 includes a storage device 140, which may include a non-volatile memory and / or a volatile memory, including but not limited to an EEPROM, a ROM, a PROM, a RAM, a DRAM, an SRAM, a flash memory, a magnetic disk drive, and / or an optical disk drive. As a non-limiting example, the storage device 140 may include an internal storage device, an additional storage device, and / or a network accessible storage device.

[0032] The system 100 includes an encoder / decoder module 130, which is configured to process data to provide encoded video or decoded video, for example, and the encoder / decoder module 130 may include its own processor and memory. The encoder / decoder module 130 represents a module that can be included in a device to perform encoding functions and / or decoding functions. As is well known, a device may include one or both of an encoding module and a decoding module. In addition, the encoder / decoder module 130 can be implemented as an independent element of the system 100, or can be combined in the processor 110 as a combination of hardware and software known to those skilled in the art.

[0033] Program code to be loaded onto the processor 110 or the encoder / decoder 130 to perform various aspects described in this application may be stored in the storage device 140 and subsequently loaded onto the memory 120 for execution by the processor 110. According to various embodiments, one or more of the processor 110, the memory 120, the storage device 140, and the encoder / decoder module 130 may store one or more of various items during the execution of the processes described in this application. Such stored items may include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results of the processes from equations, formulas, operations, and operational logic.

[0034] In several embodiments, memory internal to the processor 110 and / or encoder / decoder module 130 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device may be the processor 110 or the encoder / decoder module 130) is used for one or more of these functions. The external memory may be a memory 120 and / or a storage device 140, such as a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, the external non-volatile flash memory is used to store the operating system of the television. In at least one embodiment, a fast external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations, such as working memory for HEVC or VVC.

[0035] As shown in block 105, input may be provided to the elements of system 100 through various input devices. Such input devices include, but are not limited to, (i) an RF section that receives an RF signal transmitted over the air, for example, by a broadcaster, (ii) a composite input terminal, (iii) a USB input terminal, and / or (iv) an HDMI input terminal.

[0036] In various embodiments, the input device of block 105 has associated corresponding input processing elements known in the art. For example, the RF section may be associated with elements suitable for the following operations: (i) selecting a desired frequency (also referred to as selecting a signal, or band limiting a signal to a frequency band), (ii) down-converting the selected signal, (iii) again band-limiting to a narrower frequency band to select a signal frequency band that may be referred to as a channel in some embodiments, (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired data packet stream. The RF section of various embodiments includes one or more elements that perform these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or a near-baseband frequency) or baseband. In a set-top box embodiment, the RF part and its associated input processing element receive the RF signal transmitted by wired (for example, cable) medium, and filter to the desired frequency band again by filtering, down-conversion and perform frequency selection. Various embodiments rearrange the order of above-mentioned (and other) elements, remove some in these elements, and / or add other elements that perform similar or different functions. Adding element can include inserting element between existing elements, for example, inserting amplifier and analog-to-digital converter. In various embodiments, the RF part includes antenna.

[0037] In addition, the USB and / or HDMI terminals may include corresponding interface processors for connecting the system 100 to other electronic devices via USB and / or HDMI connections. It should be understood that various aspects of input processing, such as Reed-Solomon error correction, can be implemented as needed, for example, in a separate input processing IC or in the processor 110. Similarly, various aspects of USB or HDMI interface processing can be implemented as needed in a separate interface IC or in the processor 110. The demodulated, error-corrected, and demultiplexed streams are provided to various processing elements, including, for example, the processor 110 and the encoder / decoder 130, which operate in combination with memory and storage elements to process the data streams as needed for presentation on the output device.

[0038] The various components of the system 100 may be disposed within an integrated housing. Within the integrated housing, the various components may be interconnected and data may be transferred between the components using a suitable connection arrangement 115, such as an internal bus known in the art, including an I2C bus, wiring, and a printed circuit board.

[0039] The system 100 includes a communication interface 150 that is capable of communicating with other devices via a communication channel 190. The communication interface 150 may include, but is not limited to, a transceiver configured to send and receive data through the communication channel 190. The communication interface 150 may include, but is not limited to, a modem or a network card, and the communication channel 190 may be implemented in, for example, a wired and / or wireless medium.

[0040] In various embodiments, a Wi-Fi network such as IEEE 802.11 is used to stream data to the system 100. The Wi-Fi signals of these embodiments are received through a communication channel 190 and a communication interface 150 suitable for Wi-Fi communication. The communication channel 190 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet to allow streaming applications and other beyond traditional communications. Other embodiments provide streaming data to the system 100 using a set-top box that passes data through the HDMI connection of the input block 105. Similarly, other embodiments use the RF connection of the input block 105 to provide streaming data to the system 100.

[0041] The system 100 can provide output signals to various output devices, including a display 165, a speaker 175, and other peripherals 185. In various examples of embodiments, the other peripherals 185 include one or more of a stand-alone DVR, a disk player, a stereo system, a lighting system, and other devices that provide functions based on the output of the system 100. In various embodiments, control signals are transmitted between the system 100 and the display 165, the speaker 175, or other peripherals 185 using signaling such as AV. Link, CEC, or other communication protocols can implement device-to-device control with or without user intervention. The output devices can be communicatively connected to the system 100 via dedicated connections through their respective interfaces 160, 170, and 180. Alternatively, the output devices can be connected to the system 100 using a communication channel 190 via the communication interface 150. The display 165 and the speaker 175 can be integrated into a single unit with other components of the system 100 in an electronic device (e.g., a television). In various embodiments, the display interface 160 includes a display driver, such as a timing controller (T Con) chip.

[0042] For example, if the RF portion of input 105 is part of a stand-alone set-top box, the display 165 and speaker 175 may optionally be separate from one or more of the other components. In various embodiments in which the display 165 and speaker 175 are external components, the output signal may be provided via a dedicated output connection, including, for example, an HDMI port, a USB port, or a COMP output.

[0043] Figure 2 An example video encoder 200 is shown, such as a VVC (Versatile Video Coding) encoder. Figure 2 It is also possible to show an encoder in which the VVC standard is improved, or an encoder that adopts a technique similar to VVC.

[0044] In this application, the terms "reconstruction" and "decoding" are used interchangeably, the terms "encoding" or "coding" are used interchangeably, and the terms "image", "picture" and "frame" are used interchangeably. Usually, but not necessarily, the term "reconstruction" is used on the encoder side, while "decoding" is used on the decoder side.

[0045] Before being encoded, the video sequence may undergo a pre-encoding process (201), for example, applying a color transform to an input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of input picture components in order to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and appended to the bitstream.

[0046] In encoder 200, a picture is encoded by encoder elements as described below. The picture to be encoded is segmented (202) and processed in units such as CUs. Each unit is encoded using, for example, intra mode or inter mode. When the unit is encoded in intra mode, it performs intra prediction (260). In inter mode, motion estimation (275) and compensation (270) are performed. The encoder decides (205) which mode of intra mode and inter mode to use to encode the unit, and indicates the intra / inter decision by, for example, a prediction mode flag. For example, a prediction residual is calculated by subtracting (210) the predicted block from the original image block.

[0047] The prediction residual is then transformed (225) and quantized (230). The quantized transform coefficients, along with motion vectors and other syntax elements, are entropy encoded (245) to output a bitstream. The encoder can skip the transform and directly quantize the untransformed residual signal. The encoder can bypass both the transform and quantization, i.e., directly encode the residual without applying the transform or quantization process.

[0048] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (255) to reconstruct the image block. An in-loop filter (265) is applied to the reconstructed picture to perform, for example, deblocking / SAO (sample adaptive offset) filtering to reduce coding artifacts. The filtered image is stored in a reference picture buffer (280).

[0049] Figure 3 300. In the decoder 300, the bitstream is decoded by the decoder elements as described below. The video decoder 300 generally performs the same operations as described above. Figure 2 The encoding pass described is the reverse of the decoding pass. Encoder 200 also typically performs video decoding as part of encoding the video data.

[0050] In particular, the input to the decoder includes a video bitstream, which may be generated by the video encoder 200. The bitstream is first entropy decoded (330) to obtain transform coefficients, motion vectors, and other encoding information. Picture partition information indicates how the picture is partitioned. Thus, the decoder may partition (335) the picture according to the decoded picture partition information. The transform coefficients are dequantized (340) and inverse transformed (350) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (355) to reconstruct the image block. The prediction block may be obtained (370) from intra-frame prediction (360) or motion compensated prediction (i.e., inter-frame prediction) (375). An in-loop filter (365) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (380).

[0051] The decoded picture may also undergo post-decoding processing (385), such as an inverse color transform (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) or inverse remapping, which performs the inverse of the remapping process performed in the pre-encoding process (201). The post-decoding process may use metadata derived in the pre-encoding process and signaled in the bitstream.

[0052] At least some embodiments relate to the specification of new operational constraints in the standard video decoding process. In common video coding standards, the decoding process is described in a standardized manner. In addition, standard constraints on decoder capabilities are defined in profiles, tiers, and levels. The profile defines a set of tools supported by a standard decoder. For each profile, a set of levels is defined, and the level specifies quantitative constraints on the maximum standard decoder capabilities, such as the maximum brightness sampling rate (the maximum number of brightness samples to be processed and generated by the decoder per second), the maximum bit rate, and the maximum picture resolution. An example of the constraints specified in the VVC standard is described in Table 2 below. For example, the table includes a constraint on the maximum brightness sampling rate MaxLumaSr (number of samples / second). Continuous levels generally correspond to increasing capabilities: a decoder that complies with a given level (e.g., 5.0) also complies with all lower levels (1.0 to 4.1). In addition, the concept of a tier is also specified. A tier is a specific category of level constraints imposed on the values ​​of syntax elements or variable values ​​in a bitstream. Level constraints are included in tiers, and a decoder conforming to a particular tier and level will be able to decode all bitstreams conforming to that level, either of the same tier or lower tiers, or any level below that level.

[0053] These constraints are used on the encoder side to ensure that the encoded bitstream conforms to the target profile / level of the encoder. The encoder signals the profile and level information in the bitstream, for example within a video parameter set (VPS) or sequence parameter set (sps), such as in VVC, where a syntax structure (named "profile_tier_level()", as shown in Table 1) is inserted into the VPS and optionally into the SPS (depending on the SPS syntax element "sps_ptl_dpb_hrd_params_present_flag"). The structure profile_tier_level() includes syntax elements (e.g., general_profile_idc, general_level_idc) indicating the profile and level.

[0054] Table 1: Excerpt of VVC "profile_tier_level" syntax

[0055]

[0056] Constraints are used on the decoder side to determine the ability of the decoder to decode video that conforms to the profile / level signaled in the bitstream. If the decoder cannot decode the video, the client receiving and decoding the video bitstream can request another version of the video (another bitstream) that conforms to the profile / level supported by the decoder. Different video decoders (hardware core of a video decoder, or software implementation of a video decoder) can conform to different profiles and levels. This means that one video decoder may be able to decode a bitstream that conforms to a first given profile / level, while it may not be able to decode a bitstream that conforms to a second given profile / level.

[0057] Table 2: Tiers and level restrictions for video profiles defined in the VVC specification (Table 136)

[0058]

[0059]

[0060] In recent research work, neural network (NN) based decoder designs have been considered. This can be in the form of NN based coding tools, such as new NN based intra prediction tools. The ultimate solution is to replace the complete traditional design with a completely NN based design (such as an autoencoder). The main problem with neural network based solutions is that they involve a large number of multiply-accumulate (MAC) operations, resulting in a number of MACs far exceeding the number required for traditional video coding solutions (even in its most complex versions, such as the exploratory coding model ECM currently being developed by JVET).

[0061] Even for traditional encoding solutions, the trend is that the decoding process is becoming increasingly complex, which can make implementation more and more difficult.

[0062] Considering these new developments, it seems important to integrate new capacity constraints for the decoder, especially regarding the number of operations (MACs).

[0063] This problem is solved and handled by the general aspects described herein, which are intended to define a process that allows a decoder to determine whether it can decode a video stream based on new information related to the number of operations (MACs) required to decode the video data of the video stream. The new information is generally defined as constraints that specify a consistent bitstream. These constraints are standard, meaning that the encoder must ensure that the constraints of a given target profile / level are met, and the decoder that meets the given profile / level is able to decode a bitstream that conforms to these constraints. Various embodiments and variants of the present principle include adding new constraints on the number of MACS in the level, such as constraints on the maximum number of MACS per second (maximum MACS rate), constraints on the maximum number of MACS per sample, and constraints on the maximum ratio of the maximum sampling rate (such as the maximum brightness sampling rate). Other various embodiments and variants of the present principle may include these different variants of adding new constraints in a specific MAC level (i.e., independent of the generally specified level); defining constraints on the number of MACS only for NN tools, only for non-NN tools, for any type of tool; or decoupling the maximum bitrate from the resolution and adding independent MACS / maximum bitrate constraints.

[0064] According to a first aspect of at least one embodiment, a video stream is defined as comprising encoded data representing a sequence of images, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the encoded data, and wherein the capability constraints include an indication related to a number of multiplication-accumulation operations required to decode the encoded data.

[0065] Various embodiments for indicating the number of multiply-accumulate operations in a capacity constraint are described below.

[0066] According to a first embodiment, a constraint on the maximum MACs rate is specified in a level table. Thus, each of the multiple levels defines at least a maximum multiplication-addition operation rate. Therefore, it is proposed to define a video decoder configuration process that is responsive to a parameter value indicating a complexity level selected from a plurality of complexity levels, each complexity level defining at least a maximum multiplication-addition (MACs) operation rate (maximum number of kMACs per second). The maximum MACs rate may be indicated in a table defining different levels, as shown in Table 3, which is a modified version of Table.

[0067] Table 3: Level limit table for video profiles, including the maximum MACs rate MaxMacsR

[0068]

[0069]

[0070] According to a second aspect of at least one embodiment, a method (400) of determining a decoder's ability to decode a video stream is disclosed.

[0071] Figure 4 A block diagram of a method 400 for determining a decoder's ability to decode a video stream according to a general aspect of a first embodiment is shown. In step 401, the decoder parses information related to profiles and levels signaled in an input bitstream, and the encoded video data conforms to the information. In step 402, the decoder checks whether the profile information decoded from the bitstream corresponds to a profile supported by the decoder. If the decoder supports the profile (yes), then in step 403, the decoder further checks whether the level information decoded from the bitstream corresponds to a level supported by the decoder. If the decoder supports the level (yes), then in step 404, the decoder performs a decoding process of the bitstream. If the decoder does not support (no) the profile or level, the process stops (step 405). According to Figure 4 In a specific variant not shown in the figure, in the case where the bitstream is transmitted via a streaming platform, if the decoder does not support (no) the profile or level, the decoder (or receiver) can generate a message to the encoder (or transmitter) to request a bitstream with a lower profile or level. In another variant, the decoder (or receiver) can select a coded bitstream with a profile and level that meets the decoder's capabilities among multiple coded bitstreams.

[0072] According to the second embodiment, a constraint on the ratio of the maximum MACs to the maximum sampling rate is specified in the level table. Therefore, each level in the plurality of levels defines at least the ratio of the maximum multiplication-addition operation to the maximum sampling rate. For example, the constraint on the number of MACs is expressed as the ratio of MaxMacsRatio to the maximum brightness sampling rate, as shown in Table 4. Then, the maximum number of MACs per second (maximum MACS rate) is obtained by the following formula:

[0073] MaxMacsR=MaxMacRatio x MaxLumaSr

[0074] Table 4: Table of level limits for video profiles, including the maximum ratio MaxMacsRatio to the maximum luminance sampling rate.

[0075]

[0076]

[0077] The decoder can be Figure 4 Decode as shown.

[0078] According to a third embodiment, a constraint on the number of multiplication-accumulation operations is specified in a table of another type of level. Therefore, an indication of the multiplication-accumulation operation level (general_MAC_level_idc) to which the encoded data complies in multiple multiplication-accumulation operation levels is further specified in the bitstream. In a specific variant, each of the multiple multiplication-accumulation operation levels defines at least a maximum multiplication-addition operation rate. Advantageously, the information related to the maximum MACs rate is independent of the level information, such as that known from the profiles, tiers, and levels used in VVC. The MAC level is signaled using parameters different from the level parameters. This is shown in Table 5, where the new syntax element general_MAC_level_idc is underlined.

[0079] Table 5: "profile_tier_level" syntax for a new level index

[0080]

[0081] Based on the semantics already used in VVC for the syntax element general_level_idc, this syntax element may have the following semantics:

[0082] general_MAC_level_idc indicates the level associated with the MACs rate to which OlsInScope (the OutputLayer Set in scope) complies, as specified in Annex A. The bitstream shall not contain general_MAC_level_idc values ​​other than those specified in Annex A (of the VVC specification). Other values ​​of general_MAC_level_idc are reserved for future use by ITU-T|ISO / IEC.

[0083] In this definition, an output layer set (OLS) is defined in VVC as a set of layers, where one or more layers are designated as output layers, and a video may be one or more layers. The MAC level information general_MAC_level_idc is signaled in the bitstream, for example within a video parameter set (VPS) or a sequence parameter set (SPS), such as in VVC, where the syntax structure is inserted into the VPS and optionally into the SPS (depending on the SPS syntax element "sps_ptl_dpb_hrd_params_present_flag").

[0084] An illustration of the table defining the different MAC levels is provided in the table.

[0085] Table 6: A separate table containing constraints related to the maximum MACs rate MaxMacsR

[0086]

[0087] Figure 5A block diagram of a method 500 for determining a decoder's ability to decode a video stream according to a general aspect of a third embodiment is shown. In step 501, the decoder decodes and parses information related to the profile, level, and MAC level signaled in the input bitstream. In step 502, the decoder checks whether the profile information decoded from the bitstream corresponds to a profile supported by the decoder. If the decoder supports the profile (yes), then in step 503, the decoder further checks whether the level information decoded from the bitstream corresponds to the level supported by the decoder. If the decoder supports the level (yes), then in step 504, the decoder further checks whether the MAC level information decoded from the bitstream corresponds to the MAC level supported by the decoder. If the decoder supports the MAC level (yes), then in step 505, the decoder performs a decoding process of the bitstream. If the decoder does not support the profile, level, or MAC level, the process stops (step 506). According to different variants, determining that the decoder supports the profile to which the encoded data conforms, determining that the decoder supports the level to which the encoded data conforms, and determining that the decoder supports the multiplication-accumulation operation level to which the encoded data conforms are performed independently and in any order. According to different variants, independently and in any order, performing: signaling the profile to which the decoder supports the encoded data, signaling the level to which the decoder supports the encoded data, and signaling the level of multiply-accumulate operations to which the decoder supports the encoded data.

[0088] Figure 6 A general decoding method 300 is shown in accordance with general aspects of at least one embodiment. Figure 6 The block diagram part shows that, for example, Figure 3 Modules of a decoder or decoding method implemented in an exemplary decoder of. Although not explicitly described, a person skilled in the art will clearly derive the general decoding embodiment to any embodiment or any variation of the capability constraint embodiments or variations described herein. Thus, for example, in step 610, a determination of a decoder's ability to decode a video stream that complies with a capability constraint including multiple MAC operations is processed based on a profile and level signaled in the bitstream, and the determination of the capability is compared to the decoder capability. In response to determining that the decoder is capable of decoding the bitstream, the bitstream is decoded in 620. According to Figure 6 In a particular variation not shown in FIG. 1 , in response to the decoder being unable to decode the bitstream, the decoder (or receiver) may also generate a message to the encoder (or transmitter) requesting a bitstream with a lower profile or level.

[0089] As for the third embodiment, according to the fourth embodiment, the constraint on the number of multiplication-accumulation operations is specified in a table of another type of level. In a specific feature of the fourth embodiment, each of the multiple multiplication-accumulation operation levels defines at least the ratio of the maximum multiplication-addition operation to the maximum sampling rate. For example, the information related to the maximum number of MACs is defined as a ratio related to the maximum brightness sampling rate (MaxLumaSr), expressed in samples / second. As for the third embodiment, the constraint can be independent of the level information and controlled by another type of level information, such as general_MAC_level_idc. Then, the maximum MACs rate (MACs per second) MaxMacsR can be calculated as follows:

[0090] MaxMacsR=MaxMacRatio x MaxLumaSr

[0091] An illustration of a table defining the different MAC levels is provided in Table 7. The numbers in the table are indicative.

[0092] Table 7: A separate table containing constraints related to the maximum ratio of the maximum luminance sampling rate MaxMacsRatio

[0093]

[0094] The decoder can be Figure 5 Decode as shown.

[0095] As for the third embodiment, according to the fifth embodiment, a constraint on the number of multiplication-accumulation operations is specified in a table of another type of level. In a specific feature of the fifth embodiment, each of the multiple multiplication-accumulation operation levels defines at least the maximum multiplication-addition operation for each sample. Therefore, the information related to the maximum number of MACs is defined as the maximum number of MACs MaxMacsPerSamp per sample (rather than per second). Advantageously, the constraint stipulates that for each sample to be processed, the maximum number of MACs is constrained to be lower than the MaxMacsPerSamp value. This is different from the previous embodiment, in which the constraint is global (only involving the maximum rate expressed in MAC / s) and is not applicable to each sample (maximum number of MACs / sample). As mentioned above, the constraint can be independent of the level information as mentioned above and controlled by another type of level information, such as general_MAC_level_idc. Then, the maximum MACs rate (in MACs per second) MaxMacsR (for brightness samples) can be calculated as follows:

[0096] MaxMacsR=MaxMacsPerSamp x MaxLumaSr

[0097] An illustration of a table defining the different MAC levels is provided in Table 8. The numbers in the table are indicative.

[0098] Table 8: A separate table containing constraints related to the maximum number of MACs per sample

[0099]

[0100] The decoder can be Figure 5 Decode as shown.

[0101] According to a sixth embodiment, a constraint on the number of multiplication-accumulation operations is specified for all or only part of the decoding process. Thus, the multiple multiplication-accumulation operations required to decode the encoded data apply to some or all decoding steps. Thus, the constraint associated with the number of MACs applies to some or all steps involved in the decoding process, regardless of the type of step (NN-based or not). The total number of MACs involved in each considered step (in the worst case) must be counted and compared with the constraint to check whether the level or MAC level is met.

[0102] The encoding process that generates a conforming bitstream must ensure that the total number of MACs after decoding the data at a given granularity (such as an access unit, or a picture, or a slice, or at each intraframe period, or at a given time period, or a number of consecutive pictures arranged in decoding order or in display order) is lower than the maximum number of MACs defined by the constraint. A high-level parameter inserted into, for example, an SPS or PPS may indicate the granularity to which the total number of MACs is associated. The encoder may count the total number of MACs as follows. At the start of decoding data at a given granularity, the global parameter totalMacsNb is set to 0. For each step involved in the decoding process inside the encoding process (e.g., steps 240, 245, 250, 260, 265, 270), the number of MACs must be taken into account and totalMacsNb is increased by the number of MACs involved in that step. The encoder must ensure that totalMacsNb is obtained at the end of encoding of an access unit, picture, or slice, or at each intraframe period (depending on the granularity expressing the constraint), and totalMacsNb complies with the constraint on the maximum number of MACs. This process may be described in a section related to a hypothetical reference decoder specified in a decoder specification (eg, Appendix C.5 of the VVC specification). An example of a specification text is given below, where two tools are taken as examples, ALF.

[0103] Specification Text Example {

[0104] Each time Clause 8.8.5.2 is invoked, the following applies:

[0105] totalMacsNb=totalMacsNb+K0*(1< <CtbLog2SizeY)x(1<<CtbLog2SizeY)

[0106] Each time Clause 8.8.5.4 is invoked, the following applies:

[0107] totalMacsNb=totalMacsNb+K1*((1< <CtbLog2SizeY) / SubWidthC)x

[0108] ((1< <CtbLog2SizeY) / SubHeightC)

[0109] Each time Clause 8.8.5.7 is invoked, the following applies:

[0110] totalMacsNb=totalMacsNb+K2*((1< <CtbLog2SizeY) / SubWidthC)x

[0111] ((1< <CtbLog2SizeY) / SubHeightC)

[0112] It should be noted that in the VVC specification, clause 8.8.5.2 describes the ALF filtering of CTB luma samples, clause 8.8.5.4 describes the ALF filtering of CTB chroma samples, and clause 8.8.5.7 describes the CC-ALF filtering of CTB chroma samples. Parameters K0, K1, K2 are predefined values ​​corresponding to the number of MAC times per sample required for these steps. For example, K0=K1=K2=16.

[0113] } End of specification text example

[0114] According to the seventh embodiment, for a portion of the decoding steps implementing the neural network processing, a constraint on the number of multiplication-accumulation operations is specified. Thus, the constraint associated with the number of MACs does not concern the entire decoding process, but only the steps of the decoding process that contain NN-based operations. The total number of MACs involved in these specific steps must be counted and compared with the constraint to check whether the level or MAC level is met.

[0115] During the decoding process, the NN-based operations must be identified in a standardized manner, and the MAC times for each of the identified NN-based operations must be summed.

[0116] For example, in VVC, matrix-based intra prediction can be considered as a shallow NN-based tool. According to a specific variant, if the decoder does not support constraints involving NN-based operations, the decoder can disable such tools. In a variant, the decoder (or receiver) can generate a message to the encoder (or transmitter) to request that the encoded bitstream not implement such NN tools when decoding. In another variant, the decoder (or receiver) can select an encoded bitstream from multiple encoded bitstreams that does not implement such NN tools when decoding.

[0117] According to an eighth embodiment, a separate constraint on the number of multiplication-accumulation operations is specified according to the type of decoding process. For example, the type of decoding process can be defined according to NN or non-NN implementation. Therefore, in a specific feature, the first indication (general_MAC_levelA_idc) related to the number of multiplication-accumulation operations required to decode the encoded data is applicable to the partial decoding steps that implement the neural network processing, and the second indication (general_MAC_levelB_idc) related to the number of multiplication-accumulation operations required to decode the encoded data is applicable to the partial decoding steps that do not implement the neural network processing. Advantageously, in this embodiment, different constraints associated with the number of MACs are defined according to the type of steps involved in the decoding process. The first group of MAC levels (MAC level A) is defined for all or part of the steps of the decoding process that include NN-based operations (type A steps). The second group of MAC levels (MAC level B) is defined for all or part of the steps of the decoding process that include non-NN-based operations (type B steps). Table 9 shows the syntax changes, adding two new syntax elements "general_MAC_levelA_idc" and "general_MAC_levelB_idc".

[0118] Table 9: Modified the "profile_tier_level" syntax, adding two new syntax elements, which represent two new level indexes

[0119]

[0120] According to the ninth embodiment, a separate constraint on the number of multiply-accumulate operations is specified for out-of-loop post-decoding processes. As for the eighth embodiment, separate constraints associated with the number of MACs are defined for out-of-loop processes, such as post-decoding filtering, post-decoding resampling, post-decoding film grain synthesis, post-decoding video enhancement, post-decoding dynamic range adaptation (tone mapping or inverse tone mapping).

[0121] According to the tenth embodiment, the constraints between resolution, bit rate and MACS are de-correlated. In non-broadcast applications, the concept of levels is actually ignored by many service providers, which set a maximum bit rate limit for a given resolution (with a main level or a high level). To overcome this arbitrarily set limit, the service provider can choose to signal a higher level, thereby allowing a higher bit rate and proportionally reducing the resolution through different control mechanisms.

[0122] In a first variation of this embodiment, three independent syntax parameters are defined as follows, and replace both the layer parameter and the level parameter defined in VVC, as shown in Table 10 (the added syntax elements are underlined):

[0123] Table 10: Three separate syntax parameters are inserted at a higher signaling level than the profile / tier / level

[0124]

[0125]

[0126] Where general_resolution_idc represents the maximum resolution corresponding to the maximum luminance sampling rate MaxLumaSr (samples / second) in Table 2. In this case, the maximum number of slices and levels is inferred from general_resolution_idc.

[0127] Wherein general_bitrate_idc represents the maximum bit rate corresponding to the maximum bit rate MaxBR (BrVclFactor or BrNalFactor, bit / second) in Table 2.

[0128] Wherein general_MAC_idc may be defined according to any of the previous embodiments.

[0129] However, it is difficult for a standards-compliant decoder to handle the infinite number of combinations.

[0130] In a second variation of this embodiment, "level" and "tier" are further constrained by new syntax elements. According to specific features, the concept of level is further constrained by 3 syntax elements: resolution, bit rate and MACS. Table 11 below shows the syntax changes with new syntax elements (underlined) when the concept of level is further constrained:

[0131] Table 11: Inserting 3 separate syntax parameters in addition to profile / level

[0132]

[0133] Where general_resolution_idc represents the maximum resolution corresponding to the maximum luminance sampling rate MaxLumaSr (samples / second). When not present, MaxLumaSr is defined as in Table 2. When present, the value of general_resolution_idc represents a lower resolution corresponding to a lower level (maximum luminance sampling rate as described in Table 2).

[0134] Where general_bitrate_idc represents the maximum bit rate corresponding to the maximum bit rate MaxBR (BrVclFactor or BrNalFactor, bits / second). When not present, MaxBR is defined as in Table 2. When present, the value of general_bitrate_idc represents a lower MaxBR corresponding to a lower level and / or layer described in Table 2. It should be noted that the values ​​of general_resolution_idc and general_bitrate_idc are not necessarily related (and therefore different from the concept of level).

[0135] Wherein general_MAC_idc may be defined according to any of the previous embodiments.

[0136] According to the eleventh embodiment, a general encoding method 200 is disclosed that generates a bitstream that complies with the capability constraints according to any embodiment or variant thereof. Although not explicitly described, a person skilled in the art will be able to explicitly derive the general encoding embodiment to the specific embodiments described herein.

[0137] During the encoding process, when the encoder performs the generation of a bitstream conforming to a specified profile / level, it needs to insert parameters related to the profile, level in the bitstream to transmit them to the decoding side. Therefore, the encoder signals indicators related to the profile, level and MAC level (if relevant), or MAC level A and MAC level B (if relevant), ensuring that a decoder conforming to the profile, level and MAC level (if relevant), or MAC level A and MAC level B (if relevant) can decode the bitstream.

[0138] Figure 7 A general encoding method 200 is shown in accordance with general aspects of at least one embodiment. Figure 7 The block diagram part shows that, for example, Figure 2A module of an encoder or encoding method implemented in an exemplary encoder of. In step 710, a profile and level to which the encoded data should conform is obtained among a plurality of profiles and levels. According to a notable feature, the plurality of profiles and levels specify capability constraints for decoding the conforming encoded data, wherein the capability constraints include an indication of the number of multiplication-accumulation operations required to decode the encoded data in any of the variants observed herein. Then, in step 720, the image sequence is encoded according to the selected profile and level. Further encoded in the bitstream (730): an indication of the profile to which the encoded data conforms (such as general_profile_idc) and an indication of the level to which the encoded data conforms (such as general_level_idc or any variant thereof) are to allow a decoder to determine whether it is able to decode the bitstream.

[0139] According to a twelfth embodiment, a separate constraint on the number of multiplication-accumulation operations is specified for display processing. According to a specific variant, the capability constraint includes an indication of the number of multiplication-accumulation operations required for NN-based display processing. According to another specific variant, the video stream also includes an indication of the maximum multiplication-addition operation rate required for NN-based display processing. According to yet another specific variant, the indication of the maximum multiplication-addition operation rate required for NN-based display processing is embedded in an SEI message.

[0140] Specifying constraints on the MACs rate or the number of MACs per sample for NN-based display processing facilitates display processing such as super-resolution, filtering, edge enhancement. The constraints to which the bitstream complies can be signaled as metadata in, for example, an SEI message. The SEI message includes a syntax element max_MACS_rate that indicates the maximum number of MACS per second that a device that will apply the display process must support at a maximum limit. Optionally, the SEI message includes a syntax element max_MACS_per_sample that indicates the maximum number of MACS per sample that a device that will apply the display process must support at a maximum limit.

[0141] Optionally, the SEI message includes 2 syntax elements, one syntax element is related to the maximum number of samples per second max_samples_rate, and the other syntax element indicates a maximum ratio max_MACS_ratio related to the maximum sample rate, which indicates the maximum MACS rate. The maximum MACS rate is obtained by (max_samples_rate*max_MACS_ratio).

[0142] Additional Examples and Information

[0143] Various methods are described herein, and each method in these methods includes one or more steps or actions for realizing the described method.Unless the correct operation of the method requires a specific order of steps or actions, otherwise the order and / or use of specific steps and / or actions can be modified or combined.In addition, terms such as "first", "second" etc. can be used to modify elements, components, steps, operations, etc. in various embodiments, for example, "first decoding" and "second decoding".Unless specifically required, the use of such terms does not mean the sequencing of the operation to modification.Therefore, in this example, it is not necessary to perform the first decoding before the second decoding, and it can occur, for example, before the second decoding, during the second decoding, or in the time period overlapping with the second decoding.

[0144] The various methods and other aspects described in this application can be used to modify Figure 2 and Figure 3 Modules of the video encoder 200 and decoder 300 shown. In addition, the present aspects are not limited to VVC or HEVC, and can be applied to, for example, other standards and recommendations, as well as extensions of any such standards and recommendations. Unless otherwise specified or technically excluded, the aspects described in this application can be used alone or in combination.

[0145] Various numerical values ​​are used in this application. The specific values ​​are for illustrative purposes, and the described aspects are not limited to these specific values.

[0146] Various embodiments relate to decoding. "Decoding" as used in this application may include, for example, all or part of a process performed on a received coded sequence to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, such as entropy decoding, inverse quantization, inverse transform, and differential decoding. Based on the context of the specific description, it will be clear whether the phrase "decoding process" is intended to refer specifically to a subset of operations or to a broader decoding process, and it is believed that those skilled in the art will be well understood.

[0147] Various embodiments relate to encoding.In a manner similar to the discussion above regarding "decoding", "encoding" as used in this application may include, for example, all or part of the processes performed on an input video sequence to produce an encoded bitstream.

[0148] It should be noted that the grammatical elements used herein are descriptive terms. Therefore, they do not exclude the use of other grammatical element names.

[0149] The embodiments and aspects described herein may be implemented as various information, such as syntax, which may be transmitted or stored, for example. The information may be packaged or arranged in various ways, including, for example, those commonly found in video standards, such as placing the information in an SPS, PPS, NAL unit, header (e.g., a NAL unit header or a slice header), or SEI message. Other approaches are also available, including, for example, those commonly found in system-level or application-level standards, such as placing the information in one or more of the following:

[0150] SDP (Session Description Protocol), a format for describing multimedia communication sessions, used for the purposes of session announcement and session invitation, e.g. as described in RFCs, and used in conjunction with RTP (Real-time Transport Protocol) transport;

[0151] DASH MPD (Media Presentation Description) descriptors, such as those used in DASH and transmitted over HTTP, are associated with a representation or a set of representations to provide additional characteristics to the content representation;

[0152] RTP header extensions, such as those used during RTP streaming;

[0153] The ISO Base Media File Format, such as used in OMAF, and which uses boxes, also referred to as "atoms" in some specifications, as object-oriented building blocks defined by a unique type identifier and a length;

[0154] HLS (HTTP Live Streaming) manifests, which are transmitted over HTTP. A manifest may be associated with, for example, a version of content or a set of versions of content to provide characteristics of the version or set of versions.

[0155] The embodiments and aspects described herein may be implemented in, for example, a method or process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of embodiment (e.g., discussed only as a method), the embodiments of the features discussed may be implemented in other forms (e.g., an apparatus or program). The apparatus may be implemented in, for example, appropriate hardware, software, and firmware. The method may be implemented in, for example, an apparatus, such as a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. The processor also includes a communication device, such as a computer, a cellular phone, a portable / personal digital assistant ("PDA"), and other devices that facilitate information communication between end users.

[0156] References to "one embodiment" or "an embodiment" or "one implementation" or "an implementation" and other variations thereof mean that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" or "in one implementation" or "in an implementation" and any other variations appearing in various places throughout the application are not necessarily all referring to the same embodiment.

[0157] Furthermore, the present application may refer to “determining” various information. Determining information may include, for example, one or more of estimating information, calculating information, predicting information, or retrieving information from a memory.

[0158] Furthermore, the present application may refer to "accessing" various information. Accessing information may include, for example, receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0159] Furthermore, the present application may involve "receiving" various information. Like "accessing," receiving is a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from a memory). Furthermore, "receiving" is often involved in some way or another during an operation, such as storing information, processing information, sending information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0160] It should be understood that, for example, in the case of "A / B," "A and / or B," and "at least one of A and B," any of the following uses of " / ," "and / or," and "at least one of" are intended to include selecting only the first listed option (A), or only the second listed option (B), or both options (A and B). As another example, in the case of "A, B, and / or C" and "at least one of A, B, and C," such wording is intended to include selecting only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first listed option and the second listed option (A and B), or only the first and third listed options (A and C), or only the second and third listed options (B and C), or all three options (A and B and C). This can be extended to many of the listed items, as will be apparent to one of ordinary skill in this and related arts.

[0161] In addition, as used herein, the word "signaling" refers in particular to indicating something to a corresponding decoder. For example, in some embodiments, the encoder signals a quantization matrix for dequantization. In this way, in an embodiment, the same parameters are used on both the encoder side and the decoder side. Thus, for example, the encoder can send (explicitly signal) specific parameters to the decoder so that the decoder can use the same specific parameters. On the contrary, if the decoder already has specific parameters as well as other parameters, signaling can be used without sending (implicitly signaling) to simply allow the decoder to know and select specific parameters. By avoiding the transmission of any actual function, bit savings are achieved in various embodiments. It should be understood that signaling can be implemented in a variety of ways. For example, in various embodiments, one or more syntax elements, flags, etc. are used to send information to the corresponding decoder. Although the verb form of the word "signaling" is mentioned above, the word "signal" can also be used as a noun in this article.

[0162] It is obvious to one of ordinary skill in the art that embodiments may generate a variety of signals that are formatted to carry information that can be stored or transmitted, for example. The information may include, for example, instructions for executing a method, or data generated by one of the described embodiments. For example, a signal may be formatted to carry a bitstream of the described embodiment. Such a signal may be formatted as, for example, an electromagnetic wave (e.g., using a radio frequency portion of a spectrum) or a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information carried by the signal may be, for example, analog information or digital information. As is well known, a signal may be transmitted over a variety of different wired or wireless links. The signal may be stored on a processor readable medium.

[0163] Furthermore, the disclosed concepts are based on the number of MAC operations used as a complexity metric. Other complexity metrics such as number of operations (OPs), number of floating point operations (FLOPs), number of uses per sample will be clearly deduced by those skilled in the art from this disclosure.

[0164] A number of embodiments have been described. Features of these embodiments may be provided alone or in any combination across various claim categories and types. In addition, an embodiment may include one or more of the following features, devices, or aspects, alone or in any combination across various claim categories and types:

[0165] • A bitstream or signal comprising one or more of the described syntax elements, constraint files, or variants thereof.

[0166] - A bitstream or signal comprising syntax conveying information generated according to any of the described embodiments.

[0167] • Inserting syntax elements or constraint files in the signaling that enable the decoder to process in a manner consistent with that used by the encoder.

[0168] • Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal comprising one or more of the described syntax elements, constraint files or variations thereof.

[0169] • Creating and / or transmitting and / or receiving and / or decoding according to any of the described embodiments.

[0170] A method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the described embodiments.

[0171] A television, set-top box, mobile phone, tablet or other electronic device that performs a capability constraint checking process according to any of the described embodiments.

[0172] A television, set-top box, mobile phone, tablet, or other electronic device that performs a capability constraint check according to any of the described embodiments and displays the resulting image (e.g., using a monitor, screen, or other type of display).

[0173] A television, set-top box, mobile phone, tablet or other electronic device that selects (e.g., using a tuner) a channel to receive a signal including an encoded image and performs a capability constraint check according to any of the described embodiments.

[0174] A television, set-top box, mobile phone, tablet or other electronic device that receives a signal including an encoded image over the air (eg, using an antenna) and performs a capability constraint check according to any of the described embodiments.

Claims

1. A method implemented in a decoder, the method comprising determining the ability of the decoder to decode a video stream, wherein the video stream comprises: coded data representing a sequence of images, an indication of a profile to which the coded data conforms, among a plurality of profiles, and an indication of a level to which the coded data conforms, among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding compliant encoded data, and wherein the capability constraints include an indication related to a number of multiply-accumulate operations required to decode the encoded data; The determining the capability of the decoder to decode the video stream further comprises: parsing an indication of the configuration file to which the encoded data conforms; an indication of the level to which the parsed encoded data complies; and In response to determining that the decoder supports the profile and determining that the decoder supports the level, determining a number of multiply-accumulate operations that the decoder is capable of performing required to decode the encoded data. 2 . The method of claim 1 , wherein each of the plurality of levels defines at least a maximum multiplication-addition operation rate. 3 . The method of claim 1 , wherein each level of the plurality of levels defines at least a ratio of a maximum multiplication-addition operation to a maximum sampling rate.

4. The method according to claim 1, wherein the video stream further comprises: An indication of a multiply-accumulate operation level to which the encoded data conforms among a plurality of multiply-accumulate operation levels.

5. The method of claim 4, wherein the determining the ability of a decoder to decode the video stream further comprises: parsing an indication of a multiply-accumulate operation level to which the encoded data conforms; as well as In response to determining that the decoder supports the level of multiply-accumulate operations, a determination is made as to the number of multiply-accumulate operations that the decoder is capable of performing required to decode the encoded data.

6. The method of claim 5, further comprising decoding an indication of a level of multiply-accumulate operations to which the encoded data from the video stream complies.

7. A method according to any one of claims 5 or 6, wherein the following are performed independently and in any order: determining that the decoder supports the profile to which the encoded data complies, determining that the decoder supports the level to which the encoded data complies, and determining that the decoder supports the level of multiplication and accumulation operations to which the encoded data complies.

8. The method of any one of claims 4 to 7, wherein each multiply-accumulate operation level in the plurality of multiply-accumulate operation levels defines at least a maximum multiply-addition operation rate.

9. The method according to any one of claims 4 to 7, wherein each multiply-accumulate operation level in the plurality of multiply-accumulate operation levels defines at least a ratio of a maximum multiply-addition operation to a maximum sampling rate.

10. The method according to any one of claims 4 to 7, wherein each multiply-accumulate operation level in the plurality of multiply-accumulate operation levels defines at least a maximum multiply-add operation per sample.

11. A method according to any one of claims 2 to 10, wherein the indication relating to the number of multiply-accumulate operations required to decode the encoded data is applicable to part of the decoding steps or to all of the decoding steps.

12. A method according to any one of claims 2 to 10, wherein the indication relating to the number of multiply-accumulate operations required to decode the encoded data is adapted to implement a partial decoding step of a neural network process.

13. A method according to any one of claims 2 to 10, wherein the indication relating to the number of multiply-accumulate operations required to decode the encoded data comprises: A first indication related to the number of multiplication-accumulation operations required for decoding the encoded data for a partial decoding step applicable to implementation of neural network processing, and a second indication related to the number of multiplication-accumulation operations required for decoding the encoded data for a partial decoding step applicable to not implementing neural network processing.

14. A method according to any one of claims 2 to 10, wherein the indication relating to the number of multiply-accumulate operations required to decode the encoded data is applied to a post-processing partial decoding step.

15. A method according to any one of claims 2 to 14, wherein the capability constraint comprises an indication relating to a number of multiply-accumulate operations required for NN-based display processing.

16. The method of claim 15, wherein the video stream further includes an indication of a maximum multiply-add operation rate required for NN-based display processing.

17. The method of claim 16, wherein the indication of the maximum multiplication-addition operation rate required for the NN-based display processing is embedded in a SEI message.

18. A method comprising receiving a video stream, the video stream comprising: Encoded data representing an image sequence, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the conforming encoded data, and wherein the capability constraints include an indication related to a number of multiply-accumulate operations required to decode the encoded data.

19. A method comprising sending a video stream, the video stream comprising: Encoded data representing an image sequence, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the conforming encoded data, and wherein the capability constraints include an indication related to a number of multiply-accumulate operations required to decode the encoded data.

20. A video stream, comprising: Encoded data representing an image sequence, an indication of a profile to which the encoded data complies among a plurality of profiles, and an indication of a level to which the encoded data complies among a plurality of levels; wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding the conforming encoded data, and wherein the capability constraints include an indication related to a number of multiply-accumulate operations required to decode the encoded data.

21. A method comprising decoding encoded data representing a sequence of images from a video stream, wherein the method comprises: Determining the capability of a decoder to decode a video stream according to the method of any one of claims 1 to 17; as well as In response to determining that the decoder is capable of decoding the video stream, the video stream is decoded.

22. A method comprising encoding data representing a sequence of images into a video stream, the method comprising: Obtaining a configuration file to which the encoded data should conform from among multiple configuration files; Obtaining the level to which the coded data should conform among multiple levels; encoding data representing a sequence of images according to the profile and the level; encoding an indication of the profile to which the encoded data complies; as well as encoding an indication of the level to which the encoded data complies; Wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding compliant encoded data, and wherein the capability constraints include an indication regarding a number of multiply-accumulate operations required to decode the encoded data.

23. An apparatus comprising a decoder for decoding a video stream, the video stream comprising encoded data representing a sequence of images, the decoder being configured to: Determining the capability of the decoder to decode the video stream according to the method of any one of claims 1 to 17; and In response to determining that the decoder is capable of decoding the video stream, the video stream is decoded.

24. An apparatus comprising an encoder for encoding data representing a sequence of images into a video stream, the encoder being configured to: Obtaining a configuration file to which the encoded data should conform from among multiple configuration files; Obtaining the level to which the coded data should conform among multiple levels; encoding data representing a sequence of images according to the profile and the level; encoding an indication of the profile to which the encoded data complies; as well as encoding an indication of the level to which the encoded data complies; Wherein the plurality of profiles and the plurality of levels specify capability constraints for decoding compliant encoded data, and wherein the capability constraints include an indication regarding a number of multiply-accumulate operations required to decode the encoded data.

25. A computer program comprising program code instructions for implementing the steps of the method according to any one of claims 1 to 19, 21, 22 when said program code instructions are executed by a processor.

26. A non-transitory program storage device readable by a computer, the non-transitory program storage device tangibly embodying a program of instructions executable by the computer for performing the method of any one of claims 1, 18, 19, 20, 22.