A dynamic instruction conversion debugging method based on self-reflection mechanism

Abstract

The present invention discloses a dynamic instruction conversion debugging method based on a self-reflection mechanism. The method modifies a DBT engine based on the self-reflection mechanism, takes a specific instruction in a target instruction set of a target processor that does not affect the context of an original heterogeneous program as a split instruction, and takes a specific illegal instruction therein as a target illegal instruction. In the dynamic instruction conversion process, a split instruction block is added to a target instruction sequence converted from each source instruction, and the source split instruction is converted into a target illegal instruction, so that the heterogeneous program is pre-converted on the target processor to obtain a corresponding target program. When the target program is debugged and executed in the target instruction set, the address of the source instruction in the heterogeneous program that generates an exception or crash can be located, thereby realizing the debuggability of the program executed based on DBT.

Description

Technical Field

[0001] The invention belongs to the technical field of computer software development, and in particular relates to a dynamic instruction conversion debugging method based on a self-reflection mechanism. Background Art

[0002] Dynamic Instruction Translation (DIT), also known as Dynamic Binary Translation (DBT), is a method of converting program instructions from one instruction set to the current physical processor instruction set at runtime. It is mainly used to meet the needs of running heterogeneous instruction set programs on one processor. Taking the execution of an x86 processor program on an ARM processor as an example, after the program on the x86 processor is converted through dynamic instruction conversion, the actual execution of the converted ARM instructions on the ARM processor is the ARM instruction. At this time, if the program is abnormal or crashes, the faulty instruction cannot be mapped to the original instruction, that is, it is impossible to determine whether the ARM instruction at the abnormal address when the program crashes corresponds to the specific address and instruction in the original x86 program, which makes it difficult to debug programs based on DBT execution. Summary of the invention

[0003] In view of this, the present invention provides a dynamic instruction conversion debugging method based on a self-reflection mechanism, which implements the debuggability of a program executed based on DBT by pre-converting a heterogeneous program on a target processor.

[0004] The present invention provides a dynamic instruction conversion debugging method based on a self-reflection mechanism, which specifically comprises the following steps:

[0005] Step 1: Start the execution of the heterogeneous program in the target processor in a dynamic instruction conversion manner, record the instruction to be executed after conversion as the current source instruction, and record the address of the current source instruction as the current source instruction address;

[0006] Step 2: If the current source instruction is a source split instruction, execute step 3; otherwise, execute step 4;

[0007] Step 3, convert the current source instruction into a target illegal instruction in the target instruction set, add the current source instruction address after the target illegal instruction, save the target illegal instruction and the current source instruction address into the target instruction cache, and execute step 5;

[0008] Step 4: convert the current source instruction into one or more corresponding target instructions in the target instruction set, and the target instructions constitute the current target instruction sequence; add a split instruction block consisting of the split instruction and the current source instruction address after the current target instruction sequence, save the current target instruction sequence and the split instruction block into the target instruction cache, and execute step 5;

[0009] Step 5: If there are unconverted instructions in the heterogeneous program, execute step 2 with the next instruction as the current source instruction; otherwise, add the exception handling code of the target illegal instruction in the target instruction cache and recover the exception to form a first target program;

[0010] Step 6. Execute the first target program in the target instruction set, record the target instruction address that generates an exception or crashes during the execution process as the exception target address, search from the exception target address toward the higher address in the target instruction cache, obtain the split instruction block where the split instruction is located when it appears for the first time, extract the current source instruction address from the split instruction block to determine the location of the source instruction in the heterogeneous program corresponding to the exception or crash, and complete debugging.

[0011] Furthermore, the current source instruction address is represented as an offset address relative to a base address, and the base address is a starting address of the heterogeneous program.

[0012] Furthermore, the split instruction is an empty instruction in the target instruction set, and the source split instruction is an empty instruction in the source instruction set.

[0013] Furthermore, the target illegal instruction is an illegal instruction with a length of one byte or two bytes in the target instruction set.

[0014] Furthermore, the current source instruction address is represented in the form of an immediate number, and when the current source instruction address needs to be split into multiple current source instruction sub-addresses, the split instruction block includes multiple combinations of split instructions and current source instruction sub-addresses.

[0015] Furthermore, the construction process of the segmentation instruction block includes:

[0016] Step 4.1, according to the representation method of the immediate number in the target instruction set, determine the number N of the current source instruction sub-addresses that the current source instruction address needs to be split into, and split the current source instruction address into N immediate numbers; let the value of the sequence number n be 1, and the maximum value of n is N;

[0017] Step 4.2, add the split instruction, if n=1, execute step 4.3, otherwise execute step 4.4;

[0018] Step 4.3, add the first target instruction, the operands of the first target instruction are the reserved register and the nth immediate value obtained by splitting the current source instruction address, and execute step 4.5;

[0019] Step 4.4, add a second target instruction, the operands of which are the reserved memory address and the nth immediate value obtained by splitting the current source instruction address, and execute step 4.5;

[0020] Step 4.5: If n is not greater than N, increment n by 1 and execute step 4.2; otherwise, terminate this process.

[0021] Furthermore, the exception handling code for the target illegal instruction in step 5 is: when the captured exception is an exception caused by the target illegal instruction, obtain the exception address and the current source instruction address at the exception address, and use the sum of the exception address, the length of the target illegal instruction and the length of the current source instruction address as the recovery execution address; after resetting the exception information, restart execution with the recovery execution address as the starting address.

[0022] Furthermore, the method of extracting the current source instruction address from the split instruction block in step 6 is: extracting all combinations formed by the split instructions and the current source instruction sub-addresses from the split instruction block, and sequentially splicing all the current source instruction sub-addresses from low address to high address to form the current source instruction address.

[0023] Furthermore, when a symbol file exists for a heterogeneous program, the file name of the source code file and the line number thereof in the file are located according to the obtained current source instruction address in the heterogeneous program that generates an exception or crashes. Beneficial Effects

[0024] The present invention modifies the DBT engine based on the self-reflection mechanism, takes the specific instructions in the target instruction set of the target processor that do not affect the context of the original heterogeneous program as split instructions, and takes the specific illegal instructions therein as target illegal instructions. In the dynamic instruction conversion process, split instruction blocks are added to the target instruction sequence obtained by converting each source instruction, and the source split instructions are converted into target illegal instructions, so as to realize the pre-conversion of the heterogeneous program on the target processor to obtain the corresponding target program. When debugging and executing the target program in the target instruction set, the address of the source instruction in the heterogeneous program that generates an exception or crash can be located, thereby realizing the debuggability of the program executed based on DBT. DETAILED DESCRIPTION

[0025] The present invention is described in detail with reference to the following embodiments.

[0026] The self-reflection mechanism in programming allows a program to inspect, modify, and use its own structure and behavior at runtime. The self-reflection mechanism enables a program to access, browse, and manipulate data type information within the program, including classes, interfaces, methods, properties, etc. This mechanism is implemented in many programming languages, including Java, C#, Python, etc.

[0027] The main features of the self-reflection mechanism include: type checking, the program can determine the type of an object at runtime and make decisions based on it; dynamic loading, the program can load and use class libraries at runtime; property and method access, the program can access the properties and methods of an object, even if these properties and methods are unknown at compile time; metadata access, the program can read metadata about program elements (such as classes and methods); dynamic object creation, the program can create new object instances at runtime; modifying program behavior, the program can modify its own behavior at runtime, such as dynamically changing method access permissions.

[0028] The application scenarios of the self-reflection mechanism include: serialization and deserialization. When the object state needs to be saved to a file or transmitted over a network, self-reflection can be used to access the private fields of the object; framework development. Many frameworks use self-reflection to implement advanced functions such as dependency injection and ORM (object-relational mapping); debugging and testing. Self-reflection can be used to check the program status and assist in debugging and testing; dynamic language features. Self-reflection is the basis for implementing dynamic language features (such as dynamic type checking and dynamic method calling).

[0029] The present invention provides a dynamic instruction conversion debugging method based on a self-reflection mechanism, the core idea of ​​which is: based on the self-reflection mechanism, a DBT engine is modified, specific instructions in a target instruction set of a target processor that do not affect the context of an original heterogeneous program are used as split instructions, and specific illegal instructions therein are used as target illegal instructions, split instruction blocks are added to a target instruction sequence obtained by converting each source instruction during the dynamic instruction conversion process, and the source split instructions are converted into target illegal instructions, so as to implement pre-conversion of heterogeneous programs on the target processor to obtain corresponding target programs, and when the target program is executed in the target instruction set, the address of the source instruction in the heterogeneous program that generates an exception or crash can be located, so as to implement debuggability of the program executed based on DBT.

[0030] The present invention provides a dynamic instruction conversion debugging method based on a self-reflection mechanism, which transforms the process of executing instruction conversion of the loader of the existing DBT engine and modifies the process of reading and parsing the executable file when the DBT engine loader is running. Specifically, the method includes the following steps:

[0031] Step 1: record the instruction set used when developing the heterogeneous program as the source instruction set, record the processor that executes the heterogeneous program as the target processor, and record the instruction set of the target processor as the target instruction set; start the execution of the heterogeneous program in the target processor in a dynamic instruction conversion manner, record the current instruction to be executed after conversion as the current source instruction, and record the address of the current source instruction as the current source instruction address.

[0032] In order to further reduce the storage space occupied by the current source instruction address and improve debugging efficiency, the present invention records the starting address of the heterogeneous program as the base address and represents the current source instruction address as an offset address relative to the base address.

[0033] Step 2: If the current source instruction is a source split instruction, execute step 3; otherwise, execute step 4; wherein a specific instruction in the target instruction set is selected as the split instruction, and the instruction in the source instruction set having the same semantics as the split instruction is the source split instruction.

[0034] The present invention involves two instruction sets, a source instruction set and a target instruction set. Taking an empty instruction as a split instruction as an example, both instruction sets contain empty instructions such as NOP instructions. If the current source instruction is an empty instruction, it means that the empty instruction should be an empty instruction in the source instruction set, that is, a source split instruction. Correspondingly, the empty instruction in the target instruction set is a split instruction.

[0035] Step 3: convert the current source instruction into a target illegal instruction in the target instruction set, add the current source instruction address after the target illegal instruction, save the target illegal instruction and the current source instruction address into the target instruction cache, and execute step 5. The target illegal instruction is a specific illegal instruction in the target instruction set.

[0036] Since the present invention adds a split instruction that does not affect the context of the original heterogeneous program to the heterogeneous program during the dynamic instruction conversion process, so that the converted program can be debugged and the address of the source instruction can be determined, the present invention uses a specific instruction in the target instruction set, such as a null instruction, as a split instruction, that is, a new meaning is given to the specific instruction in the target instruction set, so that the instruction in the converted program can only be used as a split instruction in the present invention. Therefore, the source split instruction in the source instruction cannot be converted into a split instruction in the target instruction set, but needs to be converted into a specific instruction specified by the present invention to ensure that only the split instruction generated by the present invention exists in the converted program.

[0037] In order to further improve debugging efficiency, the present invention selects illegal instructions with a smaller instruction length in the target instruction set as target illegal instructions, specifically, illegal instructions with an instruction length of one byte or two bytes can be selected. In addition, the present invention can implement jumping to the target instruction cache to execute the original heterogeneous program and debug it by creating a specific target instruction cache to save relevant information.

[0038] Step 4: Convert the current source instruction into one or more corresponding target instructions in the target instruction set, and form the current target instruction sequence with the target instructions; after the current target instruction sequence, add a split instruction block consisting of a split instruction and the current source instruction address, save the current target instruction sequence and the split instruction block to the target instruction cache, and then execute step 5. The current source instruction address can be represented in the form of an immediate number, and when the current source instruction address needs to be split into multiple current source instruction sub-addresses, the split instruction block contains multiple combinations of split instructions and current source instruction sub-addresses.

[0039] The number of bits of an immediate number is an important concept in an instruction set, which determines the range of values ​​that an instruction can directly represent. An immediate number generally refers to a number used in an immediate addressing mode instruction, and the length can be 8 bits, 16 bits, or 32 bits. The representation of immediate numbers in different instruction sets is different. For example, in an ARM processor, a 32-bit immediate number cannot be directly represented as a 32-bit constant, but is obtained by cyclically shifting an 8-bit constant to the right by an even number of bits. Therefore, the present invention adds a split instruction and a current source instruction address, comprising the following steps:

[0040] Step 4.1, according to the representation method of the immediate number in the target instruction set, determine the number N of the current source instruction sub-addresses that the current source instruction address needs to be split into, and split the current source instruction address into N immediate numbers; let the value of the sequence number n be 1, and the maximum value of n is N;

[0041] Step 4.2, add the split instruction, if n=1, execute step 4.3, otherwise execute step 4.4;

[0042] Step 4.3, add a first target instruction, the first target instruction is an instruction in the target instruction set having two operands, a register and an immediate number, the operands of the first target instruction are respectively a reserved register and the nth immediate number obtained by splitting the current source instruction address, and execute step 4.5; for example, the first target instruction is an XOR operation instruction, and the reserved register is a register reserved by modifying the register mapping algorithm of the DBT engine, so as to ensure that the DBT engine does not use the reserved register as a target register when executing register mapping;

[0043] Step 4.4, add a second target instruction, the second target instruction is an instruction in the target instruction set having two operands, a memory address and an immediate value, the operands of the second target instruction are respectively a reserved memory address and the nth immediate value obtained by splitting the current source instruction address, and execute step 4.5; for example, the second target instruction is a write memory instruction, and the reserved memory address is also a memory address that the original heterogeneous program will not use;

[0044] Step 4.5: If n is not greater than N, increment n by 1 and execute step 4.2; otherwise, terminate this process.

[0045] Step 5. If there are unconverted instructions in the heterogeneous program, select the next instruction in the heterogeneous program as the current source instruction to execute step 2; otherwise, it means that all instructions in the heterogeneous program have been converted, and add the exception handling code of the target illegal instruction in the target instruction cache to recover the exception caused by the target illegal instruction, thereby forming the first target program of the heterogeneous program.

[0046] Among them, the exception handling code for the target illegal instruction is: when the captured exception is an exception caused by the target illegal instruction, obtain the exception address and the current source instruction address at the exception address, and use the sum of the exception address, the length of the target illegal instruction and the length of the current source instruction address as the recovery execution address; after resetting the exception information, restart execution with the recovery execution address as the starting address.

[0047] Step 6. Execute the first target program in the target instruction set, record the target instruction address that generates an exception or crashes during the execution process as the exception target address, search from the exception target address toward a higher address in the target instruction cache, obtain the split instruction block where the split instruction is located when it appears for the first time, extract the current source instruction address from the split instruction block to determine the location of the source instruction in the heterogeneous program corresponding to the exception or crash, and complete debugging.

[0048] For the case where the current source instruction address needs to be split into multiple current source instruction sub-addresses, the method of extracting the current source instruction address from the split instruction block is to extract all combinations formed by the split instructions and the current source instruction sub-addresses from the split instruction block, and form the current source instruction address by sequentially splicing all the current source instruction sub-addresses from the low address to the high address.

[0049] Furthermore, if a symbol file exists for the heterogeneous program, the file name of the source code file where the instruction generates the exception or crash and its line number in the file can be located according to the location of the source instruction in the obtained heterogeneous program that generates the exception or crash. Example

[0050] In this embodiment, a dynamic instruction conversion debugging method based on a self-reflection mechanism provided by the present invention is used to debug an x86 program in the ARM instruction set of an ARM processor. For the code in each code segment, instruction conversion is performed in sequence in basic blocks. The basic block currently being converted is recorded as currentSourceBlock, the instruction currently being converted is recorded as currentSourceInstr, and the address of the current currentSourceInstr is recorded as sourceInstrAddr. The following steps are performed for each currentSourceInstr:

[0051] S1. If currentSourceInstr is not a NOP instruction of the source instruction set, the instruction sequence generated after executing instruction conversion on it is recorded as targetInstrSequence; a split instruction is added at the end of targetInstrSequence, and the address of the instruction address involved in targetInstrSequence is added at the end so as not to affect the address, specifically including:

[0052] S1.1. According to the characteristics of the target instruction set, it is determined that sourceInstrAddr needs to be split into N immediate values, which is determined by the highest bit of sourceInstrAddr. In the ARM instruction set, an ARM instruction is fixed to 32 bits, and an immediate value can only be expressed in 12 bits. Therefore, a 24-bit sourceInstrAddr needs to be split into two parts. The specific splitting method is to split it from the middle according to the binary expression.

[0053] S1.2. Insert a NOP instruction in the target instruction set. If it is the first immediate value, execute S1.3; otherwise, execute S1.4.

[0054] S1.3. Insert an XOR instruction in the target instruction set. The two operands of the instruction are register r and the first immediate value of sourceInstrAddr. Execute S1.5.

[0055] S1.4. Insert a memory write instruction in the target instruction set, where the two operands of the instruction are the memory address and the current part of sourceInstrAddr, and execute S1.5.

[0056] S1.5. Write the modified targetInstrSequence into the instruction conversion target buffer. If the current part is not the last part, select the next part to execute S1.2. Otherwise, end this process.

[0057] S2. If currentSourceInstr is a NOP instruction of the source instruction set, convert currentSourceInstr into a target illegal instruction, record the target illegal instruction as dbtIllegalInstr, and insert sourceInstrAddr after dbtIllegalInstr.

[0058] Specifically, if currentSourceInstr is a NOP instruction of the source instruction set being converted for the first time, an exception handler is added to the target instruction cache to handle the IllegalInstruction Exception caused by illegal instructions of the current process. When this exception is captured, the following is executed: determine whether the illegal instruction at the exception address is dbtIllegalInstr. If so, set the exception recovery to the address determined by the sum of the exception address, the dbtIllegalInstr instruction length and the sourceInstrAddr length, reset the exception information, and resume execution.

[0059] S3. Execute the heterogeneous program on the target processor. When an exception or crash occurs, obtain the instruction address of the exception or crash address and record it as crashInstrAddr. Find the first NOP instruction from crashInstrAddr to the higher address direction, then obtain the instruction after the NOP instruction, extract the immediate value of part of the current source instruction address, repeat this step until all parts of the current source instruction address are extracted, and concatenate all these parts to form sourceInstrAddr. sourceInstrAddr is the instruction address of the source instruction corresponding to crashInstrAddr in the original heterogeneous program.

[0060] In summary, the above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A dynamic instruction conversion debugging method based on self-reflection mechanism, characterized in that: The specific steps include: Step 1: Start the execution of the heterogeneous program in the target processor in a dynamic instruction conversion manner, record the instruction to be executed after conversion as the current source instruction, and record the address of the current source instruction as the current source instruction address; Step 2: If the current source instruction is a source split instruction, execute step 3; otherwise, execute step 4; Step 3, convert the current source instruction into a target illegal instruction in the target instruction set, add the current source instruction address after the target illegal instruction, save the target illegal instruction and the current source instruction address into the target instruction cache, and execute step 5; Step 4: convert the current source instruction into one or more corresponding target instructions in the target instruction set, and the target instructions constitute the current target instruction sequence; add a split instruction block consisting of the split instruction and the current source instruction address after the current target instruction sequence, save the current target instruction sequence and the split instruction block into the target instruction cache, and execute step 5; Step 5: If there are unconverted instructions in the heterogeneous program, execute step 2 with the next instruction as the current source instruction; otherwise, add the exception handling code of the target illegal instruction in the target instruction cache and recover the exception to form a first target program; Step 6: Execute the first target program in the target instruction set, record the target instruction address where the execution process generates an exception or crashes as the abnormal target address, search from the abnormal target address to the higher address in the target instruction cache, obtain the split instruction block where the split instruction is located when it appears for the first time, extract the current source instruction address from the split instruction block to determine the location of the source instruction in the heterogeneous program corresponding to the exception or crash, and complete debugging; The split instruction is an empty instruction in the target instruction set, and the source split instruction is an empty instruction in the source instruction set; The target illegal instruction is an illegal instruction with a length of one byte or two bytes in the target instruction set; The current source instruction address is represented in the form of an immediate number. When the current source instruction address needs to be split into multiple current source instruction sub-addresses, the split instruction block includes multiple combinations of split instructions and current source instruction sub-addresses.

2. The dynamic instruction conversion debugging method according to claim 1, characterized in that: The current source instruction address is expressed as an offset address relative to a base address, and the base address is a starting address of the heterogeneous program.

3. The dynamic instruction conversion debugging method according to claim 1, characterized in that: The construction process of the segmentation instruction block includes: Step 4.1, according to the representation method of the immediate number in the target instruction set, determine the number N of the current source instruction sub-addresses that the current source instruction address needs to be split into, and split the current source instruction address into N immediate numbers; let the value of the sequence number n be 1, and the maximum value of n is N; Step 4.2, add a split instruction, if n=1, execute step 4.3, otherwise execute step 4.4; Step 4.3, add the first target instruction, the operands of the first target instruction are the reserved register and the nth immediate value obtained by splitting the current source instruction address, and execute step 4.5; Step 4.4, add a second target instruction, the operands of which are the reserved memory address and the nth immediate value obtained by splitting the current source instruction address, and execute step 4.5; Step 4.5: If n is less than N, increment n by 1 and execute step 4.2; otherwise, end this process.

4. The dynamic instruction conversion debugging method according to claim 1, characterized in that: The exception handling code for the target illegal instruction in step 5 is: when the captured exception is an exception caused by the target illegal instruction, obtain the exception address and the current source instruction address at the exception address, and use the sum of the exception address, the length of the target illegal instruction and the length of the current source instruction address as the recovery execution address; after resetting the exception information, restart execution with the recovery execution address as the starting address.

5. The dynamic instruction conversion debugging method according to claim 1, characterized in that: The method of extracting the current source instruction address from the split instruction block in step 6 is: extract all combinations formed by the split instructions and the current source instruction sub-addresses from the split instruction block, and form the current source instruction address by sequentially splicing all the current source instruction sub-addresses from low address to high address.

6. The dynamic instruction conversion debugging method according to claim 1, characterized in that: When a symbol file exists for a heterogeneous program, the file name of the source code file and the line number of the source code file in the file are located according to the current source instruction address of the heterogeneous program that generates an exception or crashes.