An IO expansion method, system and device based on xSPI implementation

Abstract

An IO expansion method, system and device based on xSPI implementation, the method includes: the main control chip generates at least one function driving model; wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip; the main control chip sends the function driving model to the first memory of the IO expansion chip through xSPI; the extended CPU of the IO expansion chip runs the function driving model in the first memory so that the function driving model drives the corresponding peripheral device; the corresponding peripheral device performs information collection; the IO expansion chip sends the information collected by the corresponding peripheral device to the main control chip through xSPI. The IO expansion method based on xSPI implementation of the present application can effectively reduce the computing resource consumption and access delay of the main control chip, help ensure the performance of the extended peripheral device, and is particularly effective in application scenarios with high requirements for the computing power of the main control MCU and the response of the peripheral device.

Description

Technical Field

[0001] The present application relates to the technical field of IO expansion chips, and in particular to an IO expansion method, system and device based on xSPI implementation. Background Art

[0002] IO (Input / Output) expansion chips are widely used to connect external devices to the main control MCU (Microcontroller Unit). For chip systems that support IO parallel expansion, the IO expansion method of directly expanding peripherals in parallel is easy to use. However, with the increase in the demand for peripheral functions, the computing resource consumption and access delay brought by the expansion chip to the main control chip have become limiting factors. Since the main control MCU needs to consume computing power to process peripheral functions, it may also cause excessive access delays, affecting the performance of the extended peripherals. For application scenarios with high demands on the computing power of the main control MCU and peripheral response, it cannot meet the performance requirements.

[0003] Based on this, how to provide an IO expansion method that can reduce the computing resource consumption and access delay of the main control chip has become an urgent problem to be solved in the industry. Summary of the invention

[0004] In order to solve at least one problem existing in the prior art, the purpose of the present application is to provide an IO expansion method, system and device based on xSPI, which can effectively reduce the computing resource consumption and access delay of the main control chip, help ensure the performance of the extended peripherals, and have a particularly significant effect in application scenarios with high demands on the computing power of the main MCU and the response of the peripherals.

[0005] To achieve the above-mentioned purpose, the IO expansion method based on xSPI provided in the present application is applied to an IO expansion system based on an extended serial peripheral interface xSPI including a main control chip and an IO expansion chip; the method comprises:

[0006] The main control chip generates at least one function driving model; wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip;

[0007] The main control chip sends the function drive model to the first memory of the IO expansion chip through xSPI;

[0008] The extended CPU of the IO extension chip runs the function driving model in the first memory so that the function driving model drives the corresponding peripheral device;

[0009] The corresponding peripheral device collects information;

[0010] The IO expansion chip sends the information collected by the corresponding peripherals to the main control chip via xSPI.

[0011] Furthermore, before the step of driving the corresponding peripheral device by the function driving model, the method further includes:

[0012] Based on the configuration module configured in the main control chip, the main control CPU of the main control chip performs attribute configuration on the function driving model stored in the first memory through xSPI.

[0013] Furthermore, the step of generating at least one function driving model by the main control chip includes:

[0014] The main control chip determines the customized function information corresponding to the function driving model based on the function implementation model; wherein the function implementation model is a hardware function model corresponding to the corresponding hardware established by a simulation modeling tool;

[0015] A corresponding function driving model is generated based on the customized function information and stored in the second memory of the main control chip.

[0016] Furthermore, after the step of the main control chip determining the customized function information corresponding to the function driving model based on the function implementation model, the method further includes:

[0017] Based on the configuration module configured in the main control chip, the main control CPU of the main control chip performs attribute configuration on the corresponding function driving model stored in the second memory.

[0018] Furthermore, the function driving model generated by the main control chip at least includes a function driving model corresponding to the analog-to-digital conversion unit; the method includes:

[0019] The main control chip determines the acquisition mode, acquisition parameters and output parameters of the analog-to-digital conversion unit from the function implementation model, which are used as customized function information corresponding to the function driving model; wherein the acquisition mode includes automatic acquisition, the acquisition parameters include acquisition time and acquisition frequency, and the output parameters include the time ratio greater than a voltage threshold.

[0020] Furthermore, the method further includes, in response to the completion of the information collection, the interrupt module of the IO expansion chip sending interrupt information to the interrupt module of the main control chip, so that the interrupt module of the main control chip sends the interrupt information to the main control CPU.

[0021] Furthermore, before the step of sending the function drive model by the main control chip to the first memory of the IO expansion chip via xSPI, the method further includes:

[0022] The main control chip initializes the main control chip end xSPI module;

[0023] The IO expansion chip initializes a clock module, a control chip end xSPI module, an interrupt module and a direct memory access module.

[0024] Furthermore, the peripherals configured in the IO expansion chip include at least one of a general-purpose input and output unit, an analog-to-digital conversion unit, a pulse width modulation unit, a serial peripheral interface unit, and a controller area network unit.

[0025] To achieve the above purpose, the present application also provides an IO expansion system based on xSPI, including:

[0026] A main control chip, used for generating at least one function driving model; wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip; and used for sending the function driving model to the first memory of the IO expansion chip through xSPI;

[0027] The IO expansion chip is configured with a first memory; the IO expansion chip is used to run the function driving model in the first memory by extending the CPU so that the function driving model drives the corresponding peripherals; and is used to collect information through the corresponding peripherals; and is used to send the information collected by the corresponding peripherals to the main control chip through xSPI.

[0028] To achieve the above-mentioned purpose, the present application also provides an electronic device, including a memory and a processor, wherein the memory stores computer instructions, and the processor is configured to run the instructions to execute the IO expansion method based on xSPI implementation as described in the claims above.

[0029] The present application discloses an IO expansion method, system and device based on xSPI, which generates at least one function driving model through the main control chip; and sends the function driving model to the first memory of the IO expansion chip through the main control chip through xSPI; and runs the function driving model in the first memory through the extended CPU of the IO expansion chip, so that the function driving model drives the corresponding peripherals; and collects information through the corresponding peripherals; and sends the information collected by the corresponding peripherals to the main control chip through xSPI through the IO expansion chip. In this way, the computing resource consumption and access delay of the main control chip can be effectively reduced, which helps to ensure the performance of the extended peripherals, and the effect is particularly significant in application scenarios with high requirements for the computing power of the main control MCU and the response of the peripherals.

[0030] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent from the description, or may be understood by practicing the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings are used to provide a further understanding of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings:

[0032] Figure 1 It is a structural block diagram of an IO expansion system based on xSPI implementation according to an embodiment of the present application;

[0033] Figure 2 Flow chart of an IO expansion method based on xSPI implementation according to an embodiment of the present application;

[0034] Figure 3 is a flowchart of an IO expansion method based on xSPI implementation according to another embodiment of the present application;

[0035] Figure 4 is a flowchart of an IO expansion method based on xSPI implementation according to another embodiment of the present application;

[0036] Figure 5 is a structural block diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0037] The embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be construed as being limited to the embodiments described herein. Instead, these embodiments are provided to provide a more thorough and complete understanding of the present application. It should be understood that the drawings and embodiments of the present application are only for exemplary purposes and are not intended to limit the scope of protection of the present application.

[0038] The term "including" and its variations used herein are open inclusions, i.e., "including but not limited to". The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". The relevant definitions of other terms will be given in the following description.

[0039] It should be noted that the concepts such as “first” and “second” mentioned in this application are only used to distinguish different modules or units, and are not used to limit the order or interdependence of the functions performed by these modules or units.

[0040] It should be noted that the modifications of "one" and "plurality" mentioned in this application are illustrative rather than restrictive, and those skilled in the art should understand that unless otherwise clearly indicated in the context, it should be understood as "one or more". "Plurality" should be understood as two or more.

[0041] First of all, it should be noted that in the relevant technology, the problem of IO parallel expansion can be solved by performing conventional IO expansion on peripherals, but parallel expansion will cause excessive consumption of the computing power of the main control chip, and there is a problem of delay in the main control chip accessing the extended peripherals. For example, the main control chip must respond to and control its own peripherals, and also respond to and control the extended peripherals, which will increase the extended interrupt response and execute the control instructions of the peripherals. After the CPU (Central Processing Unit) of the main control chip executes the extended peripheral instructions, the relevant register configuration needs to be passed to the IO expansion chip through, for example, xSPI (eXtended Serial Peripheral Interface), and there is an extra delay in the middle.

[0042] Based on this, the present application provides an IO expansion method based on xSPI implementation, which can effectively reduce the computing resource consumption and access delay of the main control chip, help ensure the performance of the extended peripherals, and is particularly effective in application scenarios with high demands on the computing power of the main MCU and peripheral response.

[0043] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.

[0044] It should be noted that the IO expansion method based on xSPI implementation in the present application is applied to the IO expansion system based on xSPI implementation. Figure 1 FIG. 1 is a structural block diagram of an IO expansion system based on xSPI implementation according to an embodiment of the present application. Figure 1 As shown, the IO expansion system 100 based on xSPI includes an IO expansion chip 110 and a main control chip 120. The main control chip 120 may be a control chip related to automotive electronics, such as a domain control MCU.

[0045] In a specific example, the IO expansion chip 110 is configured with an expansion CPU 111, a DMA module 112, at least one peripheral 113, a first xSPI module 114, a first interrupt module 115, and a first memory 116. The main control chip 120 is configured with a main control CPU 121, a second memory 122, a third memory 123, a second xSPI module 124, and a second interrupt module 125.

[0046] Among them, the first xSPI module 114 includes a corresponding host unit and a slave unit. The peripheral 113 may specifically include at least one of a general purpose input output unit (GPIO), an analog digital conversion unit (ADC), a pulse width modulation unit (PWM), a serial peripheral interface unit (SPI) and a controller area network unit (CAN). The first memory 116 can be used to store the function drive model loaded from the main control chip 120, and the number of function drive models can be multiple, such as a GPIO function drive model, an ADC function drive model and a PMW function drive model.

[0047] The second xSPI module 124 includes a corresponding master unit and a slave unit. The second memory 122 can be used to store the function drive model generated by the main control chip 120. The third memory 123 can be used to store at least one configuration module, which is used to perform attribute configuration on the corresponding function drive model.

[0048] The xSPI communication is an enhanced version of the Serial Peripheral Interface (SPI). This standard specifies an enhanced serial peripheral interface for non-volatile memory devices, providing higher data rates, lower pin counts, and limited backward compatibility with traditional SPI devices. Combined with the XIP (eXecute in Place, in-chip execution) technology of NOR flash (or non-flash memory), the processor can run programs directly on the flash device through XIP, so it is often used to integrate NOR Flash into MCUs. Microprocessors can expand their input and output ports through IO expansion chips to connect a variety of peripheral devices such as sensors, actuators, etc.

[0049] Compared to SPI communication, xSPI communication adopts the JESD251C standard released by the Solid State Technology Association JEDEC, which provides higher data rates, low pin counts, and limited backward compatibility with legacy SPI devices. xSPI can be used with a single controller and multiple target buses with source synchronous clock capabilities. This standardization helps increase the adoption of xSPI in the automotive, networking, and data center markets, especially for devices with expanded boot code size. Specifically, the general IO voltage options of 1.2V, 1.8V, and 3.3V ensure broad support from mature to advanced process nodes. In terms of data throughput, xSPI can reach 400MB / s per pin on 8-bit IO, which is a 200% performance improvement over Quad-SPI (quad serial peripheral interface). With the XIP function in NOR flash applications, instant display data can be processed without loading the boot code into SRAM (Static Random Access Memory), which is one of the key requirements for cars with large displays.

[0050] Figure 2 The flowchart of the IO expansion method based on xSPI implementation according to the embodiment of the present application is as follows. Figure 2 , the IO expansion method based on xSPI implementation of the present application is described in detail.

[0051] In step 201, the main control chip generates at least one function driving model.

[0052] Each function drive model corresponds to a peripheral device provided in the IO expansion chip. The function drive model is a software package, which is configured with an upper-layer function unit and a lower-layer drive unit. The function unit is customized with relevant functions of the corresponding peripheral device; the drive unit is used to drive the corresponding peripheral device. In the embodiment of the present application, the peripheral devices configured in the IO expansion chip can specifically be a general-purpose input and output unit, an analog-to-digital conversion unit, a pulse width modulation unit, a serial peripheral interface unit, and a controller area network unit, etc.

[0053] In step 202, the main control chip sends the function drive model to the first memory of the IO expansion chip through xSPI.

[0054] Specifically, the main control chip can store the function driving model in the second memory of the main control chip, and after each power-on, the function driving model can be sent to the IO expansion chip via xSPI, and then stored in the first memory of the IO expansion chip via the BUS bus. It can be understood that the first memory can be RAM (Random Access Memory) or other applicable types of memory; the second memory can be Flash (flash memory) or other applicable types of memory. This application does not impose specific restrictions on this.

[0055] In the embodiment of the present application, before step 202, the method further includes: the main control chip initializes the main control chip end xSPI module; the IO expansion chip initializes the clock module, the control chip end xSPI module, the interrupt module and the direct memory access module. In a specific example, the extended CPU of the IO expansion chip initializes the operating environment of the IO expansion chip by mainly running the ROM (Random Access Memory, read-only storage) mode.

[0056] In step 203, the extended CPU of the IO extension chip runs the function driving model in the first memory, so that the function driving model drives the corresponding peripheral device.

[0057] In a specific example, the main control chip is configured with a third memory, and a configuration module corresponding to the function drive model may be provided in the third memory. Before the extended CPU runs the function drive model, the main control chip configures the attributes of the corresponding function drive model through the configuration module. It is understandable that the third memory can be a RAM or other applicable types of memory. This application does not make specific restrictions on this.

[0058] In step 204, the corresponding peripheral device collects information.

[0059] That is to say, after being driven, the corresponding peripherals collect information. In a specific example, the information collected by some peripherals is data information, such as an ADC unit; the information collected by some peripherals is register identification information, such as a GPIO unit.

[0060] In the embodiment of the present application, the method further includes, in response to the completion of information collection, the interrupt module of the IO expansion chip sends interrupt information to the interrupt module of the main control chip, so that the interrupt module of the main control chip sends the interrupt information to the main control CPU. Through this interrupt response mechanism, not only can multi-tasking be supported, but also it is conducive to improving real-time performance and reliability.

[0061] In step 205, the IO expansion chip sends the information collected by the corresponding peripheral device to the main control chip through xSPI.

[0062] In a specific example, when the peripheral device is a peripheral device that collects register identification information (such as a GPIO unit), the IO expansion chip sends the register identification information to a corresponding register of the main control chip through xSPI.

[0063] According to the IO expansion method based on xSPI implementation of the embodiment of the present application, at least one function driving model is generated through the main control chip; and the function driving model is sent to the first memory of the IO expansion chip through the main control chip through xSPI; and the function driving model is run in the first memory through the extended CPU of the IO expansion chip, so that the function driving model drives the corresponding peripherals; and information is collected through the corresponding peripherals; and the information collected by the corresponding peripherals is sent to the main control chip through xSPI through the IO expansion chip. In this way, the computing resource consumption and access delay of the main control chip can be effectively reduced, which helps to ensure the performance of the extended peripherals, and the effect is particularly significant in application scenarios with high requirements for the computing power of the main control MCU and the response of the peripherals.

[0064] In the present application embodiment, Figure 3 As shown, step 201 includes the following sub-steps:

[0065] Step 301: The main control chip determines customized function information corresponding to the function driving model based on the function implementation model.

[0066] It should be noted that the function implementation model is a hardware function model corresponding to the corresponding hardware established by a simulation modeling tool. In a specific example, the simulation modeling tool can be a simulation modeling tool based on MATLAB, specifically Simulink. It is understandable that the simulation modeling tool can also be other applicable tools, and this application does not specifically limit this.

[0067] Step 302: Generate a corresponding function driving model based on the customized function information and store it in the second memory of the main control chip.

[0068] Furthermore, the method further comprises:

[0069] Step 303: Based on the configuration module configured in the main control chip, the main control CPU of the main control chip performs attribute configuration on the corresponding function driving model stored in the second memory.

[0070] In a specific example, the function driving model generated by the main control chip may include a function driving model corresponding to the peripheral ADC unit. Take the peripheral ADC unit as an example: the main control chip determines the acquisition mode, acquisition parameters and output parameters of the ADC unit from the ADC function implementation model, which are used as the customized function information corresponding to the ADC function driving model. Among them, the acquisition mode may include automatic acquisition, the acquisition parameters may include acquisition time and acquisition frequency, and the output parameters may include the time ratio greater than the voltage threshold. Then, an ADC function driving model is generated based on the customized function information and stored in the second memory Flash of the main control chip. Then, the ADC function driving model is configured with the attributes of acquisition frequency, acquisition time and voltage threshold. And after each power-on of the system, the ADC function driving model is loaded into the first memory RAM of the IO expansion chip.

[0071] It is understandable that the present application is not limited to performing attribute configuration before loading the function driver model into the IO expansion chip.

[0072] As another example, after the function driver model is loaded into the IO expansion chip and before the function driver model drives the corresponding peripheral, the main control CPU of the main control chip configures the properties of the function driver model stored in the first memory through xSPI based on the configuration module stored in the third memory.

[0073] The present application will be further explained and illustrated by a specific embodiment below.

[0074] Figure 4 For a flow chart of the IO expansion method based on xSPI implementation according to this specific embodiment, refer to Figure 4 As shown, the IO expansion method based on xSPI implementation includes the following steps:

[0075] Step 401: The IO expansion chip initializes the clock module.

[0076] Step 402: The IO expansion chip initializes the first xSPI module.

[0077] Step 403: The IO expansion chip initializes the interrupt module and the DMA module.

[0078] Step 404: The main control chip initializes the second xSPI module.

[0079] Step 405: The main control chip loads the ADC function driving model into the IO expansion chip.

[0080] Step 406: The IO expansion chip runs the function driver model framework.

[0081] Step 407: The main control chip configures the properties of the ADC function driver model loaded into the IO expansion chip through xSPI.

[0082] Step 408: The IO expansion chip runs the ADC function driver model.

[0083] Step 409: The IO expansion chip enables the corresponding ADC unit to collect information through the virtualized ACD module.

[0084] In summary, at least one function driving model is generated through the main control chip; and the function driving model is sent to the first memory of the IO expansion chip through the main control chip through xSPI; and the function driving model is run in the first memory through the extended CPU of the IO expansion chip, so that the function driving model drives the corresponding peripherals; and information is collected through the corresponding peripherals; and the information collected by the corresponding peripherals is sent to the main control chip through xSPI through the IO expansion chip. In this way, the computing resource consumption and access delay of the main control chip can be effectively reduced, which helps to ensure the performance of the extended peripherals, and the effect is particularly significant in application scenarios with high requirements for the computing power of the main control MCU and the response of peripherals.

[0085] This application provides an IO expansion system based on xSPI. Figure 1 As shown, the IO expansion system 100 implemented based on xSPI includes an IO expansion chip 110 and a main control chip 120 .

[0086] The main control chip 120 is used to generate at least one function driving model, wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip 110. The main control chip 120 is also used to send the function driving model to the first memory 116 of the IO expansion chip 110 via xSPI.

[0087] The IO expansion chip 110 is configured with a first memory 116. The IO expansion chip 110 is used to run a function driving model in the first memory 116 by extending the CPU 111, so that the function driving model drives the corresponding peripheral 113; and is used to collect information through the corresponding peripheral 113; and is used to send the information collected by the corresponding peripheral 113 to the main control chip 120 through xSPI.

[0088] In the embodiment of the present application, the main control chip 120 is also used for: before the function driving model drives the corresponding peripheral, based on the configuration module configured in the main control chip 120, the main control CPU configures the properties of the function driving model stored in the first memory through xSPI.

[0089] In the embodiment of the present application, the main control chip 120 is specifically used to: determine the customized function information corresponding to the function driving model based on the function implementation model; generate the corresponding function driving model based on the customized function information, and store it in the second memory of the main control chip. The function implementation model is a hardware function model corresponding to the corresponding hardware established by the simulation modeling tool.

[0090] Furthermore, the main control chip 120 is also used to: based on the configuration module configured in the main control chip, perform attribute configuration on the corresponding function driving model stored in the second memory through the main control CPU.

[0091] In the embodiment of the present application, the function driving model generated by the main control chip 120 includes at least the function driving model of the corresponding analog-to-digital conversion unit. The main control chip 120 is also used to determine the acquisition mode, acquisition parameters and output parameters of the analog-to-digital conversion unit from the function implementation model, which are used as the customized function information corresponding to the function driving model. Among them, the acquisition mode includes automatic acquisition, the acquisition parameters include acquisition time and acquisition frequency, and the output parameters include the time ratio greater than the voltage threshold.

[0092] In the embodiment of the present application, the IO expansion chip 110 is also used to: in response to the completion of information collection, send interrupt information to the interrupt module of the main control chip 120 through the interrupt module, so that the interrupt module of the main control chip 120 sends the interrupt information to the main control CPU.

[0093] In the embodiment of the present application, before the main control chip 120 sends the function driving model to the IO expansion chip 110 via xSPI, the main control chip 120 is also used to initialize the main control chip end xSPI module. The IO expansion chip is also used to initialize the clock module, the control chip end xSPI module, the interrupt module and the direct memory access module.

[0094] In the embodiment of the present application, the IO expansion chip 110 is configured with at least one peripheral device selected from the group consisting of a general-purpose input and output unit, an analog-to-digital conversion unit, a pulse width modulation unit, a serial peripheral interface unit, and a controller area network unit.

[0095] It should be noted that the explanation of the IO expansion method based on xSPI in the above embodiment is also applicable to the IO expansion system based on xSPI in the above embodiment, and will not be repeated here.

[0096] Figure 5 FIG. 1 is a structural block diagram of an electronic device according to an embodiment of the present application. Figure 5 As shown, the electronic device 500 includes a memory 501 and a processor 502. The memory 501 stores computer instructions, and the processor 502 is configured to run the instructions to execute the IO expansion method based on xSPI implementation in the above embodiment.

[0097] In the embodiment of the present application, the electronic device may be a driving device. The driving device may include at least one of a private travel tool and a public travel tool. Among them, private travel tools include but are not limited to private cars, balance cars, electric motorcycles, etc. Public travel tools include but are not limited to buses, trains, subways, high-speed railways, airplanes, etc.

[0098] It should be understood that, although the steps in the flowcharts of the accompanying drawings of the specification are displayed in sequence according to the indications of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowchart may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0099] It should be understood that the systems and methods disclosed in the several embodiments provided in this application are merely illustrative and may be implemented in other ways. For example, the division of modules or units in the embodiments is merely a logical function division, and another division method may be used in actual implementation. For example, multiple units or components may be combined or integrated into another system; some features may be ignored; some steps may not be performed. In addition, the direct coupling connection or communication connection between each other shown or discussed may be an indirect coupling connection or communication connection through some interfaces, devices or units, and may be electrical, mechanical or other forms of connection.

[0100] It should be noted that the specific numerical values ​​mentioned above are only used as examples to illustrate the implementation of the present application in detail, and should not be understood as limiting the present application. In other examples or implementations or embodiments, other numerical values ​​can be selected according to the present application, and are not specifically limited here.

[0101] Those skilled in the art can understand that the above are only preferred embodiments of the present application and are not intended to limit the present application. Although the present application is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions recorded in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. An IO expansion method based on xSPI, characterized in that: The invention is applied to an IO expansion system based on an extended serial peripheral interface xSPI including a main control chip and an IO expansion chip; the method comprises: The main control chip generates at least one function driving model; wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip; The main control chip sends the function drive model to the first memory of the IO expansion chip through xSPI; The extended CPU of the IO extension chip runs the function driving model in the first memory so that the function driving model drives the corresponding peripheral device; The corresponding peripheral device collects information; The IO expansion chip sends the information collected by the corresponding peripheral to the main control chip via xSPI; The step of generating at least one function driving model by the main control chip includes: The main control chip determines the customized function information corresponding to the function driving model based on the function implementation model; wherein the function implementation model is a hardware function model corresponding to the corresponding hardware established by a simulation modeling tool; A corresponding function driving model is generated based on the customized function information and stored in the second memory of the main control chip.

2. The method according to claim 1, characterized in that Before the step of driving the corresponding peripheral device by the function driving model, the method further includes: Based on the configuration module configured in the main control chip, the main control CPU of the main control chip performs attribute configuration on the function driving model stored in the first memory through xSPI.

3. The method according to claim 1, characterized in that After the step of the main control chip determining the customized function information corresponding to the function driving model based on the function implementation model, the method further includes: Based on the configuration module configured in the main control chip, the main control CPU of the main control chip performs attribute configuration on the corresponding function driving model stored in the second memory.

4. The method according to claim 1, characterized in that: The function driving model generated by the main control chip at least includes a function driving model corresponding to the analog-to-digital conversion unit; the method includes: The main control chip determines the acquisition mode, acquisition parameters and output parameters of the analog-to-digital conversion unit from the function implementation model, which are used as customized function information corresponding to the function driving model; wherein the acquisition mode includes automatic acquisition, the acquisition parameters include acquisition time and acquisition frequency, and the output parameters include the time ratio greater than a voltage threshold.

5. The method according to claim 1, characterized in that The method further includes, in response to the completion of the information collection, the interrupt module of the IO expansion chip sending interrupt information to the interrupt module of the main control chip, so that the interrupt module of the main control chip sends the interrupt information to the main control CPU.

6. The method according to claim 1, characterized in that Before the step in which the main control chip sends the function drive model to the first memory of the IO expansion chip via xSPI, the method further includes: The main control chip initializes the main control chip end xSPI module; The IO expansion chip initializes a clock module, a control chip end xSPI module, an interrupt module and a direct memory access module.

7. The method according to any one of claims 1 to 6, characterized in that The peripherals configured in the IO expansion chip include at least one of a general-purpose input and output unit, an analog-to-digital conversion unit, a pulse width modulation unit, a serial peripheral interface unit, and a controller area network unit.

8. An IO expansion system based on xSPI, using any one of the IO expansion methods based on xSPI of claims 1-7, characterized in that: include, A main control chip, used for generating at least one function driving model; wherein each function driving model corresponds to a peripheral device provided in the IO expansion chip; and used for sending the function driving model to the first memory of the IO expansion chip through xSPI; The IO expansion chip is configured with a first memory; the IO expansion chip is used to run the function driving model in the first memory by extending the CPU so that the function driving model drives the corresponding peripherals; and is used to collect information through the corresponding peripherals; and is used to send the information collected by the corresponding peripherals to the main control chip through xSPI.

9. An electronic device, comprising a memory and a processor, characterized in that: The memory stores computer instructions, and the processor is configured to run the instructions to execute the IO expansion method based on xSPI implementation described in any one of claims 1 to 7.

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