A chip anti-channelling method, device, equipment and storage medium

Abstract

The present invention discloses a chip anti-channelling method, device, equipment and storage medium, and relates to the field of intelligent verification technology. The method includes encrypting and scrambling a customer code and a product code based on a preset encryption and scrambling algorithm and writing them into a chip, and changing the life cycle mark of the chip; loading a system image and reading the life cycle mark of the chip, based on the read life cycle mark: if the life cycle mark is set, then continue to start the system; if the life cycle mark is not set, then obtain the customer code and product code in the chip through a preset decryption and descrambling algorithm, perform HASH value calculation to determine whether the system continues to start based on the calculated HASH value. The present application can protect the security of the implementation of anti-channelling, and does not require more manpower and material resources.

Description

Technical Field

[0001] The present application relates to the field of intelligent verification technology, and in particular to a method, device, equipment and storage medium for preventing the counterfeiting of chips. Background Art

[0002] Without the manufacturer's permission, the distributor privately transfers the goods to a non-sales area for sale, that is, the goods sent by the manufacturer to place A are sold in place B. This phenomenon is called channeling. The price of channeling goods is often lower than the normal sales price of the distributor in the area, which leads to chaos in the market price in the area. The normal sales of the distributors are severely hit. In order to maintain their own sales network, the distributors have to ship goods at a small profit, no profit or at a loss. The distributors gradually lose confidence in the brand and finally refuse to sell products, damaging the company's product brand image.

[0003] The current method used to prevent the counterfeiting of chips is generally to write the ID (Identity Document) number into the product in advance. The ID number needs to be read each time the product is started. If it cannot be read, it will continue to read until it succeeds. However, this method is easy to be cracked. Another method is to predict whether the unknown scan data belongs to the normal scan data category or the scan data category with the risk of counterfeiting based on the behavioral characteristics of historical scan data.

[0004] Regarding the above-mentioned anti-counterfeiting methods, the one based on comparison of ID values ​​is relatively simple, but also easy to be cracked; the one based on signature verification mechanism is relatively complex and requires the support of PKI (Public Key Infrastructure) infrastructure. Key management is required to ensure that the signature keys of each customer or product are different, and implementation requires more manpower and material resources.

[0005] Therefore, how to prevent the same chips from different (customer) sources from being traded in parallel, that is, software and firmware suitable for customer A cannot be used for chips of customer B; and how to prevent the same customer from trading in the same chip with different prices and functions, that is, software and firmware suitable for product A cannot be used for chips of product B, have become issues that need to be urgently addressed. Summary of the invention

[0006] The present application provides a chip anti-counterfeiting method, device, equipment and storage medium, which can not only protect the security of anti-counterfeiting implementation, but also do not require a lot of manpower and material resources.

[0007] In a first aspect, an embodiment of the present application provides a method for preventing counterfeiting of chips, the method comprising:

[0008] Encrypt and scramble the customer code and product code based on the preset encryption and scrambling algorithm and write them into the chip, and change the chip's life cycle mark;

[0009] Load the system image and read the chip's lifecycle tag. Based on the read lifecycle tag:

[0010] If the life cycle mark is set, the system will continue to start;

[0011] If it is a non-set life cycle mark, the customer code and product code in the chip are obtained through a preset decryption and descrambling algorithm, and a HASH value calculation is performed to determine whether the system continues to start based on the calculated HASH value.

[0012] In combination with the first aspect, in one implementation, the method of encrypting and scrambling the customer code and the product code based on a preset encryption and scrambling algorithm and writing them into the chip, and changing the life cycle mark of the chip, specifically includes:

[0013] The customer factory sends a registration application to the chip manufacturer. The chip manufacturer encrypts and scrambles the customer code and product code based on a preset encryption and scrambling algorithm, and sends the encrypted and scrambled customer code and product code to the customer factory.

[0014] After obtaining authorization from the chip manufacturer, the customer factory writes the encrypted and scrambled customer code and product code into the eFuse of the chip. At the same time, the customer factory changes the chip's life cycle mark to the DD stage.

[0015] In combination with the first aspect, in one implementation, the loading of the system image and reading the life cycle tag of the chip, based on the read life cycle tag, specifically includes:

[0016] ROM starts and loads SBL, and SBL loads the system image;

[0017] Read the chip's life cycle tag through a closed-source firmware program;

[0018] The closed-source firmware program is released by the chip manufacturer to the customer factory.

[0019] In combination with the first aspect, in one implementation, if the life cycle mark is set, continuing to start the system specifically includes:

[0020] When the read life cycle mark is the DM stage or the DR stage, the system is started.

[0021] In combination with the first aspect, in one implementation, if the life cycle mark is not set, the customer code and product code in the chip are obtained by a preset decryption and descrambling algorithm, and a HASH value is calculated to determine whether the system continues to start based on the calculated HASH value, specifically including:

[0022] When the read life cycle mark is the DD stage, the customer code and product code encrypted and scrambled in the chip are decrypted and descrambled by a preset decryption and descrambling algorithm to obtain the customer code and product code;

[0023] The customer code and product code obtained after decryption and descrambling are both calculated by HASH value to obtain the customer code HASH value and product code HASH value;

[0024] Determine whether the calculated customer code HASH value is equal to the default customer code HASH value:

[0025] If not, stop starting the system;

[0026] If yes, then determine whether the calculated product code HASH value is equal to the default product code HASH value, if yes, then continue to start the system, if not, then stop starting the system;

[0027] Wherein, the default customer code HASH value and the default product code HASH value are located in the closed-source firmware program.

[0028] In combination with the first aspect, in one implementation, the specific implementation process of the preset encryption and scrambling algorithm is:

[0029] Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code;

[0030] Circularly right-shift the XOR operation result by a preset bit;

[0031] The result of the circular right shift is used as the key, and the customer code and product code are encrypted using the SM4 algorithm.

[0032] In combination with the first aspect, in one implementation, the specific implementation process of the preset decryption and descrambling algorithm is:

[0033] Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code;

[0034] Circularly right-shift the XOR operation result by a preset bit;

[0035] The result of the circular right shift is used as the key, and the encrypted and scrambled customer code and product code are decrypted using the SM4 algorithm to obtain the customer code and product code before the encryption and scrambling process.

[0036] In a second aspect, an embodiment of the present application provides a chip anti-channelling device, the chip anti-channelling device comprising:

[0037] A production process setting module, which is used to encrypt and scramble the customer code and product code based on a preset encryption and scrambling algorithm and write them into the chip, and change the life cycle mark of the chip;

[0038] The boot process anti-counterfeiting detection module is used to load the system image and read the life cycle mark of the chip. Based on the read life cycle mark, if it is a set life cycle mark, the first execution module is driven to work, and if it is a non-set life cycle mark, the second execution module is driven to work;

[0039] A first execution module, which is used to continue starting the system;

[0040] The second execution module is used to obtain the customer code and product code in the chip through a preset decryption and descrambling algorithm, and perform HASH value calculation to determine whether the system continues to start based on the calculated HASH value.

[0041] In a third aspect, an embodiment of the present application provides a chip anti-counterfeiting device, the chip anti-counterfeiting device comprising a processor, a memory, and a chip anti-counterfeiting program stored in the memory and executable by the processor, wherein when the chip anti-counterfeiting program is executed by the processor, the steps of the chip anti-counterfeiting method described above are implemented.

[0042] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a chip anti-counterfeiting program is stored. When the chip anti-counterfeiting program is executed by a processor, the steps of the chip anti-counterfeiting method described above are implemented.

[0043] The beneficial effects brought by the technical solution provided by the embodiments of the present application include:

[0044] By comparing the HASH value of the customer code injected in advance into the chip with the default customer code to see if they are consistent, the chips of different customers can be prevented from being sold to each other. By comparing the HASH value of the product code injected in advance into the chip with the default product code to see if they are consistent, the same customer can be prevented from selling different products to each other. The customer code or product code is encrypted and obfuscated through a private algorithm and then written into the chip to ensure that the written content of each chip is inconsistent, thereby protecting the security of the implementation of anti-counterfeiting and not requiring a lot of manpower and material resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A schematic diagram of the process of the method for preventing counterfeiting of chips in this application;

[0046] Figure 2 This is a schematic diagram of the functional modules of the anti-channelling device of the chip of this application;

[0047] Figure 3 This is a schematic diagram of the hardware structure of the anti-counterfeiting device for the chip in this application. DETAILED DESCRIPTION

[0048] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0049] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0050] In a first aspect, an embodiment of the present application provides a method for preventing counterfeit goods from being sold in parallel with the chip.

[0051] In one embodiment, referring to Figure 1 , Figure 1 This is a flow chart of the method for preventing counterfeiting of chips in this application. Figure 1 As shown in the figure, the chip anti-channeling methods include:

[0052] S1: Encrypt and scramble the customer code and product code based on the preset encryption and scrambling algorithm and write them into the chip, and change the life cycle mark of the chip;

[0053] S2: Load the system image and read the life cycle tag of the chip. Based on the read life cycle tag, if it is a set life cycle tag, go to S3; if it is a non-set life cycle tag, go to S4;

[0054] S3: Continue to start the system;

[0055] S4: Obtain the customer code and product code in the chip through a preset decryption and descrambling algorithm, and perform HASH value calculation to determine whether the system continues to start based on the calculated HASH value.

[0056] Furthermore, in one embodiment, the customer code and the product code are encrypted and scrambled based on a preset encryption and scrambling algorithm and written into the chip, and the life cycle mark of the chip is changed, specifically including:

[0057] S101: The customer factory sends a registration application to the chip manufacturer. The chip manufacturer encrypts and scrambles the customer code and product code based on a preset encryption and scrambling algorithm, and sends the encrypted and scrambled customer code and product code to the customer factory;

[0058] Specifically, the chip manufacturer's backend server imports the customer code and product code in advance. During the production stage at the customer factory, the customer factory sends a registration application to the chip manufacturer. The chip manufacturer's backend server processes the customer code and product code using a preset encryption and scrambling algorithm, and then sends the encrypted and scrambled customer code and product code to the client tool at the customer factory through a secure channel.

[0059] It should be noted that chip manufacturers are the designers and manufacturers of chips, and customer factories are the users of chips, who use or carry out secondary development of chips.

[0060] S102: After obtaining authorization from the chip manufacturer, the customer factory writes the encrypted and scrambled customer code and product code into the eFuse (one-time programmable memory) of the chip. At the same time, the customer factory changes the chip life cycle mark to the DD (Device Deployment) stage.

[0061] Further, in one embodiment, the system image is loaded and the life cycle mark of the chip is read, and based on the read life cycle mark, the following is specifically included:

[0062] S201: ROM (Read-Only Memory) starts and loads SBL (Second Boot Loader, used to complete some initial configuration of the chip), and SBL loads the system image;

[0063] S202: Read the life cycle mark of the chip through a closed-source firmware program, which is released by the chip manufacturer to the customer factory. The closed-source firmware program is a program developed by the chip manufacturer for the customer factory to implement specific functions.

[0064] Specifically, the ROM starts and loads the SBL, and then the SBL loads multiple system images including the closed-source system image, and then the closed-source firmware program reads the chip life cycle. The closed-source system image is a system developed by the chip manufacturer for the customer factory to achieve a specific purpose or function.

[0065] Furthermore, in one embodiment, if the life cycle mark is set, the system startup continues, specifically including: when the read life cycle mark is the DM (Device Manufacturing) stage or the DR (Device Revocation) stage, the system startup continues. That is, when the chip life cycle is read as the DM stage or the DR stage, the system can continue to be started.

[0066] Further, in one embodiment, if it is a non-set life cycle mark, the customer code and product code in the chip are obtained by a preset decryption and descrambling algorithm, and a HASH value is calculated to determine whether the system continues to start based on the calculated HASH value, specifically including:

[0067] S401: When the read life cycle mark is the DD stage, the customer code and product code encrypted and scrambled in the chip are decrypted and descrambled by a preset decryption and descrambling algorithm to obtain the customer code and product code; specifically, the customer code and product code encrypted and scrambled in the chip are decrypted and descrambled by a closed source firmware program based on a preset decryption and descrambling algorithm to obtain the original customer code and product code;

[0068] S402: Calculate the HASH value of the customer code and product code obtained after decryption and descrambling to obtain the customer code HASH value and product code HASH value;

[0069] S403: Determine whether the calculated customer code HASH value is equal to the default customer code HASH value:

[0070] If not, stop starting the system;

[0071] If yes, then determine whether the calculated product code HASH value is equal to the default product code HASH value, if yes, then continue to start the system, if not, then stop starting the system;

[0072] Wherein, the default customer code HASH value and the default product code HASH value are located in the closed-source firmware program.

[0073] Furthermore, in one embodiment, the specific implementation process of the preset encryption and scrambling algorithm is:

[0074] a1: Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code; the chip manufacturer's code can be preset and is generally expressed in numbers;

[0075] a2: Circularly shift the XOR operation result right by a preset bit; for example, circularly shift the XOR operation result right by 6 bits;

[0076] a3: Use the result of the circular right shift as the key and use the SM4 algorithm (a block cipher algorithm) to encrypt the customer code and product code.

[0077] Furthermore, in one embodiment, the specific implementation process of the preset decryption and descrambling algorithm is:

[0078] b1: Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code;

[0079] b2: Circularly shift the XOR operation result right by a preset bit; for example, circularly shift the XOR operation result right by 6 bits;

[0080] b3: Use the result of the circular right shift as the key, and use the SM4 algorithm to decrypt the encrypted and scrambled customer code and product code to obtain the customer code and product code before encryption and scrambling.

[0081] The chip anti-counterfeiting method of the embodiment of the present application prevents the cross-selling of chips of different customers by comparing whether the HASH value of the customer code injected in advance into the chip is consistent with the default customer code, and prevents the cross-selling of different products by the same customer by comparing whether the HASH value of the product code injected in advance into the chip is consistent with the default product code. The customer code or product code is encrypted and obfuscated by a private algorithm and then written into the chip to ensure that the written content of each chip is inconsistent, thereby protecting the security of the anti-counterfeiting implementation without investing more manpower and material resources.

[0082] In a second aspect, an embodiment of the present application also provides a device for preventing counterfeit goods from being sold abroad.

[0083] In one embodiment, referring to Figure 2 , Figure 2 This is a functional module diagram of the anti-channelling device of the chip of this application. Figure 2 As shown, the chip anti-counterfeiting device includes: a production process setting module, a startup process anti-counterfeiting detection module, a first execution module, and a second execution module.

[0084] The production process setting module is used to encrypt and scramble the customer code and product code based on the preset encryption and scrambling algorithm and write them into the chip, and change the chip's life cycle mark; the startup process anti-counterfeiting detection module is used to load the system image and read the chip's life cycle mark. Based on the read life cycle mark, if it is a set life cycle mark, the first execution module is driven to work, and if it is a non-set life cycle mark, the second execution module is driven to work; the first execution module is used to continue the system startup; the second execution module is used to obtain the customer code and product code in the chip through a preset decryption and descrambling algorithm, and perform HASH value calculation to determine whether the system continues to start based on the calculated HASH value.

[0085] In a third aspect, an embodiment of the present application provides a chip anti-counterfeiting device, which can be a personal computer (PC), a laptop computer, a server, or other device with data processing functions.

[0086] Reference Figure 3 , Figure 3 The hardware structure diagram of the chip anti-counterfeiting device involved in the embodiment of the present application is shown in FIG. In the embodiment of the present application, the chip anti-counterfeiting device may include a processor, a memory, a communication interface, and a communication bus.

[0087] The communication bus may be of any type and is used to interconnect the processor, the memory, and the communication interface.

[0088] The communication interface includes input / output (I / O) interface, physical interface and logical interface, etc., which are used to realize the interconnection of devices inside the chip anti-counterfeiting device, and the interface used to realize the interconnection between the chip anti-counterfeiting device and other devices (such as other computing devices or user devices). The physical interface can be an Ethernet interface, a fiber optic interface, an ATM interface, etc.; the user device can be a display (Display), a keyboard (Keyboard), etc.

[0089] The memory can be various types of storage media, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), flash memory, optical storage, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), etc.

[0090] The processor may be a general-purpose processor, which may call the chip anti-channelling program stored in the memory and execute the chip anti-channelling method provided in the embodiment of the present application. For example, the general-purpose processor may be a central processing unit (CPU). The method executed when the chip anti-channelling program is called may refer to the various embodiments of the chip anti-channelling method of the present application, which will not be repeated here.

[0091] Those skilled in the art will understand that Figure 3 The hardware structure shown in the figure does not constitute a limitation on the present application, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0092] In a fourth aspect, an embodiment of the present application also provides a computer-readable storage medium.

[0093] The computer-readable storage medium of the present application stores a chip anti-counterfeiting program, wherein when the chip anti-counterfeiting program is executed by a processor, the steps of the chip anti-counterfeiting method as described above are implemented.

[0094] Among them, the method implemented when the chip anti-counterfeiting program is executed can refer to the various embodiments of the chip anti-counterfeiting method of the present application, and will not be repeated here.

[0095] It should be noted that the serial numbers of the above-mentioned embodiments of the present application are only for description and do not represent the advantages or disadvantages of the embodiments.

[0096] The terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices. The terms "first", "second" and "third" are used to distinguish different objects, etc., and do not represent a sequence, nor do they limit "first", "second" and "third" to different types.

[0097] In the description of the embodiments of the present application, "exemplary", "for example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary", "for example" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary", "for example" or "for example" is intended to present related concepts in a specific way.

[0098] In the description of the embodiments of the present application, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; the “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, “multiple” refers to two or more than two.

[0099] In some processes described in the embodiments of the present application, multiple operations or steps that appear in a specific order are included, but it should be understood that these operations or steps may not be executed in the order in which they appear in the embodiments of the present application or in parallel, and the sequence number of the operation is only used to distinguish the different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed in sequence or in parallel, and these operations or steps may be combined.

[0100] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD) as described above, and includes a number of instructions for a terminal device to execute the methods described in each embodiment of the present application.

[0101] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A method for preventing counterfeiting of chips, characterized in that: The chip anti-channelling method comprises: Encrypt and scramble the customer code and product code based on the preset encryption and scrambling algorithm and write them into the chip, and change the chip's life cycle mark; Load the system image and read the chip's lifecycle tag. Based on the read lifecycle tag: If the life cycle mark is set, the system will continue to start; If it is a non-set life cycle mark, the customer code and product code in the chip are obtained through a preset decryption and descrambling algorithm, and a HASH value is calculated to determine whether the system continues to start based on the calculated HASH value; If the life cycle mark is not set, the customer code and product code in the chip are obtained by a preset decryption and descrambling algorithm, and a HASH value is calculated to determine whether the system continues to start based on the calculated HASH value, specifically including: When the read life cycle mark is the DD stage, the customer code and product code encrypted and scrambled in the chip are decrypted and descrambled by a preset decryption and descrambling algorithm to obtain the customer code and product code; The customer code and product code obtained after decryption and descrambling are both calculated by HASH value to obtain the customer code HASH value and product code HASH value; Determine whether the calculated customer code HASH value is equal to the default customer code HASH value: If not, stop starting the system; If yes, then determine whether the calculated product code HASH value is equal to the default product code HASH value, if yes, then continue to start the system, if not, then stop starting the system; The default customer code HASH value and the default product code HASH value are located in a closed-source firmware program, the closed-source firmware program is used to read the life cycle mark of the chip, and the DD stage is the device deployment stage.

2. A chip anti-channelling method as claimed in claim 1, characterized in that: The method of encrypting and scrambling the customer code and the product code based on the preset encryption and scrambling algorithm and writing them into the chip, and changing the life cycle mark of the chip, specifically includes: The customer factory sends a registration application to the chip manufacturer. The chip manufacturer encrypts and scrambles the customer code and product code based on a preset encryption and scrambling algorithm, and sends the encrypted and scrambled customer code and product code to the customer factory. After obtaining authorization from the chip manufacturer, the customer factory writes the encrypted and scrambled customer code and product code into the eFuse of the chip. At the same time, the customer factory changes the chip's life cycle mark to the DD stage.

3. A chip anti-channelling method as claimed in claim 1, characterized in that: The loading of the system image and reading of the life cycle mark of the chip, based on the read life cycle mark, specifically includes: ROM starts and loads SBL, and SBL loads the system image; Read the chip's life cycle tag through a closed-source firmware program; The closed-source firmware program is released by the chip manufacturer to the customer factory.

4. A chip anti-channelling method as claimed in claim 3, characterized in that: If the life cycle mark is set, the system is started, which specifically includes: When the read life cycle mark is the DM stage or the DR stage, the system is started up continuously, wherein the DM stage is the device manufacturing stage, and the DR stage is the device revocation stage.

5. A method for preventing channeling of chips as claimed in any one of claims 1 to 4, characterized in that: The specific implementation process of the preset encryption and scrambling algorithm is: Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code; Circularly right-shift the XOR operation result by a preset bit; The result of the circular right shift is used as the key, and the customer code and product code are encrypted using the SM4 algorithm.

6. A chip anti-channelling method as claimed in claim 5, characterized in that: The specific implementation process of the preset decryption and descrambling algorithm is: Read the chip ID and perform XOR operation on the chip ID and the chip manufacturer's code; Circularly right-shift the XOR operation result by a preset bit; The result of the circular right shift is used as the key, and the encrypted and scrambled customer code and product code are decrypted using the SM4 algorithm to obtain the customer code and product code before the encryption and scrambling process.

7. A device for preventing counterfeiting of chips, characterized in that: The chip anti-channelling device comprises: A production process setting module, which is used to encrypt and scramble the customer code and product code based on a preset encryption and scrambling algorithm and write them into the chip, and change the life cycle mark of the chip; The boot process anti-counterfeiting detection module is used to load the system image and read the life cycle mark of the chip. Based on the read life cycle mark, if it is a set life cycle mark, the first execution module is driven to work, and if it is a non-set life cycle mark, the second execution module is driven to work; A first execution module, which is used to continue starting the system; A second execution module, which is used to obtain the customer code and product code in the chip through a preset decryption and descrambling algorithm, and perform HASH value calculation to determine whether the system continues to start based on the calculated HASH value; If the life cycle mark is not set, the customer code and product code in the chip are obtained by a preset decryption and descrambling algorithm, and a HASH value is calculated to determine whether the system continues to start based on the calculated HASH value, specifically including: When the read life cycle mark is the DD stage, the customer code and product code encrypted and scrambled in the chip are decrypted and descrambled by a preset decryption and descrambling algorithm to obtain the customer code and product code; The customer code and product code obtained after decryption and descrambling are both calculated by HASH value to obtain the customer code HASH value and product code HASH value; Determine whether the calculated customer code HASH value is equal to the default customer code HASH value: If not, stop starting the system; If yes, then determine whether the calculated product code HASH value is equal to the default product code HASH value, if yes, then continue to start the system, if not, then stop starting the system; The default customer code HASH value and the default product code HASH value are located in a closed-source firmware program, the closed-source firmware program is used to read the life cycle mark of the chip, and the DD stage is the device deployment stage.

8. A chip anti-channelling device, characterized in that: The chip anti-counterfeiting device comprises a processor, a memory, and a chip anti-counterfeiting program stored in the memory and executable by the processor, wherein when the chip anti-counterfeiting program is executed by the processor, the steps of the chip anti-counterfeiting method as described in any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a chip anti-counterfeiting program, wherein when the chip anti-counterfeiting program is executed by a processor, the steps of the chip anti-counterfeiting method according to any one of claims 1 to 6 are implemented.

Images