An equivalent analog circuit for a six-winged Chua's junction local active memristor

Abstract

This invention discloses an equivalent analog circuit for a six-winged Chua's junction-type locally active memristor. The invention includes a state variable generation circuit and a state-dependent Ohm's law circuit; specifically, it includes a two-input inverting summation circuit, a multi-input inverting summation circuit, a non-inverting integrator circuit, a multiplier circuit, and an Ohm's law circuit. The two-input inverting summation circuit limits the absolute value calculation, while the multi-input inverting summation circuit and the non-inverting integrator circuit obtain the negative value of the state variable. The negative value of the state variable obtained from the output of the non-inverting integrator circuit is input into one of the multiplier circuits, and then the summation and multiplication operations are performed through two multiplier circuits. The Ohm's law circuit acts as a voltage follower connected to an external voltage. Applying Ohm's law to the resistor yields the relationship between current and voltage with respect to the state variable x. This invention overcomes the cost limitations of highly complex memristor circuits and achieves functional integration and optimization.

Description

Technical Field

[0001] This invention belongs to the field of circuit design and relates to a circuit simulator implementation of a memristor model, specifically to an equivalent analog circuit of a six-winged Chua's junction type locally active memristor. Background Technology

[0002] The digital age demands ever-increasing processing and storage of massive amounts of data, while traditional CMOS-based storage technologies are nearing their limits. To manufacture memories with faster processing speeds and lower power consumption, a new type of storage medium, distinct from CMOS storage mechanisms, is needed. Memristors, the fourth type of basic circuit element, possess numerous excellent characteristics suitable for storage devices, including nanoscale size, low power consumption, integrability, and compatibility with CMOS processes. More importantly, unlike traditional dynamic random access memory (DRAM), memristors are non-volatile; stored information is not lost even when power is off. This gives memristors enormous potential as the next generation of storage devices. Excellent storage devices require multi-value storage capabilities. Currently, most multi-balance-point memristors with multi-value storage capabilities remain at the theoretical modeling stage. Feasible and practically applicable circuit and physical models have not yet been proposed and researched, failing to meet practical needs.

[0003] The six-winged Chua's junction active memristor was proposed in 2018 by South Korean scholar Zubaer I. Mannan, based on the structure of the classic Chua's junction memristor. It has four stable equilibrium points and four memristor values, making it a quaternary memristor. Because its DC-V characteristic curve (DC VI diagram) is a six-winged junction curve, it is called the six-winged Chua's junction active memristor. However, the existing equivalent circuit models of the six-winged Chua's junction active memristor are extremely complex and lack practical application value.

[0004] Against this background, exploring and implementing an analog circuit for a six-winged Chua's junction local active memristor with multiple stable equilibrium points is of great significance for the research and application of memristor memory. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention proposes an equivalent analog circuit for a six-winged Chua's junction type locally active memristor. The equivalent analog circuit of this six-winged Chua's junction type locally active memristor is simple in structure, easy to implement, and low in cost, possessing the potential for large-scale application in integrated circuits. It can be used for quaternary memories and quaternary neuromorphic logic operations, showing broad application prospects in the fields of memory and logic circuits. As a non-volatile memory, this memristor can replace traditional flash memory and traditional dynamic random access memory, providing higher capacity and lower power consumption. Furthermore, thanks to its four stable equilibrium points, the six-winged Chua's junction type locally active memristor can switch between four stable states, giving it the potential to become a multi-state memory device based on unidirectional spin Hall magnetoresistive reluctance.

[0006] The technical solution adopted by this invention to solve its technical problem is as follows:

[0007] An equivalent analog circuit for a six-winged Chua's junction type locally active memristor includes six operational amplifiers, two multipliers, twenty-four resistors, four DC power supply voltage sources, two capacitors, and a sinusoidal AC voltage source; and the theoretical model of the six-winged Chua's junction type locally active memristor is as follows:

[0008]

[0009] Where i, v, and x represent the current, voltage across the memristor, and state variables, respectively.

[0010] Furthermore, the equivalent analog circuit of the six-winged Chua's junction local active memristor is composed of a state variable generation circuit and a state-dependent Ohm's law circuit. The state variable generation circuit consists of three two-input inverting summation circuits, one multi-input inverting summation circuit, and one inverting integration circuit. The state-dependent Ohm's law circuit consists of two multiplier circuits and one Ohm's law circuit.

[0011] The sinusoidal AC voltage source v M The positive terminal is connected to the third operational amplifier U. 1C Pin 10, sinusoidal AC voltage source v M The negative terminal is grounded. One end of the first resistor R1 is connected to the fourth operational amplifier U. 2A The second pin is connected to pin 7 of the second operational amplifier U1, with the other end of the first resistor R1 connected to it. One end of the second resistor R2 is connected to a 6V DC power supply, and the other end is connected to the fourth operational amplifier U1. 2A The second pin. One end of the third resistor R3 is connected to the fourth operational amplifier U. 2A The second pin and the other end of the third resistor R3 are connected to the fourth operational amplifier U. 2AThe first pin. One end of the fourth resistor R4 is grounded, and the other end of the fourth resistor R4 is connected to the fourth operational amplifier U. 2A The third pin. One end of the fifth resistor R5 is connected to the fifth operational amplifier U. 2B The sixth pin and the other end of the fifth resistor R5 are connected to the second operational amplifier U. 1B The seventh pin. One end of the sixth resistor R6 is connected to the fifth operational amplifier U. 2B The sixth pin, the other end of the sixth resistor R6, is connected to a 5V DC power supply. One end of the seventh resistor R7 is connected to the fifth operational amplifier U. 2B The sixth pin and the other end of the seventh resistor R7 are connected to the fifth operational amplifier U. 2B The seventh pin. One end of the eighth resistor R8 is grounded, and the other end of the eighth resistor R8 is connected to the fifth operational amplifier U. 2B The fifth pin. One end of the ninth resistor R9 is connected to the sixth operational amplifier U. 2C The ninth pin, and the other end of the ninth resistor R9, are connected to the second operational amplifier U. 1B The seventh pin. The tenth resistor R. 10 One end is connected to the sixth operational amplifier U 2C The ninth pin, the tenth resistor R 10 The other end is connected to a 7V DC power supply. Eleventh resistor R 11 One end is connected to the sixth operational amplifier U 2C Pin 9, resistor R (eleventh resistor) 11 The other end is connected to the sixth operational amplifier U. 2C The eighth pin. The twelfth resistor R. 12 One end is connected to the sixth operational amplifier U 2C The tenth pin, the twelfth resistor R 12 The other end is grounded. The thirteenth resistor R 13 One end is connected to the first operational amplifier U 1A The second pin, the thirteenth resistor R 13 The other end is connected to the fourth operational amplifier U. 2A The first pin. The fourteenth resistor R. 14 One end is connected to the first operational amplifier U 1A The second pin, the fourteenth resistor R 14 The other end is connected to the fifth operational amplifier U. 2B The seventh pin. The fifteenth resistor R. 15 One end is connected to the first operational amplifier U 1A The second pin, the fifteenth resistor R 15 The other end is connected to the sixth operational amplifier U. 2C The eighth pin. The sixteenth resistor R 16 One end is connected to the first operational amplifier U 1A The second pin, the sixteenth resistor R16 The other end is connected to the third operational amplifier U. 1C The eighth pin. The seventeenth resistor R. 17 One end is connected to the first operational amplifier U 1A The second pin, the seventeenth resistor R 17 The other end is connected to an 11V DC power supply. The eighteenth resistor R... 18 One end is connected to the first operational amplifier U 1A The second pin, the eighteenth resistor R 18 The other end is connected to the second operational amplifier U. 1B The seventh pin. The nineteenth resistor R. 19 One end is connected to the first operational amplifier U 1A The second pin, the nineteenth resistor R 19 The other end is connected to the first operational amplifier U. 1A The first pin. The twentieth resistor R. 20 One end is connected to the first operational amplifier U 1A The third pin, the twentieth resistor R 20 The other end is grounded. The twenty-first resistor R 21 One end is connected to the first operational amplifier U 1A The first pin, the twenty-first resistor R 21 The other end is connected to the second operational amplifier U. 1B The fifth pin. The twenty-second resistor R. 22 One end is connected to the second operational amplifier U 1B Pin 6, resistor R22 22 The other end is grounded. The twenty-third resistor R 23 One end is connected to the second operational amplifier U 1B The sixth pin, the twenty-third resistor R 23 The other end is connected to the second operational amplifier U. 1B Pin 7. Resistor R (24th resistor) 24 One end is connected to the third operational amplifier U 1C Pin 10, resistor R 24 24 The other end is connected to the W port of the second multiplier U4. One end of the first capacitor C1 is connected to the second operational amplifier U. 1B Pin 5 of the circuit is connected to ground, with the other end of capacitor C1 grounded. One end of capacitor C2 is connected to the second operational amplifier U. 1B The sixth pin, the other end of the second capacitor C2 is connected to the second operational amplifier U. 1B Pin 7. Third operational amplifier U 1C The ninth pin is connected to the third operational amplifier U. 1C The eighth pin. The input port x1 of the first multiplier U3 is connected to the second operational amplifier U. 1BPin 7, the input port y2 of the first multiplier U3, is connected to the second operational amplifier U. 1B Pin 7 of the first multiplier U3 is connected to the input ports x2 and y1 of the first multiplier U3, and the Z port of the first multiplier U3 is also grounded. Input port x1 of the second multiplier U4 is connected to the W port of the first multiplier U3, and input port y1 of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8, the input ports x2 and y2 of the second multiplier U4 are grounded, and the Z port of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8. The DC power supply voltage sources VCC and VDD are for the first operational amplifier U. 1A Second operational amplifier U 1B Third operational amplifier U 1C The first multiplier U3 and the second multiplier U4 are supplied with DC power. The DC power supply voltage sources VEE and VFF power the fourth operational amplifier U. 2A Fifth operational amplifier U 2B The sixth operational amplifier U 2C Provides DC power.

[0012] Among them, v A1 For the fourth operational amplifier U 2A The output voltage; v A2 The fifth operational amplifier U 2B The output voltage; v A3 The sixth operational amplifier U 2C The output voltage; v B For the first operational amplifier U 1A The output voltage; v C For the second operational amplifier U 1B The output voltage; v D The output voltage of the second multiplier U4; v E For the third operational amplifier U 1C The output voltage.

[0013] Furthermore, the operational amplifier selected is TL084, and the multiplier is AD633AN.

[0014] The beneficial effects of this invention are as follows:

[0015] The equivalent analog circuit of the six-winged Chua's junction type locally active memristor implemented in this invention features simple structure, low cost, convenient testing, and easy integration. It uses only four integrated chips and some peripheral passive components to construct the circuit, realizing the transformation from a complex mathematical model to a simple circuit model. Excellent memory devices require multi-value storage capabilities. Currently, most multi-balance point memristors with multi-value storage capabilities remain at the theoretical modeling stage; feasible and practically applicable circuit and physical models have not yet been proposed and studied, failing to meet practical needs. The six-winged Chua's junction type memristor has more stable balance points (four), and the free switching of stable states can be easily achieved through pulse excitation, making it suitable for the design of low-power multi-value memory and the implementation of non-volatile state logic operations. However, a simple and practically applicable circuit model for this memristor has not yet been proposed. This invention proposes an equivalent analog circuit for the six-winged Chua's junction type locally active memristor, using only two multipliers, six operational amplifiers, twenty-four resistors, two capacitors, and four DC power supplies. It is simple in structure, low in cost, and easy to implement. This six-winged Chua's junction memristor equivalent analog circuit has the potential for large-scale application in integrated circuits and broad application prospects in the fields of memory and logic circuits. Furthermore, thanks to its characteristic of having four stable equilibrium points, this memristor equivalent analog circuit has the potential to become a multi-state memory device based on unidirectional spin Hall magnetoresistive reluctance. Attached Figure Description

[0016] Figure 1 This is the equivalent circuit diagram of the memristor of this invention;

[0017] Figure 2 This is the equivalent circuit schematic of the memristor of this invention;

[0018] Figure 3 This is the DC VI diagram of the theoretical model of the memristor of this invention;

[0019] Figure 4 This is a Multisim simulation diagram of the equivalent circuit of the memristor hysteresis curve of the present invention;

[0020] Figure 5 This is a Matlab simulation diagram of the theoretical model of the memristor hysteresis curve of this invention. Detailed Implementation

[0021] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0022] like Figure 1 , 2 As shown, an equivalent analog circuit of a six-winged Chua's junction local active memristor includes six operational amplifiers, two multipliers, twenty-four resistors, four DC power supply voltage sources, two capacitors, and a sinusoidal AC voltage source.

[0023] The state variable generation circuit consists of three two-input inverting summation circuits (U 2A U 2B U 2C A multi-input inverting summation circuit (U) 1A ) and an in-phase integrating operational circuit (U 1B The circuit consists of two input inverting summators (U3 and U4) for limiting absolute value calculation and a multi-input inverting summator circuit and a non-inverting integral circuit for obtaining the negative value of the state variable. The state-dependent Ohm's law circuit consists of two multiplier circuits (U3 and U4) and an Ohm's law circuit (U...). 1C Composed of, U 1B The negative value of the state variable obtained from the output is input into multiplier U3. Summation and multiplication operations are performed through multipliers U3 and U4. 1C As a voltage follower connected to an external voltage, for R 24 By applying Ohm's law, the relationship between current and voltage with respect to the state variable x is obtained, thereby completing the circuit design, such as... Figure 2 As shown, the Multisim circuit simulation exhibits a hysteresis curve shape, and within a reasonable error range, it shows consistency with the theoretical model simulation in Matlab. The six-winged Chua's junction locally active memristor has four stable equilibrium points and four memristor values, making it a quaternary memristor suitable for use in quaternary memory. It possesses the potential to become a multi-state memory device based on unidirectional spin Hall magnetoresistive circuits, enabling large-scale application in integrated circuits. This overcomes the cost limitations of highly complex memristor circuits, achieving functional integration and optimization.

[0024] The sinusoidal AC voltage source v M The positive terminal is connected to the third operational amplifier U. 1C Pin 10, sinusoidal AC voltage source v M The negative terminal is grounded. One end of the first resistor R1 is connected to the fourth operational amplifier U. 2A The second pin connects the other end of the first resistor R1 to the second operational amplifier U. 1B Pin 7. One end of the second resistor R2 is connected to a 6V DC power supply, and the other end of the second resistor R2 is connected to the fourth operational amplifier U. 2A The second pin. One end of the third resistor R3 is connected to the fourth operational amplifier U. 2A The second pin and the other end of the third resistor R3 are connected to the fourth operational amplifier U. 2A The first pin. One end of the fourth resistor R4 is grounded, and the other end of the fourth resistor R4 is connected to the fourth operational amplifier U. 2A The third pin. One end of the fifth resistor R5 is connected to the fifth operational amplifier U. 2B The sixth pin and the other end of the fifth resistor R5 are connected to the second operational amplifier U. 1BThe seventh pin. One end of the sixth resistor R6 is connected to the fifth operational amplifier U. 2B The sixth pin, the other end of the sixth resistor R6, is connected to a 5V DC power supply. One end of the seventh resistor R7 is connected to the fifth operational amplifier U. 2B The sixth pin and the other end of the seventh resistor R7 are connected to the fifth operational amplifier U. 2B The seventh pin. One end of the eighth resistor R8 is grounded, and the other end of the eighth resistor R8 is connected to the fifth operational amplifier U. 2B The fifth pin. One end of the ninth resistor R9 is connected to the sixth operational amplifier U. 2C The ninth pin, and the other end of the ninth resistor R9, are connected to the second operational amplifier U. 1B The seventh pin. The tenth resistor R. 10 One end is connected to the sixth operational amplifier U 2C The ninth pin, the tenth resistor R 10 The other end is connected to a 7V DC power supply. Eleventh resistor R 11 One end is connected to the sixth operational amplifier U 2C Pin 9, resistor R (eleventh resistor) 11 The other end is connected to the sixth operational amplifier U. 2C The eighth pin. The twelfth resistor R. 12 One end is connected to the sixth operational amplifier U 2C The tenth pin, the twelfth resistor R 12 The other end is grounded. The thirteenth resistor R 13 One end is connected to the first operational amplifier U 1A The second pin, the thirteenth resistor R 13 The other end is connected to the fourth operational amplifier U. 2A The first pin. The fourteenth resistor R. 14 One end is connected to the first operational amplifier U 1A The second pin, the fourteenth resistor R 14 The other end is connected to the fifth operational amplifier U. 2B The seventh pin. The fifteenth resistor R. 15 One end is connected to the first operational amplifier U 1A The second pin, the fifteenth resistor R 15 The other end is connected to the sixth operational amplifier U. 2C The eighth pin. The sixteenth resistor R 16 One end is connected to the first operational amplifier U 1A The second pin, the sixteenth resistor R 16 The other end is connected to the third operational amplifier U. 1C The eighth pin. The seventeenth resistor R. 17 One end is connected to the first operational amplifier U 1A The second pin, the seventeenth resistor R 17The other end is connected to an 11V DC power supply. The eighteenth resistor R... 18 One end is connected to the first operational amplifier U 1A The second pin, the eighteenth resistor R 18 The other end is connected to the second operational amplifier U. 1B The seventh pin. The nineteenth resistor R. 19 One end is connected to the first operational amplifier U 1A The second pin, the nineteenth resistor R 19 The other end is connected to the first operational amplifier U. 1A The first pin. The twentieth resistor R. 20 One end is connected to the first operational amplifier U 1A The third pin, the twentieth resistor R 20 The other end is grounded. The twenty-first resistor R 21 One end is connected to the first operational amplifier U 1A The first pin, the twenty-first resistor R 21 The other end is connected to the second operational amplifier U. 1B The fifth pin. The twenty-second resistor R. 22 One end is connected to the second operational amplifier U 1B Pin 6, resistor R22 22 The other end is grounded. The twenty-third resistor R 23 One end is connected to the second operational amplifier U 1B The sixth pin, the twenty-third resistor R 23 The other end is connected to the second operational amplifier U. 1B Pin 7. Resistor R (24th resistor) 24 One end is connected to the third operational amplifier U 1C Pin 10, resistor R 24 24 The other end is connected to the W port of the second multiplier U4. One end of the first capacitor C1 is connected to the second operational amplifier U. 1B Pin 5 of the circuit is connected to ground, with the other end of capacitor C1 grounded. One end of capacitor C2 is connected to the second operational amplifier U. 1B The sixth pin, the other end of the second capacitor C2 is connected to the second operational amplifier U. 1B Pin 7. Third operational amplifier U 1C The ninth pin is connected to the third operational amplifier U. 1C The eighth pin. The input port x1 of the first multiplier U3 is connected to the second operational amplifier U. 1B Pin 7, the input port y2 of the first multiplier U3, is connected to the second operational amplifier U. 1BPin 7 of the first multiplier U3 is connected to the input ports x2 and y1 of the first multiplier U3, and the Z port of the first multiplier U3 is also grounded. Input port x1 of the second multiplier U4 is connected to the W port of the first multiplier U3, and input port y1 of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8, the input ports x2 and y2 of the second multiplier U4 are grounded, and the Z port of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8. The DC power supply voltage sources VCC and VDD are for the first operational amplifier U. 1A Second operational amplifier U 1B Third operational amplifier U 1C The first multiplier U3 and the second multiplier U4 are supplied with DC power. The DC power supply voltage sources VEE and VFF power the fourth operational amplifier U. 2A Fifth operational amplifier U 2B The sixth operational amplifier U 2C Provides DC power.

[0025] Among them, v A1 For the fourth operational amplifier U 2A The output voltage; v A2 The fifth operational amplifier U 2B The output voltage; v A3 The sixth operational amplifier U 2C The output voltage; v B For the first operational amplifier U 1A The output voltage; v C For the second operational amplifier U 1B The output voltage; v D The output voltage of the second multiplier U4; v E For the third operational amplifier U 1C The output voltage.

[0026] Furthermore, the operational amplifier selected is TL084, and the multiplier is AD633AN.

[0027] The parameter table of each component in the analog circuit is as follows:

[0028] Table 1 Circuit Component Parameters

[0029] element value element value <![CDATA[R1]]> 30kΩ <![CDATA[R 15 ]]> 9kΩ <![CDATA[R2,R3,R7,R 11 ]]> 20kΩ <![CDATA[R 16 ,R 18 ]]> 63kΩ <![CDATA[R4]]> 7.5kΩ <![CDATA[R 19 ]]> 63Ω <![CDATA[R5]]> 50kΩ <![CDATA[R 20 ]]> 50Ω <![CDATA[R6,R 10 ,R 21 ,R 22 ,R 24 ,]]> 10kΩ <![CDATA[R 23 ]]> 100MΩ <![CDATA[R8]]> 6kΩ <![CDATA[C1,C2]]> 100nF

[0030] The specific functional implementation can be divided into a two-input inverting summation circuit module, a multi-input inverting summation circuit module, a non-inverting integrating circuit module, a multiplier circuit module, and an Ohm's law circuit module. (See attached) Figure 2Among them, the two-input inverting summation circuit module, the multi-input inverting summation circuit module, and the in-phase integration circuit module together constitute the state variable generation circuit, and the multiplier circuit module and the Ohm's law circuit module together constitute the state-dependent Ohm's law circuit.

[0031] First, the two-input inverting summation circuit module is based on the fourth operational amplifier U. 2A The two-input inverting summation circuit and the fifth operational amplifier U are constructed. 2B The two-input inverting summation circuit and the sixth operational amplifier U 2C The circuit consists of a two-input inverting summation operation circuit, which realizes the six absolute value addition and subtraction parts in the state variable equation (Equation (10)). For the fourth operational amplifier U 2A The circuit consists of a two-input inverting summator and a fourth operational amplifier U. 2A The first pin (output port) is connected to one end of the third resistor R3, and the fourth operational amplifier U... 2A The second pin (negative input port) is connected to one end of the first resistor R1 and the second resistor R2, the other end of the third resistor R3, and the fourth operational amplifier U. 2A The third pin (positive input port) is connected to one end of the fourth resistor R4, and the fourth operational amplifier U... 2A The fourth pin (positive power supply port) is connected to VEE, and the fourth operational amplifier U... 2A Pin 11 (negative power supply port) is connected to VFF. Based on operational amplifier circuit knowledge, we can conclude that:

[0032]

[0033] Due to the fourth operational amplifier U 2A The supply voltage limitation, after rewriting, yields:

[0034]

[0035] Similarly, for the fifth operational amplifier U... 2B The two-input inverting summing circuit is constructed, and the fifth operational amplifier U... 2B The seventh pin (output port) is connected to one end of the seventh resistor R7, and the fifth operational amplifier U... 2B The sixth pin (negative input port) is connected to one end of the fifth resistor R5 and the sixth resistor R6, and the other end of the seventh resistor R7. The fifth operational amplifier U... 2B The fifth pin (positive input port) is connected to one end of the eighth resistor R8, and the fifth operational amplifier U... 2B The fourth pin (positive power supply port) is connected to VEE, and the fifth operational amplifier U... 2BPin 11 (negative power supply port) is connected to VFF. Based on operational amplifier circuit knowledge, we can conclude that:

[0036]

[0037] Similarly, for the sixth operational amplifier U... 2C The circuit consists of a two-input inverting summator and a sixth operational amplifier U. 2C The eighth pin (output port) is connected to the eleventh resistor R. 11 At one end, the sixth operational amplifier U 2C The ninth pin (negative input port) is connected to the ninth resistor R9 and the tenth resistor R. 10 One end, the eleventh resistor R 11 At the other end, the sixth operational amplifier U 2C The tenth pin (positive input port) is connected to the twelfth resistor R. 12 At one end, the sixth operational amplifier U 2C The fourth pin (positive power supply port) is connected to VEE, and the sixth operational amplifier U... 2C Pin 11 (negative power supply port) is connected to VFF. Based on operational amplifier circuit knowledge, we can conclude that:

[0038]

[0039] The multi-input inverting adder circuit module consists of the first operational amplifier U 1A and the thirteenth resistor R 13 Fourteenth resistor R 14 The fifteenth resistor R 15 The sixteenth resistor R 16 The seventeenth resistor R 17 The eighteenth resistor R 18 Nineteenth resistor R 19 The twentieth resistor R 20 The structure enables the inverting and summing of multiple inputs, wherein the first operational amplifier U... 1A The first pin is connected to the nineteenth resistor R. 19 One end, the first operational amplifier U 1A The second pin is connected to the thirteenth resistor R. 13 Fourteenth resistor R 14 The fifteenth resistor R 15 The sixteenth resistor R 16 The seventeenth resistor R 17 The eighteenth resistor R 18 One end of these resistors and the nineteenth resistor R 19 At the other end, the first operational amplifier U 1A The third pin is connected to the twentieth resistor R. 20One end, the first operational amplifier U 1A The fourth pin is connected to VCC, and the first operational amplifier U... 1A Pin 11 is connected to VDD. Based on operational amplifier circuit knowledge, we can conclude that:

[0040]

[0041] Substituting the relevant data from Table 1 with equations (3), (4), and (5), the simplified version can be rewritten as:

[0042]

[0043] The in-phase integral operation circuit module consists of the second operational amplifier U 1B Twenty-first resistor R 21 The twenty-second resistor R 22 The twenty-third resistor R 23 Together with the first capacitor C1 and the second capacitor C2, it forms a unit that performs in-phase integration. The second operational amplifier U... 1B Pin 7 is connected to one end of the second capacitor C2 and the second thirteenth resistor R. 23 One end, the second operational amplifier U 1B The sixth pin is connected to the other end of the second capacitor C2 and the twenty-second resistor R. 22 One end and the twenty-third resistor R 23 At the other end, the second operational amplifier U 1B The fifth pin is connected to the twenty-first resistor R. 21 One end of the second operational amplifier U and one end of the first capacitor C1, and the second operational amplifier U 1B The fourth pin is connected to VCC, and the second operational amplifier U... 1B Pin 11 is connected to VDD. Based on operational amplifier circuit knowledge, we can conclude that:

[0044]

[0045] Substituting the relevant data from Table 1 and equation (7), the simplified version can be rewritten as:

[0046]

[0047] Due to the third operational amplifier U 1C The circuit formed is a voltage follower circuit, from which we can obtain v M =v E Let x = -v C , v = v E We can conclude that:

[0048]

[0049] The multiplier circuit module consists of a first multiplier U3 and a second multiplier U4, which performs multiplication and addition operations on dependent variables. The input port x1 of the first multiplier U3 is connected to the second operational amplifier U4. 1B Pin 7, the input port y2 of the first multiplier U3, is connected to the second operational amplifier U. 1B Pin 7 of the first multiplier U3 is connected to the input ports x2 and y1 of the first multiplier U3, and the Z port of the first multiplier U3 is also grounded. Input port x1 of the second multiplier U4 is connected to the W port of the first multiplier U3, and input port y1 of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8, the input ports x2 and y2 of the second multiplier U4 are grounded, and the Z port of the second multiplier U4 is connected to the third operational amplifier U. 1C The eighth pin, the W port of the second multiplier U4, is connected to the twenty-fourth resistor R. 24 One end of the circuit. The +VS port of the first multiplier U3 and the second multiplier U4 are connected to the DC power supply VCC, and the -VS port of the first multiplier U3 and the second multiplier U4 are connected to the DC power supply VDD. Based on the relevant knowledge of multiplier circuits, the following calculations are performed:

[0050]

[0051] After simplification, it can be rewritten as:

[0052]

[0053] Ohm's law circuit module consists of a third operational amplifier U 1C The twenty-fourth resistor R 24 The system is composed of components that perform Ohm's law operations on the dependent states and ultimately obtain the Ohm's law equation for the dependent states (Equation (16)). Among these, the third operational amplifier U... 1C The eighth pin is connected to the third operational amplifier U. 1C The ninth pin and the input ports y1 and Z of the second multiplier U4, and the third operational amplifier U 1C The tenth pin is connected to the twenty-fourth resistor R. 24 One end and a sinusoidal AC voltage source v M The positive terminal, the third operational amplifier U 1C The fourth pin is connected to the DC power supply VCC, and the third operational amplifier U... 1C Pin 11 is connected to the DC power supply VDD. Based on operational amplifier knowledge:

[0054] v E =v M (13)

[0055] From Ohm's law, we can obtain:

[0056]

[0057] Substituting the relevant data from Table 1 and equation (12), the simplified version can be rewritten as:

[0058]

[0059] Let x = -v C , v = v M , i = i M We can obtain:

[0060]

[0061] Therefore, let v = v M , i = i M By combining equations (9) and (15) with Ohm's law to calculate the current, the theoretical model of the six-winged Chua's junction local active memristor is obtained as shown in equation (1).

[0062] Figure 3 This is a DC VI diagram of the six-winged Chua's junction memristor of the present invention. Figure 4 The equivalent circuit of the memristor hysteresis curve of this invention is shown in the Multisim simulation diagram. Figure 5 This is a Matlab simulation diagram of the theoretical model of the memristor hysteresis curve of this invention. Because... Figure 3 The DC VI diagram shown is a junction curve with six wings; therefore, this memristor is called a six-winged Chua's junction locally active memristor. Comparison of the memristor model and its equivalent circuit reveals that, within a reasonable error range, the theoretical model is consistent with the actual analog circuit simulation model, verifying the correctness of the analog circuit.

[0063] This invention is only one specific implementation method and is not limited to only one method. For those skilled in the art, as long as it is within the protection scope of this invention, modifications and variations can be made to the implementation method, and all such variations are within the scope of this invention.

Claims

1. An equivalent analog circuit for a six-winged Chua's junction local active memristor, characterized in that... The circuit consists of a state variable generation circuit and a state-dependent Ohm's law circuit. The state variable generation circuit comprises three two-input inverting summation circuits, one multi-input inverting summation circuit, and one in-phase integration circuit. The absolute value is calculated by limiting the amplitude through the two-input inverting summation circuit, and the negative value of the state variable is obtained through the multi-input inverting summation circuit and the in-phase integration circuit. The state-dependent Ohm's law circuit consists of two multiplier circuits and one Ohm's law circuit. The negative value of the state variable obtained from the output of the in-phase integration circuit is input into one of the multiplier circuits, and then the summation and multiplication operations are performed through the two multiplier circuits. The Ohm's law circuit acts as a voltage follower connected to an external voltage. For a resistor, Ohm's law is applied to obtain the relationship between current and voltage with respect to the state variable x.

2. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 1, characterized in that, The two-input inverting summation circuit module is based on the fourth operational amplifier U. 2A The first two-input inverting summation circuit and the fifth operational amplifier U are constructed. 2B The second two-input inverting summation circuit and the sixth operational amplifier U are constructed. 2C The third two-input inverting summation circuit, which is constructed, implements the six absolute value addition and subtraction parts in the state variable equation. This is based on the fourth operational amplifier U. 2A The first two-input inverting summation circuit is constructed, and the fourth operational amplifier U... 2A The first pin is connected to one end of the third resistor R3, and the fourth operational amplifier U... 2A The second pin is connected to one end of the first resistor R1 and the second resistor R2, and the other end of the third resistor R3. The fourth operational amplifier U 2A The third pin is connected to one end of the fourth resistor R4, and the fourth operational amplifier U... 2A The fourth pin is connected to VEE, and the fourth operational amplifier U... 2A Pin 11 is connected to VFF. According to the relevant knowledge of operational amplifier circuits: Among them, v A1 For the fourth operational amplifier U 2A The output voltage; v C For the second operational amplifier U 1B ; output voltage; Due to the fourth operational amplifier U 2A The supply voltage limit, after rewriting, is: Similarly, for the fifth operational amplifier U... 2B The second two-input inverting summation circuit is constructed, and the fifth operational amplifier U... 2B The seventh pin is connected to one end of the seventh resistor R7, and the fifth operational amplifier U... 2B Pin 6 is connected to one end of resistors R5 and R6, and the other end of resistor R7. The fifth operational amplifier U... 2B The fifth pin is connected to one end of the eighth resistor R8, and the fifth operational amplifier U... 2B The fourth pin is connected to VEE, and the fifth operational amplifier is U. 2B Pin 11 is connected to VFF; according to the relevant knowledge of operational amplifier circuits, we can conclude that: Among them, v A2 The fifth operational amplifier U 2B ; output voltage; Similarly, for the sixth operational amplifier U... 2C The third two-input inverting summation circuit is constructed, and the sixth operational amplifier U... 2C The eighth pin is connected to the eleventh resistor R. 11 At one end, the sixth operational amplifier U 2C The ninth pin is connected to the ninth resistor R9 and the tenth resistor R. 10 One end, the eleventh resistor R 11 At the other end, the sixth operational amplifier U 2C The tenth pin is connected to the twelfth resistor R. 12 At one end, the sixth operational amplifier U 2C The fourth pin is connected to VEE, and the sixth operational amplifier U... 2C Pin 11 is connected to VFF; according to the relevant knowledge of operational amplifier circuits, we can conclude that: Among them, v A3 The sixth operational amplifier U 2C The output voltage.

3. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 2, characterized in that, The multi-input inverting adder circuit module consists of the first operational amplifier U 1A and the thirteenth resistor R 13 Fourteenth resistor R 14 The fifteenth resistor R 15 The sixteenth resistor R 16 The seventeenth resistor R 17 The eighteenth resistor R 18 Nineteenth resistor R 19 The twentieth resistor R 20 The structure enables the inverting and summing of multiple inputs, wherein the first operational amplifier U... 1A The first pin is connected to the nineteenth resistor R. 19 One end, the first operational amplifier U 1A The second pin is connected to the thirteenth resistor R. 13 Fourteenth resistor R 14 The fifteenth resistor R 15 The sixteenth resistor R 16 The seventeenth resistor R 17 The eighteenth resistor R 18 One end of these resistors and the nineteenth resistor R 19 At the other end, the first operational amplifier U 1A The third pin is connected to the twentieth resistor R. 20 One end, the first operational amplifier U 1A The fourth pin is connected to VCC, and the first operational amplifier U... 1A Pin 11 is connected to VDD; according to the relevant knowledge of operational amplifier circuits, we can conclude that: Among them, v B For the first operational amplifier U 1A The output voltage; v E For the third operational amplifier U 1C The output voltage.

4. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 3, characterized in that, The in-phase integral operation circuit module consists of the second operational amplifier U 1B Twenty-first resistor R 21 The twenty-second resistor R 22 The twenty-third resistor R 23 Together with the first capacitor C1 and the second capacitor C2, it forms a unit that performs in-phase integration. The second operational amplifier U... 1B Pin 7 is connected to one end of the second capacitor C2 and the second thirteenth resistor R. 23 One end, the second operational amplifier U 1B The sixth pin is connected to the other end of the second capacitor C2 and the twenty-second resistor R. 22 One end and the twenty-third resistor R 23 At the other end, the second operational amplifier U 1B The fifth pin is connected to the twenty-first resistor R. 21 One end of the second operational amplifier U and one end of the first capacitor C1, and the second operational amplifier U 1B The fourth pin is connected to VCC, and the second operational amplifier U... 1B Pin 11 is connected to VDD; according to the relevant knowledge of operational amplifier circuits, we can conclude that:

5. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 4, characterized in that, The multiplier circuit module consists of a first multiplier U3 and a second multiplier U4, which realizes the function of multiplication and addition of dependent variables; the input port x1 of the first multiplier U3 is connected to the second operational amplifier U4. 1B Pin 7, the input port y2 of the first multiplier U3, is connected to the second operational amplifier U. 1B Pin 7 of the first multiplier U3 is connected to input ports x2 and y1, which are grounded, and also to the Z port of the first multiplier U3. Input port x1 of the second multiplier U4 is connected to the W port of the first multiplier U3, and input port y1 of the second multiplier U4 is connected to the third operational amplifier U. 1C Pin 8, the input ports x2 and y2 of the second multiplier U4 are grounded, and the Z port of the second multiplier U4 is connected to the third operational amplifier U. 1C The eighth pin, the W port of the second multiplier U4, is connected to the twenty-fourth resistor R. 24 One end of the circuit; the +VS port of the first multiplier U3 and the second multiplier U4 are connected to the DC power supply VCC, and the -VS port of the first multiplier U3 and the second multiplier U4 are connected to the DC power supply VDD; based on the relevant knowledge of multiplier circuits, the following can be calculated: Among them, v D This is the output voltage of the second multiplier U4; After simplification, it becomes:

6. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 5, characterized in that, Ohm's law circuit module consists of a third operational amplifier U 1C The twenty-fourth resistor R 24 This system comprises components that perform Ohm's law operations on dependent states and ultimately obtain the Ohm's law equation for the dependent states; among them, the third operational amplifier U... 1C The eighth pin is connected to the third operational amplifier U. 1C The ninth pin and the input ports y1 and Z of the second multiplier U4, and the third operational amplifier U 1C The tenth pin is connected to the twenty-fourth resistor R. 24 One end and a sinusoidal AC voltage source v M The positive terminal, the third operational amplifier U 1C The fourth pin is connected to the DC power supply VCC, and the third operational amplifier U... 1C Pin 11 is connected to the DC power supply VDD; based on operational amplifier knowledge, we can conclude that: v E =v M (9) From Ohm's law, we can obtain: Among them, i M The twenty-fourth resistor R 24 The current.

7. The equivalent analog circuit of a six-winged Chua's junction local active memristor according to claim 1, characterized in that, The input and output waveforms exhibit hysteresis curves, and within a reasonable error range, the theoretical model and the actual analog circuit simulation model are consistent.

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