Tunneling oxide layer passivation back contact solar cell and preparation method thereof, photovoltaic module and photovoltaic system

Abstract

The embodiment of the invention provides a tunneling oxide layer passivation back contact solar cell, a preparation method thereof, a photovoltaic module and a photovoltaic system. The tunneling oxide layer passivation back contact solar cell comprises a substrate; the first tunneling oxide layer is positioned on the back surface of the substrate; the first phosphorus doped layer is positioned on one side surface, far away from the substrate, of the first tunneling oxide layer; the second tunneling oxide layers are located in a partial region of one side surface, far away from the first tunneling oxide layer, of the first phosphorus-doped layer, the second tunneling oxide layers are arranged at intervals, and a region between two adjacent second tunneling oxide layers is an electrode connection region; and the second phosphorus-doped layer is far away from the surface of one side, far away from the first phosphorus-doped layer, of the second tunneling oxide layer, and is located in the electrode connection region. The tunneling oxide layer passivation back contact solar cell provided by the embodiment of the invention has relatively high yield and relatively good contact.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a tunneling oxide layer passivated back contact solar cell and a preparation method thereof, a photovoltaic module, and a photovoltaic system. Background Art

[0002] With the rapid development of photovoltaic technology, the conversion efficiency of crystalline silicon solar cells has increased year by year. At present, the mainstream P-type bifacial PERC (emitter and rear passivation) cells have encountered efficiency bottlenecks, and various manufacturers have also begun to lay out N-type high-efficiency cells. Among them, TOPCon (tunneling oxide passivated back contact solar cell) cells stand out with many advantages such as high efficiency, low attenuation, and high compatibility with PERC production lines. TOPCon cells in the industry have now replaced PERC cells and become the mainstream.

[0003] At present, in order to improve the open circuit voltage of TOPCon batteries, a double-layer tunneling structure is adopted to replace the single-layer tunneling passivation contact structure in the early stage of research and development. However, the double-layer tunneling structure severely compresses the selection window of electrode slurry and the sintering process window, and is prone to cause fluctuations in the battery yield.

[0004] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the invention

[0005] The embodiments of the present application provide a tunneling oxide layer passivated back contact solar cell and a preparation method thereof, a photovoltaic module, and a photovoltaic system to solve or alleviate one or more technical problems raised above.

[0006] In a first aspect, a tunneling oxide passivated back-contact solar cell is provided, comprising: a substrate; a first tunneling oxide layer, the first tunneling oxide layer being located on the back side of the substrate; a first phosphorus-doped layer, the first phosphorus-doped layer being located on a side of the first tunneling oxide layer away from the substrate; a second tunneling oxide layer, the second tunneling oxide layer being located in a partial area of ​​a side of the first phosphorus-doped layer away from the first tunneling oxide layer, the second tunneling oxide layers being arranged at intervals, and the area between two adjacent second tunneling oxide layers being an electrode connection area; a second phosphorus-doped layer, the second phosphorus-doped layer being located on a surface of the second tunneling oxide layer on a side away from the first phosphorus-doped layer, and being located in the electrode connection area.

[0007] The tunneling oxide layer passivated back contact solar cell of the embodiment of the present application has a high yield, good contact, and exhibits a high photoelectric conversion efficiency. This is because the second tunneling oxide layer is arranged in intervals, and the interval area is the electrode connection area, so that in the subsequent formation of the first electrode, the burn-through process of the first electrode avoids the obstruction of the second tunneling oxide layer, thereby forming a good contact with the phosphorus-doped layer, and then realizing a perfect double-layer tunneling layer passivation contact structure. This contact between the first electrode and the first phosphorus-doped layer is formed under the premise of almost not destroying the first tunneling oxide layer, thereby improving the passivation effect of the battery and then improving the yield of the battery.

[0008] According to an embodiment of the present application, the thickness of the first tunneling oxide layer is 0.8-2 nm.

[0009] According to an embodiment of the present application, the thickness of the second tunneling oxide layer is 0.5-1.6 nm.

[0010] According to an embodiment of the present application, in the extension direction of the second phosphorus-doped layer, the ratio of the length of the second phosphorus-doped layer to the length of the electrode connection region is 1:(0.5-2.5).

[0011] According to an embodiment of the present application, it also includes a first electrode, which passes through the electrode connection area and contacts the first phosphorus-doped layer. In the extension direction of the second phosphorus-doped layer, the length of the electrode and the length of the electrode connection area are in a ratio of 1:(1-2).

[0012] In a second aspect, a method for preparing the tunneling oxide passivated back-contact solar cell described in the first aspect is provided, characterized in that it includes the following steps: providing a substrate; depositing a first tunneling oxide layer on the back side of the substrate; depositing a first phosphorus-doped layer on a side of the first tunneling oxide layer away from the substrate; depositing second tunneling oxide layers arranged in an interval on a partial area of ​​a side of the first phosphorus-doped layer away from the first tunneling oxide layer; and depositing a second phosphorus-doped layer on a side of the second tunneling oxide layer away from the first phosphorus-doped layer.

[0013] In the method of the embodiment of the present application, a second tunnel oxide layer arranged at intervals is deposited on a partial area of ​​a side of the first phosphorus-doped layer away from the substrate, so that the tunnel oxide layer passivated back contact solar cell obtained has good contact and yield. In addition, the method of the embodiment of the present application forms an electrode connection area between two adjacent second tunnel oxide layers by forming a second tunnel oxide layer arranged at intervals, and the electrode connection area can reduce the process conditions for the subsequent formation of the first electrode. That is, the contact between the first electrode and the first phosphorus-doped layer is formed under the premise of almost not destroying the first tunnel oxide layer, so that the selection window of the electrode slurry becomes wider (the slurry formula can be selected in a wider range, such as an electrode slurry with less corrosiveness), and the process window of the sintering of the electrode slurry is also reduced synchronously (sintering peak temperature 660-770°C).

[0014] According to an embodiment of the present application, the method of depositing the second tunneling oxide layer includes: after depositing the third tunneling oxide layer on a side of the first phosphorus-doped layer away from the substrate, etching the third tunneling oxide layer according to a predetermined pattern to obtain the second tunneling oxide layers arranged at intervals, and the area between two adjacent second tunneling oxide layers forms an electrode connection area.

[0015] According to an embodiment of the present application, the method of depositing the second tunneling oxide layer includes: depositing the second tunneling oxide layer on a side of the first phosphorus-doped layer away from the first tunneling oxide layer according to a predetermined pattern to obtain the second tunneling oxide layers arranged at intervals, and the area between two adjacent second tunneling oxide layers forms an electrode connection area.

[0016] According to an embodiment of the present application, the method also includes preparing a passivation layer and a first electrode, the passivation layer being deposited on a side of the second phosphorus-doped layer away from the substrate; the first electrode being formed on a side of the passivation layer away from the second phosphorus-doped layer and contacting the first phosphorus-doped layer through the electrode connection area.

[0017] According to an embodiment of the present application, the process of forming the first electrode includes sintering, and the peak temperature of the sintering is 600-770°C.

[0018] In a third aspect, a photovoltaic module is provided, wherein the photovoltaic module adopts the tunneling oxide layer passivation back contact solar cell of the first aspect.

[0019] The photovoltaic module of the embodiment of the present application has good reliability. This is because during the process of preparing the photovoltaic module, the welding area is protected by using an isolation adhesive, which can prevent the adhesive film from flowing into the welding area during lamination, causing problems such as poor welding.

[0020] In a fourth aspect, a photovoltaic system is provided, comprising the photovoltaic module of the third aspect. The photovoltaic system also has the advantages of the above photovoltaic module, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in the present application and should not be regarded as limiting the scope of the present application.

[0022] Figure 1 is a schematic diagram of the structure of a substrate provided in an embodiment of the present application; Figure 2 is a schematic diagram of a substrate structure with a boron-doped layer provided in an embodiment of the present application; Figure 3 It is a schematic diagram of the structure after etching the substrate after forming the boron doping layer provided in an embodiment of the present application; Figure 4 is a schematic diagram of a substrate structure having a first tunneling oxide layer and a first phosphorus-doped layer provided in an embodiment of the present application; Figure 5 is a schematic diagram of a substrate structure having a third tunnel oxide layer provided in an embodiment of the present application; Figure 6 is a schematic diagram of a substrate structure having a second tunneling oxide layer and an electrode connection region provided in an embodiment of the present application; Figure 7 is a schematic diagram of a substrate structure having a second phosphorus-doped layer provided in an embodiment of the present application; Figure 8 is a schematic diagram of a substrate structure with a passivation layer provided in an embodiment of the present application; Fig. 9 It is a schematic diagram of the substrate structure with a first electrode provided in an embodiment of the present application.

[0023] Description of reference numerals: 1: boron-doped layer; 2: first tunneling oxide layer; 3: first phosphorus-doped layer; 4: third phosphorus-doped layer; 5: second phosphorus-doped layer; 6: electrode connection area; 7: second phosphorus-doped layer; 8: passivation layer; 9: first electrode. DETAILED DESCRIPTION

[0024] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings. In the accompanying drawings, for clarity, the sizes of layers, regions, elements and their relative sizes may be exaggerated. Wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limitations on the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0025] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. When the second element, component, region, layer or part is discussed, it does not indicate that the present application necessarily has the first element, component, region, layer or part.

[0026] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] In the present application, when it comes to a numerical interval (i.e., a numerical range), unless otherwise specified, the distribution of the optional numerical values ​​in the numerical interval is considered to be continuous, and includes the two numerical endpoints (i.e., the minimum and maximum values) of the numerical interval, and each numerical value between the two numerical endpoints. Unless otherwise specified, when the numerical interval only refers to an integer in the numerical interval, it includes the two endpoint integers of the numerical range, and each integer between the two endpoints, which is equivalent to directly listing each integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical range disclosed in the present application should be understood to include any and all sub-ranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, a percentage, a ratio, etc. "Numerical interval" allows for broadly including quantitative intervals such as percentage intervals, ratio intervals, and ratio intervals.

[0029] According to a first aspect of an embodiment of the present application, a tunneling oxide passivated back-contact solar cell is provided, comprising: a substrate; a first tunneling oxide layer, the first tunneling oxide layer being located on the back side of the substrate; a first phosphorus-doped layer, the first phosphorus-doped layer being located on a side of the first tunneling oxide layer away from the substrate; a second tunneling oxide layer, the second tunneling oxide layer being located in a partial area of ​​a side of the first phosphorus-doped layer away from the first tunneling oxide layer, the second tunneling oxide layers being arranged at intervals, and the area between two adjacent second tunneling oxide layers being an electrode connection area; a second phosphorus-doped layer, the second phosphorus-doped layer being located on a side surface of the second tunneling oxide layer away from the first phosphorus-doped layer, and being located in the electrode connection area.

[0030] The tunneling oxide layer passivated back contact solar cell of the embodiment of the present application has a high yield, good contact, and exhibits a high photoelectric conversion efficiency. This is because the second tunneling oxide layer is arranged in intervals, and the interval area is the electrode connection area, so that in the subsequent formation of the first electrode, the burn-through process of the first electrode avoids the obstruction of the second tunneling oxide layer, thereby forming a good contact with the phosphorus-doped layer, and then realizing a perfect double-layer tunneling layer passivation contact structure. This contact effect between the first electrode and the first phosphorus-doped layer is formed under the premise of almost not destroying the first tunneling oxide layer, thereby improving the passivation of the battery and then improving the yield of the battery.

[0031] In some embodiments, the substrate includes a silicon substrate, and the substrate has a textured structure.

[0032] In some embodiments, the first tunnel oxide layer and the second tunnel oxide layer each independently comprise silicon dioxide.

[0033] In some embodiments, the thickness of the first tunneling oxide layer is 0.8-2 nm, which is beneficial to the tunneling of electrons.

[0034] In some embodiments, the thickness of the second tunneling oxide layer is 0.5-1.6 nm, which is beneficial to the secondary tunneling of electrons.

[0035] In some embodiments, the thickness of the first phosphorus-doped layer and the second phosphorus-doped layer are independently 1-100 nm.

[0036] In some embodiments, in the extension direction of the second phosphorus-doped layer, the length of the second phosphorus-doped layer and the length of the electrode connection region are in a ratio of 1:(0.5-2.5), such as 1:0.5, 1:01, 1:1.5, 1:2, 1:2.5. This can improve the photoelectric conversion efficiency and yield of the tunneling oxide layer passivated back contact solar cell.

[0037] In some embodiments, a first electrode is further included, and the first electrode contacts the first phosphorus-doped layer through the electrode connection region.

[0038] Optionally, in the extension direction of the second phosphorus-doped layer, the length of the electrode and the length of the electrode connection region are in a ratio of 1:(1-2), such as 1:1, 1:1.1, 1:1.3, 1:1.5, 1:1.8, 1:2. This can improve the photoelectric conversion efficiency and yield of the tunnel oxide layer passivated back contact solar cell.

[0039] In some embodiments, the present invention further comprises: a boron doped layer, the boron doped layer being located on the front side of the substrate. The thickness of the boron doped layer is 700-1200 nm. The boron doped layer within the aforementioned thickness range can reduce the risk of electrode burn-through and reduce the current loss caused by free carrier absorption.

[0040] In some embodiments, a second electrode is further included, and the second electrode is located on the surface of the boron doped layer.

[0041] In some embodiments, the first electrode and the second electrode each independently include a silver electrode or an aluminum electrode.

[0042] In some embodiments, a passivation layer is further included, and the passivation layer is located on a side of the second phosphorus-doped layer away from the substrate. The design of the passivation layer is conducive to improving the photoelectric efficiency of the battery.

[0043] Optionally, the thickness of the passivation layer is 10-70 nm.

[0044] Optionally, the material of the passivation layer includes ALD (aluminum oxide), silicon nitride, silicon oxynitride, silicon dioxide, or a combination of the two.

[0045] According to a second aspect of an embodiment of the present application, a method for passivating a back-contact solar cell through a tunnel oxide layer is provided, comprising the following steps: (1) providing a substrate; (2) depositing a first tunnel oxide layer on the back side of the substrate; (3) depositing a first phosphorus-doped layer on a side of the first tunnel oxide layer away from the substrate; (4) depositing a second tunnel oxide layer arranged in an interval manner on a partial area of ​​a side of the first phosphorus-doped layer away from the first tunnel oxide layer; and (5) depositing a second phosphorus-doped layer on a side of the second tunnel oxide layer away from the first phosphorus-doped layer.

[0046] In the method of the embodiment of the present application, a second tunnel oxide layer arranged at intervals is deposited on a partial area of ​​a side of the first phosphorus-doped layer away from the substrate, so that the tunnel oxide layer passivated back contact solar cell obtained has good contact and yield. In addition, the method of the embodiment of the present application forms an electrode connection area between two adjacent second tunnel oxide layers by forming a second tunnel oxide layer arranged at intervals, and the electrode connection area can reduce the process conditions for the subsequent formation of the first electrode. That is, the contact between the first electrode and the first phosphorus-doped layer is formed under the premise of almost not destroying the first tunnel oxide layer, so that the selection window of the electrode slurry becomes wider (the slurry formula can be selected in a wider range, such as an electrode slurry with less corrosiveness), and the process window of the sintering of the electrode slurry is also reduced synchronously (sintering peak temperature 660-770°C).

[0047] According to the method of the embodiment of the present application, in step (1), a substrate is provided.

[0048] In some embodiments, reference Figure 1 It also includes texturing and cleaning the substrate to remove dirt and metal impurities on the surface of the substrate, and to remove the mechanical damage layer of the substrate generated during the cutting process, reduce the recombination center, and then form an uneven velvet surface to enhance the silicon wafer's absorption of sunlight and reduce reflectivity.

[0049] Optionally, a uniform “positive pyramid” velvet surface is formed on two opposite surfaces of the substrate, and the velvet surface height is 0.5-3 μm.

[0050] In some embodiments, reference Figure 2 After step (1) and before step (2), the method further includes: performing boron doping on the front side of the substrate to form a boron doped layer 1 and a borosilicate glass layer on the surface of the substrate, wherein the borosilicate glass layer includes a boron-rich layer. P-type impurities are diffused on the substrate to achieve a suitable doping concentration and square resistance, and to obtain a depth suitable for the PN junction of the solar cell. A borosilicate glass layer is also generated on the surface of the boron doped layer, and the borosilicate glass layer is composed of a stacked boron-rich layer and an oxide layer, and the oxide layer is close to the boron doped layer.

[0051] In some embodiments, in step (1), the temperature during the boron doping diffusion is 600-1000° C. and the time is 60-120 seconds. After the boron is diffused, the P-type impurities are diffused on the N-type substrate to form a PN junction, reaching a suitable doping concentration ρ / square resistance R.

[0052] In some embodiments, the boron source in the boron doping diffusion process includes at least one of BCl 3 and BBr 3 .

[0053] In some embodiments, the substrate includes an N-type silicon wafer.

[0054] In some embodiments, the boron doped layer has a thickness of 70-1200 nm, for example, 70 nm, 160 nm, 260 nm, 380 nm, 500 nm, 600 nm, 800 nm, 900 nm, 1100 nm, 120 nm, etc.

[0055] In some embodiments, reference Figure 3 The back and side of the substrate after the formation of the boron doped layer 1 are etched at the first degree respectively. The borosilicate glass layer on the back and side is removed and the back is etched and polished to improve the back reflectivity, so as to enhance the long-wave absorption of the silicon wafer and make the back more reliable to reduce the recombination of the surface dangling bonds.

[0056] In some embodiments, the removal of the borosilicate glass layer on the back and sides is performed by chain pickling the substrate after the first winding etching using an HF solution.

[0057] Optionally, the concentration of HF is 0.5-10wt%, for example, 0.5wt%, 1wt%, 2wt%, 5wt%, 10wt%, etc.

[0058] In some embodiments, the backside etching further includes a polishing process, and the polishing process is performed in an alkaline solution, and the alkaline solution includes a sodium hydroxide solution or a potassium hydroxide solution.

[0059] Optionally, the concentration of the sodium hydroxide solution is 0.5-5wt%, for example, 0.5wt%, 1wt%, 2wt%, 3wt%, 4wt%, 5wt%, etc.

[0060] According to the method of the embodiment of the present application, in step (2), reference is made to Figure 4 , a first tunnel oxide layer 2 is deposited on the back side of the substrate. The first tunnel oxide layer can provide a tunnel channel, selectively pass electrons, and form an interface chemical passivation to block excessive phosphorus in the N-type doping layer from entering the silicon wafer.

[0061] In some embodiments, the method of depositing the first tunnel oxide layer includes using LPCVD equipment to grow the first tunnel oxide layer on the front and back sides of the silicon wafer at a temperature of 400° C. to 650° C.

[0062] According to the method of the embodiment of the present application, in step (3), reference is made to Figure 4 A first phosphorus-doped layer 3 is deposited on a side of the first tunnel oxide layer away from the substrate. An N+ layer is formed on the back side to form heavily doped polysilicon to form a good passivation contact structure.

[0063] In some embodiments, the method of depositing a first phosphorus-doped layer includes loading a silicon wafer after deposition of amorphous silicon into a tubular phosphorus diffusion furnace, diffusing phosphorus on the back side of the battery using POCl3 diffusion and annealing, and forming a phosphorus-doped first phosphorus-doped layer and a phosphorus-silicate glass layer on the back side.

[0064] In other embodiments, the method of depositing the first phosphorus-doped layer includes forming a tunneling oxide layer and an N-type doped layer by back-side in-situ doping and back-side crystallization annealing, and the conditions include: using an electric field to ionize nitrous oxide to form a plasma gas, which then reacts with silicon to form a tunneling oxide layer, and then using PEVCD (enhanced plasma deposition) to introduce silane and phosphine to react, and in-situ doping to form an N-type doped layer, i.e., the first phosphorus-doped layer.

[0065] According to the method of an embodiment of the present application, in step (4), second tunneling oxide layers arranged in an interval are deposited on a partial area of ​​a side surface of the first phosphorus-doped layer away from the first tunneling oxide layer.

[0066] In some embodiments, reference Figure 5 and 6The method of depositing the second tunneling oxide layer includes: using a PEVCD device to deposit a third tunneling oxide layer 4 on a side of the first phosphorus-doped layer 3 away from the substrate, and then etching the third tunneling oxide layer 4 according to a predetermined pattern to obtain the second tunneling oxide layers 5 arranged at intervals, and the area between two adjacent second tunneling oxide layers 5 forms an electrode connection area 6.

[0067] Optionally, etching is performed using laser. The laser conditions include a laser wavelength of 500-600 nm and an energy density of 0.17-0.87 J / cm 2 , pulse width 10-60ps.

[0068] In some other embodiments, the method of depositing the second tunnel oxide layer includes: depositing the second tunnel oxide layer on a side of the first phosphorus-doped layer away from the substrate according to a predetermined pattern to obtain the second tunnel oxide layers arranged at intervals, and the area between two adjacent second tunnel oxide layers forms an electrode connection area. Patterning first and then depositing the second tunnel oxide layer is simple to operate, which is conducive to reducing the damage caused by etching to the battery cell.

[0069] According to the method of the embodiment of the present application, in step (5), reference is made to Figure 7 , a second phosphorus-doped layer 7 is deposited on a side of the second tunneling oxide layer 5 away from the first phosphorus-doped layer.

[0070] In some embodiments, the method of depositing a second phosphorus-doped layer includes loading a silicon wafer after deposition of amorphous silicon into a tubular phosphorus diffusion furnace, diffusing phosphorus on the back side of the battery using POCl3 diffusion and annealing, and forming a second phosphorus-doped layer and a phosphorus-silicate glass layer on the back side.

[0071] In other embodiments, the method for depositing the second phosphorus-doped layer includes forming a tunneling oxide layer and an N-type doped layer by back-side in-situ doping and back-side crystallization annealing, and the conditions include: using an electric field to ionize nitrous oxide to form a plasma gas, which then reacts with silicon to form a tunneling oxide layer, and then using PEVCD (enhanced plasma deposition) to introduce silane and phosphine to react, and in-situ doping to form an N-type doped layer, i.e., the second phosphorus-doped layer.

[0072] In some embodiments, step (6) is also included: removing the phosphorus silicon glass layer on the front, edge and back, and the oxide layer on the front includes sequentially performing pickling, water washing, pre-dehydration and drying steps, wherein the pickling adopts hydrofluoric acid for 200-300 seconds; the water washing adopts deionized water for 100-200 seconds; the pre-dehydration time is 5-20 seconds, and the pickling, water washing and pre-dehydration can be performed at room temperature (20-30°C). Drying adopts hot air drying for 400-700 seconds at a temperature of 80-100°C.

[0073] In some embodiments, reference Figure 8 , further comprising step (7): preparing a passivation layer 8, wherein the passivation layer 8 is deposited on a side of the second phosphorus-doped layer 7 away from the substrate.

[0074] In some embodiments, the passivation layer includes aluminum oxide, silicon nitride, silicon oxynitride, silicon dioxide, or a combination thereof.

[0075] In some embodiments, the thickness of the passivation layer is 3-10 nm.

[0076] In some embodiments, reference Fig. 9 , metallization is performed on the back side of the silicon wafer to form a first electrode 9. The first electrode contacts the first tunnel oxide layer through the electrode connection region.

[0077] Furthermore, the method for forming the first electrode includes sintering, and the peak temperature of the sintering is 600-770° C. This is because the second tunneling oxide layer is arranged in intervals, and the interval area is the electrode connection area, so that in the process of forming the first electrode, the burn-through process of the first electrode avoids the obstruction of the second tunneling oxide layer, thereby forming a good contact with the phosphorus-doped layer, thereby realizing a perfect double-layer tunneling layer passivation contact structure.

[0078] In some embodiments, metallization is performed on the front side of the silicon wafer to form a second electrode.

[0079] Optionally, a silver paste electrode is printed on the back of the silicon wafer and a silver aluminum paste electrode is printed on the front of the silicon wafer in sequence by screen printing, and then the two electrodes are sintered to prepare a battery. A third aspect of the embodiments of the present application provides a photovoltaic module, wherein the photovoltaic module adopts the tunneling oxide layer passivation back contact solar cell of the first aspect.

[0080] The photovoltaic module of the embodiment of the present application has good reliability. This is because during the process of preparing the photovoltaic module, the welding area is protected by using an isolation adhesive, which can prevent the adhesive film from flowing into the welding area during lamination, causing problems such as poor welding.

[0081] In a fourth aspect of the embodiment of the present application, a photovoltaic system is provided, comprising the photovoltaic assembly according to the third aspect. The photovoltaic system also has the advantages of the above photovoltaic assembly, which will not be described in detail here.

[0082] In some embodiments, the above-mentioned photovoltaic system has a wide range of applications, not only limited to photovoltaic power stations, such as ground power stations, rooftop power stations and water power stations, but also includes various equipment and devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars and solar buildings. Of course, it is understandable that the application scenarios of photovoltaic systems are not limited to this, that is to say, photovoltaic systems can be used in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components can form multiple photovoltaic arrays. The photovoltaic array is connected to a junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0083] Hereinafter, exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. It should be noted that these exemplary embodiments can be implemented in many different forms and should not be construed as being limited to the embodiments described herein.

[0084] Example 1 S1: Texturing and cleaning The N-type silicon wafer with a thickness of 120 μm was textured and cleaned to form a uniform "positive pyramid" texture surface on the two opposite surfaces of the silicon wafer, and the texture surface height was 3 μm.

[0085] S2: Boron doping on the front side of N-type silicon wafer A 10nm thick boron-doped layer is diffused on the front side of the silicon wafer after texturing and cleaning.

[0086] S3: First winding etching The boron-doped substrate was chain-picked using a 5wt% HF solution.

[0087] The back side of the substrate is etched using a sodium hydroxide solution with a concentration of 5 wt %.

[0088] S4: Removal of Boron-Rich Layer The removal treatment uses a tank pickling method with a concentration of 3wt% HF.

[0089] S5: First tunneling oxide layer and first phosphorus-doped layer Using LPCVD equipment, at a temperature of 650°C, a tunneling oxide layer and an intrinsic amorphous silicon layer (a-Si) are grown on the front and back sides of the silicon wafer, where the thickness of the first tunneling oxide layer is 1.5nm and the thickness of the intrinsic amorphous silicon layer is 100nm.

[0090] Phosphorus diffusion is to load the silicon wafer after depositing amorphous silicon into a tubular phosphorus diffusion furnace, and use POCl3 diffusion to diffuse phosphorus on the back of the battery and anneal, forming a phosphorus-doped polysilicon layer and a phosphorus silicon glass layer on the back.

[0091] S6: Preparation of the second tunneling oxide layer After depositing a third tunnel oxide layer on a side of the first phosphorus-doped layer away from the substrate using a PEVCD device, the third tunnel oxide layer is etched according to a predetermined pattern to obtain second tunnel oxide layers with a thickness of 1 nm arranged at intervals, and the region between two adjacent second tunnel oxide layers forms an electrode connection region, and in the extension direction of the second phosphorus-doped layer, the length of the second phosphorus-doped layer is in a ratio of 1:1 to the length of the electrode connection region. The length of the electrode is in a ratio of 1:1.5 to the length of the electrode connection region.

[0092] S7: Preparation of the second phosphorus-doped layer The silicon wafer after deposition of amorphous silicon is loaded into a tubular phosphorus diffusion furnace, and phosphorus is diffused and annealed on the back of the battery by POCl3 diffusion, forming a second phosphorus-doped layer and a phosphorus-silicon glass layer with a thickness of 60nm on the back.

[0093] S8: Second winding etching on the front side The product obtained in step S7 is subjected to acid washing, water washing, pre-dehydration and drying steps in sequence, wherein the acid washing adopts hydrofluoric acid for 300 seconds; the water washing adopts deionized water for 200 seconds; the pre-dehydration time is 20 seconds, and the acid washing, water washing and pre-dehydration can all be carried out at room temperature. The drying adopts hot air drying for 700 seconds at a temperature of 100°C.

[0094] S9: Deposition of passivation layer A 5 nm passivation layer was deposited on the front side of the product after front side etch.

[0095] S10: Deposition of reflective film A 30nm reflective film is deposited on the front and back sides of the cell after the passivation film is deposited.

[0096] S11: Forming metal electrodes The light-receiving surface and the backlight surface of the solar cell are respectively made of a first metal silver electrode and a second metal silver electrode.

[0097] S12: Light Injection The cell obtained in S11 is subjected to light injection treatment to form a solar cell, wherein the light injection temperature is 220° C. and the time is 120 s, so as to obtain a tunneling oxide layer passivated back contact solar cell.

[0098] Examples 2 and 3 A tunneling oxide passivated back contact solar cell is prepared in the manner of Example 1, except that in the extension direction of the second phosphorus-doped layer, the ratios of the length of the second phosphorus-doped layer to the length of the electrode connection region are 1:0.5 and 1:2.5 respectively.

[0099] Examples 4 and 5 A tunnel oxide passivated back contact solar cell is prepared in the manner of Example 1, except that in the extension direction of the second phosphorus-doped layer, the length of the electrode and the length of the electrode connection region are in the ratio of 1:1.1 and 1:2.

[0100] Comparative Example 1 A tunneling oxide layer passivated back contact solar cell is prepared in the manner of Example 1, except that the second tunneling oxide layer is continuous without interruption.

[0101] Test Case (1) The efficiency and yield of the above solar cell production line were tested. The results are shown in Table 1: The efficiency test is as follows: The specific test method is to place the battery under a light source of 100 mW / cm 2 The results are obtained by connecting the source meter using the four-wire method under AM 1.5G simulated sunlight at 25°C.

[0102] The yield test is to study the quality and performance of the batteries prepared in the above-mentioned embodiments and comparative examples on a PL tester. 2000 sets of parallel samples are made for each embodiment and comparative example, and then the yields are sorted and counted.

[0103] The test data is shown in Table 1: Table 1

[0104] According to the above table results, by comparing Examples 1-5 with Comparative Example 1, it can be seen that the battery of the embodiment has better photoelectric conversion efficiency and higher yield. This is because the second tunneling oxide layer is arranged at intervals, and the interval area is the electrode connection area. In this way, in the process of forming the first electrode, the burn-through process of the first electrode avoids the obstruction of the second tunneling oxide layer, thereby forming a good contact with the phosphorus-doped layer, thereby realizing a perfect double-layer tunneling layer passivation contact structure. This contact between the first electrode and the first phosphorus-doped layer is formed under the premise of almost not destroying the first tunneling oxide layer, thereby improving the passivation of the battery and then improving the yield of the battery.

[0105] It should also be noted that the "some embodiments", "other embodiments", "embodiments", etc. mentioned in this application refer to the specific features, structures or characteristics described in conjunction with the embodiment included in at least one embodiment generally described in this application. The same expression appearing in multiple places in the specification does not necessarily refer to the same embodiment. Furthermore, when a specific feature, structure or characteristic is described in conjunction with any embodiment, it is claimed that the realization of such feature, structure or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0106] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0107] It should also be noted that the above are only preferred embodiments of the present application, and the patent protection scope of the present application is not limited thereto. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A tunnel oxide passivated back contact solar cell, It is characterized in that include: substrate; A first tunneling oxide layer, wherein the first tunneling oxide layer is located on the back side of the substrate; a first phosphorus-doped layer, wherein the first phosphorus-doped layer is located on a side of the first tunnel oxide layer away from the substrate; a second tunneling oxide layer, wherein the second tunneling oxide layer is located in a partial area of ​​a side surface of the first phosphorus-doped layer away from the first tunneling oxide layer, the second tunneling oxide layers are arranged at intervals, and an area between two adjacent second tunneling oxide layers is an electrode connection area; A second phosphorus-doped layer is located on a surface of the second tunneling oxide layer that is away from the first phosphorus-doped layer and is located in the electrode connection region.

2. The tunnel oxide passivated back contact solar cell according to claim 1, It is characterized in that The thickness of the first tunneling oxide layer is 0.8-2 nm; And / or, the thickness of the second tunneling oxide layer is 0.5-1.6 nm.

3. The tunnel oxide passivated back contact solar cell according to claim 1 or 2, It is characterized in that In the extension direction of the second phosphorus-doped layer, the ratio of the length of the second phosphorus-doped layer to the length of the electrode connection region is 1:(0.5-2.5).

4. The tunnel oxide passivated back contact solar cell according to claim 1 or 2, It is characterized in that It also includes a first electrode, the first electrode passes through the electrode connection region and contacts the first phosphorus doping, In the extension direction of the second phosphorus-doped layer, the ratio of the length of the electrode to the length of the electrode connection region is 1:(1-2).

5. A method for preparing a tunneling oxide layer passivated back contact solar cell, It is characterized in that The following steps are involved: providing a substrate; Depositing a first tunneling oxide layer on the back side of the substrate; Depositing a first phosphorus-doped layer on a side of the first tunnel oxide layer away from the substrate; Depositing second tunnel oxide layers arranged in an interval manner on a partial area of ​​a side surface of the first phosphorus-doped layer away from the first tunnel oxide layer; A second phosphorus-doped layer is deposited on a side of the second tunnel oxide layer away from the first phosphorus-doped layer.

6. The preparation method according to claim 5, It is characterized in that The method of depositing the second tunnel oxide layer comprises: After depositing a third tunnel oxide layer on a side of the first phosphorus-doped layer away from the substrate, the third tunnel oxide layer is etched according to a predetermined pattern to obtain the second tunnel oxide layers arranged at intervals, and the area between two adjacent second tunnel oxide layers forms an electrode connection area.

7. The preparation method according to claim 5, It is characterized in that The method of depositing the second tunneling oxide layer includes: depositing the second tunneling oxide layer on a side of the first phosphorus-doped layer away from the first tunneling oxide layer according to a predetermined pattern to obtain the second tunneling oxide layers arranged at intervals, and the area between two adjacent second tunneling oxide layers forms an electrode connection area.

8. The preparation method according to any one of claims 5 to 7, It is characterized in that The method further comprises preparing a passivation layer and a first electrode, The passivation layer is deposited on a side of the second phosphorus-doped layer away from the substrate; The first electrode is formed on a side of the passivation layer away from the second phosphorus-doped layer, and contacts the first phosphorus-doped layer through the electrode connection region.

9. The preparation method according to claim 8, It is characterized in that The process of forming the first electrode includes sintering, The peak temperature of the sintering is 600-770°C.

10. A photovoltaic module, It is characterized in that The photovoltaic module comprises the tunnel oxide layer passivated back contact solar cell according to any one of claims 1 to 4.

11. A photovoltaic system, It is characterized in that The photovoltaic system comprises the photovoltaic assembly according to claim 10.

Images