Display panel and display device

Abstract

Embodiments of the present application provide a display panel and a display device, and relate to the technical field of display. In the display panel, the isolation structure is located on one side of the substrate, the first wiring layer is located between the substrate and the isolation structure, the first wiring layer includes a first conductive trace for transmitting a first power signal, and in the display area, the isolation structure and the first conductive trace are connected. In this way, the connection area of the first power signal trace and the isolation structure is increased in the display area through the first conductive trace, thereby reducing the connection resistance, reducing the heat generated by the display panel due to the large current in the high-brightness display state, avoiding the display panel burn caused by the above heat, ensuring that the display panel can work normally, providing the stability of the display panel work, and also reducing the display power consumption of the display panel and improving the endurance of the display device carrying the display panel.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Organic Light Emitting Diode (OLED) is considered to be the next generation display technology after liquid crystal display technology. It is widely used in smart phones, televisions, notebook computers, desktop computers, vehicle displays, wearable devices and other consumer electronic products due to its excellent color and image quality, and has become the mainstream technology in display panels.

[0003] However, the process performance of the current OLED display product still needs to be further improved. SUMMARY

[0004] In order to overcome the technical problems mentioned in the above technical background, the present application provides a display panel and a display device.

[0005] In a first aspect of the present application, a display panel is provided, which comprises a display area and a frame area at least partially surrounding the display area, and further comprises:

[0006] a substrate;

[0007] an isolation structure located on one side of the substrate;

[0008] a first wiring layer located between the substrate and the isolation structure, the first wiring layer comprising at least one first conductive trace for transmitting a first power signal, and in the display area, the isolation structure is connected to at least one first conductive trace.

[0009] In a possible implementation manner of the present application, in the display area, the orthogonal projection of the first conductive trace on the substrate is located within the orthogonal projection of the isolation structure on the substrate.

[0010] In a possible implementation manner of the present application, the first conductive trace extends along a second direction, and a plurality of first conductive traces are parallel to each other and arranged along a first direction, wherein the first direction and the second direction intersect.

[0011] Preferably, the display panel further comprises a second wiring layer, the second wiring layer is located between the substrate and the first wiring layer, the second wiring layer comprises at least one second conductive trace, at least one second conductive trace is connected to at least one first conductive trace, and the second conductive trace extends along the first direction.

[0012] Preferably, the second direction is perpendicular to the first direction.

[0013] Preferably, at least one of the second conductive traces is connected to at least one of the first conductive traces through a first via.

[0014] Preferably, the first via is located at an overlapping position of a projection of the first conductive trace on the substrate and a projection of the second conductive trace on the substrate.

[0015] In a possible implementation of the present application, the first trace layer further comprises at least one second power signal trace, the second power signal trace is parallel to the first conductive trace, and the second power signal trace is insulated from the first conductive trace.

[0016] Preferably, the display area comprises a first sub-display area and a second sub-display area, the first trace layer further comprises at least one third conductive trace, the third conductive trace is insulated from the first conductive trace,

[0017] The first conductive trace is located in the first sub-display area, and the third conductive trace is located in the second sub-display area.

[0018] In a possible implementation of the present application, in the first sub-display area, the isolation structure is connected to at least one of the first conductive traces, and in the second sub-display area, the second power signal trace is connected to at least one of the third conductive traces.

[0019] Preferably, the at least one first conductive trace and the at least one third conductive trace are located in the same column.

[0020] Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

[0021] In a possible implementation of the present application, the display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and an insulation layer located between adjacent conductive layers, which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the fourth conductive layer, and the second trace layer is located on the third conductive layer; or,

[0022] The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, and an insulation layer located between adjacent conductive layers, which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the fifth conductive layer, and the second trace layer is located on the fourth conductive layer.

[0023] In a possible implementation manner of the present application, the display panel further comprises a third trace layer, the third trace layer is located on a side of the first trace layer away from the substrate, the third trace layer comprises at least one second power signal trace, the second power signal trace extends along a second direction, the first conductive trace extends along a first direction, and the first direction intersects the second direction.

[0024] Preferably, the first direction is perpendicular to the second direction.

[0025] In a possible implementation manner of the present application, the display area comprises a first sub-display area and a second sub-display area, the first trace layer further comprises at least one fourth conductive trace, the fourth conductive trace is insulated from the first conductive trace, and the fourth conductive trace extends along the second direction.

[0026] In the first sub-display area, the isolation structure is connected to the at least one first conductive trace, and in the second sub-display area, the second power signal trace is connected to at least one fourth conductive trace.

[0027] Preferably, the first conductive trace is located in the first sub-display area, and the fourth conductive trace is located in the second sub-display area.

[0028] Preferably, the first sub-display area and the second sub-display area are arranged along the second direction.

[0029] In a possible implementation manner of the present application, the display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and an insulating layer located between adjacent conductive layers, which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the third conductive layer, and the third trace layer is located on the fourth conductive layer; or,

[0030] The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer, and an insulating layer located between adjacent conductive layers, which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the fourth conductive layer, and the third trace layer is located on the fifth conductive layer.

[0031] In a possible implementation manner of the present application, the display panel further comprises an insulating layer located between the isolation structure and the first conductive layer, the insulating layer comprises an insulating layer via, and the isolation structure is connected to the first conductive trace through the insulating layer via.

[0032] Preferably, the isolation structure comprises a first isolation portion and a second isolation portion, the first isolation portion and the second isolation portion are sequentially stacked in a direction away from the substrate, and the first isolation portion is connected with the first conductive trace through the insulating layer via hole.

[0033] Preferably, a projection of the first isolation portion on the substrate is located within a projection of the second isolation portion on the substrate.

[0034] Preferably, the isolation structure encloses an isolation opening on the substrate, and a cross-sectional shape of the isolation structure on a cross section perpendicular to a plane in which the substrate is located and passing through a center of the isolation opening is T-shaped.

[0035] Preferably, a projection of the insulating layer via hole on the substrate is located within a projection of an intersection of the isolation structure extending in the first direction and the isolation structure extending in the second direction on the substrate.

[0036] In a possible implementation of the present application, the isolation structure further comprises a third isolation portion, the third isolation portion, the first isolation portion and the second isolation portion are sequentially stacked in a direction away from the substrate.

[0037] A projection of the first isolation portion on the substrate is located within a projection of the third isolation portion on the substrate,

[0038] The third isolation portion is connected with the first conductive trace through the insulating layer via hole.

[0039] Preferably, a cross-sectional shape of the isolation structure on a cross section perpendicular to a plane in which the substrate is located and passing through a center of the isolation opening is H-shaped.

[0040] Preferably, a material of the first isolation portion comprises aluminum, silver or copper, and / or a material of the second isolation portion comprises titanium or molybdenum, and / or a material of the third isolation portion comprises molybdenum or titanium.

[0041] In a possible implementation of the present application, the insulating layer comprises a pixel definition layer, the pixel definition layer is located between the first conductive layer and the isolation structure, the pixel definition layer comprises a pixel definition layer via hole, and the isolation structure is connected with the first conductive trace through the pixel definition layer via hole.

[0042] In a possible implementation of the present application, the insulating layer further comprises a planarization layer, the planarization layer is located between the first conductive layer and the pixel definition layer, the planarization layer comprises a planarization layer via hole,

[0043] The isolation structure is connected with the first conductive trace through the pixel defining layer via hole and the planarization layer via hole.

[0044] Preferably, a projection of the planarization layer via hole on the substrate is located within a projection of the pixel defining layer via hole on the substrate.

[0045] In a possible implementation of the present application, a projection of the pixel defining layer via hole on the substrate and a projection of the planarization layer via hole on the substrate are located outside a projection of the isolation opening on the substrate.

[0046] Preferably, projections of the pixel defining layer via hole and the planarization layer via hole on the substrate are located within a projection of an intersection of the isolation structure extending along the first direction and the isolation structure extending along the second direction on the substrate.

[0047] In a possible implementation of the present application, the display panel further includes a first power supply line and a second power supply line located in the frame region.

[0048] The first power supply line is connected with the first conductive trace, and the second power supply line is connected with a second power supply signal trace, where a voltage of a first power supply signal provided by the first power supply line is less than a voltage of a second power supply signal provided by the second power supply line.

[0049] In a possible implementation of the present application, the display panel further includes a light emitting device.

[0050] The isolation structure encloses an isolation opening on the substrate, and at least part of the light emitting device is located in the isolation opening.

[0051] Preferably, in the display region, the light emitting device is arrayed along a first direction and a second direction, the light emitting device is arranged along the first direction to form a pixel row, and a plurality of pixel rows are arranged along the second direction.

[0052] In a possible implementation of the present application, the display panel further includes a pixel defining layer located on a side of the substrate, the isolation structure is located on a side of the pixel defining layer away from the substrate, the pixel defining layer includes a pixel opening, at least part of the light emitting device is located in the pixel opening, and the pixel opening is located in the isolation opening.

[0053] The light emitting device includes a first electrode, a light emitting material layer, and a second electrode, which are sequentially stacked in a direction away from the substrate.

[0054] At least part of the first electrode is exposed from the pixel opening position, and the second electrode overlaps the isolation structure.

[0055] In a possible implementation of the first aspect, the frame region includes a first sub-frame region, a second sub-frame region, a third sub-frame region, and a fourth sub-frame region, wherein the first sub-frame region and the third sub-frame region are oppositely arranged in the second direction, and the second sub-frame region and the fourth sub-frame region are oppositely arranged in the first direction.

[0056] The first power line is distributed along the second sub-frame region, the third sub-frame region, and the fourth sub-frame region, and is distributed in part of the first sub-frame region.

[0057] The second power line is distributed in the first sub-frame region, and the first power line and the second power line are insulated.

[0058] Preferably, the first conductive trace is connected with the first power line in at least one of the first sub-frame region, the second sub-frame region, the third sub-frame region, and the fourth sub-frame region.

[0059] In a possible implementation of the first aspect, the first power line distributed in the first sub-frame region is connected with the isolation structure.

[0060] The second aspect of the present application also provides a display device, which includes the display panel in any possible implementation of the first aspect.

[0061] Embodiments of the present application provide a display panel and a display device. In the display panel, an isolation structure is located on one side of a substrate, a first trace layer is located between the substrate and the isolation structure, the first trace layer includes a first conductive trace for transmitting a first power signal, and in a display area, the isolation structure is connected with the first conductive trace. In this way, the connection area between the first conductive trace and the isolation structure can be increased in the display area, so as to reduce the connection resistance, reduce the heat generated by a large current in a high-brightness display state of the display panel, avoid the burn of the display panel caused by the heat, ensure the normal work of the display panel, improve the stability of the work of the display panel, and reduce the display power consumption of the display panel and improve the endurance of the display device with the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0062] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as a limitation to the scope. Other related drawings can also be obtained by those skilled in the art without creative labor.

[0063] Figure 1 A schematic view of the area distribution of the display panel provided by the embodiment is shown;

[0064] Figure 2 A schematic view of the positional relationship between the isolation structure and the isolation opening provided by the embodiment is shown;

[0065] Figure 3 A schematic view of the area distribution of the display panel provided by the embodiment is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0066] Figure 4 A schematic view of the area distribution of the display panel provided by the embodiment is shown;

[0067] Figure 5 A schematic view of the area distribution of the display panel provided by the embodiment is shown;

[0068] Figure 6 A schematic view of the area distribution of the display panel provided by the embodiment is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0069] Figure 7 A schematic view of the area distribution of the display panel provided by the embodiment is shown;

[0070] Figure 8 A schematic view of the layering of the conductive layer on the substrate is shown;

[0071] Figure 9 A schematic view of the layering of the conductive layer on the substrate is shown;

[0072] Figure 10 A schematic view of the area distribution of the display panel provided by the embodiment is shown;

[0073] Figure 11 A schematic view of the area distribution of the display panel provided by the embodiment is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0074] Figure 12 A schematic view of the cross section of the AA position is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0075] Figure 13 A schematic view of the cross section of the AA position is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0076] Figure 14 A schematic view of the cross section of the AA position is shown; Figure 2 A schematic view of the cross section of the AA position is shown;

[0077] Figure 15A schematic view of the positional relationship between the pixel definition layer via and the planarization layer via and the isolation opening is shown.

[0078] Figure 16 A schematic view of the positional relationship between the pixel definition layer via and the planarization layer via and the isolation opening is shown. Figure 2 A schematic view of the cross section of the middle BB position is shown.

[0079] Figure 17 A schematic view of the positional relationship between the pixel definition layer via and the planarization layer via and the isolation opening is shown. Figure 2 A schematic view of the cross section of the middle BB position is shown.

[0080] Figure 18 A schematic view of the positional relationship between the pixel definition layer via and the planarization layer via and the isolation opening is shown.

[0081] Icon: 1 - display panel; 11 - substrate; 12 - isolation structure; 1201 - isolation opening; 121 - first isolation part; 122 - second isolation part; 123 - third isolation part; 131 - first trace layer; 1311 - first conductive trace; 1312 - second power signal trace; 1313 - third conductive trace; 1314 - fourth conductive trace; 132 - second trace layer; 1321 - second conductive trace; 133 - third trace layer; 141 - first conductive layer; 142 - second conductive layer; 143 - third conductive layer; 144 - fourth conductive layer; 145 - fifth conductive layer; 15 - insulating layer; 1501 - insulating layer via; 151 - pixel definition layer; 1511 - pixel definition layer via; 1512 - pixel opening; 152 - planarization layer; 1521 - planarization layer via; 16 - light emitting device; 161 - first electrode; 162 - light emitting material layer; 163 - second electrode; 17 - thin film encapsulation layer; 171 - first encapsulation layer; 1711 - encapsulation unit; 172 - second encapsulation layer; 173 - third encapsulation layer; AA - display area; AA1 - first sub-display area; AA2 - second sub-display area; AB - frame area; AB1 - first sub-frame area; AB2 - second sub-frame area; AB3 - third sub-frame area; AB4 - fourth sub-frame area. DETAILED DESCRIPTION

[0082] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0083] In the description of the present application, it should be noted that the terms "upper", "lower", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the application is usually placed, only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0084] Increasing the density (i.e., pixel density) of light emitting devices in a display panel is an important way to improve display effect, but the display panel made by the fine metal mask (FMM) technology cannot further increase the density of light emitting devices due to technical limitations. The inventors have found through long-term research that, in order to solve the technical problem that the density of light emitting devices cannot be further increased, an isolation structure is arranged in some display panels, and the light emitting material layer and the cathode are disconnected at the position of the isolation structure when the whole layer of light emitting material layer and the cathode is evaporated. Through multiple evaporation and etching processes, light emitting devices of different colors can be formed in different isolation openings. The above process is also called light emitting device patterning.

[0085] Patent CN118251982A, patent 202410864269.8, patent PCT / CN2024 / 098407, patent PCT / CN2024 / 102783, patent PCT / CN2024 / 098217, PCT / CN2024 / 099419, patent PCT / CN2024 / 099072, patent CN117979755A, patent CN117998900A, patent CN117062489A, patent CN117580403A, patent CN116583155A, patent CN116669477A, patent CN117396039A, patent CN116669480A, patent CN116600606A and patent CN117500332A disclose related technical solutions of isolation structure (or called isolation column) and packaging layer, the contents of which are incorporated by reference into the present application for reference.

[0086] In the above display panel, there is a problem of heat damage in the high-brightness display state, which causes the display panel to be unable to work stably, which affects the display effect of the display panel, and further reduces the user's use experience.

[0087] To solve the above problems, the inventors have innovatively designed the following technical solutions, which will be described in detail below with reference to the accompanying drawings. It should be noted that the defects in the above prior art solutions are the result of the inventors' careful research and practice, and therefore the discovery process of the above technical problems and the solutions proposed by the present embodiment to solve the above problems should be considered as the inventors' contribution to the present application, and should not be understood as technical content known to those skilled in the art.

[0088] Please refer to Figure 1 , Figure 2 , Figure 3 and Figure 4 , Figure 1 illustrates a schematic diagram of the area distribution of the display panel provided by the present embodiment, Figure 2 illustrates a schematic diagram of the positional relationship between the isolation structure and the isolation opening, Figure 3 illustrates a schematic diagram of the cross-section at position AA in Figure 4 , Figure 1 illustrates a schematic diagram of the distribution of the wiring on each area of the display panel. As shown in Figure 2 , the display panel 1 includes a display area AA and a frame area AB, the frame area AB at least partially surrounds the display area AA, wherein the frame area AB can correspond to a non-display area of the display panel 1.

[0089] In the present embodiment, the display panel 1 includes a substrate 11, an isolation structure 12, and a first wiring layer 131, the isolation structure 12 is located on one side of the substrate 11, and the first wiring layer 131 is located between the substrate 11 and the isolation structure 12, the first wiring layer 131 includes at least one first conductive wiring 1311 for transmitting a first power signal, in the display area AA, the isolation structure 12 is connected with the at least one first conductive wiring 1311, and illustratively, in the display area AA, the isolation structure 12 is connected with the first conductive wiring 1311 below it.

[0090] In the above scheme, the connection area with the isolation structure 12 is increased in the display area AA by the first conductive wiring 1311, thereby reducing the connection resistance, reducing the heat generated by the display panel 1 due to the large current in the high-brightness display state, avoiding the display panel burn caused by the above heat, ensuring that the display panel 1 can work normally, improving the stability of the display panel 1, and at the same time, reducing the display power consumption of the display panel 1, and improving the endurance of the display device carrying the display panel 1.

[0091] Further, please refer to Figure 3 and Figure 4In the display area AA, the isolation structure 12 includes an isolation opening 1201, and the first conductive trace 1311 can be arranged below the isolation structure 12, i.e., the orthographic projection of the first conductive trace 1311 on the substrate 11 is located within the orthographic projection of the isolation structure 12 on the substrate 11. In this way, the first conductive trace 1311 can avoid the isolation opening 1201, which can avoid affecting the flatness of the film layer in the isolation opening 1201 when the first conductive trace 1311 is located below the isolation opening 1201, thereby affecting the light intensity at different angles, and can also avoid affecting the display effect when the first conductive trace 1311 is located in the isolation opening 1201.

[0092] In an embodiment of the present embodiment, please refer to Figure 5 , the first conductive trace 1311 extends along the second direction (Y direction in the figure), and a plurality of first conductive traces 1311 are parallel to each other and arranged along the first direction (X direction in the figure), wherein the first direction and the second direction intersect, and optionally, the first direction and the second direction are perpendicular to each other.

[0093] Please refer to Figure 6 and Figure 7 In the present embodiment, the display panel 1 further includes a second trace layer 132, which is located between the substrate 11 and the first trace layer 131, and the second trace layer 132 and the first trace layer 131 are insulated from each other. An insulating layer 15 can be arranged between the second trace layer 132 and the first trace layer 131. The second trace layer 132 includes at least one second conductive trace 1321, which extends along the first direction (X direction in the figure), i.e., the first conductive trace 1311 and the second conductive trace 1321 form a grid pattern. The at least one second conductive trace 1321 is connected to the at least one first conductive trace 1311. Specifically, the at least one second conductive trace 1321 is connected to the at least one first conductive trace 1311 through a first via 201, wherein the first via 201 can penetrate the insulating layer between the second trace layer 132 and the first trace layer 131.

[0094] Optionally, in the present embodiment, the first via 201 is located at the overlapping position of the orthographic projection of the first conductive trace 1311 on the substrate 11 and the orthographic projection of the second conductive trace 1321 on the substrate 11. In this way, the first conductive trace 1311 and the second conductive trace 1321 can be connected together through the shortest path, thereby reducing the connection resistance. In addition, the connection of the first conductive trace 1311 and the second conductive trace 1321 together can reduce the transmission resistance of the first power signal, thereby ensuring that the first power signal obtained at different positions in the display area AA is substantially the same, and improving the display uniformity of the display panel 1.

[0095] Further, please refer to Figure 8The first trace layer 131 further comprises at least one second power signal trace 1312, the second power signal trace 1312 is parallel to the first conductive trace 1311, and the second power signal trace 1312 is insulated from the first conductive trace 1311. Optionally, the display area AA comprises a first sub-display area AA1 and a second sub-display area AA2, wherein the first sub-display area AA1 and the second sub-display area AA2 can be arranged along the second direction (Y direction in the figure). The first trace layer 131 further comprises at least one third conductive trace 1313, the third conductive trace 1313 is insulated from the first conductive trace 1311. In the embodiment, the first conductive trace 1311 is located in the first sub-display area AA1, and the third conductive trace 1313 is located in the second sub-display area AA2.

[0096] In the embodiment, in the first sub-display area AA1, the isolation structure 12 is connected to the at least one first conductive trace 1311, and in the second sub-display area AA2, the second power signal trace 1312 is connected to the at least one third conductive trace 1313. The connection between the second power signal trace 1312 and the third conductive trace 1313 can increase the width of the trace and thus reduce the resistance of the trace where the second power signal trace 1312 is located, can reduce the IR-drop of the second power signal in the transmission process, and enhance the display uniformity of the display panel.

[0097] Optionally, in the embodiment, the at least one first conductive trace 1311 and the at least one third conductive trace 1313 are located in the same column, that is, the extension of the at least one first conductive trace 1311 along the column direction and the extension of the at least one third conductive trace 1313 along the column direction coincide.

[0098] Please refer to Figure 9 When the display panel 1 further comprises a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, and a fourth conductive layer 144 which are sequentially stacked away from the substrate 11 and are located on the substrate 11, and an insulating layer 15 is arranged between adjacent conductive layers, wherein the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 can be metal conductive layers, and the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 can form pixel circuits for driving light emitting devices. The first trace layer 131 can be located on the fourth conductive layer 144, and the second trace layer 132 is located on the third conductive layer 143, that is, the traces in the first trace layer 131 can be formed by the fourth conductive layer 144, and the traces in the second trace layer 132 can be formed by the third conductive layer 143.

[0099] Please refer to Figure 10When the display panel 1 further comprises a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, a fourth conductive layer 144 and a fifth conductive layer 145 which are stacked in the direction away from the substrate 11 in sequence, and an insulating layer 15 is arranged between adjacent conductive layers, the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144 and the fifth conductive layer 145 can be metal conductive layers, and the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144 and the fifth conductive layer 145 can form pixel circuits for driving light-emitting devices. The first wiring layer 131 can be located on the fifth conductive layer 145, and the second wiring layer 132 can be located on the fourth conductive layer 144, that is, the wires in the first wiring layer 131 can be formed by the fifth conductive layer 145, and the wires in the second wiring layer 132 can be formed by the fourth conductive layer 144.

[0100] In another implementation form of the present embodiment, referring to Figure 10 , the display panel 1 further comprises a third wiring layer 133 which is located on the side of the first wiring layer 131 away from the substrate 11, and the third wiring layer 133 comprises at least one second power signal wire 1312 which extends in the second direction (Y direction in the figure), and the first conductive wire 1311 extends in the first direction (X direction in the figure), and the first direction intersects the second direction, and optionally, the first direction is perpendicular to the second direction.

[0101] In this implementation form, referring again to Figure 8 , the display area AA comprises a first sub-display area AA1 and a second sub-display area AA2, and the first sub-display area AA1 and the second sub-display area AA2 can be arranged in the second direction (Y direction in the figure). The first wiring layer 131 further comprises at least one fourth conductive wire 1314 which is insulated from the first conductive wire 1311, and the fourth conductive wire 1314 extends in the second direction (Y direction in the figure).

[0102] In the first sub-display area AA1, the isolation structure 12 is connected to at least one first conductive wire 1311, and in the second sub-display area AA2, the second power signal wire 1312 is connected to at least one fourth conductive wire 1314, and the connection between the second power signal wire 1312 and the fourth conductive wire 1314 can increase the width of the wire and thus reduce the resistance of the wire where the second power signal wire 1312 is located, can reduce the IR-drop of the second power signal in the transmission process, and enhance the display uniformity of the display panel.

[0103] Optionally, the first conductive wire 1311 is located in the first sub-display area AA1, and the fourth conductive wire 1314 is located in the second sub-display area AA2.

[0104] Please refer again to Figure 9 When the display panel 1 further comprises a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, and a fourth conductive layer 144 which are stacked in the direction away from the substrate 11 in sequence, and an insulating layer 15 is arranged between adjacent conductive layers, the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, and the fourth conductive layer 144 can be metal conductive layers. The first trace layer 131 can be located on the third conductive layer 143, and the third trace layer 133 can be located on the fourth conductive layer 144, i.e., the traces in the first trace layer 131 can be formed by the third conductive layer 143, and the traces in the third trace layer 133 can be formed by the fourth conductive layer 144.

[0105] Please refer again to Figure 11 When the display panel 1 further comprises a first conductive layer 141, a second conductive layer 142, a third conductive layer 143, a fourth conductive layer 144, and a fifth conductive layer 145 which are stacked in the direction away from the substrate 11 in sequence, and an insulating layer 15 is arranged between adjacent conductive layers, the first conductive layer 141, the second conductive layer 142, the third conductive layer 143, the fourth conductive layer 144, and the fifth conductive layer 145 can be metal conductive layers. The first trace layer 131 can be located on the fourth conductive layer 145, and the third trace layer 133 can be located on the fifth conductive layer 144, i.e., the traces in the first trace layer 131 can be formed by the fourth conductive layer 144, and the traces in the third trace layer 133 can be formed by the fifth conductive layer 145.

[0106] In the embodiment, please refer to Figure 12 The display panel 1 further comprises an insulating layer 15 between the isolation structure 12 and the first conductive layer 131, and the insulating layer 15 comprises an insulating layer through hole 1501, and the isolation structure 12 is connected to the first conductive trace 131 through the insulating layer through hole 1501.

[0107] The isolation structure 12 comprises a first isolation part 121 and a second isolation part 122, and the first isolation part 121 and the second isolation part 122 are stacked in the direction away from the substrate 11 in sequence, and the orthographic projection of the first isolation part 121 on the substrate 11 is located within the orthographic projection of the second isolation part 122 on the substrate 11, and the first isolation part 121 is connected to the first conductive trace 131 through the insulating layer through hole 1501.

[0108] Optionally, in the cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the isolation opening 1201, the cross section shape of the isolation structure 12 is T-shaped, so that different light emitting devices can be formed in different isolation openings 1201 when the film layer of the light emitting device is deposited on the whole surface.

[0109] Optionally, the orthogonal projection of the insulating layer via hole 1501 on the substrate 11 is located within the orthogonal projection on the substrate 11 of the intersection of the isolation structure 12 extending along the first direction (X direction in the figure) and the isolation structure 12 extending along the second direction (Y direction in the figure).

[0110] Further, please refer to Figure 13 , the isolation structure 12 further comprises a third isolation portion 123, the third isolation portion 123, the first isolation portion 121 and the second isolation portion 122 are sequentially stacked in the direction away from the substrate 11, and the orthogonal projection of the first isolation portion 121 on the substrate 11 is located within the orthogonal projection on the substrate 11 of the third isolation portion 123. The third isolation portion 123 is connected with the first conductive trace 1311 through the insulating layer via hole 1501.

[0111] Optionally, in the cross section perpendicular to the plane where the substrate 11 is located and passing through the center of the isolation opening 1201, the cross-sectional shape of the isolation structure 12 is an I-shaped cross section.

[0112] In the embodiment, the material of the first isolation portion 121 comprises aluminum, silver or copper, the material of the second isolation portion 122 comprises titanium or molybdenum, and the material of the third isolation portion 123 comprises molybdenum or titanium.

[0113] In the embodiment, please refer to Figure 14 , the insulating layer 15 comprises a pixel defining layer 151, the pixel defining layer 151 is located between the first conductive layer 131 and the isolation structure 12, the isolation structure 12 is located on the side of the pixel defining layer 141 away from the substrate 11, and the pixel defining layer 151 comprises a pixel defining layer via hole 1511. In the embodiment, the pixel defining layer 151 can be an organic pixel defining layer or an inorganic pixel defining layer, and preferably, the pixel defining layer 151 is an inorganic pixel defining layer. When the pixel defining layer 151 is an inorganic pixel defining layer, the pixel defining layer 151 can be a single-layer structure of silicon oxide (SiOx) or silicon nitride (SiNx), or a laminated structure formed by silicon oxide and silicon nitride alternately.

[0114] Optionally, the isolation structure 12 is connected with the first conductive trace 1311 through the pixel defining layer via hole 1511.

[0115] Further, please refer to Figure 15 , in the embodiment, the insulating layer 15 can further comprise a planarization layer 152, the planarization layer 152 is located between the first conductive layer 131 and the pixel defining layer 151, and the planarization layer 142 comprises a planarization layer via hole 1521. The isolation structure 12 is connected with the first conductive trace 1311 through the pixel defining layer via hole 1511 and the planarization layer via hole 1521.

[0116] Optionally, the orthogonal projection of the planarization layer via hole 1521 on the substrate 11 is located within the orthogonal projection of the pixel defining layer via hole 1511 on the substrate 11.

[0117] The orthogonal projection of the pixel defining layer via hole 1511 on the substrate 11 and the orthogonal projection of the planarization layer via hole 1521 on the substrate 11 are located outside the orthogonal projection of the isolation opening 1201 on the substrate 11, i.e., the orthogonal projection of the pixel defining layer via hole 1511 on the substrate 11 and the orthogonal projection of the planarization layer via hole 1521 on the substrate 11 are located within the orthogonal projection of the isolation structure 12 on the substrate 11.

[0118] Optionally, referring to Figure 4 , the orthogonal projection of the pixel defining layer via hole 1511 and the planarization layer via hole 1521 on the substrate 11 is located within the orthogonal projection of the intersection of the isolation structure 12 extending along the first direction (X direction in the figure) and the isolation structure 12 extending along the second direction (Y direction in the figure) on the substrate 11. In this way, the pixel defining layer via hole 1511 and the planarization layer via hole 1521 are far away from the isolation opening 1201 and do not affect the normal light emission of the light emitting device located in the isolation opening 1201.

[0119] Again, referring to Figure 5 , Figure 7 , Figure 10 and Figure 16 , the display panel 1 further includes a first power supply line 210 and a second power supply line 220 located in the frame area AB. The first power supply line 210 is connected with the first conductive trace 1311 and is configured to provide a first power supply signal (such as an ELVSS signal) for the first conductive trace 1311; the second power supply line 220 is connected with the second power supply signal trace 1312 and is configured to provide a second power supply signal (such as an ELVDD signal) for the second power supply signal trace 1312. The voltage of the first power supply signal provided by the first power supply line 210 is smaller than the voltage of the second power supply signal provided by the second power supply line 220.

[0120] In this embodiment, referring to Figure 16 , Figure 7 , a cross-sectional schematic view of the display panel is shown when the first conductive trace 1311 is formed by the fourth conductive layer M4. The display panel 1 further includes a light emitting device 16, and the isolation structure 12 encloses the isolation opening 1201 on the substrate 11, and at least part of the light emitting device 16 is located in the isolation opening 1201.

[0121] Preferably, in the display area AA, the light emitting device 16 is arrayed along the first direction (X direction in the figure) and the second direction (Y direction in the figure), and the light emitting device 16 is arranged along the first direction to form a pixel row, and a plurality of pixel rows are arranged along the second direction.

[0122] Further, the isolation structure 12 is located on a side of the pixel defining layer 151 away from the substrate 11, the pixel defining layer 151 comprises a pixel opening 1512, at least part of the light emitting device 16 is located in the pixel opening 1512, and the pixel opening 1512 is located in the isolation opening 1201.

[0123] The light emitting device 16 comprises a first electrode 161, a light emitting material layer 162, and a second electrode 163, which are sequentially stacked in a direction away from the substrate 11, at least part of the first electrode 161 is exposed from the position of the pixel opening 1512, and the second electrode 163 is overlapped with the isolation structure 12. Exemplarily, the second electrode 163 can be overlapped with the first isolation portion 121 and / or the third isolation portion 123 in the isolation structure 12.

[0124] Exemplarily, in the present embodiment, please refer to Figure 10 and Figure 17 again, the frame area AB comprises a first sub-frame area AB1, a second sub-frame area AB2, a third sub-frame area AB3, and a fourth sub-frame area AB4. Among them, the first sub-frame area AB1 and the third sub-frame area AB3 are oppositely arranged in the second direction (Y direction in the figure), and the second sub-frame area AB2 and the fourth sub-frame area AB4 are oppositely arranged in the first direction (X direction in the figure).

[0125] In a possible implementation, the first power line 210 can be distributed along the second sub-frame area AB2, the third sub-frame area AB3, and the fourth sub-frame area AB4, and distributed in part of the first sub-frame area AB1. The second power line 210 is distributed in the first sub-frame area AB1, and the first power line 210 and the second power line 210 are insulated.

[0126] In this implementation, the first conductive trace 131 can be connected with the first power line 210 in at least one of the first sub-frame area AB1, the second sub-frame area AB2, the third sub-frame area AB3, and the fourth sub-frame area AB4.

[0127] In the present embodiment, the first power line 210 distributed in the first sub-frame area AB1 is connected with the isolation structure 12. That is, in the first sub-frame area AB1, the first power line 210 is connected with the isolation structure 12.

[0128] Please refer to Figure 17The display panel 1 further comprises a thin film encapsulation layer 17 covering the light emitting devices 16. In the embodiment, the thin film encapsulation layer 17 comprises a first encapsulation layer 171 comprising a plurality of encapsulation units 1711, different encapsulation units 1711 are used to encapsulate the light emitting devices 16 in different isolated openings 1201, and each encapsulation unit 1711 is used to independently encapsulate the light emitting devices 16 in at least one isolated opening 1201. When the light emitting devices 16 in adjacent isolated openings 1201 are light emitting devices of the same color, the two adjacent encapsulation units 1711 are connected on the side of the isolation structure 12 away from the substrate 11. When the light emitting devices 16 in adjacent isolated openings 1201 are light emitting devices of different colors, the two adjacent encapsulation units 1711 are disconnected on the side of the isolation structure 12 away from the substrate 11.

[0129] Further, referring again to Figure 18 The thin film encapsulation layer 17 further comprises a second encapsulation layer 172 and a third encapsulation layer 173. The second encapsulation layer 172 covers the isolation structure 12 and the light emitting devices 16, and the side of the second encapsulation layer 172 away from the substrate 11 comprises a flat surface. The third encapsulation layer 173 is located on the side of the second encapsulation layer 172 away from the substrate 11. The first encapsulation layer 171 and the third encapsulation layer 173 are inorganic encapsulation layers, and the second encapsulation layer 172 is an organic encapsulation layer. For example, the first encapsulation layer 171 and the third encapsulation layer 173 can be formed by chemical vapor deposition (CVD), and the second encapsulation layer 172 can be formed by ink-jet printing (IJP).

[0130] It can be understood that the display panel 1 can further comprise a touch function layer, an optical adhesive layer, a polarizer, a cover plate and other film layers which are sequentially stacked on the side of the third encapsulation layer 173 away from the substrate 11. The above film layers are conventional film layers of the display panel, and will not be described in detail here.

[0131] Referring again to ​ The edge of the orthographic projection of the thin film encapsulation layer 17 on the substrate 11 is at least partially located within the orthographic projection of the first power line 210 and the second power line 220 on the substrate 11. For example, the edge of the orthographic projection of the thin film encapsulation layer 17 on the substrate 11 is located in the frame area AB, wherein the edge of the orthographic projection of the thin film encapsulation layer 17 at the second sub-frame area AB2, the third sub-frame area AB3 and the fourth sub-frame area AB4 is located within the orthographic projection of the first power line 210 on the substrate 11 in the corresponding sub-frame area. The edge of the orthographic projection of the thin film encapsulation layer 17 at the first sub-frame area AB1 is partially located within the orthographic projection of the first power line 210 and the second power line 220 on the substrate 11 in the corresponding sub-frame area.

[0132] Based on the same inventive concept, the application further provides a display device, which comprises the display panel provided by the application or the display panel prepared by the preparation method of the display panel provided by the embodiment. The display device can comprise a smart phone, a tablet computer, a vehicle-mounted display device, a smart wearable device, a television, a notebook computer or other devices with display function.

[0133] The application provides a display panel, a preparation method of the display panel and a display device. In the display panel, the isolation structure is located on one side of the substrate, the first wiring layer is located between the substrate and the isolation structure, the first wiring layer comprises a first conductive wiring for transmitting a first power signal, and the isolation structure and the first conductive wiring are connected in the display area. In this way, the connection area of the first power signal wiring and the isolation structure is increased in the display area through the first conductive wiring, so as to reduce the connection resistance, reduce the heat generated by the display panel due to the large current in the high-brightness display state, avoid the burn of the display panel caused by the heat, ensure the normal work of the display panel, provide the stability of the work of the display panel, and also reduce the display power consumption of the display panel and improve the endurance of the display device with the display panel.

[0134] The above only describes the preferred embodiments of the application and is not intended to limit the application. The application can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A display panel, characterized by, The display panel comprises a display area and a frame area at least partially surrounding the display area, and further comprises: a substrate; an isolation structure on one side of the substrate; a first wiring layer between the substrate and the isolation structure, the first wiring layer comprising at least one first conductive trace for transmitting a first power signal, in the display area, the isolation structure being connected to the at least one first conductive trace; the first conductive trace extending along a second direction, and a plurality of the first conductive traces being parallel to each other and arranged along a first direction, wherein the first direction and the second direction intersect.

2. The display panel of claim 1, wherein, In the display area, the orthogonal projection of the first conductive trace on the substrate is within the orthogonal projection of the isolation structure on the substrate.

3. The display panel of claim 1, wherein, The display panel further comprises a second wiring layer between the substrate and the first wiring layer, the second wiring layer comprising at least one second conductive trace, the at least one second conductive trace being connected to the at least one first conductive trace, and the second conductive trace extending along the first direction.

4. The display panel of claim 1, wherein the second direction is perpendicular to the first direction.

5. The display panel of claim 3, wherein, the at least one second conductive trace is connected to the at least one first conductive trace through a first via; the first via is located at the overlapping position of the orthogonal projection of the first conductive trace on the substrate and the orthogonal projection of the second conductive trace on the substrate.

6. The display panel of claim 5, wherein, The first wiring layer further comprises at least one second power signal trace, the second power signal trace being parallel to the first conductive trace and insulated from the first conductive trace.

7. The display panel of claim 6, wherein, The display area comprises a first sub-display area and a second sub-display area, the first wiring layer further comprising at least one third conductive trace, the third conductive trace being insulated from the first conductive trace, the first conductive trace being located in the first sub-display area, and the third conductive trace being located in the second sub-display area.

8. The display panel of claim 7, wherein in the first sub-display area, the isolation structure is connected to the at least one first conductive trace, and in the second sub-display area, the second power signal trace is connected to the at least one third conductive trace.

9. The display panel of claim 8, wherein the at least one first conductive trace and the at least one third conductive trace are located in the same column.

10. The display panel of claim 8, wherein the first sub-display area and the second sub-display area are arranged along the second direction.

11. The display panel of claim 3, wherein, The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and an insulating layer between adjacent conductive layers, which are sequentially stacked on the substrate away from the substrate, the first wiring layer being located on the fourth conductive layer, and the second wiring layer being located on the third conductive layer; or, The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer between adjacent conductive layers which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the fifth conductive layer, and the second trace layer is located on the fourth conductive layer.

12. A display panel, characterized by, The display panel comprises a display area and a frame area surrounding the display area at least partially, and further comprises: a substrate; an isolation structure located on one side of the substrate; a first trace layer located between the substrate and the isolation structure, the first trace layer comprising at least one first conductive trace for transmitting a first power signal, in the display area, the isolation structure is connected with the at least one first conductive trace; The display panel further comprises a third trace layer, the third trace layer is located on the side of the first trace layer away from the substrate, the third trace layer comprises at least one second power signal trace, the second power signal trace extends along a second direction, the first conductive trace extends along a first direction, and the first direction intersects the second direction.

13. The display panel of claim 12, wherein, The display area comprises a first sub-display area and a second sub-display area, the first trace layer further comprises at least one fourth conductive trace, the fourth conductive trace is insulated from the first conductive trace, and the fourth conductive trace extends along the second direction; In the first sub-display area, the isolation structure is connected with the at least one first conductive trace, and in the second sub-display area, the second power signal trace is connected with at least one fourth conductive trace.

14. The display panel of claim 13, wherein The first conductive trace is located in the first sub-display area, and the fourth conductive trace is located in the second sub-display area; The first sub-display area and the second sub-display area are arranged along the second direction.

15. The display panel of claim 13, wherein, The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer and an insulating layer between adjacent conductive layers which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the third conductive layer, and the third trace layer is located on the fourth conductive layer; or The display panel further comprises a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and an insulating layer between adjacent conductive layers which are sequentially stacked on the substrate away from the substrate, the first trace layer is located on the fourth conductive layer, and the third trace layer is located on the fifth conductive layer.

16. The display panel of claim 11 or 15, wherein, The display panel further comprises an insulating layer between the isolation structure and the first conductive layer, the insulating layer comprises an insulating layer via, and the isolation structure is connected with the first conductive trace through the insulating layer via; The isolation structure comprises a first isolation part and a second isolation part, the first isolation part and the second isolation part are sequentially stacked in the direction away from the substrate, and the first isolation part is connected with the first conductive trace through the insulating layer via; A projection of the first isolation portion on the substrate is located within a projection of the second isolation portion on the substrate. 17.The display panel of claim 16, wherein, The isolation structure encloses an isolation opening on the substrate, and a cross-sectional shape of the isolation structure is T-shaped in a cross section perpendicular to a plane where the substrate is located and passing through a center of the isolation opening. 18.The display panel of claim 16, wherein, A projection of the insulating layer via on the substrate is located within a projection of an intersection of the isolation structure extending in the first direction and the isolation structure extending in the second direction on the substrate.

19. The display panel of claim 17, wherein, The isolation structure further comprises a third isolation portion, the third isolation portion, the first isolation portion and the second isolation portion are sequentially stacked in a direction away from the substrate. A projection of the first isolation portion on the substrate is located within a projection of the third isolation portion on the substrate, The third isolation portion is connected with the first conductive trace through the insulating layer via. 20.The display panel of claim 19, wherein, A cross-sectional shape of the isolation structure is H-shaped in a cross section perpendicular to a plane where the substrate is located and passing through a center of the isolation opening. 21.The display panel of claim 19, wherein, A material of the first isolation portion comprises aluminum, silver or copper, and / or a material of the second isolation portion comprises titanium or molybdenum, and / or a material of the third isolation portion comprises molybdenum or titanium.

22. The display panel of claim 19, wherein, The insulating layer comprises a pixel defining layer, the pixel defining layer is located between the first conductive layer and the isolation structure, the pixel defining layer comprises a pixel defining layer via, and the isolation structure is connected with the first conductive trace through the pixel defining layer via.

23. The display panel of claim 22, wherein, The insulating layer further comprises a planarization layer, the planarization layer is located between the first conductive layer and the pixel defining layer, the planarization layer comprises a planarization layer via, The isolation structure is connected with the first conductive trace through the pixel defining layer via and the planarization layer via. A projection of the planarization layer via on the substrate is located within a projection of the pixel defining layer via on the substrate.

24. The display panel of claim 23, wherein, A projection of the pixel defining layer via on the substrate and a projection of the planarization layer via on the substrate are located outside a projection of the isolation opening on the substrate. 25.The display panel of claim 24, wherein, A projection of the pixel defining layer via and the planarization layer via on the substrate is located within a projection of an intersection of the isolation structure extending in the first direction and the isolation structure extending in the second direction on the substrate.

26. The display panel of any of claims 1-15, wherein, The display panel further comprises a first power supply line and a second power supply line located in the frame region; The first power supply line is connected with the first conductive trace, and the second power supply line is connected with a second power supply signal trace, wherein a voltage of a first power supply signal provided by the first power supply line is less than a voltage of a second power supply signal provided by the second power supply line.

27. The display panel of claim 26, wherein, The display panel further comprises a light emitting device; The isolation structure encloses an isolation opening on the substrate, and at least part of the light emitting device is located in the isolation opening; In the display area, the light emitting devices are arranged in an array along a first direction and a second direction, and the light emitting devices along the first direction form a pixel row, and a plurality of pixel rows are arranged along the second direction.

28. The display panel of claim 27, wherein, The display panel further comprises a pixel defining layer located on one side of the substrate, and the isolation structure is located on the side of the pixel defining layer away from the substrate, and the pixel defining layer comprises a pixel opening, and at least part of the light emitting device is located in the pixel opening, and the pixel opening is located in the isolation opening; The light emitting device comprises a first electrode, a light emitting material layer and a second electrode, and in the direction away from the substrate, the first electrode, the light emitting material layer and the second electrode are sequentially stacked; At least part of the first electrode is exposed from the position of the pixel opening, and the second electrode is overlapped with the isolation structure.

29. The display panel of claim 27, wherein, The frame area comprises a first sub-frame area, a second sub-frame area, a third sub-frame area and a fourth sub-frame area, wherein the first sub-frame area and the third sub-frame area are oppositely arranged in the second direction, and the second sub-frame area and the fourth sub-frame area are oppositely arranged in the first direction; The first power line is distributed along the second sub-frame area, the third sub-frame area and the fourth sub-frame area, and is distributed in part of the area of the first sub-frame area; The second power line is distributed in the first sub-frame area, and the first power line and the second power line are insulated.

30. The display panel of claim 29, wherein, The first conductive trace is connected with the first power line in at least one of the first sub-frame area, the second sub-frame area, the third sub-frame area and the fourth sub-frame area.

31. The display panel of claim 29, wherein, The first power line distributed in the first sub-frame area is connected with the isolation structure.

32. A display device comprising: The display device comprises the display panel of any one of claims 1-31.

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