Display panel and display device

By providing a first protective structure surrounding the common electrode layer in the peripheral area of ​​the liquid crystal display panel, it prevents the invasion of external water vapor, solves the poor display problem caused by corrosion of the common electrode, and extends the product life.

CN119165695APending Publication Date: 2024-12-20BOE TECHNOLOGY GROUP CO LTD +2
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Patent Information

Application Number
CN202411448366.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-16
Publication Date
2024-12-20

AI Technical Summary

Technical Problem

The common electrodes of existing LCD display panels are prone to corrosion on the outside of the frame sealing glue, causing water vapor to enter the liquid crystal box, causing internal circuit corrosion and poor display, and reducing product life.

Method used

A first protective structure is provided in the peripheral area of ​​the display panel, and is arranged around the display area, and one end is in contact with the common electrode layer and the other end is in contact with the array substrate structure to prevent external water vapor from corrosion and prevent water vapor from invading the inner area of ​​the frame sealing glue.

Benefits of technology

It effectively improves the water vapor corrosion resistance of the peripheral area circuit and extends the service life of the display panel.

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Abstract

The invention discloses a display panel and a display device to solve the problems that in the prior art, due to the fact that a common electrode of a color film substrate is corroded, an internal circuit of the display panel is corroded, display is poor, and the service life of a liquid crystal display product is shortened. The display panel comprises an array substrate structure and an opposite substrate, the array substrate structure comprises an array substrate arranged opposite to the opposite substrate and frame sealing glue located in the peripheral area and used for sealing the array substrate and the opposite substrate. The opposite substrate comprises a first substrate, a common electrode layer located on the side, facing the array substrate, of the first substrate, and a first protection structure located on the side, facing the array substrate, of the common electrode layer. The first protection structure is located in the peripheral area and surrounds the display area; one end of the first protection structure is in contact with the common electrode layer, and the other end of the first protection structure is in contact with the array substrate structure.
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Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] For the vertical alignment (VA) or twisted nematic (TN) display mode, due to the presence of a common electrode on the color film substrate side, the common electrode is prone to corrosion on the outer side of the frame sealant. When the corrosion penetrates deep into the frame sealant, water vapor will enter the liquid crystal box through the corrosion interface, causing corrosion of the internal circuit (especially the via position is most prone to corrosion) and resulting in poor display, thereby reducing the service life of the liquid crystal display product. Summary of the invention

[0003] The present invention provides a display panel and a display device to improve the problem in the prior art that the common electrode of the color film substrate is corroded, which causes the internal circuit of the display panel to corrode, resulting in poor display and shortening the service life of the liquid crystal display product.

[0004] An embodiment of the present invention provides a display panel having a display area and a peripheral area located outside the display area, wherein the display panel comprises: an array substrate structure and an opposing substrate; wherein the array substrate structure comprises: an array substrate arranged opposite to the opposing substrate, and a frame sealant located in the peripheral area and sealing the array substrate and the opposing substrate;

[0005] Among them, the opposing substrate includes: a first substrate, a common electrode layer located on the side of the first substrate facing the array substrate, and a first protective structure located on the side of the common electrode layer facing the array substrate; the first protective structure is located in the peripheral area and is arranged around the display area; one end of the first protective structure is in contact with the common electrode layer, and the other end is in contact with the array substrate structure.

[0006] In a possible implementation, the peripheral area includes: a first peripheral area extending along a first direction, and a second peripheral area connected to the first peripheral area; the first peripheral area is provided with a plurality of binding terminals;

[0007] The first protective structure includes: a first sub-protective structure and a second sub-protective structure; the first sub-protective structure is located in the first peripheral area, and in the orthographic projection of the first substrate, is located on the side of the orthographic projection of the frame sealing glue on the first substrate away from the display area; the second sub-protective structure is located in the second peripheral area, and in the orthographic projection of the first substrate, is located within the orthographic projection of the frame sealing glue on the first substrate.

[0008] In a possible implementation, the array substrate includes: a second substrate, and an insulating layer located on a side of the second substrate facing the opposite substrate;

[0009] The insulating layer has a first groove on a side facing the opposite substrate, and an orthographic projection of the second sub-protection structure on the second substrate overlaps with an orthographic projection of the first groove on the second substrate.

[0010] In a possible implementation manner, the insulating layer includes: a gate insulating layer, and a passivation layer located on a side of the gate insulating layer away from the second substrate;

[0011] The first groove penetrates the gate insulating layer and the passivation layer and exposes the second substrate, and the frame sealing glue fills the first groove.

[0012] In a possible implementation manner, one end of the first sub-protection structure contacts the common electrode layer, and the other end contacts the surface of the insulating layer facing the opposite substrate.

[0013] In a possible implementation manner, the first protection structure is an integrated connection structure surrounding the display area.

[0014] In a possible implementation manner, the orthographic projection of the first protection structure on the first substrate is located within the orthographic projection of the frame sealing adhesive on the first substrate;

[0015] The array substrate comprises: a second substrate, and an insulating layer located on the side of the second substrate facing the opposite substrate; the insulating layer has a second groove on the side facing the opposite substrate, and the orthographic projection of the first protection structure on the second substrate overlaps with the orthographic projection of the second groove on the second substrate.

[0016] In a possible implementation, the first protection structure includes: a first protection portion, and a second protection portion located on a side of the first protection portion away from the display area; an orthographic projection of the first protection portion on the first substrate overlaps with an orthographic projection of the frame sealant on the first substrate; an orthographic projection of the second protection portion on the first substrate is located on a side of the orthographic projection of the frame sealant on the first substrate away from the display area;

[0017] The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the counter substrate; an orthographic projection of an outer edge of the insulating layer on the second substrate overlaps an outer edge of the first protection portion facing the display area.

[0018] In a possible implementation manner, the orthographic projection of the first protection structure on the first substrate is located on a side of the orthographic projection of the frame sealant on the first substrate away from the display area;

[0019] The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the opposite substrate; an end of the first protection structure facing the array substrate contacts a surface of the insulating layer facing the opposite substrate.

[0020] In a possible implementation, the array substrate includes: a second substrate, a gate line layer located on one side of the second substrate, a data line layer located on a side of the gate line layer away from the second substrate, a pixel electrode layer located on a side of the data line layer away from the gate line layer, and a second protection structure located on a side of the pixel electrode layer away from the data line layer;

[0021] The orthographic projection of the second protection structure on the second substrate at least covers the area between the display area and the frame sealant.

[0022] In a possible implementation manner, a plurality of binding terminals are provided in the peripheral area; and the orthographic projection of the second protection structure on the second substrate covers the area outside the binding terminals.

[0023] In a possible implementation manner, the orthographic projection of the second protection structure on the second substrate only covers the area between the display area and the frame sealing adhesive.

[0024] In a possible implementation manner, the orthographic projection of the second protection structure on the second substrate covers the display area and covers the area between the display area and the frame sealant;

[0025] The display panel includes: a plurality of sub-pixel rows extending along a first direction and arranged along a second direction; the second protective structure includes: a plurality of shielding portions extending along the first direction and arranged along the second direction, and a hollow portion located between the adjacent shielding portions; the orthographic projection of the hollow portion on the second substrate overlaps with the orthographic projection of the sub-pixel row on the second substrate, and the orthographic projection of the shielding portion on the second substrate overlaps with the orthographic projection of the sub-pixel row on the second substrate.

[0026] In a possible implementation manner, the counter substrate includes a plurality of first spacers; and the material of the first protection structure and the first spacers are in the same layer and material.

[0027] In a possible implementation, the counter substrate further includes: a color resist portion located on a side of the common electrode layer facing the first substrate; an orthographic projection of the color resist portion on the first substrate overlaps with an orthographic projection of the first protection structure on the first substrate.

[0028] In a possible implementation manner, the first spacer includes: a first sub-spacer and a second sub-spacer; the height of the first sub-spacer is greater than the height of the second sub-spacer;

[0029] The array substrate further includes: a third sub-spacer and a fourth sub-spacer, and the height of the third sub-spacer is greater than the height of the fourth sub-spacer.

[0030] In a possible implementation, the counter substrate includes: a first black matrix layer located on a side of the common electrode layer facing the first substrate; the first black matrix layer includes: a plurality of first black matrix portions extending along a first direction, and a plurality of second black matrix portions extending along a second direction;

[0031] The array substrate also includes: a plurality of third black matrix portions extending along the first direction, and a plurality of fourth black matrix portions extending along the second direction; the orthographic projection of the third black matrix portion on the first substrate overlaps with the orthographic projection of the first black matrix portion on the first substrate; the orthographic projection of the fourth black matrix portion on the first substrate overlaps with the orthographic projection of the second black matrix portion on the first substrate.

[0032] An embodiment of the present invention further provides a display device, comprising the display panel provided by the embodiment of the present invention.

[0033] The beneficial effects of the embodiments of the present invention are as follows: In the embodiments of the present invention, a first protective structure is provided on the side of the common electrode layer of the counter substrate facing the array substrate; the first protective structure is arranged around the display area, with one end in contact with the common electrode layer and the other end in contact with the array substrate structure, which can block external water vapor from corroding the common electrode layer of the counter substrate, and prevent external water vapor from invading the area inside the frame sealant along the corroded interface of the common electrode layer, further corroding the circuit in the peripheral area inside the display panel frame sealant 3, and improving the ability of the vias in the circuit in the peripheral area to resist water vapor corrosion, thereby improving the reliability of the display panel and extending the product life. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1A One of the schematic top views of a display panel provided by an embodiment of the present invention;

[0035] Figure 1B for Figure 1A A schematic cross-sectional view along the dotted line AB in FIG.

[0036] Figure 1C for Figure 1A Schematic diagram of the cross section along the dotted line CD;

[0037] Figure 2A A second schematic top view of a display panel provided by an embodiment of the present invention;

[0038] Figure 2B for Figure 2A A schematic cross-sectional view along the dashed line AB in FIG.

[0039] Figure 3A A third schematic top view of a display panel provided in an embodiment of the present invention;

[0040] Figure 3B for Figure 3A A schematic cross-sectional view along the dashed line AB in FIG.

[0041] Figure 4A A fourth schematic top view of a display panel provided by an embodiment of the present invention;

[0042] Figure 4B for Figure 4A A schematic cross-sectional view along the dashed line AB in FIG.

[0043] Figure 5A A fifth schematic top view of a display panel provided by an embodiment of the present invention;

[0044] Figure 5B for Figure 5A Schematic diagram of the cross section at the via;

[0045] Figure 5C is one of the schematic diagrams when the second protection structure 16 is formed;

[0046] Figure 5D The second schematic diagram of forming the second protection structure 16;

[0047] Fig. 6A A sixth schematic top view of a display panel provided in an embodiment of the present invention;

[0048] Figure 6B for Fig. 6A Schematic diagram of the cross section at the via;

[0049] Fig. 7A A seventh schematic top view of a display panel provided by an embodiment of the present invention;

[0050] Figure 7B for Fig. 7A Schematic diagram of the second protection structure;

[0051] Figure 7C for Fig. 7A A magnified schematic diagram of a single sub-pixel in FIG.

[0052] Fig.7D for Fig. 7A Schematic diagram of the cross section at the via;

[0053] Figure 8 An eighth schematic diagram of a display panel provided by an embodiment of the present invention;

[0054] Fig.9A An enlarged schematic diagram of a sub-pixel provided by an embodiment of the present invention;

[0055] Fig. 9B for Fig.9A A schematic cross-sectional view along the dashed line AB in FIG.

[0056] Fig. 9C for Fig.9A Schematic diagram of the cross section along the dotted line CD in the figure. DETAILED DESCRIPTION

[0057] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0058] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0059] As used herein, "approximately" or "substantially the same" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "substantially the same" may mean that the difference relative to the stated value is within one or more standard deviations, or within ±30%, 20%, 10%, 5%.

[0060] In the accompanying drawings, the thickness of layers, films, panels, regions, etc., is exaggerated for clarity. Exemplary embodiments are described herein with reference to cross-sectional views as schematic diagrams of idealized embodiments. In this way, deviations from the shapes of the figures as a result of, for example, manufacturing techniques and / or tolerances will be expected. Thus, the embodiments described herein should not be interpreted as being limited to the specific shapes of the regions as shown herein, but include deviations in shape caused by, for example, manufacturing. For example, a region illustrated or described as flat may typically have rough and / or nonlinear features. In addition, the illustrated sharp corners may be rounded. Thus, the regions shown in the figures are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the regions, and are not intended to limit the scope of the claims.

[0061] In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of well-known functions and well-known components.

[0062] See also Figure 1A-Figure 1C As shown, Figure 1B for Figure 1A Schematic diagram of the cross section along the dotted line AB, Figure 1C for Figure 1A In the cross-sectional schematic diagram along the dotted line CD, an embodiment of the present invention provides a display panel, having a display area AA and a peripheral area BB located outside the display area AA, the display panel comprises: an array substrate structure 10 and an opposite substrate 2; wherein the array substrate structure 10 comprises: an array substrate 1 arranged opposite to the opposite substrate 2, and a sealing glue 3 located in the peripheral area BB and sealing the array substrate 1 and the opposite substrate 2;

[0063] Among them, the opposing substrate 2 includes: a first substrate 21, a common electrode layer 22 located on the side of the first substrate 21 facing the array substrate 1, and a first protective structure 23 located on the side of the common electrode layer 22 facing the array substrate 1; the first protective structure 23 is located in the peripheral area BB, and at least part of the first protective structure is arranged around the display area AA; one end of the first protective structure 23 is in contact with the common electrode layer 22 (it can be direct contact or indirect contact, for example, other film layers are also arranged between the common electrode layer and the first protective structure, such as an alignment film, etc.), and the other end is in contact with the array substrate structure 10.

[0064] In the embodiment of the present invention, a first protective structure 23 is provided on the side of the common electrode layer 22 of the counter substrate 2 facing the array substrate 1; the first protective structure 23 is at least partially arranged around the display area AA, one end of which is in contact with the common electrode layer 22, and the other end of which is in contact with the array substrate structure 1, so as to block external water vapor from corroding the common electrode layer 22 of the counter substrate 2, and prevent external water vapor from invading the area inside the frame sealant 3 along the corroded interface of the common electrode layer 22, and further corroding the circuit of the peripheral area BB inside the display panel frame sealant 3, thereby improving the ability of the vias in the circuit of the peripheral area BB to resist water vapor corrosion, thereby improving the reliability of the display panel and extending the product life.

[0065] In a specific implementation, the inner peripheral area BB of the frame sealant 3 facing the display area AA side and / or the area where the frame sealant 3 is located may have a variety of vias (not shown in the figure), for example, may include a plurality of first vias, a plurality of second vias, and a plurality of third vias; wherein the first via may be located in the gate drive circuit GOA, that is, the display panel may be provided with a gate drive circuit GOA in the peripheral area BB and / or the area where the frame sealant 3 is located, and the gate drive circuit GOA may include a plurality of transistors, a plurality of capacitors and a plurality of signal wirings, wherein the transistors, and / or the capacitors, and / or part of the film layers in the signal wirings may be electrically connected through the first vias; the second via may be located in the gate drive circuit GOA. The output end of the gate driving circuit GOA, that is, at the output end of the gate driving circuit GOA, the output line of the gate driving circuit GOA and the gate line transition point of the display area AA can be electrically connected through the second via hole; the third via hole can be located in the fan-out area of ​​the display panel, that is, in the fan-out area of ​​the display panel, the data line can be transferred to the layer where the gate line is located through the third via hole; in the embodiment of the present disclosure, the first protective structure 23 can prevent external water vapor from invading the first via hole, the second via hole and / or the third via hole along the corroded interface of the common electrode layer 22, and improve the ability of the first via hole, the second via hole and / or the third via hole in the peripheral area BB to resist water vapor corrosion, thereby improving the reliability of the display panel and extending the product life.

[0066] In one possible implementation, see Figure 1A-Figure 1CAs shown, the peripheral area BB includes: a first peripheral area BB1 extending along a first direction X, and a second peripheral area BB2 connected to the first peripheral area BB1; the first peripheral area BB1 is provided with a plurality of binding terminals (not shown in the figure); the first protective structure 23 includes: a first sub-protective structure 231, and a second sub-protective structure 232; the first sub-protective structure 231 is located in the first peripheral area BB1, and is located on the side of the orthographic projection of the first substrate 21 away from the display area AA, that is, the first sub-protective structure 231 is located in the area outside the frame sealant 3; the second sub-protective structure 232 is located in the second peripheral area BB2, and is located in the orthographic projection of the first substrate 1, and is located within the orthographic projection of the frame sealant 3 on the first substrate 21, that is, the second sub-protective structure 232 is located in the area where the frame sealant 3 is located.

[0067] In a possible embodiment, the first sub-protective structure 231 may be located on one side of the display area BB, that is, the binding area where the binding terminal is located; the second sub-protective structure 232 may be a frame-shaped structure surrounding the display area BB with an opening toward the side of the binding area, and the first sub-protective structure 231 and the second sub-protective structure 232 form an overall structure surrounding the display area AA.

[0068] In a possible embodiment, the first peripheral area BB1 can be located on a side where multiple binding terminals are located, for example, the first peripheral area BB1 can be a lower border area of ​​the display panel; the second peripheral area BB2 can be other peripheral areas other than the first peripheral area BB1, for example, the second peripheral area BB2 can be an upper border area, a left border area and a right border area of ​​the display panel.

[0069] In one possible implementation, see Figure 1A-Figure 1C As shown, the array substrate 1 includes: a second substrate 11, and an insulating layer 13 located on the side of the second substrate 11 facing the opposing substrate 2; the insulating layer 13 has a first groove F1 on the side facing the opposing substrate 2, and the orthographic projection of the second sub-protection structure 232 on the second substrate 11 overlaps with the orthographic projection of the first groove F1 on the second substrate 11.

[0070] In the embodiment of the present invention, the first sub-protective structure 231 is located in the area outside the frame glue 3, the second sub-protective structure 232 is located in the partial area where the frame glue 3 is located, and the array substrate 1 is grooved at the position corresponding to the second sub-protective structure 232 to form a first groove F1, which can prevent the second sub-protective structure 232 located at the position of the frame glue 3 from causing the gap between the liquid crystal boxes at this position to be too large after the top frame glue 3 is applied, thereby causing the problem of uneven display brightness; and for the first sub-protective structure 231 located in the area outside the frame glue 3, since the area where the first sub-protective structure 231 is located has a fan-out wiring extending from the display area AA to the binding terminal position, the array substrate 1 does not need to be grooved at the position of the first sub-protective structure 231, thereby avoiding the problem that when the groove is dug in this area, the fan-out wiring will be exposed, which will easily cause the fan-out wiring to be corroded by water vapor and affect the display of the display panel.

[0071] In one possible implementation, see Figure 1A-Figure 1C As shown, the second sub-protective structure 232 may have an outer edge w1 extending along the second direction Y, and the extension line of the outer edge w1 may overlap with the first sub-protective structure 231, that is, in the second direction Y, the second sub-protective structure 232 and the first sub-protective structure 231 may have an overlapping area, so that the combination of the two can form a closed structure on the periphery of the display area AA to prevent the intrusion of external water vapor.

[0072] In one possible implementation, see Figure 1A-Figure 1C As shown, the insulating layer 13 includes: a gate insulating layer 131, and a passivation layer 132 located on the side of the gate insulating layer 131 away from the second substrate 11; the first groove F1 penetrates the gate insulating layer 131 and the passivation layer 132, and exposes the second substrate 11, and the frame sealant 3 fills the first groove F. In the embodiment of the present invention, the first groove F1 penetrates the gate insulating layer 131 and the passivation layer 132, and exposes the second substrate 11, which is easy to prepare during the process preparation process, and can make the insulating material frame sealant 3 and / or the second sub-protection structure 232 penetrate a longer area in a direction perpendicular to the second substrate 21, and have a better water vapor blocking effect.

[0073] Optionally, the insulating layer 13 may also include other film layers as long as it can form a recessed area on the array substrate 1 at the position of the second sub-protection structure 232; optionally, the first groove F1 may only penetrate a portion of the insulating layer 13, for example, the first groove F1 may only penetrate the passivation layer 132, or may only penetrate the gate insulating layer 131.

[0074] In one possible implementation, see Figure 1A-Figure 1CAs shown, one end of the first sub-protective structure 231 is in contact with the common electrode layer 22, and the other end is in contact with the surface of the insulating layer 13 facing the opposite substrate 1. That is, in the embodiment of the present invention, for the first sub-protective structure 231 located in the area outside the sealant 3, the array substrate 1 may not be grooved in the area, and the first sub-protective structure 231 is in contact with the upper surface of the insulating layer 13 of the array substrate 1 to form a sealing structure, which works together with the sealant 3 to play a secondary blocking role against external water vapor; moreover, the first sub-protective structure 231 does not overlap with the sealant 3, and will not affect the adhesion of the sealant 3.

[0075] In one possible implementation, see Figure 2A , Figure 2B , Figure 3A , Figure 3B , Figure 4A , Figure 4B As shown, the first protection structure 23 may also be an integrated connection structure surrounding the display area AA.

[0076] In one possible implementation, see Figure 2A , Figure 2B As shown, the orthographic projection of the first protective structure 23 on the first substrate 21 is located within the orthographic projection of the sealant 3 on the first substrate 21; the array substrate 1 includes: a second substrate 11, and an insulating layer 13 located on the side of the second substrate 11 facing the opposite substrate 2; the insulating layer 13 has a second groove F2 on the side facing the opposite substrate 2, and the orthographic projection of the first protective structure 23 on the second substrate 11 overlaps with the orthographic projection of the second groove F2 on the second substrate 11. In the embodiment of the present invention, the first protective structure 23 is an integrated structure located in the area where the sealant 3 is located, and the array substrate 1 has a second groove F2 at a position corresponding to the first protective structure 23 to prevent the first protective structure 23 from causing the gap of the liquid crystal box at this position to be too large after the sealant 3 is pressed against the top, causing the problem of uneven display brightness.

[0077] In one possible implementation, see Figure 3A , Figure 3B As shown, the first protection structure 23 includes: a first protection portion 2301, and a second protection portion 2302 located on the side of the first protection portion 2301 away from the display area AA; the orthographic projection of the first protection portion 2301 on the first substrate 21 overlaps with the orthographic projection of the frame sealant 3 on the first substrate 21; the orthographic projection of the second protection portion 2302 on the first substrate 21 is located on the side of the orthographic projection of the frame sealant 3 on the first substrate 21 away from the display area AA; the array substrate 1 includes: a second substrate 11, and an insulating layer 13 located on the side of the second substrate 11 facing the opposite substrate 2; the outer edge w2 of the insulating layer 13 on the orthographic projection of the second substrate 11 overlaps with the outer edge w3 of the first protection portion 2301 on the side facing the display area AA.

[0078] In the embodiment of the present invention, the first protective structure 23 is covered at the peripheral position on the opposite substrate 1 side, starting from the display substrate cutting line (the cutting line for cutting the motherboard into multiple display substrates), extending to the inside of the side of the frame glue 3 facing the display area AA, and is an integrated connection structure surrounding the display area AA, which can also better prevent the invasion of external water vapor; moreover, the outer edge w2 of the insulating layer 13 is the orthographic projection of the second substrate 11, and overlaps with the outer edge w3 of the first protective portion 2301 facing the display area AA, that is, the array substrate 1 digs out the insulating layer 13 in the area where the first protective structure 23 is located, which can prevent the first protective structure 23 located at the position of the frame glue 3 from making the gap between the liquid crystal boxes at this position too large after the top frame glue 3 is applied, causing the problem of uneven display brightness.

[0079] Optionally, the orthographic projection of the outer edge w2 of the insulating layer 13 on the second substrate 11 coincides with the outer edge w3 of the first protection portion 2301 on the side facing the display area AA.

[0080] In one possible implementation, see Figure 4A , Figure 4B As shown, the first protective structure 23 is the orthographic projection of the first substrate 21, and is located on the side of the sealing glue 3 on the first substrate 21 that is away from the display area AA; the array substrate 1 includes: a second substrate 11, and an insulating layer 13 located on the side of the second substrate 11 facing the opposite substrate 2; one end of the first protective structure 23 facing the array substrate 1 is in contact with the surface of the insulating layer 13 facing the opposite substrate 2.

[0081] In the embodiment of the present invention, a first protective structure 23 is designed between the frame-sealing glue 3 and the cutting line, so that the first protective structure 23 is in contact with the insulating layer 13 on the side of the array substrate 1, which can achieve a near-sighted sealing effect and prevent water vapor and corrosive liquids from corroding the common electrode layer 22 of the opposite substrate 2; and the first protective structure 23 is not in contact with the frame-sealing glue 3, and will not affect the adhesion of the frame-sealing glue 3, so that the frame-sealing glue 3 has a good sealing effect.

[0082] In one possible implementation, see Figure 4A , Figure 4BAs shown, the opposing substrate 2 further includes: a color resist portion 250 located on the side of the common electrode layer 22 facing the first substrate 21; the orthographic projection of the color resist portion 250 on the first substrate 21 overlaps with the orthographic projection of the first protective structure 23 on the first substrate 21; optionally, the opposing substrate 2 may further be provided with a plurality of first spacers PS1 at the position of the display area AA, and at least one end of some of the first spacers PS1 facing the array substrate 1 is in contact with the film layer of the array substrate 1; the opposing substrate 2 may further be provided with a plurality of first spacers PS1 at the position of the display area AA and corresponding to the first spacers PS1 A color resist portion 250 is provided; a first color resist 25 may also be provided on the opposing substrate 2 at the position of the first protective structure 23 (the material of the first color resist 25 may be the same as the material of the color resist portion 250, and may be any one of red, green and blue resists), the first protective structure 23 and the first color resist 25 are stacked, and the first spacer PS1 in the display area AA is consistent with the color resist portion 250, so that the first protective structure 23 is in contact with the insulating layer 13 on the array substrate 1 side with a minor improvement on the mask plate, which can achieve a near-sighted sealing effect.

[0083] In one possible implementation, see Figure 5A , Figure 5B , Fig. 6A , Figure 6B , Fig. 7A , Figure 7B As shown, the array substrate 1 includes: a second substrate 11, a gate line layer 12 located on one side of the second substrate 11, a data line layer 14 located on the side of the gate line layer 12 away from the second substrate 11, a pixel electrode layer 15 located on the side of the data line layer 14 away from the gate line layer 12, and a second protective structure 16 located on the side of the pixel electrode layer 15 away from the data line layer 14; the second protective structure 16 is an orthographic projection of the second substrate 11, covering at least the area between the display area AA and the frame sealant 3.

[0084] In the embodiment of the present invention, for the array substrate 1, a second protective structure 16 may be provided on the side of the pixel electrode layer 15 away from the data line layer 14, and the second protective structure 16 at least covers the area between the display area AA and the frame sealant 3, that is, covers the peripheral area BB within the frame sealant 3, so as to protect the circuits and / or vias within the frame sealant 3, and prevent external water vapor from invading the area within the frame sealant 3 along the corroded common electrode layer 23, thereby causing corrosion to the circuits and / or vias within the frame sealant 3.

[0085] In one possible implementation, combining Figure 5BAs shown, the gate line layer 12 may include a plurality of gate lines and a plurality of first conductive portions 122; the data line layer 14 may include a plurality of data lines and a plurality of second conductive portions 142; the pixel electrode layer 15 may include a plurality of pixel electrodes and a transition portion 152; the first conductive portion 122 and the second conductive portion 142 may be electrically connected through the transition portion 152 through the hole K; the via K may include a first sub-via hole K11 and a second sub-via hole K12; the first sub-via hole K11 exposes the first conductive portion 122, and the second sub-via hole K12 exposes the first conductive portion 122. 12 exposes the second conductive part 142, the transfer part 152 covers the first sub-via K11 and the second sub-via K12, and electrically connects the first conductive part 122 with the second conductive part 142; the first conductive part 122 and the second conductive part 142 can be electrodes and / or wiring in the gate drive circuit GOA; the first conductive part 122 and the second conductive part 142 can also be wiring and / or gate line at the output end of the gate drive circuit GOA; the first conductive part 122 and the second conductive part 142 can also be data lines and / or fan-out area wiring.

[0086] In a possible implementation, the second protection structure 16 can be a protection layer (PRO), which can be an organic film layer, a passivation layer (the material can protect SiNx, SiOx) or other insulating transparent materials that can be used as a protection layer. If it is an organic film layer, the process only needs exposure and development; if it is a passivation layer, it needs exposure, development, etching, peeling and other processes. In addition, the protection layer can also use a half-tone mask (Half Tone Mask) with the pixel electrode layer below, such as Figure 5C and Figure 5D As shown, two layers are exposed once, and there is no need to increase the number of exposures (Half Tone Mask process flow: Mask exposure → first development (all photoresist PR in the fully exposed area is removed, and only part of the half-exposed area is removed) → first etching (the PRO layer and pixel electrode layer in the non-photoresist area need to be etched, such as Figure 5C As shown) → ashing (remove the photoresist PR in the half exposure area) → second etching (etch only the PRO layer) → peel off the photoresist PRO, as shown Figure 5D shown).

[0087] In one possible implementation, see Figure 5A , Figure 5B , Fig. 6A , Figure 6B , Fig. 7A , Figure 7B As shown, the peripheral area BB is provided with a plurality of binding terminals Pin; the second protection structure 16 is an orthographic projection of the second substrate 11, covering the area outside the binding terminals Pin. In this way, when the second protection structure 16 covers the binding terminals Pin, it is prevented from affecting the binding electrical connection between the binding terminals Pin and the outside world.

[0088] In one possible implementation, see Fig. 6A and Figure 6B As shown, the orthographic projection of the second protective structure 16 on the second substrate 11 only covers the area between the display area AA and the frame sealant 3. In the embodiment of the present invention, there is no second protective structure 16 outside the display area AA and the frame sealant 3. The second protective structure 16 only covers the vias in the peripheral area of ​​the frame sealant facing the display area AA side. At this time, the second protective structure 16 can be an organic film, a passivation layer, a black matrix, a color resist layer, a spacer layer, or other insulating materials that can be used as a protective layer (can be non-transparent materials). If the second protective structure 16 is made of the material of the black matrix layer, the array substrate and the opposite substrate will have a black matrix layer at the same time.

[0089] In one possible implementation, see Figure 7A-7D As shown, the orthographic projection of the second protective structure 16 on the second substrate 11 covers the display area AA, and covers the area between the display area AA and the frame sealant 3; the display panel includes: a plurality of sub-pixel rows extending along the first direction X and arranged along the second direction Y; the second protective structure 16 includes: a plurality of shielding portions 161 extending along the first direction X and arranged along the second direction Y, and a hollow portion 162 located between adjacent shielding portions 161; the orthographic projection of the hollow portion 162 on the second substrate 11 overlaps with the portion of the orthographic projection of the sub-pixel row on the second substrate 11, and the orthographic projection of the shielding portion 161 on the second substrate 11 overlaps with the portion of the orthographic projection of the sub-pixel row on the second substrate 11.

[0090] In the embodiment of the present invention, Fig. 6A The difference between the display panel shown in FIG. 1 and FIG. 2 is that the second protection structure 16 is not completely removed from the display area AA, but a portion of the pixel area is retained, so that the pixel is divided into two types of cell gaps (eg, Fig.7D As shown, there is a first cell gap Gap1 where the second protection structure 16 is covered, and a second cell gap Gap2 where the second protection structure 16 is not covered. The two cell gaps can enable the sub-pixels to form a multi-domain display effect and improve the problem of pixel color deviation.

[0091] In one possible implementation, see Figure 7C As shown, the display panel includes a gate line 121, a data line 141, and a pixel electrode 151; the shielding portion 161 covers a portion of the pixel electrode 151 and exposes a portion of the pixel electrode 151, so that the display panel forms two types of cell gaps at the sub-pixel position.

[0092] In a specific implementation, the second protection structure 16 may be provided on the array substrate 1 to protect the peripheral circuits and vias of the display area AA.

[0093] In a possible implementation, the display panel may include a first protection structure 23 surrounding the display area AA, or may include multiple first protection structures 23 surrounding the display area AA.

[0094] In one possible implementation, see Figure 8 As shown, the counter substrate 2 includes a plurality of first spacers PS1 ; the material of the first protection structure 23 can be the same layer and material as the first spacers PS1 .

[0095] In one possible implementation, see Figure 8 As shown, the first spacer PS1 includes: a first sub-spacer PS11, and a second sub-spacer PS12; the height h1 of the first sub-spacer PS11 is greater than the height h2 of the second sub-spacer PS12; the array substrate 1 also includes: a third sub-spacer PS3, and a fourth sub-spacer PS4, and the height h3 of the third sub-spacer PS3 is greater than the height h4 of the fourth sub-spacer PS4. In the embodiment of the present invention, the counter substrate 2 is provided with spacers of two heights, and the array substrate 1 is provided with spacers of two heights, which can improve the pressure resistance performance of the display panel and the liquid crystal safety range (LC Margin) of the display panel.

[0096] In one possible implementation, see Figure 9A-9C As shown, the counter substrate 2 includes: a first black matrix layer 24 located on the side of the common electrode layer 22 facing the first substrate 21; the first black matrix layer 24 includes: a plurality of first black matrix portions 241 extending along the first direction X, and a plurality of second black matrix portions 242 extending along the second direction Y; the array substrate 1 also includes: a plurality of third black matrix portions 243 extending along the first direction X, and a plurality of fourth black matrix portions 244 extending along the second direction Y; the orthographic projection of the third black matrix portion 243 on the first substrate 21 overlaps with the orthographic projection of the first black matrix portion 241 on the first substrate 21; the orthographic projection of the fourth black matrix portion 244 on the first substrate 21 overlaps with the orthographic projection of the second black matrix portion 242 on the first substrate 21.

[0097] In an embodiment of the present invention, the opposing substrate 2 is provided with a black matrix layer, and the array substrate 1 is also provided with a black matrix layer, that is, a double-layer black matrix design is adopted, so that the size of the black matrix is ​​not affected by the alignment accuracy of the array substrate 1 and the opposing substrate 2, and the size of the black matrix of the opposing substrate 2 and the array substrate 1 can be reduced, the aperture ratio of the display panel is increased, and the transmittance of the display panel is improved.

[0098] Based on the same inventive concept, an embodiment of the present invention further provides a display device, including a display panel provided by an embodiment of the present invention. The implementation of the display device can refer to the embodiment of the display panel above, and the repeated parts will not be repeated.

[0099] In specific implementation, in the embodiments of the present disclosure, the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, etc. Other essential components of the display device are well understood by those skilled in the art, and are not described in detail here, nor should they be used as limitations to the present disclosure.

[0100] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0101] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A display panel comprising a display area and a peripheral area located outside the display area, characterized in that: The display panel comprises: an array substrate structure and an opposite substrate; wherein the array substrate structure comprises: an array substrate arranged opposite to the opposite substrate, and a frame sealant located in the peripheral area to seal the array substrate and the opposite substrate; Among them, the opposing substrate includes: a first substrate, a common electrode layer located on the side of the first substrate facing the array substrate, and a first protective structure located on the side of the common electrode layer facing the array substrate; the first protective structure is located in the peripheral area and is at least partially arranged around the display area; one end of the first protective structure is in contact with the common electrode layer, and the other end is in contact with the array substrate structure.

2. The display panel according to claim 1, wherein: The peripheral area includes: a first peripheral area extending along a first direction, and a second peripheral area connected to the first peripheral area; the first peripheral area is provided with a plurality of binding terminals; The first protective structure includes: a first sub-protective structure and a second sub-protective structure; the first sub-protective structure is located in the first peripheral area, and in the orthographic projection of the first substrate, is located on the side of the orthographic projection of the frame sealing glue on the first substrate away from the display area; the second sub-protective structure is located in the second peripheral area, and in the orthographic projection of the first substrate, is located within the orthographic projection of the frame sealing glue on the first substrate.

3. The display panel according to claim 2, wherein: The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the opposite substrate; The insulating layer has a first groove on a side facing the opposite substrate, and an orthographic projection of the second sub-protection structure on the second substrate overlaps with an orthographic projection of the first groove on the second substrate.

4. The display panel according to claim 3, wherein: The insulating layer comprises: a gate insulating layer, and a passivation layer located on a side of the gate insulating layer away from the second substrate; The first groove penetrates the gate insulating layer and the passivation layer and exposes the second substrate, and the frame sealing glue fills the first groove.

5. The display panel according to claim 3 or 4, characterized in that: One end of the first sub-protection structure contacts the common electrode layer, and the other end contacts the surface of the insulating layer facing the opposite substrate.

6. The display panel according to claim 1, wherein: The first protection structure is an integrated connection structure surrounding the display area.

7. The display panel according to claim 6, wherein: The orthographic projection of the first protection structure on the first substrate is located within the orthographic projection of the frame sealant on the first substrate; The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the opposite substrate; The insulating layer has a second groove on a side facing the opposite substrate, and an orthographic projection of the first protection structure on the second substrate overlaps with an orthographic projection of the second groove on the second substrate.

8. The display panel according to claim 6, wherein: The first protection structure comprises: a first protection portion, and a second protection portion located on a side of the first protection portion away from the display area; an orthographic projection of the first protection portion on the first substrate overlaps with an orthographic projection of the frame sealant on the first substrate; an orthographic projection of the second protection portion on the first substrate is located on a side of the orthographic projection of the frame sealant on the first substrate away from the display area; The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the counter substrate; an orthographic projection of an outer edge of the insulating layer on the second substrate overlaps an outer edge of the first protection portion facing the display area.

9. The display panel according to claim 6, wherein: The orthographic projection of the first protection structure on the first substrate is located on a side of the orthographic projection of the frame sealant on the first substrate away from the display area; The array substrate comprises: a second substrate, and an insulating layer located on a side of the second substrate facing the opposite substrate; One end of the first protection structure facing the array substrate contacts a surface of the insulation layer facing the opposite substrate.

10. The display panel according to claim 1, wherein: The array substrate comprises: a second substrate, a gate line layer located on one side of the second substrate, a data line layer located on a side of the gate line layer away from the second substrate, a pixel electrode layer located on a side of the data line layer away from the gate line layer, and a second protection structure located on a side of the pixel electrode layer away from the data line layer; The orthographic projection of the second protection structure on the second substrate at least covers the area between the display area and the frame sealant.

11. The display panel according to claim 10, wherein: The peripheral area is provided with a plurality of binding terminals; the orthographic projection of the second protection structure on the second substrate covers the area outside the binding terminals.

12. The display panel according to claim 10, wherein: The orthographic projection of the second protection structure on the second substrate only covers the area between the display area and the frame sealing glue.

13. The display panel according to claim 10, wherein: The orthographic projection of the second protection structure on the second substrate covers the display area and the area between the display area and the frame sealant; The display panel includes: a plurality of sub-pixel rows extending along a first direction and arranged along a second direction; the second protective structure includes: a plurality of shielding portions extending along the first direction and arranged along the second direction, and a hollow portion located between the adjacent shielding portions; the orthographic projection of the hollow portion on the second substrate overlaps with the orthographic projection of the sub-pixel row on the second substrate, and the orthographic projection of the shielding portion on the second substrate overlaps with the orthographic projection of the sub-pixel row on the second substrate.

14. The display panel according to claim 1, wherein: The opposite substrate includes a plurality of first spacers; the material of the first protection structure is in the same layer and material as the first spacers.

15. The display panel according to claim 14, wherein: The opposite substrate further includes: a color resist portion located on a side of the common electrode layer facing the first substrate; an orthographic projection of the color resist portion on the first substrate overlaps with an orthographic projection of the first protection structure on the first substrate.

16. The display panel according to claim 14, wherein: The first spacer includes: a first sub-spacer and a second sub-spacer; the height of the first sub-spacer is greater than the height of the second sub-spacer; The array substrate further includes: a third sub-spacer and a fourth sub-spacer, and the height of the third sub-spacer is greater than the height of the fourth sub-spacer.

17. The display panel according to claim 1, wherein: The counter substrate comprises: a first black matrix layer located on the side of the common electrode layer facing the first substrate; the first black matrix layer comprises: a plurality of first black matrix portions extending along a first direction, and a plurality of second black matrix portions extending along a second direction; The array substrate also includes: a plurality of third black matrix portions extending along the first direction, and a plurality of fourth black matrix portions extending along the second direction; the orthographic projection of the third black matrix portion on the first substrate overlaps with the orthographic projection of the first black matrix portion on the first substrate; the orthographic projection of the fourth black matrix portion on the first substrate overlaps with the orthographic projection of the second black matrix portion on the first substrate.

18. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-17.