Chip manufacturing detection method based on feedback analysis

Abstract

The invention discloses a chip manufacturing detection method based on feedback analysis, and the method comprises the steps: firstly, collecting chip image data and performance feedback data in a production cycle; performing defect feature extraction on a plurality of sub-regions divided from the overall region of the chip through a global recognition model; according to a similarity principle, combining adjacent and similar sub-regions to form a defect region, and combining performance feedback data to screen out a region with performance defects as an analysis region; then, a local recognition model is dynamically constructed for the analysis area and is trained; and in the next production cycle, performing defect analysis on the analysis area by using the local recognition model, performing defect analysis on the non-analysis area by using the global recognition model, and dynamically adjusting the change of the local recognition model and the analysis area according to new performance feedback data. Therefore, effective monitoring and efficient management of defects in the chip production process are realized, and meanwhile, dynamic monitoring of the manufacturing quality and the defects of the dynamically controlled chip is realized.

Description

Technical Field

[0001] The present invention relates to the field of chip detection and analysis, and more specifically, to a chip manufacturing detection method based on feedback analysis. Background Art

[0002] With the rapid development of semiconductor technology, chip manufacturing processes are becoming increasingly complex, placing higher demands on the monitoring, analysis, and optimization of the manufacturing process. Traditional chip manufacturing detection methods often rely on manual sampling and empirical judgment, and have problems such as low detection efficiency, slow response speed, and delayed problem discovery. At the same time, the performance feedback data generated after chip manufacturing has not been fully utilized, resulting in potential problems in the chip manufacturing process being difficult to discover in a timely manner. At the same time, existing technologies lack the ability to dynamically analyze chip manufacturing defects, and often use a fixed model for chip detection, which is difficult to adapt to the refined defect analysis of complex chip structures, and has low recognition rate and detection efficiency. Summary of the invention

[0003] The present invention overcomes the defects of the prior art and proposes a chip manufacturing detection method based on feedback analysis.

[0004] A first aspect of the present invention provides a chip manufacturing detection method based on feedback analysis, comprising:

[0005] In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle;

[0006] In the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region;

[0007] Based on the defect feature of each chip sub-region, the similarity of the regions is judged, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, regions with performance defects are screened out from the multiple chip defect regions and marked as analysis regions.

[0008] Dynamically build a local recognition model based on machine learning based on the analysis area, import the defect characteristics of the analysis area into the local recognition model for training, and build multiple local recognition models based on multiple analysis areas;

[0009] In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

[0010] In this solution, in a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle, specifically:

[0011] In a circuit chip production task, set the production cycle;

[0012] In one production cycle, the circuit chip is imaged by an image scanning device, and chip image data is extracted from the image based on the chip area;

[0013] Based on a production cycle, the performance of the manufactured circuit chip is tested and performance feedback data is obtained.

[0014] In this solution, in the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region, specifically:

[0015] Smoothing, noise reduction, and standardization preprocessing of chip image data;

[0016] According to the chip image data, the chip density and chip distribution in the overall chip area are analyzed, and the overall chip area is divided into multiple chip sub-areas, and the number and density of chips between every two chip sub-areas are ensured to be within a preset difference range;

[0017] Build a CNN-based global recognition model, obtain chip defect image data from the system database and import it into the global recognition model for pre-training;

[0018] Through the global recognition model, defect features of multiple chip sub-regions are extracted to obtain the defect features of each chip sub-region.

[0019] In this solution, the similarity of the regions is judged based on the defect characteristics corresponding to each chip sub-region, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Regions with performance defects are screened out from the multiple chip defect regions based on performance feedback data and marked as analysis regions, specifically:

[0020] Vectorize the defect features corresponding to each chip sub-region to form a feature vector;

[0021] Based on the Gaussian kernel function, the similarity of the corresponding feature vectors of two adjacent chip sub-regions is calculated to determine whether the similarity is higher than the similarity threshold. If so, the two adjacent chip sub-regions are determined to be similar. All adjacent chip sub-regions are determined, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions.

[0022] Based on the performance feedback data, a performance anomaly assessment is performed on multiple chip defect areas. The chip defect areas whose test performance is lower than the expected standard are screened out through the assessment results and marked as analysis areas.

[0023] In this solution, the local recognition model based on machine learning is dynamically constructed based on the analysis area, the defect characteristics of the analysis area are imported into the local recognition model for training, and multiple local recognition models are constructed based on multiple analysis areas. Specifically,

[0024] Mark a current analysis area;

[0025] Get the pixel size of the current analysis area;

[0026] Construct a local recognition model based on YOLO, set a loss function and multiple convolutional layers, and use the pixel size of the region as the input size of the local recognition model;

[0027] Obtain all defect features in the current analysis area and integrate them into a first feature set;

[0028] Importing the first feature set into the local recognition model for training and optimization;

[0029] Based on the multiple analysis areas, corresponding multiple local recognition models are constructed.

[0030] In this solution, in the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted. Specifically:

[0031] In the next production cycle, the local recognition model is used to analyze defects in the analysis area, and the global recognition model is used to analyze defects in the non-analysis area;

[0032] Acquire performance feedback data in the next production cycle and mark it as second performance feedback data;

[0033] Through the global recognition model and the local recognition model, the defect characteristics of the entire chip area are extracted to form a second defect characteristic, and combined with the second performance feedback data, a secondary calculation is performed on the analysis area to determine whether there is a change in the analysis area;

[0034] Based on the changes in the analysis area, the local recognition model is adjusted, including the addition, deletion, and setting of initial parameters of the local recognition model;

[0035] Analyze and extract a second feature set based on the second defect feature and the analysis area of ​​the next production cycle;

[0036] The first feature set is combined with the second feature set to form training data which is imported into a local recognition model of an analysis area for training and model optimization and updating.

[0037] The second aspect of the present invention further provides a chip manufacturing detection system based on feedback analysis, the system comprising: a memory, a processor, the memory comprising a chip manufacturing detection program based on feedback analysis, the chip manufacturing detection program based on feedback analysis being executed by the processor to implement the following steps:

[0038] In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle;

[0039] In the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region;

[0040] Based on the defect feature of each chip sub-region, the similarity of the regions is judged, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, regions with performance defects are screened out from the multiple chip defect regions and marked as analysis regions.

[0041] Dynamically build a local recognition model based on machine learning based on the analysis area, import the defect characteristics of the analysis area into the local recognition model for training, and build multiple local recognition models based on multiple analysis areas;

[0042] In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

[0043] The third aspect of the present invention also provides a computer-readable storage medium, which includes a chip manufacturing detection program based on feedback analysis. When the chip manufacturing detection program based on feedback analysis is executed by a processor, the steps of the chip manufacturing detection method based on feedback analysis as described in any one of the above items are implemented.

[0044] The present invention discloses a chip manufacturing detection method based on feedback analysis. First, chip image data and performance feedback data are collected within a production cycle; defect features are extracted from multiple sub-regions divided from the overall chip region through a global recognition model; adjacent and similar sub-regions are merged according to the similarity principle to form a defect region, and regions with performance defects are screened out as analysis regions in combination with performance feedback data; then, a local recognition model is dynamically constructed for the analysis region and trained; within the next production cycle, the local recognition model is used to perform defect analysis on the analysis region, and the global recognition model is used to perform defect analysis on the non-analysis region, and the local recognition model and changes in the analysis region are dynamically adjusted according to new performance feedback data, thereby achieving effective monitoring and efficient management of defects in the chip production process, and at the same time achieving dynamic control of chip manufacturing quality and dynamic monitoring of defects. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A flow chart of a chip manufacturing detection method based on feedback analysis of the present invention is shown;

[0046] Figure 2 The defect feature acquisition flow chart of the present invention is shown;

[0047] Figure 3 A block diagram of a chip manufacturing detection system based on feedback analysis of the present invention is shown. DETAILED DESCRIPTION

[0048] In order to more clearly understand the above-mentioned purpose, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0049] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the specific embodiments disclosed below.

[0050] Figure 1 A flow chart of a chip manufacturing detection method based on feedback analysis of the present invention is shown.

[0051] like Figure 1 As shown, the first aspect of the present invention provides a chip manufacturing detection method based on feedback analysis, comprising:

[0052] S102, in a circuit chip production task, setting a production cycle, and obtaining chip image data and performance feedback data within the production cycle;

[0053] S104, in the chip image data, a plurality of chip sub-regions are divided based on the overall chip region, and defect features of the plurality of chip sub-regions are extracted by using a global recognition model to obtain defect features of each chip sub-region;

[0054] S106, based on the defect feature corresponding to each chip sub-region, determine the similarity of the region, merge adjacent and similar chip sub-regions to form multiple chip defect regions, and screen out regions with performance defects from the multiple chip defect regions based on the performance feedback data, and mark them as analysis regions;

[0055] S108, dynamically constructing a local recognition model based on machine learning based on the analysis area, importing defect features of the analysis area into the local recognition model for training, and constructing corresponding multiple local recognition models based on multiple analysis areas;

[0056] S110, in the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

[0057] According to an embodiment of the present invention, in a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle, specifically:

[0058] In a circuit chip production task, set the production cycle;

[0059] In one production cycle, the circuit chip is imaged by an image scanning device, and chip image data is extracted from the image based on the chip area;

[0060] Based on a production cycle, the performance of the manufactured circuit chip is tested and performance feedback data is obtained.

[0061] It should be noted that the production cycle is a fixed time period used to periodically evaluate chip manufacturing quality. The performance feedback data includes test results of different chips, including normal, failure, and functional abnormalities. In chip manufacturing, the appearance defects of the chip have a certain correlation with subsequent performance tests, such as welding defects, pin defects, and abnormal chip position.

[0062] Figure 2 The defect feature acquisition flow chart of the present invention is shown;

[0063] According to an embodiment of the present invention, in the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region, specifically:

[0064] S202, performing smoothing, noise reduction, and standardization preprocessing on the chip image data;

[0065] S204, analyzing the chip density and chip distribution in the overall chip area according to the chip image data, dividing the overall chip area into multiple chip sub-areas, and ensuring that the number and density of chips between every two chip sub-areas are within a preset difference range;

[0066] S206, building a global recognition model based on CNN, obtaining chip defect image data from a system database and importing the data into the global recognition model for pre-training;

[0067] S208, extracting defect features from multiple chip sub-regions through a global recognition model to obtain defect features of each chip sub-region.

[0068] It should be noted that the global recognition model is a built recognition model that has been pre-trained and is a fixed model used for global analysis with high recognition efficiency. The global recognition model has feature extraction and feature recognition functions and is used to achieve overall defect feature analysis of the entire chip area.

[0069] According to an embodiment of the present invention, the similarity of the regions is judged based on the defect characteristics corresponding to each chip sub-region, adjacent and similar chip sub-regions are merged to form multiple chip defect regions, and regions with performance defects are screened out from the multiple chip defect regions based on performance feedback data and marked as analysis regions, specifically:

[0070] Vectorize the defect features corresponding to each chip sub-region to form a feature vector;

[0071] Based on the Gaussian kernel function, the similarity of the corresponding feature vectors of two adjacent chip sub-regions is calculated to determine whether the similarity is higher than the similarity threshold. If so, the two adjacent chip sub-regions are determined to be similar. All adjacent chip sub-regions are determined, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions.

[0072] Based on the performance feedback data, a performance anomaly assessment is performed on multiple chip defect areas. The chip defect areas whose test performance is lower than the expected standard are screened out through the assessment results and marked as analysis areas.

[0073] It should be noted that in forming multiple chip defect regions, the formation of chip defect regions is used to divide regions with similar defect characteristics, and then accurate local models can be constructed for different regions to achieve dynamic local analysis of regions with different defect types. The performance anomaly assessment is to perform an anomaly assessment of the region based on the number and severity of the corresponding chip anomalies in the chip defect region. The analysis region generally includes multiple regions.

[0074] According to an embodiment of the present invention, the local recognition model based on machine learning is dynamically constructed based on the analysis area, the defect characteristics of the analysis area are imported into the local recognition model for training, and corresponding multiple local recognition models are constructed based on multiple analysis areas, specifically:

[0075] Mark a current analysis area;

[0076] Get the pixel size of the current analysis area;

[0077] Construct a local recognition model based on YOLO, set a loss function and multiple convolutional layers, and use the pixel size of the region as the input size of the local recognition model;

[0078] Obtain all defect features in the current analysis area and integrate them into a first feature set;

[0079] Importing the first feature set into the local recognition model for training and optimization;

[0080] Based on the multiple analysis areas, corresponding multiple local recognition models are constructed.

[0081] It should be noted that in the embodiment of the present invention, the YOLO model is used as the local recognition model. The YOLO model has the characteristics of fast recognition and accurate recognition of fixed objects, which is very suitable for the dynamic local model construction and recognition tasks in the present invention. It is worth mentioning that in traditional chip recognition, a fixed model is often used for chip detection, which is difficult to adapt to the refined defect analysis of complex chip structures, and the recognition rate and detection efficiency are low. In the present invention, different global and local recognition models are used, and in the local analysis, based on performance feedback and similar feature analysis, etc., the corresponding local model is dynamically generated, and the local model is periodically updated, trained and adjusted to dynamically adapt to complex and continuous chip processing and detection tasks, and improve the detection system. The adaptability and detection accuracy of chip manufacturing. While ensuring the accurate recognition of defect feature data, the system computing power consumption is effectively reduced, and the chip manufacturing quality and dynamic monitoring defects are dynamically controlled. At the same time, in the complex chip design, the precise defect evaluation of the integrated chip is realized, and the defects generated in real time are dynamically captured and periodically dynamically analyzed, so that the system can dynamically analyze the defect changes in the complex chip manufacturing process and improve the system adaptability.

[0082] According to an embodiment of the present invention, in the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted. Specifically,

[0083] In the next production cycle, the local recognition model is used to analyze defects in the analysis area, and the global recognition model is used to analyze defects in the non-analysis area;

[0084] Acquire performance feedback data in the next production cycle and mark it as second performance feedback data;

[0085] Through the global recognition model and the local recognition model, the defect characteristics of the entire chip area are extracted to form a second defect characteristic, and combined with the second performance feedback data, a secondary calculation is performed on the analysis area to determine whether there is a change in the analysis area;

[0086] Based on the changes in the analysis area, the local recognition model is adjusted, including the addition, deletion, and setting of initial parameters of the local recognition model;

[0087] Analyze and extract a second feature set based on the second defect feature and the analysis area of ​​the next production cycle;

[0088] The first feature set is combined with the second feature set to form training data which is imported into a local recognition model of an analysis area for training and model optimization and updating.

[0089] It should be noted that the adjustment content includes the addition, deletion, and initial parameter setting of the local recognition model, which is determined specifically according to the changes in the analysis area. For example, if a certain analysis area does not exist in the next production cycle, the analysis area will be reduced, which also means that the defect level of the analysis area has become lower and the performance feedback is better. Therefore, the corresponding local recognition model is deleted and the area is changed to the global recognition mode. For example, the increase in the analysis area also increases the corresponding pixel size, and the corresponding local recognition model needs to reset the input size parameters. For example, the increase in the analysis area requires the construction of a new local recognition model. At the same time, in the next production cycle, the local recognition model can be trained and updated in real time based on the newly added defect features to adapt to the long-term and complex chip manufacturing detection process.

[0090] Changes in the analysis area include increases, decreases, changes in area size, etc. Based on changes in the analysis area, efficient dynamic adjustment of the local model can be achieved.

[0091] According to an embodiment of the present invention, the similarity of the regions is judged based on the defect features corresponding to each chip sub-region, and adjacent and similar chip sub-regions are merged to form a plurality of chip defect regions, further comprising:

[0092] Vectorize the defect features corresponding to each chip sub-region to form a feature vector;

[0093] Calculate the distance between the feature vectors of the chip sub-regions based on the standard Euclidean distance and obtain a first distance;

[0094] Based on the performance feedback data, the performance differences between the chip sub-areas are analyzed, and the second distance is obtained through the performance differences;

[0095] A clustering model based on Dbscan is constructed, with the feature vector of each chip sub-region as the clustering sample data, the chip sub-region as the clustering unit, the sample point radiation radius is set, and all chip sub-regions are clustered and grouped through the clustering model;

[0096] During the clustering process, the first distance and the second distance are weighted averaged based on a preset weight ratio, and the weighted average distance value is used as the distance between sample points during the clustering process. At the same time, during the clustering process, the condition that adjacent chip sub-areas are in the same group is set, and finally clustering is performed to obtain multiple chip defect areas.

[0097] It should be noted that, in the analysis of the performance differences between the chip sub-regions based on the performance feedback data and obtaining the second distance through the performance differences, the present invention converts the differences into distance numerical representations by comparing and evaluating the differences in the degree of performance abnormality. The larger the distance value, the greater the performance difference between the two chip sub-regions.

[0098] In an embodiment of the present invention, based on the similarity of the defect feature judgment area corresponding to each chip sub-region, adjacent and similar chip sub-regions can be merged based on the Gaussian kernel function calculation method to perform region merging. This method is simple and efficient in calculation, can be used to quickly form corresponding classification areas and quickly construct local models, and has low computing power consumption.

[0099] In a preferred embodiment of the present invention, chip areas can also be grouped and merged based on the clustering model of Dbscan. In the process of grouping based on the clustering model, refined regional defect analysis and grouping can be achieved, the effectiveness of subsequent local model building can be improved, and refined local model building can be achieved, which has better local defect segmentation and recognition effects in multi-chip and high-density integrated circuit analysis.

[0100] Figure 3 A block diagram of a chip manufacturing detection system based on feedback analysis of the present invention is shown.

[0101] The second aspect of the present invention further provides a chip manufacturing detection system 3 based on feedback analysis, the system comprising: a memory 31, a processor 32, the memory comprising a chip manufacturing detection program based on feedback analysis, the chip manufacturing detection program based on feedback analysis being executed by the processor to implement the following steps:

[0102] In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle;

[0103] In the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region;

[0104] Based on the defect feature of each chip sub-region, the similarity of the regions is judged, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, regions with performance defects are screened out from the multiple chip defect regions and marked as analysis regions.

[0105] Dynamically build a local recognition model based on machine learning based on the analysis area, import the defect characteristics of the analysis area into the local recognition model for training, and build multiple local recognition models based on multiple analysis areas;

[0106] In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

[0107] According to an embodiment of the present invention, in a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle, specifically:

[0108] In a circuit chip production task, set the production cycle;

[0109] In one production cycle, the circuit chip is imaged by an image scanning device, and chip image data is extracted from the image based on the chip area;

[0110] Based on a production cycle, the performance of the manufactured circuit chip is tested and performance feedback data is obtained.

[0111] It should be noted that the production cycle is a fixed time period used to periodically evaluate chip manufacturing quality. The performance feedback data includes test results of different chips, including normal, failure, and functional abnormalities. In chip manufacturing, the appearance defects of the chip have a certain correlation with subsequent performance tests, such as welding defects, pin defects, and abnormal chip position.

[0112] According to an embodiment of the present invention, in the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region, specifically:

[0113] Smoothing, noise reduction, and standardization preprocessing of chip image data;

[0114] According to the chip image data, the chip density and chip distribution in the overall chip area are analyzed, and the overall chip area is divided into multiple chip sub-areas, and the number and density of chips between every two chip sub-areas are ensured to be within a preset difference range;

[0115] Build a CNN-based global recognition model, obtain chip defect image data from the system database and import it into the global recognition model for pre-training;

[0116] Through the global recognition model, defect features of multiple chip sub-regions are extracted to obtain the defect features of each chip sub-region.

[0117] It should be noted that the global recognition model is a built recognition model that has been pre-trained and is a fixed model used for global analysis with high recognition efficiency. The global recognition model has feature extraction and feature recognition functions and is used to achieve overall defect feature analysis of the entire chip area.

[0118] According to an embodiment of the present invention, the similarity of the regions is judged based on the defect characteristics corresponding to each chip sub-region, adjacent and similar chip sub-regions are merged to form multiple chip defect regions, and regions with performance defects are screened out from the multiple chip defect regions based on performance feedback data and marked as analysis regions, specifically:

[0119] Vectorize the defect features corresponding to each chip sub-region to form a feature vector;

[0120] Based on the Gaussian kernel function, the similarity of the corresponding feature vectors of two adjacent chip sub-regions is calculated to determine whether the similarity is higher than the similarity threshold. If so, the two adjacent chip sub-regions are determined to be similar. All adjacent chip sub-regions are determined, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions.

[0121] Based on the performance feedback data, a performance anomaly assessment is performed on multiple chip defect areas. The chip defect areas whose test performance is lower than the expected standard are screened out through the assessment results and marked as analysis areas.

[0122] It should be noted that in forming multiple chip defect regions, the formation of chip defect regions is used to divide regions with similar defect characteristics, and then accurate local models can be constructed for different regions to achieve dynamic local analysis of regions with different defect types. The performance anomaly assessment is to perform an anomaly assessment of the region based on the number and severity of the corresponding chip anomalies in the chip defect region. The analysis region generally includes multiple regions.

[0123] According to an embodiment of the present invention, the local recognition model based on machine learning is dynamically constructed based on the analysis area, the defect characteristics of the analysis area are imported into the local recognition model for training, and corresponding multiple local recognition models are constructed based on multiple analysis areas, specifically:

[0124] Mark a current analysis area;

[0125] Get the pixel size of the current analysis area;

[0126] Construct a local recognition model based on YOLO, set a loss function and multiple convolutional layers, and use the pixel size of the region as the input size of the local recognition model;

[0127] Obtain all defect features in the current analysis area and integrate them into a first feature set;

[0128] Importing the first feature set into the local recognition model for training and optimization;

[0129] Based on the multiple analysis areas, corresponding multiple local recognition models are constructed.

[0130] It should be noted that in the embodiment of the present invention, the YOLO model is used as the local recognition model. The YOLO model has the characteristics of fast recognition and accurate recognition of fixed objects, which is very suitable for the dynamic local model construction and recognition tasks in the present invention. It is worth mentioning that in traditional chip recognition, a fixed model is often used for chip detection, which is difficult to adapt to the refined defect analysis of complex chip structures, and the recognition rate and detection efficiency are low. In the present invention, different global and local recognition models are used, and in the local analysis, based on performance feedback and similar feature analysis, etc., the corresponding local model is dynamically generated, and the local model is periodically updated, trained and adjusted to dynamically adapt to complex and continuous chip processing and detection tasks, and improve the detection system. The adaptability and detection accuracy of chip manufacturing. While ensuring the accurate recognition of defect feature data, the system computing power consumption is effectively reduced, and the chip manufacturing quality and dynamic monitoring defects are dynamically controlled. At the same time, in the complex chip design, the precise defect evaluation of the integrated chip is realized, and the defects generated in real time are dynamically captured and periodically dynamically analyzed, so that the system can dynamically analyze the defect changes in the complex chip manufacturing process and improve the system adaptability.

[0131] According to an embodiment of the present invention, in the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted. Specifically,

[0132] In the next production cycle, the local recognition model is used to analyze defects in the analysis area, and the global recognition model is used to analyze defects in the non-analysis area;

[0133] Acquire performance feedback data in the next production cycle and mark it as second performance feedback data;

[0134] Through the global recognition model and the local recognition model, the defect characteristics of the entire chip area are extracted to form a second defect characteristic, and combined with the second performance feedback data, a secondary calculation is performed on the analysis area to determine whether there is a change in the analysis area;

[0135] Based on the changes in the analysis area, the local recognition model is adjusted, including the addition, deletion, and setting of initial parameters of the local recognition model;

[0136] Analyze and extract a second feature set based on the second defect feature and the analysis area of ​​the next production cycle;

[0137] The first feature set is combined with the second feature set to form training data which is imported into a local recognition model of an analysis area for training and model optimization and updating.

[0138] It should be noted that the adjustment content includes the addition, deletion, and initial parameter setting of the local recognition model, which is determined specifically according to the changes in the analysis area. For example, if a certain analysis area does not exist in the next production cycle, the analysis area will be reduced, which also means that the defect level of the analysis area has become lower and the performance feedback is better. Therefore, the corresponding local recognition model is deleted and the area is changed to the global recognition mode. For example, the increase in the analysis area also increases the corresponding pixel size, and the corresponding local recognition model needs to reset the input size parameters. For example, the increase in the analysis area requires the construction of a new local recognition model. At the same time, in the next production cycle, the local recognition model can be trained and updated in real time based on the newly added defect features to adapt to the long-term and complex chip manufacturing detection process.

[0139] Changes in the analysis area include increases, decreases, changes in area size, etc. Based on changes in the analysis area, efficient dynamic adjustment of the local model can be achieved.

[0140] According to an embodiment of the present invention, the similarity of the regions is judged based on the defect features corresponding to each chip sub-region, and adjacent and similar chip sub-regions are merged to form a plurality of chip defect regions, further comprising:

[0141] Vectorize the defect features corresponding to each chip sub-region to form a feature vector;

[0142] Calculate the distance between the feature vectors of the chip sub-regions based on the standard Euclidean distance and obtain a first distance;

[0143] Based on the performance feedback data, the performance differences between the chip sub-areas are analyzed, and the second distance is obtained through the performance differences;

[0144] A clustering model based on Dbscan is constructed, with the feature vector of each chip sub-region as the clustering sample data, the chip sub-region as the clustering unit, the sample point radiation radius is set, and all chip sub-regions are clustered and grouped through the clustering model;

[0145] During the clustering process, the first distance and the second distance are weighted averaged based on a preset weight ratio, and the weighted average distance value is used as the distance between sample points during the clustering process. At the same time, during the clustering process, the condition that adjacent chip sub-areas are in the same group is set, and finally clustering is performed to obtain multiple chip defect areas.

[0146] It should be noted that, in the analysis of the performance differences between the chip sub-regions based on the performance feedback data and obtaining the second distance through the performance differences, the present invention converts the differences into distance numerical representations by comparing and evaluating the differences in the degree of performance abnormality. The larger the distance value, the greater the performance difference between the two chip sub-regions.

[0147] In an embodiment of the present invention, based on the similarity of the defect feature judgment area corresponding to each chip sub-region, adjacent and similar chip sub-regions can be merged based on the Gaussian kernel function calculation method to perform region merging. This method is simple and efficient in calculation, can be used to quickly form corresponding classification areas and quickly construct local models, and has low computing power consumption.

[0148] In a preferred embodiment of the present invention, chip areas can also be grouped and merged based on the clustering model of Dbscan. In the process of grouping based on the clustering model, refined regional defect analysis and grouping can be achieved, the effectiveness of subsequent local model building can be improved, and refined local model building can be achieved, which has better local defect segmentation and recognition effects in multi-chip and high-density integrated circuit analysis.

[0149] The third aspect of the present invention also provides a computer-readable storage medium, which includes a chip manufacturing detection program based on feedback analysis. When the chip manufacturing detection program based on feedback analysis is executed by a processor, the steps of the chip manufacturing detection method based on feedback analysis as described in any one of the above items are implemented.

[0150] The present invention discloses a chip manufacturing detection method based on feedback analysis. First, chip image data and performance feedback data are collected within a production cycle; defect features are extracted from multiple sub-regions divided from the overall chip region through a global recognition model; adjacent and similar sub-regions are merged according to the similarity principle to form a defect region, and regions with performance defects are screened out as analysis regions in combination with performance feedback data; then, a local recognition model is dynamically constructed for the analysis region and trained; within the next production cycle, the local recognition model is used to perform defect analysis on the analysis region, and the global recognition model is used to perform defect analysis on the non-analysis region, and the local recognition model and changes in the analysis region are dynamically adjusted according to new performance feedback data, thereby achieving effective monitoring and efficient management of defects in the chip production process, and at the same time achieving dynamic control of chip manufacturing quality and dynamic monitoring of defects.

[0151] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0152] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0153] In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0154] A person of ordinary skill in the art can understand that: all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiments; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks or optical disks, and other media that can store program codes.

[0155] Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

[0156] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A chip manufacturing detection method based on feedback analysis, characterized in that: include: In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle; In the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region; Based on the defect feature of each chip sub-region, the similarity of the regions is judged, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, regions with performance defects are screened out from the multiple chip defect regions and marked as analysis regions. Dynamically build a local recognition model based on machine learning based on the analysis area, import the defect characteristics of the analysis area into the local recognition model for training, and build multiple local recognition models based on multiple analysis areas; In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

2. A chip manufacturing detection method based on feedback analysis according to claim 1, characterized in that: In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle, specifically: In a circuit chip production task, set the production cycle; In one production cycle, the circuit chip is imaged by an image scanning device, and chip image data is extracted from the image based on the chip area; Based on a production cycle, the performance of the manufactured circuit chip is tested and performance feedback data is obtained.

3. The chip manufacturing detection method based on feedback analysis according to claim 1, characterized in that: In the chip image data, multiple chip sub-regions are divided based on the overall chip region, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region, specifically: Smoothing, noise reduction, and standardization preprocessing of chip image data; According to the chip image data, the chip density and chip distribution in the overall chip area are analyzed, and the overall chip area is divided into multiple chip sub-areas, and the number and density of chips between every two chip sub-areas are ensured to be within a preset difference range; Build a CNN-based global recognition model, obtain chip defect image data from the system database and import it into the global recognition model for pre-training; Through the global recognition model, defect features of multiple chip sub-regions are extracted to obtain the defect features of each chip sub-region.

4. The chip manufacturing detection method based on feedback analysis according to claim 3 is characterized in that: The similarity of the regions is judged based on the defect characteristics corresponding to each chip sub-region, adjacent and similar chip sub-regions are merged to form multiple chip defect regions, and regions with performance defects are screened out from the multiple chip defect regions based on the performance feedback data and marked as analysis regions, specifically: Vectorize the defect features corresponding to each chip sub-region to form a feature vector; Based on the Gaussian kernel function, the similarity of the corresponding feature vectors of two adjacent chip sub-regions is calculated to determine whether the similarity is higher than the similarity threshold. If so, the two adjacent chip sub-regions are determined to be similar. All adjacent chip sub-regions are determined, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, a performance anomaly assessment is performed on multiple chip defect areas. The chip defect areas whose test performance is lower than the expected standard are screened out through the assessment results and marked as analysis areas.

5. The chip manufacturing detection method based on feedback analysis according to claim 4, characterized in that: The method of dynamically building a local recognition model based on machine learning based on the analysis area, importing the defect characteristics of the analysis area into the local recognition model for training, and building corresponding multiple local recognition models based on multiple analysis areas is specifically as follows: Mark a current analysis area; Get the pixel size of the current analysis area; Construct a local recognition model based on YOLO, set a loss function and multiple convolutional layers, and use the pixel size of the region as the input size of the local recognition model; Obtain all defect features in the current analysis area and integrate them into a first feature set; Importing the first feature set into the local recognition model for training and optimization; Based on the multiple analysis areas, corresponding multiple local recognition models are constructed.

6. The chip manufacturing detection method based on feedback analysis according to claim 5, characterized in that: In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted. Specifically: In the next production cycle, the local recognition model is used to analyze defects in the analysis area, and the global recognition model is used to analyze defects in the non-analysis area; Acquire performance feedback data in the next production cycle and mark it as second performance feedback data; Through the global recognition model and the local recognition model, the defect characteristics of the entire chip area are extracted to form a second defect characteristic, and combined with the second performance feedback data, a secondary calculation is performed on the analysis area to determine whether there is a change in the analysis area; Based on the changes in the analysis area, the local recognition model is adjusted, including the addition, deletion, and setting of initial parameters of the local recognition model; Analyze and extract a second feature set based on the second defect feature and the analysis area of ​​the next production cycle; The first feature set is combined with the second feature set to form training data which is imported into a local recognition model of an analysis area for training and model optimization and updating.

7. A chip manufacturing detection system based on feedback analysis, characterized in that: The system includes: a memory and a processor, wherein the memory includes a chip manufacturing detection program based on feedback analysis, and the chip manufacturing detection program based on feedback analysis is executed by the processor to implement the following steps: In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle; In the chip image data, multiple chip sub-regions are divided based on the overall chip area, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region; Based on the defect feature of each chip sub-region, the similarity of the regions is judged, and adjacent and similar chip sub-regions are merged to form multiple chip defect regions. Based on the performance feedback data, regions with performance defects are screened out from the multiple chip defect regions and marked as analysis regions. Dynamically build a local recognition model based on machine learning based on the analysis area, import the defect characteristics of the analysis area into the local recognition model for training, and build multiple local recognition models based on multiple analysis areas; In the next production cycle, the local recognition model is used to perform defect analysis on the analysis area, and the global recognition model is used to perform defect analysis on the non-analysis area. Based on the performance feedback data of the next production cycle, the analysis area is analyzed for changes and the local recognition model is dynamically adjusted.

8. The chip manufacturing detection system based on feedback analysis according to claim 7, characterized in that: In a circuit chip production task, a production cycle is set, and chip image data and performance feedback data are obtained within a production cycle, specifically: In a circuit chip production task, set the production cycle; In one production cycle, the circuit chip is imaged by an image scanning device, and chip image data is extracted from the image based on the chip area; Based on a production cycle, the performance of the manufactured circuit chip is tested and performance feedback data is obtained.

9. The chip manufacturing detection system based on feedback analysis according to claim 7, characterized in that: In the chip image data, multiple chip sub-regions are divided based on the overall chip region, and defect features of the multiple chip sub-regions are extracted through a global recognition model to obtain defect features of each chip sub-region, specifically: Smoothing, noise reduction, and standardization preprocessing of chip image data; According to the chip image data, the chip density and chip distribution in the overall chip area are analyzed, and the overall chip area is divided into multiple chip sub-areas, and the number and density of chips between every two chip sub-areas are ensured to be within a preset difference range; Build a CNN-based global recognition model, obtain chip defect image data from the system database and import it into the global recognition model for pre-training; Through the global recognition model, defect features of multiple chip sub-regions are extracted to obtain the defect features of each chip sub-region.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a chip manufacturing detection program based on feedback analysis. When the chip manufacturing detection program based on feedback analysis is executed by a processor, the steps of the chip manufacturing detection method based on feedback analysis as described in any one of claims 1 to 6 are implemented.

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