Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a method for forming the same. The method includes forming a mask structure on a substrate; forming a first opening in the mask structure; forming at least one second opening inside the first opening, the second opening having a bottom lower than the bottom of the first opening, the at least one second opening being in communication with the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench in the substrate; and filling the isolation trench to form an isolation structure. In the isolation trench, a region corresponding to the second opening has a greater depth than a region corresponding to a non-second opening. When filling the isolation trench to form the isolation structure, the region corresponding to the second opening has a greater depth of the isolation structure than the region corresponding to the non-second opening. When electrons flow from a source, the flow path of the electrons flowing along the region corresponding to the non-second opening is shorter than the flow path of the electrons flowing along the region corresponding to the second opening, resulting in a reduced on-resistance of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Technology

[0002] By replacing the lateral width with the vertical depth, deep trench isolation (DTI) structures effectively reduce the relative footprint of devices and increase the effective length of the drift region compared to shallow trench isolation (STI), providing higher breakdown voltages for high-voltage devices, while also resulting in relatively higher characteristic on-resistance. Through optimization of the internal structure of the deep trench, introducing a segmented depth design, additional low-resistance current paths can exist within the device's isolation structure.

[0003] However, there are many challenges in etching deep trench structures with height differences. Summary of the Invention

[0004] The problem solved by this invention is how to etch a deep trench structure with a height difference, and utilize an additional low-resistance current path to make the isolation structure have a low characteristic on-resistance while providing a high breakdown voltage for high-voltage devices.

[0005] To address the aforementioned problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a mask structure on the substrate; forming a first opening within the mask structure, the first opening defining the location of an isolation structure; forming at least one second opening inside the first opening, the bottom of the second opening being lower than the bottom of the first opening, the at least one second opening communicating with the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench within the substrate; and filling the isolation trench to form an isolation structure.

[0006] Optionally, the mask structure includes: a buffer layer located on the substrate, a first mask layer located on the buffer layer, and a second mask layer located on the first mask layer.

[0007] Optionally, the first opening exposes the first mask layer.

[0008] Optionally, the second opening exposes the buffer layer.

[0009] Optionally, the second opening exposes the substrate.

[0010] Optionally, the substrate includes a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer, wherein the isolation structure is located within the semiconductor layer.

[0011] Optionally, the material of the mask structure is different from the material of the semiconductor layer.

[0012] Optionally, the material of the mask structure includes at least one of silicon nitride and silicon oxide.

[0013] Optionally, the step of forming the first opening within the mask structure includes: forming a first anti-reflective layer and a first photoresist layer on the surface of the mask structure; performing exposure and development treatment on the first photoresist layer and the first anti-reflective layer; and after performing exposure and development treatment on the first photoresist layer and the first anti-reflective layer, etching the mask structure to form the first opening.

[0014] Optionally, the step of forming at least one second opening inside the first opening includes: forming a second anti-reflective layer that fills the first opening inside the first opening; forming a second photoresist layer on the surface of the second anti-reflective layer; performing exposure and development treatment on the second photoresist layer and the second anti-reflective layer; and etching the mask structure after performing exposure and development treatment on the second photoresist layer and the second anti-reflective layer to form the second opening.

[0015] Optionally, the step of transferring the isolation pattern into the substrate and forming an isolation trench in the substrate includes: using a mask structure having the first opening and the second opening as a mask, etching the substrate to form an isolation trench in the substrate.

[0016] Optionally, in the step of forming the isolation trench, the isolation trench includes a first region and a second region, the first region and the second region are arranged alternately along a first direction, the isolation trench in the second region corresponds to the second opening, the isolation trench in the second region is connected to the isolation trench in the first region, and the first direction is parallel to the surface of the substrate; in the step of filling the isolation trench to form an isolation structure, a medium material is filled into the isolation trench, the medium material filled in the isolation trench in the first region is suitable for forming a first portion of the isolation structure, and the medium material filled in the isolation trench in the second region is suitable for forming a second portion of the isolation structure.

[0017] Optionally, after forming the isolation structure, the method further includes: forming a source and a drain, wherein the source and the drain are located on opposite sides of the isolation structure along a second direction, the second direction being perpendicular to the first direction and parallel to the surface of the substrate.

[0018] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the semiconductor structure forming method described in any of the preceding claims.

[0019] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0020] In the semiconductor structure formation method of the present invention, a first opening is first formed to define the position of the isolation structure, and then a second opening is formed within the first opening. The isolation pattern formed by connecting the second opening and the first opening is transferred to the substrate, forming an isolation trench within the substrate. Since the bottom of the second opening is lower than the bottom of the first opening, the depth of the region corresponding to the second opening is greater than the depth of the region not corresponding to the second opening in the isolation trench formed by transferring the isolation pattern formed by connecting the second opening and the first opening to the substrate. When filling the isolation trench to form the isolation structure, the depth of the isolation structure in the region corresponding to the second opening is greater than the depth of the isolation structure in the region not corresponding to the second opening. When electrons flow out from the source, some electrons do not need to move down along the sidewall surface of the isolation structure in the region corresponding to the second opening to the bottom and then to the drain. Instead, they move down along the sidewall surface of the isolation structure in the region not corresponding to the second opening to the bottom and then to the drain. The flow path of electrons flowing out along the region not corresponding to the second opening is shorter than the flow path of electrons flowing out along the region corresponding to the second opening, thus reducing the characteristic on-resistance of the device. Furthermore, compared to the method of etching different regions of the substrate in stages to form segmented isolation trenches, the method of using the isolation pattern as an etching mask to simultaneously form segmented isolation trenches in the substrate ensures the etching morphology of the isolation trenches. Attached Figure Description

[0021] Figures 1 to 3 This is a schematic diagram of a semiconductor structure according to one embodiment;

[0022] Figures 4 to 25 This is a schematic diagram of each step in the formation process of the semiconductor structure according to an embodiment of the present invention;

[0023] Figure 26 This is a perspective view of a semiconductor structure according to an embodiment of the present invention;

[0024] Figure 27 This is a perspective view of a semiconductor structure according to another embodiment of the present invention;

[0025] Figure 28 This is a perspective view of a semiconductor structure according to another embodiment of the present invention. Detailed Implementation

[0026] As the background technology shows, existing lateral metal-oxide-semiconductor field-effect transistors with deep trench isolation structures have a relatively large characteristic on-resistance. The following analysis, using a specific semiconductor structure, explains the cause of this problem: Please refer to [reference needed]. Figures 1 to 3 , Figure 2 and Figure 3 They are Figure 1 In the cross-sectional views at positions AA1 and BB1, the semiconductor structure includes:

[0027] 100 for the substrate;

[0028] An isolation structure 101 located within the substrate 100 has a first dimension h along the direction from the top surface of the substrate 100 to the bottom surface of the substrate 100.

[0029] The semiconductor structure further includes a source (not shown) and a drain (not shown), with the source and the drain located on opposite sides of the isolation structure 101 along the first direction Y.

[0030] The ratio of the first dimension h of the isolation structure 101 along the direction from the top surface of the substrate 100 to the bottom surface of the substrate 100 to the dimension of the isolation structure 101 along the first direction Y is greater than a first threshold. The first threshold is 5:1, and the first dimension h is greater than 1 μm.

[0031] By replacing the width with the depth in the vertical direction, the high aspect ratio isolation structure effectively reduces the relative footprint of the device and increases the effective length of the drift region, providing a higher breakdown voltage for high-voltage devices. However, the increase in the device's breakdown voltage often increases the device's characteristic on-resistance, resulting in an increase in the device's characteristic conduction resistance.

[0032] To address the aforementioned technical problem, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a mask structure on the substrate; forming a first opening within the mask structure, the first opening defining the location of an isolation structure; forming at least one second opening inside the first opening, the bottom of the second opening being lower than the bottom of the first opening, the at least one second opening communicating with the first opening to form an isolation pattern; transferring the isolation pattern into the substrate to form an isolation trench within the substrate; and filling the isolation trench to form an isolation structure.

[0033] In the semiconductor structure formation method of the present invention, a first opening is first formed to define the position of the isolation structure, and then a second opening is formed within the first opening. The isolation pattern formed by connecting the second opening and the first opening is transferred to the substrate, forming an isolation trench within the substrate. Since the bottom of the second opening is lower than the bottom of the first opening, the depth of the region corresponding to the second opening is greater than the depth of the region not corresponding to the second opening in the isolation trench formed by transferring the isolation pattern formed by connecting the second opening and the first opening to the substrate. When filling the isolation trench to form the isolation structure, the depth of the isolation structure in the region corresponding to the second opening is greater than the depth of the isolation structure in the region not corresponding to the second opening. When electrons flow out from the source, some electrons do not need to move down along the sidewall surface of the isolation structure in the region corresponding to the second opening to the bottom and then to the drain. Instead, they move down along the sidewall surface of the isolation structure in the region not corresponding to the second opening to the bottom and then to the drain. The flow path of electrons flowing out along the region not corresponding to the second opening is shorter than the flow path of electrons flowing out along the region corresponding to the second opening, thus reducing the characteristic on-resistance of the device. Furthermore, compared to the method of etching different regions of the substrate in stages to form segmented isolation trenches, the method of using the isolation pattern as an etching mask to simultaneously form segmented isolation trenches in the substrate ensures the etching morphology of the isolation trenches.

[0034] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] Figures 4 to 25 This is a schematic diagram of each step in the formation process of the semiconductor structure according to an embodiment of the present invention. Figure 26 This is a perspective view of a semiconductor structure according to an embodiment of the present invention.

[0036] Please refer to Figure 4 and Figure 5 , Figure 5 yes Figure 4 A sectional view at position CC1, showing base 200.

[0037] The substrate 200 includes a substrate (not shown), an insulating layer (not shown) on the substrate, and a semiconductor layer (not shown) on the insulating layer, and the subsequently formed isolation structure 211 is located within the semiconductor layer.

[0038] The substrate is made of silicon. The insulating layer is made of silicon oxide. The semiconductor layer is made of silicon.

[0039] The semiconductor layer provides the structural basis for the subsequent formation of the isolation structure 211.

[0040] In other embodiments, the substrate includes a substrate and an epitaxial layer located on the substrate, the epitaxial layer providing a structural basis for forming an isolation structure. The substrate is made of silicon, and the epitaxial layer is also made of silicon.

[0041] Please refer to Figure 6 and Figure 7 , Figure 7 yes Figure 6 A cross-sectional view at position CC1 shows a mask structure formed on the substrate 200.

[0042] In the mask structure, at least the layer closest to the substrate 200 is made of a different material than the semiconductor layer. Specifically, in some embodiments of the present invention, the mask structure is a multi-layer stacked structure, comprising: a buffer layer 201 on the substrate 200, a first mask layer 202 on the buffer layer 201, and a second mask layer 203 on the first mask layer 202. The material of the first mask layer 202 is different from the material of the semiconductor layer.

[0043] The material of the mask structure includes at least one of silicon nitride and silicon oxide.

[0044] Specifically, in some embodiments of the present invention, the material of the buffer layer 201 includes silicon oxide, the material of the first mask layer 202 includes silicon nitride, and the material of the second mask layer 203 includes silicon nitride.

[0045] Please refer to Figures 8 to 13 A first opening 206 is formed within the mask structure, the first opening 206 being used to define the position of the isolation structure 211.

[0046] The dimensions of the first opening 206 in the first direction X define the subsequently formed isolation trench 210 (e.g.) Figure 23 The sum of the dimensions of the first region I and the second region II in the first direction X (as shown).

[0047] The step of forming the first opening 206 within the mask structure includes: as follows Figures 8 to 10 As shown, Figure 9 yes Figure 8 A sectional view at position CC1. Figure 10 yes Figure 8 In the cross-sectional view at position DD1, a first anti-reflective layer 204 and a first photoresist layer 205 are formed on the surface of the mask structure; as shown. Figures 11 to 13 As shown, Figure 12 yes Figure 11 A sectional view at position CC1. Figure 13 yes Figure 11In the cross-sectional view at position DD1, the first photoresist layer 205 and the first anti-reflection layer 204 are exposed and developed; after the first photoresist layer 205 and the first anti-reflection layer 204 are exposed and developed, the mask structure is etched to form the first opening 206.

[0048] The first opening 206 provides a structural basis for forming the isolation pattern.

[0049] Specifically, in some embodiments of the present invention, the first opening 206 exposes the first mask layer 202.

[0050] Please refer to Figure 14 and Figure 15 , Figure 15 yes Figure 14 In the cross-sectional view at position CC1, after the first opening 206 is formed, the first anti-reflective layer 204 and the first photoresist layer 205 are removed.

[0051] The materials of the first antireflective layer 204 and the first photoresist layer 205 include organic compounds.

[0052] The method for removing the first anti-reflective layer 204 and the first photoresist layer 205 includes: ashing treatment.

[0053] Please refer to Figures 16 to 19 At least one second opening 209 is formed inside the first opening 206, the bottom of the second opening 209 is lower than the bottom of the first opening 206, and at least one second opening 209 is connected to the first opening 206 to form an isolation pattern.

[0054] The step of forming at least one second opening 209 inside the first opening 206 includes: as follows Figure 16 and Figure 17 As shown, Figure 17 yes Figure 16 In the cross-sectional view at position CC1, a second anti-reflective layer 207 is formed within the first opening 206, filling the first opening 206; a second photoresist layer 208 is formed on the surface of the second anti-reflective layer 207; as shown. Figure 18 and Figure 19 As shown, Figure 19 yes Figure 18 In the cross-sectional view at position CC1, the second photoresist layer 208 and the second anti-reflection layer 207 are exposed and developed; after the second photoresist layer 208 and the second anti-reflection layer 207 are exposed and developed, the mask structure is etched to form the second opening 209.

[0055] The second opening 209 provides a structural basis for the subsequent formation of the isolation pattern. Parallel to the surface of the substrate 200, the second opening 209 defines the subsequently formed isolation trench 210 (e.g., Figure 23 The location of the second zone II (as shown in the figure).

[0056] The depth of the second opening 209 is greater than the depth of the first opening 206, so that the first region I and the second region II of the subsequently formed isolation trench 210 have a depth difference, providing a structural basis for forming the first and second sections with different depths.

[0057] Specifically, in some embodiments of the present invention, the second opening 209 exposes the substrate 200.

[0058] Specifically, in some other embodiments of the invention, the second opening exposes the buffer layer.

[0059] Please refer to Figure 20 and Figure 21 , Figure 21 yes Figure 20 In the cross-sectional view at position CC1, after the second opening 209 is formed, the second photoresist layer 208 and the second anti-reflective layer 207 are removed.

[0060] The materials of the second antireflective layer 207 and the second photoresist layer 208 include organic compounds.

[0061] The method for removing the second antireflective layer 207 and the second photoresist layer 208 includes: ashing treatment.

[0062] Please refer to Figure 22 and Figure 23 , Figure 23 yes Figure 22 In the cross-sectional view at position CC1, the isolation pattern is transferred into the substrate 200, and an isolation trench 210 is formed in the substrate 200.

[0063] The step of transferring the isolation pattern into the substrate 200 and forming an isolation trench 210 in the substrate 200 includes: using a mask structure having the first opening 206 and the second opening 209 as a mask, etching the substrate 200 to form an isolation trench 210 in the substrate 200.

[0064] In the step of forming the isolation trench 210, the isolation trench 210 includes a first region I and a second region II, the first region I and the second region II are arranged alternately along a first direction X, the isolation trench 210 of the second region II corresponds to the second opening 209, the isolation trench 210 of the second region II is connected to the isolation trench 210 of the first region I, and the first direction X is parallel to the surface of the substrate 200.

[0065] The first region I and the second region II are arranged alternately along the first direction X, that is: along the first direction X, the region adjacent to the first region I must be the second region II, and the region adjacent to the second region II must be the first region I.

[0066] Please refer to Figure 24 and Figure 25 Please refer to the reference. Figure 26 , Figure 25 yes Figure 24 A sectional view at position CC1. Figure 26 This is a perspective view of an embodiment of the present invention, showing that the isolation trench 210 is filled to form an isolation structure 211.

[0067] In the step of filling the isolation trench 210 to form the isolation structure 211, a medium material is filled into the isolation trench 210. The medium material filled in the isolation trench 210 in the first region I is suitable for forming the first part A of the isolation structure 211, and the medium material filled in the isolation trench 210 in the second region II is suitable for forming the second part B of the isolation structure 211.

[0068] The isolation structure 211 has a first section A and a second section B with different depths. When electrons flow out from the source, some electrons do not need to move down along the sidewall surface of the second section B to the bottom of the second section B and then flow to the drain. Instead, they move along the sidewall surface of the first section A to the bottom of the first section A and then flow to the drain. The flow path of electrons flowing out along the first section A is shorter than that of electrons flowing out along the second section B, which reduces the characteristic on-resistance of the device.

[0069] The ratio of the dimension of the second portion B along the direction from the bottom to the top of the substrate 200 to the dimension of the second portion B along the second direction Y ranges from 1.5 to 8. The dimension of the second portion B along the direction from the bottom to the top of the substrate 200 is greater than 1 μm.

[0070] Specifically, in some embodiments of the present invention, the size range of the first portion A along the first direction X is 0.5μm to 5μm; the size range of the first portion A along the second direction Y is 3μm to 15μm; and the size range of the first portion A along the direction from the bottom of the substrate 200 to the top of the substrate 200 is 4μm to 25μm. The size range of the second portion B along the first direction X is 0.5μm to 3μm; the size range of the second portion B along the second direction Y is 2μm to 15μm; and the size range of the second portion B along the direction from the bottom of the substrate 200 to the top of the substrate 200 is 3μm to 20μm.

[0071] The material of the isolation structure 211 is an insulating material, which includes silicon oxide.

[0072] Please continue to refer to this. Figure 26 After forming the isolation structure 211, the method further includes forming a source electrode 212 and a drain electrode 213 along a second direction Y, wherein the source electrode 212 and the drain electrode 213 are located on both sides of the isolation structure 211, the second direction Y is perpendicular to the first direction X, and the second direction Y is parallel to the surface of the substrate 200.

[0073] Figure 27 This is a perspective view of a semiconductor structure according to another embodiment of the present invention.

[0074] The similarities to the foregoing embodiments will not be repeated here. The differences from the foregoing embodiments are explained in the following sections. Figures 4 to 25 Please refer to the following: Figure 27 After forming the first opening 206 and before forming the second opening 209, the method further includes: forming a third opening (not shown) inside the first opening 206, the bottom of the third opening being lower than the bottom of the first opening 206; forming an isolation pattern with the first opening 206, the second opening 209, and the third opening; transferring the isolation pattern to the substrate 200 to form an isolation trench within the substrate 200; and filling the isolation trench to form an isolation structure.

[0075] The dimension of the third opening in the second direction Y is smaller than the dimension of the second opening in the second direction Y. The bottom of the third opening is not lower than the bottom of the second opening. Specifically, in an embodiment of the present invention, the bottom of the second opening is lower than the bottom of the third opening.

[0076] The isolation trench includes a first region, a second region, and a third region. The first region and the second region are arranged alternately along a first direction. The third region is located between the base 200 and the second region along the direction from the bottom of the base 200 to the top of the base 200. The isolation trench in the second region corresponds to the second opening, and the isolation trench in the third region corresponds to the third opening. The isolation trench in the second region is connected to the isolation trench in the first region, and the isolation trench in the first region is connected to the isolation trench in the third region. The first direction X is parallel to the surface of the base.

[0077] In the step of filling the isolation trenches to form an isolation structure, a medium material is filled into the isolation trenches. The medium material filling the isolation trenches in the first region is suitable for forming the first portion A of the isolation structure, the medium material filling the isolation trenches in the second region is suitable for forming the second portion B of the isolation structure, and the medium material filling the isolation trenches in the third region is suitable for forming the third portion C of the isolation structure. The sum of the dimensions of the third portion C and the first portion A along the direction from the bottom of the substrate 200 to the top of the substrate 200 is less than the dimension of the second portion B along the direction from the bottom of the substrate 200 to the top of the substrate 200.

[0078] Figure 28 This is a perspective view of a semiconductor structure according to another embodiment of the present invention.

[0079] The similarities to the foregoing embodiments will not be repeated here. The differences from the foregoing embodiments are as follows, please refer to... Figure 28 The sum of the dimensions of the third portion C and the first portion A along the direction from the bottom of the base 200 to the top of the base 200 is equal to the dimension of the second portion B along the direction from the bottom of the base 200 to the top of the base 200.

[0080] Accordingly, embodiments of the present invention also provide a semiconductor structure, which is formed by the above-described semiconductor structure formation method, and will not be described in detail here.

[0081] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method of forming a semiconductor structure, characterized by, The method comprises: providing a substrate; forming a mask structure on the substrate; forming a first opening in the mask structure, the first opening being used to define a position of an isolation structure; forming at least one second opening inside the first opening, the second opening having a bottom lower than that of the first opening, the at least one second opening being in communication with the first opening to form an isolation pattern; transferring the isolation pattern to the substrate to form an isolation trench in the substrate, the isolation trench comprising first regions and second regions, the first regions and the second regions being arranged alternately along a first direction, the second regions of the isolation trench corresponding to the second openings, the second regions of the isolation trench being in communication with the first regions of the isolation trench, the first direction being parallel to a surface of the substrate; filling the isolation trench to form the isolation structure; after forming the isolation structure, further comprising: forming a source electrode and a drain electrode, the source electrode and the drain electrode being located on two sides of the isolation structure along a second direction, the second direction being perpendicular to the first direction, the second direction being parallel to the surface of the substrate.

2. The method of forming a semiconductor structure of claim 1, wherein, The mask structure comprises: a buffer layer on the substrate, a first mask layer on the buffer layer, and a second mask layer on the first mask layer.

3. The method of forming a semiconductor structure of claim 2, wherein, The first opening exposes the first mask layer.

4. The method of forming a semiconductor structure of claim 2, wherein, The second opening exposes the buffer layer.

5. The method for forming a semiconductor structure according to claim 1 or 2, wherein The second opening exposes the substrate.

6. The method of forming a semiconductor structure of claim 1, wherein, The substrate comprises a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer, the isolation structure being located in the semiconductor layer.

7. The method of forming a semiconductor structure of claim 6, wherein, The material of the mask structure is different from that of the semiconductor layer.

8. The method of forming a semiconductor structure of claim 7, wherein, The material of the mask structure comprises at least one of silicon nitride and silicon oxide.

9. The method of forming a semiconductor structure of claim 1, wherein, The step of forming the first opening in the mask structure comprises: forming a first anti-reflective layer on a surface of the mask structure and a first photoresist layer on a surface of the first anti-reflective layer; performing exposure and development processing on the first photoresist layer and the first anti-reflective layer; and performing etching on the mask structure after the exposure and development processing to form the first opening.

10. The method of forming a semiconductor structure of claim 1, wherein, The step of forming the at least one second opening inside the first opening comprises: forming a second anti-reflective layer filling the first opening in the first opening; forming a second photoresist layer on a surface of the second anti-reflective layer; performing exposure and development processing on the second photoresist layer and the second anti-reflective layer; and performing etching on the mask structure after the exposure and development processing to form the second opening.

11. The method of forming a semiconductor structure of claim 1, wherein, The step of transferring the isolation pattern to the substrate to form the isolation trench in the substrate comprises: etching the substrate with the mask structure having the first opening and the second opening as a mask to form the isolation trench in the substrate.

12. The method of forming a semiconductor structure of claim 1, wherein, In the step of filling the isolation trenches to form the isolation structure, a dielectric material is filled into the isolation trenches, the dielectric material filled into the isolation trenches in the first region is adapted to form a first part of the isolation structure, and the dielectric material filled into the isolation trenches in the second region is adapted to form a second part of the isolation structure.

13. A semiconductor structure, characterized by The semiconductor structure is formed by a method for forming a semiconductor structure according to any one of claims 1 to 12.

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