A method for preparing an air gap in a semiconductor structure and a semiconductor structure

Abstract

This application discloses a method for preparing an air gap in a semiconductor structure and a semiconductor structure. The method includes: S1: placing a semiconductor substrate in the chamber of an ion beam deposition apparatus, the semiconductor substrate having at least one trench; S2: adjusting the semiconductor substrate to a first angle, using a first ion beam output from a first ion beam generator to bombard a target material, generating sputtered particles, and depositing a first film layer in a portion of the top and sidewalls of the trench; S3: adjusting the semiconductor substrate to a second angle, using a second ion beam generator to output a second ion beam to etch a first region of the first film layer, removing the first region of the first film layer; repeating S2 and S3 until an air gap meeting preset conditions is formed in the trench. This method can control the volume and depth of the air gap formed in the trench by controlling the angle at which the first film layer is deposited in the top and sidewalls of the trench, thus achieving in-situ control of the air gap.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for preparing an air gap in a semiconductor structure and the semiconductor structure thereof. Background Technology

[0002] With the development of semiconductor technology, the application of air gaps in semiconductor structures is becoming increasingly common. For example, air gaps are formed inside integrated circuits to reduce parasitic capacitance between wires, or resonant cavities are formed in thin-film cavity acoustic resonant filters. Therefore, how to form air gaps in semiconductor structures has become a research hotspot for those skilled in the art. Summary of the Invention

[0003] In view of the above problems, this application provides a method for preparing an air gap in a semiconductor structure and a semiconductor structure thereof. The specific solution is as follows:

[0004] A method for fabricating an air gap in a semiconductor structure, comprising:

[0005] S1: A semiconductor substrate is placed in the chamber of an ion beam deposition apparatus, the semiconductor substrate having at least one trench;

[0006] S2: Adjust the semiconductor substrate to a first angle, and use the first ion beam output by the first ion beam generating device to bombard the target material to generate sputtered particles, and deposit a first film layer in a portion of the top and sidewalls of the trench.

[0007] S3: Adjust the semiconductor substrate to the second angle, use the second ion beam generator to output the second ion beam, etch the first region of the first film layer, remove the first region of the first film layer, the first region being the protruding portion of the first film layer located at the top of the trench;

[0008] Repeat steps S2 and S3 until an air gap that meets the preset conditions is formed in the groove.

[0009] Optionally, using a first ion beam generating device to output a first ion beam to bombard the target material and generate sputtered particles, the first film layer is deposited in a portion of the top and sidewalls of the trench, including:

[0010] A first ion beam is output using a first ion beam generating device to bombard the target material, generating sputtered particles, and the semiconductor substrate is rotated with the center of the semiconductor substrate as the axis to deposit a first film layer in a portion of the top and sidewalls of the trench.

[0011] Optionally, the rotation speed of the semiconductor substrate ranges from 1 r / min to 200 r / min.

[0012] Optionally, the method further includes using a first ion beam generator to output a first ion beam to bombard the target material and generate sputtered particles, while simultaneously depositing a first film layer in a portion of the top and sidewalls of the trench:

[0013] A second ion beam generating device is used to output reactive particles, which react with the sputtered particles to deposit a first film layer in a portion of the top and sidewalls of the trench. The first film layer is a dielectric layer.

[0014] Alternatively, an inert particle output from a second ion beam generating device can be used to propel the sputtered particles to deposit a first film layer, which is a metal layer, in a portion of the top and sidewalls of the trench.

[0015] Optionally, the second ion beam generating device outputs reaction particles based on a reaction gas, which includes at least one of oxygen and nitrogen.

[0016] Optionally, the first ion beam is a neutral ion beam.

[0017] Optionally, before adjusting the semiconductor substrate to a first angle, bombarding the target with a first ion beam output from a first ion beam generating device to generate sputtered particles, and depositing a first film layer in a portion of the top and sidewalls of the trench, the method further includes:

[0018] A third ion beam, with a preset energy, is output from a second ion beam generating device to clean the trench.

[0019] Optionally, the preset energy is less than 200 eV.

[0020] Optionally, adjusting the semiconductor substrate to the first angle includes: adjusting the semiconductor substrate to the first angle such that the angle α between the normal direction and the horizontal direction of the semiconductor substrate is in the range of -90° to 60°; and the angle between the target material and the horizontal direction is in the range of 45° to 60°.

[0021] A semiconductor structure comprising:

[0022] Semiconductor substrate, the semiconductor substrate having trenches;

[0023] A film layer located at the top of the trench and a portion of the sidewall of the trench, with an air gap between the film layer and the bottom of the trench, the film layer being prepared using the method for preparing air gaps in semiconductor structures described above.

[0024] The method for preparing air gaps in a semiconductor structure provided in this application embodiment can control the volume and depth of the air gaps formed in the trenches by controlling the angle at which the first film layer is deposited at the top and sidewall portions of the trenches in the semiconductor substrate, thereby achieving in-situ control of the air gaps. Furthermore, the method for preparing air gaps in a semiconductor structure provided in this application embodiment forms the first film layer using an ion beam deposition process in the deposition chamber of an ion beam deposition equipment. This method does not require polymer degradation, is simple in procedure, and does not produce polymer residues, resulting in high production efficiency, low cost, and high yield. Attached Figure Description

[0025] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0026] Figure 1 This is a schematic diagram of a traditional method for fabricating air gaps in the film layer of a device.

[0027] Figure 2 This is a schematic diagram of the normalized volume of the air gap in the film layer of a semiconductor structure, with a depth of 54 nm and a normalized volume of 1.

[0028] Figure 3 This is a schematic diagram showing the normalized volume of the air gap in a semiconductor structure with a volume of 1.4 and a depth of 65 nm.

[0029] Figure 4 This is a schematic diagram of an air gap in a semiconductor structure with a normalized volume of 2 and a depth of 84 nm.

[0030] Figure 5 This is a schematic diagram of the parasitic capacitance as a function of the air gap volume, where the horizontal axis represents the normalized volume of the air gap and the vertical axis represents the capacitance of the parasitic capacitance.

[0031] Figure 6 This is a schematic diagram of the parasitic capacitance variation with the depth of the air gap, where the horizontal axis represents the depth of the air gap and the vertical axis represents the capacitance of the parasitic capacitance.

[0032] Figure 7 This is a schematic diagram illustrating the formation process of the air cavity in a thin-film cavity acoustic resonant filter.

[0033] Figure 8 This is a flowchart illustrating a method for preparing an air gap in a semiconductor structure according to an embodiment of this application.

[0034] Figures 9-15This is a schematic diagram of a portion of the structure involved in the fabrication process of the air gap in the semiconductor structure provided in one embodiment of this application. Detailed Implementation

[0035] The embodiments of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0036] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0037] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0038] Within integrated circuits, capacitance inevitably exists between the wires, known as parasitic capacitance. As integrated circuits continue to advance towards advanced technology nodes (below 7 nm), the RC delay (resistance-capacitance delay) caused by the parasitic capacitance between the wires in integrated circuits not only severely limits the switching and transmission speeds in integrated circuits, but also poses a serious threat to the reliability of integrated circuit operation.

[0039] Moreover, with the continuous advancement of manufacturing processes, there are more and more wires per unit area in integrated circuits, and the distance between the wires is smaller, making the coupling capacitance between the wires significant. This makes a series of problems such as crosstalk and increased delay caused by parasitic capacitance more prominent.

[0040] To reduce crosstalk and delay caused by parasitic capacitance in integrated circuits (ICs), it is necessary to reduce the parasitic capacitance between interconnects. Without changing the IC structure, reducing the k (dielectric constant) value of the dielectric material between interconnects can reduce the parasitic capacitance between them. Therefore, using low-k dielectric materials can effectively reduce the distributed capacitance between interconnects in ICs, thereby improving the overall chip performance.

[0041] In practical applications, dielectrics with k < 3 are typically referred to as low-k dielectrics. For 90nm processes, the dielectric constant k ranges from 3.0 to 2.9; for 65nm processes, it ranges from 2.6 to 2.5. Therefore, the inherent characteristics of low-k materials directly affect the ease of process integration. While low-k dielectrics have achieved dielectric constants close to 2.0 over the past few years, as technology nodes and die sizes continue to shrink, a dielectric constant close to 2.0 still cannot meet the requirements for low parasitic capacitance.

[0042] It should be noted that low-k dielectrics typically reduce their dielectric constant (k) by increasing the porosity of the dielectric layer, but theoretically, this still cannot reach the dielectric constant level of air. Since air has a dielectric constant of only 1.0, far lower than any low-k material, using air gaps as interconnect dielectrics has become the ideal choice for CMOS integrated circuits. Furthermore, air gaps have a lower elastic modulus compared to other dielectric filling methods, which, especially in high aspect ratio applications, can reduce stress during electromigration and improve device lifetime.

[0043] like Figure 1 As shown, a traditional method for fabricating air gaps in the dielectric layer of a device includes: depositing a UV-degradable material layer 02 on a substrate 01; then depositing a hard mask 03 on the UV-degradable material layer 02; removing part of the hard mask 03 and the UV-degradable material layer 02 through an etching process to form a trench; filling the trench with a conductive material and mechanically polishing it to form a conductive filler 04; and decomposing the remaining portion of the degradable material layer 02 to obtain the air gap 05. While this method can fabricate air gaps, it requires the use of UV-degradable materials, involves cumbersome steps, and generates polymer residues that can cause pollution. Furthermore, it consumes a significant amount of processing time, thus reducing production efficiency, increasing production costs, and further increasing the manufacturing cost of the device.

[0044] In addition, the volume of the air gap also has a significant impact on parasitic capacitance, such as... Figures 2-6 As shown, where, Figures 2-4 The volume and depth of different air gaps are shown, specifically... Figure 2 The normalized volume of the air gap in the structure shown is 1, and the depth is 54 nm. Figure 3 The normalized volume of the air gap in the structure shown is 1.4, and the depth is 65 nm. Figure 4 The normalized volume of the air gap in the structure shown is 2, and the depth is 84 nm. Figure 5A schematic diagram of the parasitic capacitance variation curve with the volume of the air gap is shown, where the horizontal axis is the normalized volume of the air gap and the vertical axis is the capacitance of the parasitic capacitance. Figure 6 This is a schematic diagram showing the variation of parasitic capacitance with the depth of the air gap, where the horizontal axis represents the depth of the air gap and the vertical axis represents the capacitance of the parasitic capacitance. From... Figure 5 It can be seen that the volume of the air gap is inversely proportional to the parasitic capacitance; the larger the air gap volume, the smaller the parasitic capacitance. Figure 6 It can be seen that the depth of the air gap is inversely proportional to the parasitic capacitance; the greater the depth of the air gap, the smaller the parasitic capacitance. However, current methods for preparing air gaps cannot control the volume and depth of the air gap in situ. That is, during the fabrication process of the air gap, it is not possible to control the volume and depth of the air gap to change the parasitic capacitance by altering its size.

[0045] In a film bulk acoustic resonator (FBAR), the surface micromachining technique based on MEMS (Micro-Electro-Mechanical Systems) is used to create an air gap on the upper surface of a silicon wafer to confine sound waves within the piezoelectric resonator. Specifically, for example... Figure 7 As shown, the method for forming an air gap in FBAR includes: etching trenches 111 on the surface of a silicon substrate 110; depositing a silicon dioxide layer 112 on the side of the silicon substrate 110 with trenches 111; depositing a sacrificial layer 113 on the side of the silicon dioxide layer 112 away from the silicon substrate 110; chemically and mechanically polishing the sacrificial layer 113, retaining only the portion of the sacrificial layer 113 located within the trenches 111; depositing a lower electrode 114 and a piezoelectric layer 115 on the side of the sacrificial layer 113 away from the silicon substrate 110; etching vias in the piezoelectric layer 115; depositing a lower electrode 116 and a lead wire 117 electrically connected to the upper electrode 114 through the vias on the side of the piezoelectric layer 115 away from the silicon substrate 110; and etching the sacrificial layer 113 to form an air gap within the trenches 111. This method of preparing an air cavity to form an air-metal interface by first filling and then removing the sacrificial material is compatible with conventional silicon processes and can be easily promoted for widespread use. However, the fabrication of the air gap in this filter is more complicated, such as... Figure 7 As shown, it takes 7 steps to form an air gap. Moreover, after the sacrificial layer in the trench is removed, there will be problems with molecular residue causing pollution, which will eventually interfere with the sound wave transmission and affect the performance of the filter.

[0046] In view of this, this application provides a method for preparing an air gap in a semiconductor structure, such as... Figure 8 As shown, the preparation method includes:

[0047] S1: As Figure 9 As shown, the semiconductor substrate 10 is placed in the chamber of the ion beam deposition apparatus, as follows: Figure 10 As shown, the semiconductor substrate 10 has at least one trench 11.

[0048] In one embodiment of this application, the following continues... Figure 9 As shown, the chamber of the ion beam deposition apparatus includes at least one ion beam generating device (such as a first ion beam generating device 101 or a second ion beam generating device 103) and a target material 102.

[0049] S2: Adjust the semiconductor substrate 10 to a first angle, and use the first ion beam 1011 output by the first ion beam generating device 101 to bombard the target 102, generating sputtered particles to deposit a first film layer 20 in a portion of the top and sidewalls of the trench, such as... Figure 11 As shown. Optionally, the first film layer can be a dielectric layer, such as a low-k dielectric layer, or a metal layer.

[0050] Optionally, in one embodiment of this application, the first ion beam generating device generates a first ion beam based on an inert gas, so that the first ion beam interacts only physically with the sputtering target, without any chemical interaction. Specifically, in one embodiment of this application, the inert gas includes, but is not limited to, one or a combination of several of He, Ne, Ar, Kr, and Xe.

[0051] Based on the above embodiments, in one embodiment of this application, the first ion beam is a neutral ion beam, so that the semiconductor substrate will not be damaged during the bombardment of the target by the first ion beam.

[0052] Specifically, in one embodiment of this application, the deposition of a first film layer in a portion of the top and sidewalls of the trench by outputting a first ion beam from a first ion beam generating device to bombard a target and generate sputtered particles includes: outputting a first ion beam from the first ion beam generating device to bombard a target and generate sputtered particles, and rotating the semiconductor substrate about the center of the semiconductor substrate as an axis to deposit a first film layer in a portion of the top and sidewalls of the trench, so that the first film layer is deposited as uniformly as possible in the top and sidewalls of the trench.

[0053] Optionally, in one embodiment of this application, the rotation speed of the semiconductor substrate is in the range of 1 r / min to 200 r / min. Further, the rotation speed of the semiconductor substrate is in the range of 10 r / min to 40 r / min to improve the uniformity of the first film deposition. However, this application does not limit this and it depends on the specific circumstances.

[0054] Specifically, in one embodiment of this application, the ion beam deposition chamber further includes a driving component, which can be used to adjust the angle of the semiconductor substrate and control the rotation of the semiconductor substrate, etc. Optionally, the driving component can be a motor-driven driving component, but this application does not limit it and it depends on the specific situation.

[0055] Based on any of the above embodiments, in one embodiment of this application, the method for preparing an air gap in a semiconductor structure is applied to an integrated circuit. When preparing an air gap in a dielectric layer, the first film layer is a dielectric layer. Optionally, the first dielectric layer is a low-k dielectric layer, such as a dielectric layer between interconnects in a transistor. However, this application does not limit this and it depends on the specific situation. When the method for preparing an air gap in a semiconductor structure is applied to a thin-film cavity acoustic resonant filter, the first film layer is a metal layer.

[0056] Based on the above embodiments, in one embodiment of this application, when the first film layer is a dielectric layer, the first film layer can be a dielectric layer formed by sputtered particles depositing alone, or it can be a dielectric layer formed after sputtered particles react with reactive particles. When the first film layer is a dielectric layer formed after sputtered particles react with reactive particles, the method, while using a first ion beam generating device to output a first ion beam to bombard the target and generate sputtered particles, and depositing the first film layer in a portion of the top and sidewalls of the trench, further includes:

[0057] The second ion beam generating device outputs reactive particles to cause the reactive particles and sputtered particles to react and deposit a first film layer in a portion of the top and sidewalls of the trench. This first dielectric layer is formed after the sputtered particles and reactive particles react, while simultaneously accelerating the movement speed of the sputtered particles and speeding up the deposition rate of the first film layer.

[0058] Optionally, in one embodiment of this application, the second ion beam generating device outputs reactive particles based on a reactive gas. Optionally, the reactive gas includes, but is not limited to, at least one of oxygen (O2) and nitrogen (N2). Optionally, the reactive gas can be an ion beam formed by oxygen, nitrogen, or a mixture of both with one or more inert gases. It should be noted that in this embodiment, the nitrogen or oxygen content ratio in the first film layer ranges from 0.5 to 2, but this application does not limit this value and it depends on the specific circumstances. It should be noted that in specific applications, this preparation method can adjust the amount of reactive particles output by the corresponding second ion beam generating device according to the energy of the first ion beam to control the content of reactive particles in the first film layer.

[0059] Specifically, in one embodiment of this application, the material of the first film layer is an insulating material. Optionally, the material of the first film layer includes, but is not limited to, SiNx, Al2O3, PTFE, doped silicon oxide, etc.

[0060] In another embodiment of this application, when the first film layer is a metal layer, the method further includes, while using a first ion beam generating device to output a first ion beam to bombard the target and generate sputtering particles to deposit the first film layer in a portion of the top and sidewalls of the trench, using a second ion beam generating device to output inert particles, so that the inert particles push the sputtering particles to deposit the first film layer in a portion of the top and sidewalls of the trench, thereby accelerating the movement speed of the sputtering particles and thus accelerating the deposition rate of the first film layer.

[0061] Specifically, in one embodiment of this application, the material of the first film layer is a metallic material, including but not limited to Mo, Au, W, etc.

[0062] It should be noted that if the first film layer is a dielectric layer, the method may also include, while using the first ion beam generating device to output a first ion beam to bombard the target and generate sputtered particles to deposit the first film layer in a portion of the top and sidewalls of the trench, using the second ion beam generating device to output inert particles, so that the inert particles push the sputtered particles to deposit the first film layer in a portion of the top and sidewalls of the trench, thereby accelerating the movement speed of the sputtered particles and thus accelerating the deposition rate of the first film layer.

[0063] Optionally, in one embodiment of this application, the second ion beam generating device generates inert particles based on an inert gas for output. The inert gas may include one or more of He, Ne, Ar, Kr and Xe. This application does not limit this and the specific choice depends on the circumstances.

[0064] Based on any of the above embodiments, in one embodiment of this application, adjusting the semiconductor substrate to a first angle includes: adjusting the semiconductor substrate to a first angle, and continuing as follows. Figure 9 As shown, the angle α between the normal direction and the horizontal direction of the semiconductor substrate is in the range of -90° to 60°. Further, the semiconductor substrate is adjusted to the first angle, and then... Figure 9 As shown, the angle α between the normal direction and the horizontal direction of the semiconductor substrate ranges from 0° to 60°, so that the first film layer can be deposited on the top of the trench and a portion of the sidewalls of the trench; at this time, the angle between the target material and the horizontal direction ranges from 45° to 60°. However, this application does not limit this, as long as the sputtered particles can enter the trench and deposit on a portion of the sidewalls of the trench.

[0065] It should be noted that, in this embodiment, controlling the first angle can control the area of ​​the portion of the first film layer formed on the sidewall of the trench, thereby controlling the volume and depth of the subsequently formed air gap, and thus achieving in-situ control of the volume and depth of the air gap. It should also be noted that, in this embodiment, with the angle between the target material and the horizontal direction fixed, the larger the angle α between the normal direction of the semiconductor substrate and the horizontal direction, the larger the area of ​​the first film layer formed on the sidewall of the trench (the area of ​​the first film layer covering the sidewall of the trench is closer to the bottom of the trench), and the smaller the volume and depth of the subsequently formed air gap. Conversely, the smaller the angle α between the normal direction of the semiconductor substrate and the horizontal direction, the smaller the area of ​​the first film layer formed on the sidewall of the trench (the area of ​​the first film layer covering the sidewall of the trench is closer to the top port of the trench), and the larger the volume and depth of the subsequently formed air gap.

[0066] It should also be noted that, in specific applications, the method for preparing air gaps in the semiconductor structure provided in this application can adjust the deposition rate of the first film layer by adjusting the energy and density of the first ion beam. Specifically, in one embodiment of this application, the energy range of the first ion beam output by the first ion beam generating device is 400 eV to 1000 eV to avoid the energy of the first ion beam being too low, resulting in a slow deposition rate of the first film layer; the energy range of the reactive particles output by the second ion beam generating device is 0 eV to 200 eV to avoid the energy of the reactive particles being too high, damaging the sidewalls of the trench, thereby damaging the device fabricated on the semiconductor substrate. However, this application does not limit this, and the specific method depends on the circumstances.

[0067] Based on any of the above embodiments, in a specific embodiment of this application, the first film layer may be formed by ion beam sputtering deposition.

[0068] S3: Adjust the semiconductor substrate to the second angle, use the second ion beam generator to output the second ion beam, etch the first region of the first film layer, and remove the first region of the first film layer, wherein the first region is the protruding portion of the first film layer located at the top of the trench.

[0069] It should be noted that during the deposition of the first film layer, a protrusion will form at the top of the trench along a direction parallel to the plane of the semiconductor substrate, such as... Figure 11 As shown, the protrusion hinders subsequent sputtered particles from entering the trench. Therefore, in this embodiment, the method further includes adjusting the semiconductor substrate to a second angle, using a second ion beam generator to output a second ion beam, and etching the first region of the first film layer to remove the first region of the first film layer, such as... Figure 12 As shown, the first region is a protruding portion of the first film layer located at the top of the trench, so as to facilitate the subsequent sputtering of particles into the interior of the trench, forming the first film layer in a portion of the trench sidewall.

[0070] It should also be noted that the formation time of the first film layer in S2 is not limited in this embodiment of the application, that is, the execution time of the S2 process is not limited. It depends on the obstruction of sputtered particles entering the trench by the protrusion formed on the top of the first film layer in the direction parallel to the plane of the semiconductor substrate.

[0071] Optionally, in one embodiment of this application, when the semiconductor substrate is adjusted to the second angle, the angle between the normal direction of the semiconductor substrate and the horizontal direction is not less than 45°, so as to better remove the first region of the first film layer and modify the first film layer, wherein the horizontal direction is parallel to the plane where the semiconductor substrate is located.

[0072] Optionally, in one embodiment of this application, the second ion beam generating device generates a second ion beam based on an inert gas, so that there is only a physical interaction between the second ion beam and the first film layer, without any chemical interaction.

[0073] S4: As Figures 13-14 As shown, repeat steps S2 and S3 until an air gap meeting the preset conditions is formed within the groove, such as... Figure 15 As shown. Optionally, the preset conditions include the volume of the air gap being within a preset range. It should be noted that the embodiments of this application do not limit the preset conditions, and the specific conditions depend on the usage requirements.

[0074] It should be noted that the number of repetitions of S2 and S3 in this embodiment is not limited, and depends on the specific circumstances.

[0075] Based on any of the above embodiments, in one embodiment of this application, the deposition chamber of the ion beam deposition equipment is temperature-controlled by a cooling device and back helium to ensure that the temperature of the semiconductor substrate is ≤175°C. The back helium is helium gas introduced into the stage on which the semiconductor substrate is placed so that the back of the semiconductor substrate is purged with helium gas, making it easier to reduce the temperature of the semiconductor substrate.

[0076] The method for preparing air gaps in a semiconductor structure provided in this application embodiment can control the volume and depth of the air gaps formed in the trenches by controlling the angle at which the first film layer is deposited at the top and sidewall portions of the trenches in the semiconductor substrate, thereby achieving in-situ control of the air gaps. Furthermore, the method for preparing air gaps in a semiconductor structure provided in this application embodiment forms the first film layer using an ion beam deposition process in the deposition chamber of an ion beam deposition equipment. This method does not require polymer degradation, is simple in procedure, and does not produce polymer residues, resulting in high production efficiency, low cost, and high yield.

[0077] Furthermore, in this embodiment, the deposition of the first film layer and the removal of the first region in the first film layer are both completed in the same chamber, saving transmission time and the risk of oxidation by air, thereby further improving the production efficiency and yield of the semiconductor structure.

[0078] Based on any of the above embodiments, in one embodiment of this application, the method further includes, before adjusting the semiconductor substrate to a first angle, using a first ion beam output from a first ion beam generating device to bombard the target material to generate sputtered particles, and depositing a first film layer in a portion of the top and sidewalls of the trench:

[0079] A third ion beam is output from a second ion beam generator to clean the trench, removing dirt and oxide layers from the trench surface to increase the adhesion of the subsequently formed first film layer.

[0080] Optionally, in one embodiment of this application, the third ion beam is a low-energy ion beam, for example, the third ion beam has a preset energy of less than 200 eV, so that during the cleaning of the trench using the third ion beam, the third ion beam will not damage the sidewalls of the trench, thereby causing the device made from the semiconductor substrate to fail.

[0081] Specifically, in one embodiment of this application, the second ion beam generating device generates a second ion beam based on an inert gas, so that the second ion beam interacts only physically with the semiconductor substrate, without any chemical interaction. Specifically, in one embodiment of this application, the inert gas includes, but is not limited to, one or a combination of several of He, Ne, Ar, Kr, and Xe.

[0082] The method for preparing an air gap in a semiconductor structure provided in this application will be described below with reference to specific embodiments.

[0083] Example 1:

[0084] In this embodiment, the first film layer is a dielectric layer, and the width of the trench in the substrate ranges from 20 nm to 50 nm. Specifically, the method for fabricating air gaps in the semiconductor structure provided in this application embodiment includes:

[0085] S11 introduces Ar into the second ion beam generating device (i.e., auxiliary ion source) to generate a neutral third ion beam. The angle between the third ion beam and the surface of the semiconductor substrate to be cleaned is in the range of 10° to 45°, so as to remove oxides and dirt from the trench sidewalls in the semiconductor substrate, expose clean trench sidewalls, and increase the adhesion of the subsequent formation of the first film layer.

[0086] S21: Ar is introduced into the first ion beam generating device (i.e., sputtering ion source) to generate a first ion beam, which bombards the Si target material to generate Si sputtering particles. The Si sputtering particles react with the reactive particles output from the second ion beam generating device, and under the impetus of the reactive particles output from the second ion beam generating device, a first film layer is deposited in a portion of the top and sidewalls of the trench. The first film layer is a silicon nitride thin film, and the thickness of the first film layer ranges from 20 nm to 50 nm. The angle between the normal direction and the horizontal direction of the semiconductor substrate is less than 60°, and the reactive particles are N2 and / or Ar.

[0087] S31: Ar is introduced into the second ion beam generating device to generate a second ion beam to bombard the trench surface. The angle between the normal direction of the semiconductor substrate and the transmission direction of the second ion beam is 45° to remove the first region at the top of the trench. The first region is the protruding portion of the first film layer located at the top of the trench.

[0088] S41: Repeat steps S21 and S31 until an air gap that meets the preset conditions is obtained by deposition. It should be noted that the rotation speed of the semiconductor substrate is 20 r / min throughout the deposition process.

[0089] Example 2:

[0090] In this embodiment, the first film layer is a dielectric layer, and the width of the trench in the substrate ranges from 30 nm to 60 nm. Specifically, the method for preparing the air gap in the semiconductor structure provided in this application embodiment includes:

[0091] S11 introduces Ar into the second ion beam generating device (i.e., auxiliary ion source) to generate a neutral third ion beam. The angle between the third ion beam and the surface of the semiconductor substrate to be cleaned is in the range of 10° to 45°, so as to remove oxides and dirt from the trench sidewalls in the semiconductor substrate, expose clean trench sidewalls, and increase the adhesion of the subsequent formation of the first film layer.

[0092] S21: Ar is introduced into the first ion beam generating device (i.e., sputtering ion source) to generate a first ion beam, which bombards the Al target material to generate Al sputtered particles. The Al sputtered particles react with the reactive particles output from the second ion beam generating device, and under the impetus of the reactive particles output from the second ion beam generating device, a first film layer is deposited in a portion of the top and sidewalls of the trench. The first film layer is an aluminum oxide thin film, and the thickness of the first film layer ranges from 40 nm to 70 nm. The angle between the normal direction of the semiconductor substrate and the transport direction of the reactive particles is less than 60°. The reactive particles are O2 and / or Ar.

[0093] S31: Ar is introduced into the second ion beam generating device to generate a second ion beam to bombard the trench surface. The angle between the normal direction of the semiconductor substrate and the transmission direction of the second ion beam is 60° to remove the first region at the top of the trench. The first region is the protruding portion of the first film layer located at the top of the trench.

[0094] S41: Repeat steps S21 and S31 until an air gap that meets the preset conditions is obtained by deposition. It should be noted that the rotation speed of the semiconductor substrate is 40 r / min during all deposition processes.

[0095] Example 3

[0096] In this embodiment, the first film layer is a dielectric layer, and the width of the trench in the substrate ranges from 20 nm to 50 nm. Specifically, the method for fabricating air gaps in the semiconductor structure provided in this application embodiment includes:

[0097] S11 introduces He into the second ion beam generating device (i.e., auxiliary ion source) to generate a neutral third ion beam. The angle between the third ion beam and the surface of the semiconductor substrate to be cleaned is in the range of 10° to 45°, so as to remove oxides and dirt from the trench sidewalls in the semiconductor substrate, expose clean trench sidewalls, and increase the adhesion of the subsequent formation of the first film layer.

[0098] S21: He is introduced into the first ion beam generating device (i.e., sputtering ion source) to generate a first ion beam, which bombards the Si target material to generate Si sputtering particles. The Si sputtering particles react with the reactive particles output from the second ion beam generating device, and under the impetus of the reactive particles output from the second ion beam generating device, a first film layer is deposited in a portion of the top and sidewalls of the trench. The first film layer is a silicon nitride thin film, and the thickness of the first film layer ranges from 70 nm to 90 nm. The angle between the normal direction of the semiconductor substrate and the horizontal direction is less than 60°, and the reactive particles are N2 and / or Ar.

[0099] S31: Ar is introduced into the second ion beam generating device to generate a second ion beam to bombard the trench surface. The angle between the normal direction of the semiconductor substrate and the transmission direction of the second ion beam is 45° to remove the first region at the top of the trench. The first region is the protruding portion of the first film layer located at the top of the trench.

[0100] S41: Repeat steps S21 and S31 until an air gap that meets the preset conditions is obtained by deposition. It should be noted that the rotation speed of the semiconductor substrate is 20 r / min throughout the deposition process.

[0101] Example 4

[0102] In this embodiment, the first film layer is a metal layer, and the width of the trench in the substrate ranges from 20 nm to 50 nm. Specifically, the method for preparing the air gap in the semiconductor structure provided in this application embodiment includes:

[0103] S11 introduces He into the second ion beam generating device (i.e., auxiliary ion source) to generate a neutral third ion beam. The angle between the third ion beam and the surface of the semiconductor substrate to be cleaned is in the range of 10° to 45°, so as to remove oxides and dirt from the trench sidewalls in the semiconductor substrate, expose clean trench sidewalls, and increase the adhesion of the subsequent formation of the first film layer.

[0104] S21: He is introduced into the first ion beam generating device (i.e., sputtering ion source) to generate a first ion beam, which bombards the Mo target to generate Mo sputtering particles. Under the impetus of inert particles output from the second ion beam generating device, the Mo sputtering particles deposit a first film layer in a portion of the top and sidewalls of the trench. The first film layer is a Mo thin film with a thickness ranging from 70 nm to 90 nm. The angle between the normal direction and the horizontal direction of the semiconductor substrate is less than 60°. The inert particles are Ar.

[0105] S31: Ar is introduced into the second ion beam generating device to generate a second ion beam to bombard the trench surface. The angle between the normal direction of the semiconductor substrate and the transmission direction of the second ion beam is 45° to remove the first region at the top of the trench. The first region is the protruding portion of the first film layer located at the top of the trench.

[0106] S41: Repeat steps S21 and S31 until an air gap that meets the preset conditions is obtained by deposition. It should be noted that the rotation speed of the semiconductor substrate is 20 r / min throughout the deposition process.

[0107] Accordingly, embodiments of this application also provide a semiconductor structure, such as... Figure 15 As shown, the semiconductor structure includes:

[0108] Semiconductor substrate 10, the semiconductor substrate having trenches 11;

[0109] A film layer 20 is located at the top of the trench 11 and a portion of the sidewall of the trench 11. An air gap exists between the film layer 20 and the bottom of the trench 11. The film layer 20 is prepared using the method for preparing air gaps in semiconductor structures provided in any of the above embodiments. Optionally, the film layer can be used to form a dielectric layer between interconnects in a transistor, or it can be used to form a metal layer in contact with the air cavity in a thin-film cavity acoustic resonant filter. However, this application does not limit this and it depends on the specific circumstances.

[0110] Optionally, in one embodiment of this application, when the film layer is a dielectric layer, the film layer can be an insulating material layer, specifically, the film layer can be a SiNx layer, an Al2O3 layer, a PTFE layer, a doped silicon oxide layer, etc.; in another embodiment of this application, when the first film layer is a metal layer, the material of the first film layer is a metal material, and the metal material includes, but is not limited to, Mo, Au, W, etc.

[0111] In summary, the method for preparing air gaps in a semiconductor structure provided in this application embodiment can control the volume and depth of the air gaps formed in the trenches by controlling the angle at which the first film layer is deposited at the top and sidewall portions of the trenches in the semiconductor substrate, thereby achieving in-situ control of the air gaps. Furthermore, the method for preparing air gaps in a semiconductor structure provided in this application embodiment forms the first film layer using an ion beam deposition process in the deposition chamber of an ion beam deposition equipment. This method does not require polymer degradation, is simple in procedure, does not produce polymer residues, and has high production efficiency, low cost, and high yield.

[0112] Furthermore, in this embodiment, the deposition of the first film layer and the removal of the first region in the first film layer are both completed in the same chamber, saving transmission time and the risk of oxidation by air, thereby further improving the production efficiency and yield of the semiconductor structure.

[0113] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0114] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for preparing an air gap in a semiconductor structure, characterized in that, include: S1: A semiconductor substrate is placed in the chamber of an ion beam deposition apparatus, the semiconductor substrate having at least one trench; S2: Adjust the semiconductor substrate to a first angle, and use the first ion beam output by the first ion beam generating device to bombard the target material to generate sputtered particles, and deposit a first film layer in a portion of the top and sidewalls of the trench. S3: Adjust the semiconductor substrate to the second angle, use the second ion beam generator to output the second ion beam, etch the first region of the first film layer, remove the first region of the first film layer, the first region being the protruding portion of the first film layer located at the top of the trench; Repeat steps S2 and S3 until an air gap that meets the preset conditions is formed in the groove.

2. The method for preparing an air gap in a semiconductor structure according to claim 1, characterized in that, Using a first ion beam generation device to output a first ion beam, bombarding the target material to generate sputtered particles, and depositing a first film layer in a portion of the top and sidewalls of the trench, the process includes: A first ion beam is output using a first ion beam generating device to bombard the target material, generating sputtered particles, and the semiconductor substrate is rotated with the center of the semiconductor substrate as the axis to deposit a first film layer in a portion of the top and sidewalls of the trench.

3. The method for preparing an air gap in a semiconductor structure according to claim 2, characterized in that, The rotational speed of the semiconductor substrate ranges from 1 r / min to 200 r / min.

4. The method for preparing an air gap in a semiconductor structure according to claim 1, characterized in that, The method further includes: using a first ion beam generator to output a first ion beam to bombard a target material and generate sputtered particles; and simultaneously depositing a first film layer on the top and a portion of the sidewalls of the trench. A second ion beam generating device is used to output reactive particles, which react with the sputtered particles to deposit a first film layer in a portion of the top and sidewalls of the trench. The first film layer is a dielectric layer. Alternatively, an inert particle generator can be used to output inert particles, which in turn drive the sputtering particles to deposit a first film layer, which is a metal layer, in a portion of the top and sidewalls of the trench.

5. The method for preparing an air gap in a semiconductor structure according to claim 4, characterized in that, The second ion beam generating device outputs reaction particles based on a reaction gas, which includes at least one of oxygen and nitrogen.

6. The method for preparing an air gap in a semiconductor structure according to claim 1, characterized in that, The first ion beam is a neutral ion beam.

7. The method for preparing an air gap in a semiconductor structure according to claim 1, characterized in that, The method further includes, before adjusting the semiconductor substrate to a first angle, using a first ion beam output from a first ion beam generating device to bombard the target and generate sputtered particles, and depositing a first film layer in a portion of the top and sidewalls of the trench: A third ion beam, with a preset energy, is output from a second ion beam generating device to clean the trench.

8. The method for preparing an air gap in a semiconductor structure according to claim 7, characterized in that, The preset energy is less than 200 eV.

9. The method for preparing an air gap in a semiconductor structure according to claim 1, characterized in that, Adjusting the semiconductor substrate to a first angle includes: adjusting the semiconductor substrate to a first angle such that the angle α between the normal direction and the horizontal direction of the semiconductor substrate is in the range of -90° to 60°; and the angle between the target material and the horizontal direction is in the range of 45° to 60°.

10. A semiconductor structure, characterized in that, The semiconductor structure includes: Semiconductor substrate, the semiconductor substrate having trenches; A film layer located at the top of the trench and a portion of the sidewall of the trench, with an air gap between the film layer and the bottom of the trench, the film layer being prepared using the method for preparing air gaps in a semiconductor structure according to any one of claims 1-9.

Images