Quantum cascade laser with heterogeneous waveguide and preparation method thereof
By using InP+VO2 heterogeneous waveguide structure in quantum cascade lasers to regulate the optical limiting factor and waveguide transmission loss factor, the problem of improving output power and current density in the prior art is solved, and more efficient optical output and longer Laser devices with lifespan.
Patent Information
- Application Number
- CN202411124596.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-16
- Publication Date
- 2024-12-20
AI Technical Summary
Existing quantum cascade lasers have shortcomings in increasing output power and reducing threshold current density, especially in the optimization of chip process, which affects their optical limiting factors and loss factors, thereby limiting the increase in output power.
Using InP+VO2 heterogeneous waveguide structure, VO2 low-temperature pulse laser deposition is carried out on the waveguide layer on the N-type InP to form a ridge waveguide and set a waveguide groove on it. Combined with a thin film layer with high refractive index and high extinction coefficient, light limitation is regulated. Factors and waveguide transmission loss factor improve output power and reduce threshold current density.
By regulating the optical limiting factor and waveguide transmission loss factor, the output power of the quantum cascade laser is significantly improved and the threshold current density is reduced. At the same time, the preparation process is simplified, the packaging stress is reduced, and the chip life is extended.
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Figure CN119171182A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a quantum cascade laser with a heterogeneous waveguide and a preparation method thereof, and belongs to the technical field of optoelectronics. Background Art
[0002] Quantum Cascade Laser (QCL) is a unipolar semiconductor optoelectronic device based on inter-subband electron transitions. It is one of the light sources in the mid-infrared band (3-5um), one of the atmospheric windows, and has important applications in gas composition detection, medical diagnosis, remote sensing of dangerous goods, free space communication, directional infrared countermeasures, etc. All countries have carried out large-scale research on related technologies, and some countries have clearly stipulated that lasers with wavelengths greater than 1.9μm and average powers greater than 0.5W are prohibited.
[0003] In 2001, Faist and others successfully developed the world's first quantum cascade laser with a wavelength of 4.2μm and achieved continuous operation at room temperature. Based on the AlAs high-barrier design, the Razeghi research group at Northwestern University in the United States adopted the buried heterojunction secondary epitaxy process to achieve a QCL single-tube chip with a maximum power of 5.6W under continuous conditions at room temperature, and the device electro-optical conversion efficiency reached 21%, with a wavelength of 4.7μm. Domestic research on QCL is mainly represented by the Institute of Semiconductors of the Chinese Academy of Sciences. In 2023, Liu et al. designed a single phonon resonance with micro-slant transitions and used a strain-compensated epitaxial structure to achieve a 4.6μm lasing wavelength and a continuous output power of 3W for a single QCL tube. At present, domestic QCL research is still in the early stages of development, and its overall goal is to increase chip output power and reduce threshold current density. Related research mainly focuses on the optimization of epitaxial layer structure and the improvement of crystal quality, while chip process optimization is rarely reported.
[0004] For Fabry-Perot resonant cavity QCL, the waveguide structure directly determines the optical confinement factor and loss factor of the chip, which in turn affects the output power. The traditional InP-based QCL chip manufacturing process uses a double-groove ridge waveguide, and InP with a lower refractive index than the active area AlInAs / GaInAs is used as the waveguide layer. In order to further improve the output power of the chip and reduce the threshold current density, the present invention proposes a new method, namely, the method of using InP+VO2 heterogeneous waveguide to achieve the desired purpose by improving the optical confinement factor. Summary of the invention
[0005] In view of the deficiencies of the prior art, the present invention provides a quantum cascade laser with a heterogeneous waveguide and a preparation method thereof, which can effectively improve the output power of the QCL and reduce the threshold current density of the chip.
[0006] The technical solution of the present invention is as follows:
[0007] On the one hand, the present invention provides a quantum cascade laser with a heterogeneous waveguide, comprising a stacked structure, a ridge waveguide and an electric injection region, wherein the stacked structure comprises, from bottom to top, an N-type InP substrate, an N-type InP buffer layer, an N-type InP lower waveguide layer, an N-type GaInAs lower confinement layer, a multi-period active region structure, an N-type GaInAs upper confinement layer, an N-type InP upper waveguide layer and an N-type highly doped InP ohmic contact layer;
[0008] The ridge waveguide extends along a first direction of the QCL chip, where the first direction is the extension direction of the chip cavity length, i.e., the light emitting direction;
[0009] The ridge waveguide is prepared by removing the ohmic contact layer and performing VO2 low-temperature pulsed laser deposition on the N-type InP upper waveguide layer;
[0010] A portion of the N-type highly doped InP ohmic contact layer is retained above the N-type InP upper waveguide layer, and a VO2 deposition layer is provided at the remaining upper position;
[0011] Two waveguide grooves are arranged on both sides of the ridge waveguide, and the waveguide grooves are etched to the upper part of the N-type GaInAs lower confinement layer, and are prepared by completely removing the N-type highly doped InP ohmic contact layer, the N-type InP upper waveguide layer, the N-type GaInAs upper confinement layer, the multi-period active area structure and part of the N-type GaInAs lower confinement layer; a thin film layer with a high refractive index and a high extinction coefficient is evaporated on the bottom, the outer side wall and part of the ridge waveguide area of the waveguide groove;
[0012] The electric injection region extends along the first direction of the QCL chip and is formed on the N-type highly doped InP ohmic contact layer. The N-type highly doped InP ohmic contact layer region is the electric injection region, and the N-type highly doped InP ohmic contact layer is not covered with a thin film layer.
[0013] An upper electrode metal layer is deposited above the thin film layer and the N-type highly doped InP ohmic contact layer; and a lower electrode metal layer is arranged below the N-type InP substrate.
[0014] The present invention performs VO2 low-temperature pulse laser deposition on an N-type InP upper waveguide layer, forms an InP+VO2 heterogeneous waveguide, and realizes the regulation of the light confinement factor and the waveguide transmission loss factor in the active area based on the interaction between the laser waveguide mode and the heterogeneous waveguide layer. The light confinement factor and the waveguide transmission loss factor can be obtained by numerical calculation of the transmission matrix model of the two-dimensional waveguide. Further, by regulating the light confinement factor and the waveguide transmission loss factor, the chip output power is increased and the threshold current density is reduced.
[0015] Preferably, the waveguide groove is a trapezoidal groove, the maximum width along the second direction is 10 μm, and the minimum width is 8 μm, and the second direction is along the stacking direction of the stacked structure.
[0016] Preferably, the ridge waveguide is a trapezoidal structure, with a maximum width of 18 μm and a minimum width of 16 μm along the second direction.
[0017] Preferably, two electric injection regions are provided on the ridge waveguide, and the electric injection regions are in the shape of circular holes with a diameter of 0.75 μm.
[0018] Further preferably, the distance between the two injection regions on the same chip is 7-9 μm.
[0019] Preferably, the thin film layer material is Si3N4, Si or Ge, and has a thickness of 300 nm.
[0020] Preferably, the thickness of the VO2 deposited layer is the same as the thickness of the N-type highly doped InP ohmic contact layer.
[0021] Further preferably, the thickness of the VO2 deposition layer deposited by low-temperature pulsed laser deposition is 250-750nm.
[0022] Further preferably, the thickness of the N-type highly doped InP ohmic contact layer and the thickness of the VO2 deposition layer are both 500 nm.
[0023] The thickness of the VO2 deposition layer and the thickness of the N-type highly doped InP ohmic contact layer can be inconsistent or consistent, but the consistency of the thickness of the two can effectively reduce the complexity of the preparation process of the non-current injection area, while ensuring the consistency of the plane on the chip, thereby effectively reducing the stress of the chip during packaging and improving the life of the chip.
[0024] Preferably, the upper electrode metal layer is a Ti / Au metal layer with a thickness of 40 / 250 nm; the lower electrode metal layer is an Au metal layer with a thickness of 4 μm.
[0025] In another aspect, the present invention provides a method for preparing a quantum cascade laser having a heterogeneous waveguide, comprising the following steps:
[0026] (1) epitaxially depositing an N-type InP buffer layer, an N-type InP lower waveguide layer, an N-type GaInAs lower confinement layer, a multi-period active region structure, an N-type GaInAs upper confinement layer, an N-type InP upper waveguide layer and an N-type highly doped InP ohmic contact layer on an N-type InP substrate in sequence by using a MOCVD process to form a stacked structure;
[0027] (2) etching the stacked structure to form a waveguide groove by dry etching or wet etching, forming a ridge waveguide structure through the waveguide groove, and forming a ridge waveguide between two waveguide grooves;
[0028] (3) dry etching the ridge waveguide to retain only the N-type highly doped InP ohmic contact layer in the two electrical injection regions;
[0029] (4) preparing a VO2 deposition layer on the surface of the N-type InP upper waveguide layer between the two electrical injection regions by a low-temperature pulsed laser deposition process;
[0030] (5) using a low temperature growth process to prepare a thin film layer with a high refractive index and a high extinction coefficient on the bottom, outer wall and ridge waveguide area of the waveguide groove;
[0031] (6) etching away the high refractive index and high extinction coefficient thin film layer in the electric injection region on the surface of the formed ridge waveguide, and leaving no thin film layer covering the N-type highly doped InP ohmic contact layer in the two electric injection regions;
[0032] (7) Using electron beam evaporation technology, a Ti / Au (40 / 250 nm) upper electrode metal layer is uniformly deposited on the chip surface, where the Ti layer is a wetting layer to make Au and the semiconductor sample surface better contact, and the substrate temperature is 20 °C;
[0033] (8) The chip thickness is thinned and a 4 μm lower electrode Au metal layer is deposited under the substrate.
[0034] The beneficial effects of the present invention are:
[0035] The present invention realizes the power improvement and threshold current density reduction of quantum cascade laser chip by performing VO2 low-temperature pulse laser deposition on the N-type InP upper waveguide layer. VO2 is a material of metal-insulation phase transition. It is in the insulator phase below the metal-insulation phase transition temperature of 62°C. The imaginary part of its dielectric function is small and changes with temperature, which can modify the optical properties of the laser waveguide mode and the light confinement factor perpendicular to the junction plane. Based on this, the present invention forms a heterogeneous waveguide layer by depositing VO2 on the N-type InP upper waveguide layer, and realizes the regulation of the light confinement factor and waveguide transmission loss factor in the active area based on the interaction between the laser waveguide mode and the heterogeneous waveguide layer. Among them, the light confinement factor and waveguide transmission loss factor can be obtained by numerical calculation of the transmission matrix model of the two-dimensional waveguide. Further, by regulating the light confinement factor and waveguide transmission loss factor, the chip output power is increased and the threshold current density is reduced.
[0036] The present invention adopts a method of double-sided electric injection of the ridge waveguide, which improves the uniformity of current injection and increases the effective light-emitting area of the active region without affecting the effect of the heterogeneous waveguide layer, thereby improving the light output power of the chip.
[0037] The present invention sets the thickness of the VO2 deposition layer to be consistent with the thickness of the ohmic contact layer, effectively reducing the complexity of the preparation process of the non-current injection area. At the same time, it ensures the consistency of the plane on the chip, thereby effectively reducing the stress of the chip during packaging and improving the life of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 A top view of the stacked structure after depositing the VO2 deposition layer in step (4) of the present invention;
[0039] Figure 2 A top view of the stacked structure after the thin film layer is evaporated in step (5) of the present invention;
[0040] Figure 3 A top view of the stacked structure after the upper electrode metal layer is evaporated in step (7) of the present invention;
[0041] Figure 4 The epitaxial stacking structure of step (1) of the present invention;
[0042] Figure 5 It is a schematic diagram of the complete chip structure of the present invention;
[0043] Figure 6 is a flow chart of the method of the present invention;
[0044] Figure 7 The result diagram of the light confinement factor and light transmission loss factor calculated by the present invention, wherein the abscissa is the deposition thickness of VO2;
[0045] Figure 8 It is a performance comparison diagram of Example 1, Example 2, Example 3 and Comparative Example 1;
[0046] In the figure: 1-N-type GaInAs lower confinement layer, 2-VO2 deposition layer, 3-N-type highly doped InP ohmic contact layer, 4-thin film layer, 5-upper electrode metal layer, 6-InP substrate, 7-N-type InP buffer layer, 8-N-type InP lower waveguide layer, 9-multi-period active area structure, 10-N-type GaInAs upper confinement layer, 11-N-type InP upper waveguide layer, 12-lower electrode metal layer, 13-waveguide groove, 14-electric injection area. DETAILED DESCRIPTION
[0047] The present invention will be further described below by way of embodiments in conjunction with the accompanying drawings, but is not limited thereto.
[0048] Embodiment 1:
[0049] A quantum cascade laser with a heterogeneous waveguide, such as Figures 1 to 4As shown, it includes a stacked structure, a ridge waveguide and an electric injection area 14. The stacked structure includes, from bottom to top, an N-type InP substrate 6, an N-type InP buffer layer 7, an N-type InP lower waveguide layer 8, an N-type GaInAs lower confinement layer 1, a multi-period active area structure 9, an N-type GaInAs upper confinement layer 10, an N-type InP upper waveguide layer 11 and an N-type highly doped InP ohmic contact layer 3.
[0050] The ridge waveguide extends along a first direction of the semiconductor laser chip, where the first direction is the extension direction of the cavity length of the semiconductor laser chip, ie, the light emitting direction; the electric injection region 14 is formed on the ridge waveguide.
[0051] The ridge waveguide is prepared by removing the ohmic contact layer and performing VO2 low-temperature pulse laser deposition on the N-type InP upper waveguide layer. A portion of the N-type highly doped InP ohmic contact layer is retained above the N-type InP upper waveguide layer, and a VO2 deposition layer is provided at the remaining upper position.
[0052] The thickness of the N-type highly doped InP ohmic contact layer 3 is 500 nm.
[0053] The electrical injection region 14 is in the shape of a circular hole with a diameter of 0.75 μm, and the distance between two adjacent injection regions 14 is 9 μm.
[0054] The VO2 deposition layer 2 is arranged in the upper layer of the ridge waveguide stacked structure except for the charge injection region and other regions.
[0055] The thickness of the VO2 deposition layer 2 and the N-type highly doped InP ohmic contact layer 3 is equal to 500 nm.
[0056] Two waveguide grooves 13 are arranged on both sides of the ridge waveguide. The waveguide groove 13 is prepared by completely removing the N-type highly doped InP ohmic contact layer 3, the N-type InP upper waveguide layer 11, the N-type GaInAs upper confinement layer 10, the multi-period active area structure 9 and part of the N-type GaInAs lower confinement layer 1, and a thin film layer 4 with a high refractive index and a high extinction coefficient is arranged on the bottom and the outer wall of the waveguide groove.
[0057] The waveguide groove is a trapezoidal groove, with a maximum width of 10 μm and a minimum width of 8 μm along the second direction, and the second direction is the stacking direction of the stacked structure. The ridge waveguide is a trapezoidal structure, with a maximum width of 18 μm and a minimum width of 16 μm along the second direction.
[0058] The electric injection zone extends along the first direction of the QCL chip and is formed on the N-type highly doped InP ohmic contact layer. The N-type highly doped InP ohmic contact layer area is the electric injection zone, and the N-type highly doped InP ohmic contact layer is not covered by a thin film layer.
[0059] An upper electrode metal layer is deposited on the thin film layer and the N-type highly doped InP ohmic contact layer; a lower electrode metal layer is disposed under the N-type InP substrate. The upper electrode metal layer is a Ti / Au metal layer with a thickness of 40 / 250 nm; and the lower electrode metal layer is an Au metal layer with a thickness of 4 μm.
[0060] The thin film layer 4 is made of Si3N4, which is evaporated with a thickness of 300nm using PECVD equipment and is arranged on the upper surface of the ridge waveguide VO2 deposition layer 2. Its structure is as follows Figure 5 As shown, its performance is Figure 7 shown.
[0061] Example 2
[0062] A quantum cascade laser with a heterogeneous waveguide is as described in Example 1, except that the N-type highly doped InP ohmic contact layer 3 and the VO2 deposition layer 2 of this Example 2 are both 250nm, and the rest of the structure is exactly the same as that of Example 1.
[0063] Example 3
[0064] A quantum cascade laser with a heterogeneous waveguide is as described in Example 1, except that the N-type highly doped InP ohmic contact layer 3 and the VO2 deposition layer 2 of this Example 3 are both 750nm, and the rest of the structure is exactly the same as that of Example 1.
[0065] Example 4
[0066] A quantum cascade laser with a heterogeneous waveguide is as described in Example 1, except that the distance between two injection regions of the same chip is 7 μm.
[0067] Example 5
[0068] A method for preparing a quantum cascade laser with a heterogeneous waveguide, such as Figure 6 As shown, the following steps are included:
[0069] (1) epitaxially depositing an N-type InP buffer layer, an N-type InP lower waveguide layer, an N-type GaInAs lower confinement layer, a multi-period active region structure, an N-type GaInAs upper confinement layer, an N-type InP upper waveguide layer and an N-type highly doped InP ohmic contact layer on an N-type InP substrate in sequence by using a MOCVD process to form a stacked structure;
[0070] (2) etching the stacked structure to form a waveguide groove by dry etching or wet etching, forming a ridge waveguide structure through the waveguide groove, and forming a ridge waveguide between two waveguide grooves;
[0071] (3) dry etching the ridge waveguide to retain only the N-type highly doped InP ohmic contact layer in the two electrical injection regions;
[0072] (4) preparing a VO2 deposition layer on the surface of the N-type InP upper waveguide layer between the two electrical injection regions by a low-temperature pulsed laser deposition process;
[0073] (5) using a low temperature growth process to prepare a thin film layer with a high refractive index and a high extinction coefficient on the bottom, outer wall and ridge waveguide area of the waveguide groove;
[0074] (6) etching away the high refractive index and high extinction coefficient thin film layer in the electric injection region on the surface of the formed ridge waveguide, and leaving no thin film layer covering the N-type highly doped InP ohmic contact layer in the two electric injection regions;
[0075] (7) Using electron beam evaporation technology, a Ti / Au (40 / 250 nm) upper electrode metal layer is uniformly deposited on the chip surface, where the Ti layer is a wetting layer to make Au and the semiconductor sample surface better contact, and the substrate temperature is 20 °C;
[0076] (8) The chip thickness is thinned and a 4 μm lower electrode Au metal layer is deposited under the substrate.
[0077] Comparative Example 1
[0078] A quantum cascade laser chip with a heterogeneous waveguide is as described in Example 1, except that the VO2 deposition layer 2 is not provided in this comparative example 1, and the rest of the structure is exactly the same as that of Example 1.
[0079] The performance of Example 1, Example 2, Example 3 and Comparative Example 1 were compared under the same conditions. Figure 8 As shown. Compared with comparative example 1, the power of Example 1, Example 2 and Example 3 is relatively high, and the threshold current density is relatively low, indicating that the introduction of VO2 deposition layer 2 significantly improves the performance of the chip; compared with Example 2 and Example 3, the power of Example 1 is relatively high, and the threshold current density is relatively low, indicating that the thickness of VO2 deposition layer 2 has an effect on the light confinement factor and the waveguide transmission loss factor. Preferably, when the thickness of VO2 deposition layer 2 is 500nm, the performance improvement of the chip is more significant.
[0080] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A quantum cascade laser with a heterogeneous waveguide, characterized in that: The invention comprises a stacked structure, a ridge waveguide and an electric injection region, wherein the stacked structure comprises, from bottom to top, an N-type InP substrate, an N-type InP buffer layer, an N-type InP lower waveguide layer, an N-type GaInAs lower confinement layer, a multi-period active region structure, an N-type GaInAs upper confinement layer, an N-type InP upper waveguide layer and an N-type highly doped InP ohmic contact layer; The ridge waveguide extends along a first direction of the QCL chip, where the first direction is an extension direction of the chip cavity length; A portion of the N-type highly doped InP ohmic contact layer is retained above the N-type InP upper waveguide layer, and a VO2 deposition layer is provided at the remaining upper position; Two waveguide grooves are arranged on both sides of the ridge waveguide, and the waveguide grooves are etched to the upper part of the N-type GaInAs lower confinement layer; a thin film layer is evaporated on the bottom, outer side wall and part of the ridge waveguide area of the waveguide groove; The electric injection region extends along the first direction of the QCL chip, the N-type highly doped InP ohmic contact layer region is the electric injection region, and the N-type highly doped InP ohmic contact layer is not covered with a thin film layer; An upper electrode metal layer is deposited above the thin film layer and the N-type highly doped InP ohmic contact layer; and a lower electrode metal layer is arranged below the N-type InP substrate.
2. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: The waveguide groove is a trapezoidal groove, the maximum width of which is 10 μm and the minimum width of which is 8 μm along the second direction, and the second direction is the stacking direction of the stacked structure.
3. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: The ridge waveguide is a trapezoidal structure, with a maximum width of 18 μm and a minimum width of 16 μm along the second direction.
4. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: Two electric injection regions are arranged on the ridge waveguide, and the electric injection regions are in the shape of circular holes with a diameter of 0.75 μm.
5. The quantum cascade laser with heterogeneous waveguide according to claim 4, characterized in that: The distance between the two injection regions on the same chip is 7-9 μm.
6. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: The thin film layer material is Si3N4, Si or Ge, and the thickness is 300nm.
7. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: The thickness of the VO2 deposition layer is the same as the thickness of the N-type highly doped InP ohmic contact layer.
8. The quantum cascade laser with heterogeneous waveguide according to claim 7, characterized in that: The thickness of the VO2 deposited layer is 250-750nm; Preferably, the thickness of the N-type highly doped InP ohmic contact layer and the thickness of the VO2 deposition layer are both 500 nm.
9. The quantum cascade laser with heterogeneous waveguide according to claim 1, characterized in that: The upper electrode metal layer is a Ti / Au metal layer with a thickness of 40 / 250 nm; the lower electrode metal layer is an Au metal layer with a thickness of 4 μm.
10. A method for preparing a quantum cascade laser with a heterogeneous waveguide, characterized in that: The steps include: (1) epitaxially depositing an N-type InP buffer layer, an N-type InP lower waveguide layer, an N-type GaInAs lower confinement layer, a multi-period active region structure, an N-type GaInAs upper confinement layer, an N-type InP upper waveguide layer and an N-type highly doped InP ohmic contact layer on an N-type InP substrate in sequence by using a MOCVD process to form a stacked structure; (2) etching the stacked structure to form a waveguide groove by dry etching or wet etching, and forming a ridge waveguide structure through the waveguide groove; (3) dry etching the ridge waveguide to retain only the N-type highly doped InP ohmic contact layer in the two electrical injection regions; (4) preparing a VO2 deposition layer on the surface of the N-type InP upper waveguide layer between the two electrical injection regions; (5) preparing a thin film layer on the bottom, outer wall and ridge waveguide area of the waveguide groove; (6) etching away the thin film layer in the electric injection region on the surface of the formed ridge waveguide, and the N-type highly doped InP ohmic contact layers in the two electric injection regions are not covered with a thin film layer; (7) Using electron beam evaporation technology to evaporate the Ti / Au upper electrode metal layer on the chip surface, where the Ti layer is a wetting layer to make Au and the semiconductor sample surface better contact, the substrate temperature is 20 °C; (8) The chip thickness is thinned and a 4 μm lower electrode Au metal layer is deposited under the substrate.
