Control method, preceding-stage controller and power converter

Abstract

The embodiment of the invention discloses a control method, a preceding-stage controller and a power converter, and the method comprises the steps: receiving a detection signal which is a feedback signal of a backward-stage controller; judging whether the vehicle is in a burst mode; if yes, whether the detection signal meets a preset judgment condition or not is judged; and if the detection signal meets the preset judgment condition, exiting the burst mode. According to the embodiment of the invention, the preceding-stage controller directly acquires the existing feedback signal of the post-stage controller as the detection signal, the trend of the level of the detection signal along with the load change is used as a judgment condition for the post-stage power circuit from no load to heavy load, and the preceding-stage controller can exit the burst mode in advance according to the judgment result, so that the reliability of the power circuit is improved. And in a bus voltage loop closed-loop control mode, response time caused by mode switching is reduced, so that the amplitude of bus voltage drop is reduced.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of electronic technology, and in particular to a control method, a front-stage controller and a power converter. Background Art

[0002] Generally speaking, power supply equipment with power greater than or equal to 75W and outputting DC requires a two-stage combination of a front-stage power factor correction circuit (Power Factor Correction, PFC) and a rear-stage DC-DC circuit. In these applications, the standard requirements for energy efficiency are increasing. For the PFC controller, when the load is reduced, the voltage loop output of the PFC is reduced accordingly to reduce the input power of the PFC; when the output of the voltage loop is lower than a certain threshold, the PFC usually enters a burst mode (Burst Mode). In the burst mode, the PFC controller will be in a pulse width modulation (Pulse width modulation, PWM) intermittent wave state of the bus voltage open loop, and the PWM wave will skip one or more AC cycles according to the natural consumption of the bus voltage. In order to achieve lower total harmonic distortion (THD) and higher power factor, the bandwidth of the PFC loop is generally designed to be 5-20Hz. Then, when the PFC is in burst mode, if the subsequent DC-DC is suddenly loaded, the PFC loop adjusts to the threshold for exiting the burst mode and entering the normal working mode, and the bus voltage drops severely, which may cause the subsequent DC-DC to be in the Under Voltage Lock Out (UVLO) state, causing the load output to lose power.

[0003] The PFC controller and the subsequent DC-DC controller of the existing solution are independently designed, and generally have no universal communication interface or communication method. The PFC cannot know the loop working status of the subsequent DC-DC in advance and can only rely on bus voltage feedback. It first detects that the bus voltage drops to a certain extent, and then optimizes the bus voltage drop by improving the dynamic response of the control system loop. This method can optimize the degree of bus voltage drop, but because the change of bus voltage drop often lags seriously behind the dynamic load of the subsequent DC-DC load, the bus voltage will continue to drop during the loop adjustment period, resulting in a larger bus voltage drop. Summary of the invention

[0004] The main technical problem solved by the embodiments of the present invention is to provide a control method, a front-stage controller and a power converter, which can avoid the problem of a large drop in bus voltage caused by the front-stage controller being in burst mode and the front-stage controller exiting the burst mode lagging behind the bus voltage drop after the load of the subsequent power circuit switches from no-load to heavy-load.

[0005] In order to solve the above technical problems, a technical solution adopted in an embodiment of the present invention is: to provide a control method, applied to a front-stage controller of a power converter, including: receiving a detection signal, the detection signal being a feedback signal of a rear-stage controller; judging whether it is in a burst mode; if so, judging whether the detection signal satisfies a preset judgment condition; if the detection signal satisfies the preset judgment condition, exiting the burst mode.

[0006] In some embodiments, determining whether the detection signal satisfies a preset determination condition includes: converting the detection signal into a digital detection signal; determining whether the digital detection signal decreases to reach a preset first set value; or determining whether the digital detection signal increases to reach a preset second set value.

[0007] In some embodiments, the determining whether the detection signal satisfies a preset judgment condition further includes: determining whether the rate of change of the digital detection signal when decreasing reaches a preset third setting value; or determining whether the rate of change of the digital detection signal when increasing reaches a preset fourth setting value.

[0008] In some embodiments, determining whether the detection signal satisfies a preset determination condition includes: determining whether the detection signal decreases to reach a preset first voltage threshold; or determining whether the detection signal increases to reach a preset second voltage threshold.

[0009] In some embodiments, the determining whether the detection signal satisfies a preset determination condition further includes: determining whether the change rate of the detection signal when decreasing reaches a preset first change rate; or determining whether the change rate of the detection signal when increasing reaches a preset second change rate.

[0010] In order to solve the above technical problems, another technical solution adopted in the embodiment of the present invention is: to provide a front-stage controller, comprising: a signal detection module for receiving a detection signal, when the detection signal meets a preset judgment condition, the signal detection module outputs a control signal; a loop control module for receiving the control signal, the loop control module is configured to exit the burst mode in response to the control signal.

[0011] In some embodiments, the signal detection module includes a signal conversion unit and a logic combination and processing unit, the signal conversion unit is used to convert the detection signal into a digital detection signal; the logic combination and processing unit is used to determine whether the digital detection signal satisfies a preset digital judgment condition, and output a control signal when the digital detection signal satisfies the preset judgment condition; if the digital detection signal continues to decrease, the digital judgment condition includes: determining whether the digital detection signal decreases to reach a preset first setting value; and / or determining whether the rate of change of the digital detection signal when decreasing reaches a preset third setting value; if the digital detection signal continues to increase, the digital determination condition includes: determining whether the digital detection signal increases to reach a preset second setting value; and / or determining whether the rate of change of the digital detection signal when increasing reaches a preset fourth setting value.

[0012] In some embodiments, the signal detection module includes a signal comparison unit, a signal conversion unit and a logic combination and processing unit, the logic combination and processing unit is used to output a first set value and a third set value, or a second set value and a fourth set value to the signal conversion unit; the signal conversion unit is used to convert the first set value and the third set value into a first voltage threshold and a first change rate, or convert the second set value and the fourth set value into a second voltage threshold and a second conversion rate, respectively; the signal comparison unit is used to output a first determination signal when the detection signal decreases and reaches the first voltage threshold; or to output a first determination signal when the detection signal increases and reaches the second voltage threshold, and output a second determination signal when the change rate of the detection signal when it increases reaches the second change rate; the logic combination and processing unit is also used to generate a second determination signal when the change rate of the detection signal when it decreases reaches the first change rate, or when the change rate of the detection signal when it increases reaches the second change rate, and output the control signal according to the first determination signal and the second determination signal.

[0013] In some embodiments, the signal comparison unit includes a comparator U1 and a comparator U2, the signal conversion unit includes a digital-to-analog converter DAC2 and a digital-to-analog converter DAC1, the first input end of the comparator U1 and the first input end of the comparator U2 are used to receive the detection signal, the second input end of the comparator U1 is connected to the output end of the digital-to-analog converter DAC1, the second input end of the comparator U2 is connected to the output end of the digital-to-analog converter DAC2, the output end of the comparator U1 and the logic combination are connected to the first input end of the processing unit, the output end of the comparator U2 and the logic combination are connected to the second input end of the processing unit, the input end of the digital-to-analog converter DAC1 and the logic combination are connected to the first output end of the processing unit, and the input end of the digital-to-analog converter DAC2 and the logic combination are connected to the second output end of the processing unit.

[0014] In order to solve the above technical problems, another technical solution adopted in the embodiment of the present invention is: to provide a power converter, characterized in that it includes: a front-stage power circuit; a rear-stage power circuit, the rear-stage power circuit is connected to the front-stage power circuit through a bus capacitor; a rear-stage controller, the rear-stage controller is connected to the rear-stage power circuit; a rear-stage feedback loop, the input end of the rear-stage feedback loop is connected to the output end of the rear-stage power circuit, and the rear-stage feedback loop is connected to the rear-stage controller through an optical coupler; and the front-stage controller as described above, the front-stage controller is respectively connected to the rear-stage controller and the front-stage power circuit.

[0015] The beneficial effects of the embodiments of the present invention are as follows: different from the prior art, the embodiments of the present invention enable the front-stage controller to directly obtain the existing feedback signal of the rear-stage controller as the detection signal, and use the trend of the level of the detection signal changing with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a bus voltage waveform diagram of the front-stage controller of the existing power converter when exiting the burst mode;

[0017] Figure 2 It is a flow chart of a control method provided by an embodiment of the present invention;

[0018] Figure 3 yes Figure 2 A schematic diagram of a sub-process of step S300 in the control method shown;

[0019] Figure 4 yes Figure 2 Another sub-process diagram of step S300 in the control method shown;

[0020] Figure 5 It is a structural schematic diagram of a pre-stage controller provided by an embodiment of the present invention;

[0021] Figure 6 is a schematic structural diagram of another pre-stage controller provided by an embodiment of the present invention;

[0022] Figure 7 is a schematic structural diagram of a power converter provided by an embodiment of the present invention;

[0023] Figure 8 is a bus voltage waveform diagram of a front-stage controller of a power converter provided in an embodiment of the present invention when exiting a burst mode;

[0024] Fig. 9 is based on Figure 6 The front-stage controller shown is a schematic diagram of the structure of a power converter in which the rear-stage controller is a resonant controller;

[0025] Fig.10 yes Fig. 9 An equivalent frequency waveform diagram of a detection signal of the power converter shown;

[0026] Fig.11 is based on Figure 5 The front-stage controller shown is a schematic diagram of the structure of a power converter whose rear-stage controller is a resonant controller. DETAILED DESCRIPTION

[0027] In order to facilitate the understanding of the present application, the present application is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element or there can be one or more centered elements therebetween. When an element is described as "connected" to another element, it can be directly connected to another element or there can be one or more centered elements therebetween. The orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "bottom" and the like used in this specification is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" and the like are used only for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0028] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0029] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0030] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0031] Generally speaking, the PWM driving signals of the front-stage controller and the rear-stage controller are used to drive the front-stage power circuit and the rear-stage power circuit respectively. The bus capacitor is used as the carrier of energy exchange between the front-stage power circuit and the rear-stage power circuit, and its voltage value is the bus voltage.

[0032] When the output of the voltage loop is lower than a certain threshold, the PFC will generally enter a burst mode. In this mode, the PFC controller will be in a PWM intermittent wave state with the bus voltage loop open. The PWM wave will skip one or more AC cycles according to the natural consumption of the bus voltage. When the burst mode is turned off, the bus voltage loop stops working, and the loop output maintains the set minimum value. When the burst mode is turned on, the bus voltage loop works, but because it is higher than the bus set value, the output is clamped to the set minimum value, and the burst mode is exited when the threshold is reached.

[0033] Generally, when the subsequent load suddenly loads from no load (zero load or light load) to heavy load (or instantaneous large load exceeding the rated load), the output capacitor of the subsequent power circuit first provides instantaneous load extraction energy, and at the same time, the drop of the output voltage of the subsequent stage is fed back, and the voltage control loop of the subsequent controller starts to work, so that the subsequent power circuit can provide more energy, thereby maintaining the output voltage of the subsequent stage constant; on the other hand, the subsequent power circuit will extract the accumulated energy of the bus capacitor, causing the bus voltage to drop. Usually, the voltage loop bandwidth designed for the subsequent power circuit is relatively high, and can quickly respond to the voltage drop in the case of sudden loading from no load to heavy load.

[0034] However, due to the negative feedback behavior of the post-stage controller, the switch from no-load to heavy-load causes the bus voltage to drop far behind the moment when the load is suddenly loaded. That is, after the front-stage controller in burst mode detects that the bus voltage has dropped below the voltage threshold for exiting the burst mode, it exits the burst mode and is controlled by the bus voltage closed-loop of the front-stage controller. However, since the bandwidth of the front-stage controller is very low, the bus voltage will continue to drop during the adjustment of the bus voltage loop, eventually resulting in a larger bus voltage drop.

[0035] Figure 1 The bus voltage waveform of the front-stage controller of the existing power converter when exiting the burst mode is shown. It is not difficult to see that the moment when the front-stage bus voltage loop exits the burst mode lags far behind the moment when the rear-stage load changes from no-load to heavy-load.

[0036] In order to optimize the response speed of the front-stage controller when exiting the burst mode and timely suppress the amplitude of the bus voltage drop, the embodiment of the present invention provides a control method applied to the front-stage controller, and its flow chart is as follows: Figure 2 As shown, the method specifically comprises the following steps:

[0037] Step S100: receiving a detection signal.

[0038] In the embodiment of the present application, the detection signal is an optocoupler feedback voltage signal of a subsequent controller, and the amplitude change of the feedback voltage signal reflects the trend of the subsequent load change.

[0039] Step S200: Determine whether it is in the burst mode.

[0040] The pre-controller usually relies on its internal logic and external signals to determine whether it is in burst mode. For example, the pre-controller continuously monitors the bus voltage and sets a voltage threshold. When the bus voltage drops below this threshold, the pre-controller enters burst mode, so the voltage threshold can be used as a basis for determining whether the pre-controller is in burst mode; the pre-controller may determine whether the load has changed dynamically by detecting changes in current or power. If the load current or power increases or decreases rapidly, the pre-controller enters burst mode, so the load current or power can be used as a basis for determining whether the pre-controller is in burst mode; in addition, there may be a status flag inside the pre-controller to record whether it has entered burst mode.

[0041] The internal status flag can be implemented through hardware circuits or software programming. In hardware circuits, the internal status flag is usually implemented through logic gate circuits, triggers, registers or other programmable logic devices (PLDs); in software programming, the internal status flag is usually implemented through variables or bit flags in the programming language.

[0042] If it is determined that the front-stage controller itself is in the burst mode, step S300 is executed.

[0043] Step S300: Determine whether the detection signal meets a preset determination condition.

[0044] If it is determined that the detection signal meets the preset determination condition, step S400 is executed.

[0045] Step S400: exit the burst mode.

[0046] The front-end controller controls itself to exit the burst mode.

[0047] In some embodiments of the present application, the flowchart of step S300 is as follows: Figure 3 As shown, the specific steps include:

[0048] Step S310: converting the detection signal into a digital detection signal.

[0049] As an example but not limitation, the detection signal may be converted into a digital detection signal by an analog-to-digital converter so as to be directly compared with the set value.

[0050] Step S320: Determine whether the digital detection signal decreases to reach a preset first setting value; or determine whether the digital detection signal increases to reach a preset second setting value.

[0051] Specifically, when the digital detection signal is in a continuous decreasing process, determine whether the digital detection signal is less than a preset first setting value. If so, execute step S330; or when the digital detection signal is in a continuous increasing process, determine whether the digital detection signal is greater than a preset second setting value. If so, execute step S330.

[0052] Step S330: Determine whether the rate of change of the digital detection signal when decreasing reaches a preset third setting value; or determine whether the rate of change of the digital detection signal when increasing reaches a preset fourth setting value.

[0053] Specifically, when the digital detection signal is in a continuous decreasing process, the change rate of the digital detection signal is continuously calculated to determine whether the change rate of the digital detection signal when decreasing is less than a preset third setting value. If so, execute step S400; or when the digital detection signal is in a continuous increasing process, the change rate of the digital detection signal is continuously calculated to determine whether the change rate of the digital detection signal when increasing is greater than a preset fourth setting value. If so, execute step S400.

[0054] In some other embodiments of the present application, the flowchart of step S300 is as follows: Figure 4 As shown, the specific steps include:

[0055] Step S320: Determine whether the detection signal decreases to reach a preset first voltage threshold; or determine whether the detection signal increases to reach a preset second voltage threshold.

[0056] Specifically, when the detection signal is in a continuous decreasing process, determine whether the detection signal is less than a preset first voltage threshold, and if so, execute step S330; or when the detection signal is in a continuous increasing process, determine whether the detection signal is greater than a preset second voltage threshold, and if so, execute step S330.

[0057] Step S330: Determine whether the change rate of the detection signal when it decreases reaches a preset first change rate; or determine whether the change rate of the detection signal when it increases reaches a preset second change rate.

[0058] Specifically, when the detection signal is in a process of continuous decrease, determine whether the detection signal is less than a preset third voltage threshold, and the third voltage threshold is greater than the first voltage threshold; if so, record the moment at this time as the first moment, and further determine whether the detection signal is less than the preset first voltage threshold. If so, record the moment at this time as the second moment, subtract the first moment from the second moment to obtain the decrease time difference, subtract the third voltage threshold from the first voltage threshold to obtain the first voltage difference, divide the first voltage difference by the decrease time difference, obtain the change rate of the detection signal when it decreases, determine whether the change rate reaches the preset first change rate, and if so, execute step S400.

[0059] When the detection signal is in the process of continuous rising, determine whether the detection signal is greater than a preset fourth voltage threshold, and the fourth voltage threshold is less than the second voltage threshold; if so, record this moment as the third moment, and further determine whether the detection signal is greater than a preset second voltage threshold. If so, record this moment as the fourth moment, subtract the third moment from the fourth moment to obtain the rising time difference, subtract the second voltage threshold from the fourth voltage threshold to obtain the second voltage difference, divide the second voltage difference by the rising time difference, obtain the change rate of the detection signal when it rises, determine whether the change rate reaches the preset second change rate, and if so, execute step S400.

[0060] Different from the prior art, the implementation mode of the present invention enables the front-stage controller to directly obtain the existing feedback signal of the rear-stage controller as the detection signal, and uses the trend of the level of the detection signal changing with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop.

[0061] Based on the control method provided in the above embodiment, the embodiment of the present invention further provides a pre-stage controller, whose structural diagram is as follows: Figure 5 As shown, the front-stage controller includes a signal detection module 110 and a loop control module 120 .

[0062] The signal detection module 110 is used to receive a detection signal. When the detection signal meets a preset determination condition, the signal detection module 110 outputs a control signal. The loop control module 120 is used to receive a control signal. The loop control module 120 is configured to exit the burst mode in response to the control signal.

[0063] In the embodiment of the present application, the signal detection module 110 includes a signal conversion unit 111 and a logic combination and processing unit 114 .

[0064] Among them, the signal conversion unit 111 is used to convert the detection signal into a digital detection signal. As an example but not limitation, the signal conversion unit 111 includes an analog-to-digital converter; the logic combination and processing unit 114 is used to determine whether the digital detection signal meets the preset digital judgment condition, and output a control signal when the digital detection signal meets the preset judgment condition.

[0065] Specifically, if the digital detection signal continues to decrease, the digital determination conditions include:

[0066] Determine whether the digital detection signal decreases to reach a preset first set value; and / or determine whether the rate of change of the digital detection signal when decreasing reaches a preset third set value;

[0067] If the digital detection signal continues to rise, the digital judgment conditions include:

[0068] Determine whether the digital detection signal increases to reach a preset second setting value; and / or determine whether the rate of change of the digital detection signal when increasing reaches a preset fourth setting value.

[0069] Based on the control method provided in the above embodiment, the embodiment of the present invention further provides a pre-stage controller, whose structural diagram is as follows: Figure 6 As shown, the front-stage controller includes a signal detection module 110 and a loop control module 120 .

[0070] The signal detection module 110 is used to receive a detection signal. When the detection signal meets a preset determination condition, the signal detection module 110 outputs a control signal. The loop control module 120 is used to receive a control signal. The loop control module 120 is configured to exit the burst mode in response to the control signal.

[0071] In the embodiment of the present application, the signal detection module 110 includes a signal comparison unit 112 , a signal conversion unit 113 , and a logic combination and processing unit 114 .

[0072] The logic combination and processing unit 114 is used to output the first setting value and the third setting value, or the second setting value and the fourth setting value to the signal conversion unit.

[0073] The signal conversion unit 113 is used to convert the first set value and the third set value into a first voltage threshold and a first change rate, or to convert the second set value and the fourth set value into a second voltage threshold and a second change rate, respectively.

[0074] The signal comparison unit 112 is used to output a first determination signal when the detection signal decreases and reaches a first voltage threshold; or to output a first determination signal when the detection signal increases and reaches a second voltage threshold, and to output a second determination signal when the rate of change of the detection signal when increasing reaches a second rate of change.

[0075] The logic combination and processing unit 114 is also used to generate a second determination signal when the change rate of the detection signal reaches a first change rate when it decreases, or when the change rate of the detection signal reaches a second change rate when it increases, and output a control signal according to the first determination signal and the second determination signal.

[0076] In the embodiment of the present application, the signal comparison unit includes a comparator U1 and a comparator U2, and the signal conversion unit includes a digital-to-analog converter DAC2 and a digital-to-analog converter DAC1.

[0077] The first input terminal of the comparator U1 and the first input terminal of the comparator U2 are used to receive the detection signal, the second input terminal of the comparator U1 is connected to the output terminal of the digital-to-analog converter DAC1, the second input terminal of the comparator U2 is connected to the output terminal of the digital-to-analog converter DAC2, the output terminal and the logic combination of the comparator U1 are connected to the first input terminal of the processing unit 114, the output terminal and the logic combination of the comparator U2 are connected to the second input terminal of the processing unit 114, the input terminal and the logic combination of the digital-to-analog converter DAC1 are connected to the first output terminal of the processing unit 114, and the input terminal and the logic combination of the digital-to-analog converter DAC2 are connected to the second output terminal of the processing unit 114.

[0078] Based on the pre-stage controller provided in the above embodiment, the embodiment of the present invention provides a power converter, and its structural diagram is as follows: Figure 7 As shown, the power converter specifically includes a front-stage controller 100, a rear-stage controller 200, a rear-stage feedback loop 300, an optical coupler OC1, a front-stage power circuit 400 and a rear-stage power circuit 500.

[0079] Among them, the post-stage power circuit 500 is connected to the front-stage power circuit 400 through the bus capacitor C0, the post-stage controller 200 is connected to the post-stage power circuit 500, the input end of the post-stage feedback loop 300 is connected to the output end of the post-stage power circuit 500, the post-stage feedback loop 300 is connected to the post-stage controller 200 through the optical coupler OC1, and the front-stage controller 100 is respectively connected to the post-stage controller 200 and the front-stage power circuit 400.

[0080] It should be noted that the types of front-stage controllers in the embodiments of the present application include but are not limited to power factor correction controllers and DC-DC controllers, and the types of back-stage controllers include but are not limited to LLC resonant converters and asymmetric resonant half-bridge flyback converters.

[0081] Figure 8 FIG. 4 shows a bus voltage waveform diagram of the front-stage controller of the power converter provided by the embodiment of the present invention when exiting the burst mode. It is not difficult to see that Figure 1 In comparison, the lag time between the moment when the front-stage bus voltage loop exits the burst mode and the moment when the rear-stage load changes from no-load to heavy-load is greatly shortened.

[0082] Different from the prior art, the implementation mode of the present invention enables the front-stage controller to directly obtain the existing feedback signal of the rear-stage controller as the detection signal, and uses the trend of the level of the detection signal changing with the load as the judgment condition for the rear-stage power circuit to change from no-load to heavy-load. According to the judgment result, the front-stage controller can exit the burst mode in advance and enter the bus voltage loop closed-loop control mode, thereby reducing the response time caused by mode switching, thereby reducing the amplitude of the bus voltage drop.

[0083] Fig. 9 It shows a method based on Figure 6 The front-stage controller shown is a schematic diagram of the structure of a power converter in which the rear-stage controller is a resonant controller. The rear-stage controller is an LLC resonant controller. As an LLC resonant controller, the output voltage feedback uses optocoupler feedback as a reference for LLC inner-loop current loop control.

[0084] Therefore, regarding the FB pin voltage of the LLC resonant controller, that is, Vfb, when the downstream load decreases, Vfb decreases, and when the downstream load increases, Vfb increases. Therefore, the front-stage controller can use the amplitude and slope change of the optocoupler feedback voltage Vfb as the switching judgment condition from no-load to heavy-load of the downstream controller, thereby forcing the front-stage controller to exit the burst mode, and the bus voltage is controlled by closed loop to reduce the bus voltage drop.

[0085] In this embodiment, the optocoupler feedback voltage Vfb reaches the preset fourth voltage threshold and the second voltage threshold respectively as a basis for judging the sudden increase in load, which is achieved by using comparator U1 and comparator U2, and by recording the difference between the time t1 and t2 when the comparator U1 and the comparator U2 are flipped respectively, the rising slope of the optocoupler feedback voltage Vfb can be calculated as V / t=(second voltage threshold-fourth voltage threshold) / (t1-t2), which can also be a basis for judging the sudden increase in load.

[0086] The level of the optocoupler feedback voltage increases with the increase of load. After comparison by the comparator, the information of amplitude and slope change can be obtained as the basis for judging whether the load has increased suddenly. Fig.10 shown.

[0087] Fig.11 It shows a method based on Figure 5 The front-stage controller shown is a schematic diagram of the structure of a power converter in which the rear-stage controller is a resonant controller. The rear-stage controller is an LLC resonant controller. As an LLC resonant controller, the output voltage feedback uses optocoupler feedback as a reference for LLC inner-loop current loop control.

[0088] The analog-to-digital converter ADC1 converts the optocoupler feedback voltage signal from an analog quantity into a digital quantity, which is convenient for digital logic processing and can also realize the determination of reaching the threshold value and the change slope described in the previous embodiment.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A control method, applied to a pre-stage controller of a power converter, It is characterized in that include: receiving a detection signal, wherein the detection signal is a feedback signal of a subsequent controller; Determine whether it is in burst mode; If yes, determining whether the detection signal satisfies a preset determination condition; If the detection signal meets the preset determination condition, the burst mode is exited.

2. The method according to claim 1, It is characterized in that The determining whether the detection signal satisfies a preset determination condition comprises: converting the detection signal into a digital detection signal; Determining whether the digital detection signal decreases to reach a preset first set value; Or, determine whether the digital detection signal increases to reach a preset second set value.

3. The method according to claim 2, It is characterized in that The determining whether the detection signal satisfies a preset determination condition further includes: Determining whether the rate of change of the digital detection signal when decreasing reaches a preset third set value; Or, determine whether the rate of change of the digital detection signal when it increases reaches a preset fourth set value.

4. The method according to claim 1, It is characterized in that The determining whether the detection signal satisfies a preset determination condition comprises: Determining whether the detection signal decreases to reach a preset first voltage threshold; Or, determine whether the detection signal increases to reach a preset second voltage threshold.

5. The method according to claim 4, It is characterized in that The determining whether the detection signal satisfies a preset determination condition further includes: Determining whether the change rate of the detection signal when decreasing reaches a preset first change rate; Or, determine whether the change rate of the detection signal when it increases reaches a preset second change rate.

6. A pre-stage controller, It is characterized in that include: A signal detection module for receiving a detection signal, and when the detection signal meets a preset determination condition, the signal detection module outputs a control signal; A loop control module is configured to receive the control signal, the loop control module being configured to exit the burst mode in response to the control signal.

7. The pre-controller according to claim 6, It is characterized in that The signal detection module includes a signal conversion unit and a logic combination and processing unit. The signal conversion unit is used to convert the detection signal into a digital detection signal; The logic combination and processing unit is used to determine whether the digital detection signal meets the preset digital determination condition, and output a control signal when the digital detection signal meets the preset determination condition; If the digital detection signal continues to decrease, the digital determination condition includes: Determining whether the digital detection signal decreases to reach a preset first set value; and / or, determining whether the rate of change of the digital detection signal when decreasing reaches a preset third set value; If the digital detection signal continues to increase, the digital determination condition includes: Determining whether the digital detection signal increases to reach a preset second set value; And / or, determining whether the rate of change of the digital detection signal when increasing reaches a preset fourth set value.

8. The pre-controller according to claim 6, It is characterized in that The signal detection module includes a signal comparison unit, a signal conversion unit and a logic combination and processing unit. The logic combination and processing unit is used to output the first setting value and the third setting value, or the second setting value and the fourth setting value to the signal conversion unit; The signal conversion unit is used to convert the first set value and the third set value into a first voltage threshold and a first change rate, or convert the second set value and the fourth set value into a second voltage threshold and a second change rate, respectively; The signal comparison unit is used to output a first determination signal when the detection signal decreases and reaches the first voltage threshold; or to output a first determination signal when the detection signal increases and reaches the second voltage threshold, and to output a second determination signal when the rate of change of the detection signal when increasing reaches the second rate of change; The logic combination and processing unit is also used to generate a second determination signal when the change rate of the detection signal when decreasing reaches the first change rate, or when the change rate of the detection signal when increasing reaches the second change rate, and output the control signal according to the first determination signal and the second determination signal.

9. The pre-controller according to claim 8, It is characterized in that The signal comparison unit includes a comparator U1 and a comparator U2, and the signal conversion unit includes a digital-to-analog converter DAC2 and a digital-to-analog converter DAC1. The first input end of the comparator U1 and the first input end of the comparator U2 are used to receive the detection signal, the second input end of the comparator U1 is connected to the output end of the digital-to-analog converter DAC1, the second input end of the comparator U2 is connected to the output end of the digital-to-analog converter DAC2, the output end of the comparator U1 and the logic combination are connected to the first input end of the processing unit, the output end of the comparator U2 and the logic combination are connected to the second input end of the processing unit, the input end of the digital-to-analog converter DAC1 and the logic combination are connected to the first output end of the processing unit, and the input end of the digital-to-analog converter DAC2 and the logic combination are connected to the second output end of the processing unit.

10. A power converter, It is characterized in that include: Pre-stage power circuit; A rear-stage power circuit, wherein the rear-stage power circuit is connected to the front-stage power circuit via a bus capacitor; A post-stage controller, the post-stage controller is connected to the post-stage power circuit; A post-stage feedback loop, wherein the input end of the post-stage feedback loop is connected to the output end of the post-stage power circuit, and the post-stage feedback loop is connected to the post-stage controller via an optical coupler; And the front-stage controller according to any one of claims 6 to 9, wherein the front-stage controller is connected to the rear-stage controller and the front-stage power circuit respectively.

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