Communication method, communication device, chip and readable storage medium

Abstract

The invention provides a communication method, communication equipment, a chip and a readable storage medium, and the method comprises the steps: obtaining a first data sequence after polarization coding; obtaining a to-be-multiplexed second data sequence based on a first rule and the first data sequence; mapping the second data sequence to a corresponding time-frequency domain resource according to a second rule; according to the method, rapid and efficient rate matching and multiplexing can be carried out on the data sequence after polarization coding, resource multiplexing is fully considered, the resource utilization rate is effectively improved, hardware resources are saved, and the overall performance is improved.

Description

Technical Field

[0001] The present application relates to the field of wireless communication technology, and in particular to a communication method, communication equipment, chip and readable storage medium. Background Art

[0002] Polar Code is a coding method that can approach the Shannon limit in a binary erasure channel (BEC) and a binary discrete memoryless channel (B-DMC).

[0003] The encoding and decoding of Polar codes are highly complex and require a large amount of hardware resources during implementation. Therefore, in engineering implementations with limited hardware resources, how to implement Polar codes quickly and efficiently is an important issue that needs to be addressed. Summary of the invention

[0004] The present application aims to solve one of the technical problems in the related art at least to some extent.

[0005] To this end, the following technical solutions are proposed:

[0006] The first aspect of the present application provides a communication method, including:

[0007] Acquire a polarization-encoded first data sequence;

[0008] Based on a first rule and the first data sequence, obtaining a second data sequence to be multiplexed;

[0009] Map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0010] Optionally, obtaining a polarization-encoded first data sequence;

[0011] Based on a first rule and the first data sequence, obtaining a second data sequence to be multiplexed;

[0012] Map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0013] Optionally, determining, based on the first rule, an index corresponding to each bit of data in the second data sequence in the first data sequence includes:

[0014] Based on the inverse mapping of sub-block interleaving and rate matching transformation, an index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

[0015] Optionally, mapping the second data to corresponding time-frequency domain resources according to a second rule includes:

[0016] Based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing the data sequence in a first queue;

[0017] Mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources;

[0018] The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

[0019] Optionally, mapping the data sequence stored in the first queue to corresponding time-frequency domain resources includes:

[0020] Determining the number of bits to be mapped on each time domain symbol;

[0021] Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources;

[0022] The number of bits of the data sequence read from the first queue each time does not exceed the preset parallelism.

[0023] Optionally, the method further comprises:

[0024] Based on the length of the second data sequence, a side length of the triangular interleaver is determined.

[0025] A second aspect of the present application provides a communication device, including:

[0026] A coding module, used to obtain a first data sequence after polarization coding;

[0027] A matching module, configured to obtain a second data sequence to be multiplexed based on a first rule and the first data sequence;

[0028] A multiplexing module is used to map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0029] Optionally, the matching module is specifically used for:

[0030] Based on the first rule, determine the index corresponding to each bit of data in the second data sequence in the first data sequence;

[0031] The corresponding data of each bit is obtained from the first data sequence according to the index to obtain the second data sequence.

[0032] Optionally, the matching module is specifically used for:

[0033] Based on the inverse mapping of sub-block interleaving and rate matching transformation, an index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

[0034] Optionally, the multiplexing module is specifically used for:

[0035] Based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing the data sequence in a first queue;

[0036] Mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources;

[0037] The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

[0038] Optionally, the multiplexing module is specifically used for:

[0039] Determining the number of bits to be mapped on each time domain symbol;

[0040] Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources;

[0041] The number of bits of the data sequence read from the first queue each time does not exceed the preset parallelism.

[0042] Optionally, the device further comprises:

[0043] A processing module is used to determine the side length of the triangular interleaver based on the length of the second data sequence.

[0044] The third aspect embodiment of the present application proposes a communication device, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor implements the communication method proposed in the first aspect embodiment of the present application when executing the computer program.

[0045] The fourth aspect embodiment of the present application proposes a chip, comprising at least one processor and a communication interface; the communication interface is used to receive signals input into the chip or signals output from the chip, the processor communicates with the communication interface and implements the communication method proposed in the first aspect embodiment of the present application through logic circuits or execution code instructions.

[0046] The fifth aspect embodiment of the present application proposes a non-temporary computer-readable storage medium. When the instructions in the storage medium are executed by the processor of the communication device, the communication device can execute the communication method proposed in the first aspect embodiment of the present application.

[0047] The technical solution of the present application obtains a polarization-coded first data sequence; obtains a second data sequence to be multiplexed based on a first rule and the first data sequence; maps the second data sequence to corresponding time-frequency domain resources according to the second rule; enables fast and efficient rate matching and multiplexing of the polarization-coded data sequence, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

[0048] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0050] Figure 1 A schematic diagram of a Polar encoding process provided in an embodiment of the present application;

[0051] Figure 2 A flow chart of a communication method provided in an embodiment of the present application;

[0052] Figure 3 A flowchart of another communication method provided in an embodiment of the present application;

[0053] Figure 4 A flowchart of another communication method provided in an embodiment of the present application;

[0054] Figure 5 A flowchart of another communication method provided in an embodiment of the present application;

[0055] Figure 6 A schematic diagram of an interleaver for channel interleaving provided in an embodiment of the present application;

[0056] Figure 7 A schematic diagram of the structure of a communication device provided in an embodiment of the present application;

[0057] Figure 8 A structural block diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below with reference to the drawings are exemplary and are intended to be used to explain the present application, and cannot be understood as limiting the present application.

[0059] Various changes, modifications, and equivalents of the methods, devices, and / or systems described herein will become apparent upon understanding the present application. For example, the order of operations described herein is merely exemplary and is not limited to those orders set forth herein, but may be varied as becomes apparent upon understanding the present application, except for operations that must be performed in a particular order. In addition, descriptions of features known in the art may be omitted for clarity and brevity.

[0060] The following embodiments described in some examples of the present application do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0061] It should be noted that the execution subject of the polarization code encoding method of the present embodiment may be a polarization code encoding device, which may be implemented by software and / or hardware. The execution subject of the polarization code encoding method of the embodiment of the present application is any type of electronic device, such as a mobile phone, a bracelet, a tablet, a notebook, a desktop computer, a vehicle terminal, a smart home appliance, a wearable device, etc., or may be an Internet of Things device, or may be a processing chip inside the terminal, which is not limited here.

[0062] In the embodiments of the present application, a communication method will be described using a "communication device" as the execution subject, hereinafter referred to as a "device" without limitation.

[0063] The embodiments of the present application can be applied to Long Term Evolution (LTE), LTE-Advanced (LTE-A), LTE-Beyond (LTE-B), SUPER 3G, IMT-Advanced, 4th generation mobile communication system (4G), 5th generation mobile communication system (5G), 5G new radio (NR), future radio access (FRA), new radio access technology (RAT), new radio (NR), new radio access (NX), future generation radio access (FX), Global System for Mobile communications (GSM (registered trademark)), CDMA2000, Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi (registered trademark)), IEEE 802.16 (WiMAX (registered trademark)), IEEE 802.20, Ultra-WideBand (UWB), Bluetooth (registered trademark), Public Land Mobile Network (PLMN) network, Device-to-Device (D2D) system, Machine-to-Machine (M2M) system, Internet of Things (IoT) system, Vehicle-to-Everything (V2X), systems using other communication methods, next-generation systems based on them, etc. In addition, multiple systems can also be combined (for example, a combination of LTE or LTE-A and 5G, etc.) for application.

[0064] In some embodiments, Figure 1 A schematic diagram of a Polar encoding process provided in an embodiment of the present application.

[0065] like Figure 1As shown in the figure, the part in the dotted box is the main process of Polar coding. Among them, the Polar enc stage includes the preprocessing (Polar_pre) before Polar coding and Polar coding calculation. Among them, the rate matching (Rate Matching) stage includes sub-block interleaving, rate matching and channel interleaving. Among them, multiplexing (Multiplexing) means time-frequency domain resource multiplexing. After that, it is also necessary to go through the process of modulation (Modulation) and inverse fast Fourier transform (Inverse Fast Fourier Transform, IFFT).

[0066] The embodiments of the present application can be mainly used for uplink baseband data generation of physical uplink control channel (PUCCH) and physical uplink shared channel (PUSCH) with uplink control information (UCI). When the configuration meets the Polar coding conditions, the above-mentioned Figure 1 The process shown in implements the overall Polar encoding.

[0067] Among them, PUCCH can be used to transmit UCI information, and PUSCH can carry UCI under some configurations.

[0068] The communication method, electronic device, and computer-readable storage medium according to the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0069] Figure 2 A flow chart of a communication method provided in an embodiment of the present application.

[0070] like Figure 2 As shown, the communication method may include the following steps:

[0071] Step 201: Acquire a polarization-encoded first data sequence.

[0072] In this embodiment of the present application, a polarization-coded first data sequence can be obtained.

[0073] In some embodiments, the first data sequence is a data sequence obtained by performing Polar encoding on the input information.

[0074] In some embodiments, the input information is uplink control information UCI.

[0075] In some embodiments, the input information is the payload part in the UCI.

[0076] It should be noted that UCI is important information sent by the terminal to the network device, which may include confirmation (Acknowledge, ACK) / non-acknowledge (non-Acknowledge, NACK) messages, scheduling requests (SchedulingRequest, SR), channel state information (Channel State Information, CSI), etc. The processing of this information involves rate matching, coding, cyclic redundancy check and other operations to ensure the reliable transmission of information.

[0077] In some embodiments, the length of the first data sequence is denoted as N.

[0078] In some embodiments, during the Polar encoding process, the length of the bit stream obtained after performing a cyclic redundancy check (CRC) on the input information is recorded as K.

[0079] Step 202: Based on the first rule and the first data sequence, obtain a second data sequence to be multiplexed.

[0080] In an embodiment of the present application, a second data sequence to be multiplexed can be obtained based on the first data sequence after Polar encoding.

[0081] In some embodiments, based on the first rule, the index corresponding to each bit of data in the second data sequence in the first data sequence is determined. Further, the corresponding data of each bit is obtained from the first data sequence according to the index to obtain the second data sequence to be multiplexed.

[0082] In some embodiments, based on the inverse mapping of block interleaver (blk_itl) and rate matching (rm) transformation, the index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

[0083] In some embodiments, the set of three operations, namely, sub-block interleaving (blk_itl), rate matching (rm), and channel interleaving (channelinterleaver, chl_itl), can be regarded as a set of three operations, namely, randomly and repeatedly taking out a specific number of data from the data source after Polar coding, and recombining the data sequence actually used for multiplexing. Therefore, the address of each data in the data sequence to be multiplexed (the second data sequence) in the data source after Polar coding can be determined based on the reverse mapping.

[0084] Step 203: Map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0085] In an embodiment of the present application, the obtained second data sequence to be multiplexed can be mapped to corresponding time-frequency domain resources according to the second rule.

[0086] In some embodiments, mapping the time-frequency domain resources according to the second rule includes: based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing it in the first queue. Further, mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources.

[0087] In some embodiments, the data sequence stored in the above-mentioned first queue is mapped to the corresponding time-frequency domain resources, including: being able to determine the number of bits to be mapped on each time domain symbol, and based on the above-mentioned preset parallelism, reading the data sequence mapped to each time domain symbol from the above-mentioned first queue, and mapping it to the corresponding time-frequency domain resources.

[0088] In some embodiments, further, the multiplexed data can be modulated and subjected to a fast Fourier transform operation.

[0089] The embodiment of the present application obtains a polarization-coded first data sequence; obtains a second data sequence to be multiplexed based on a first rule and the first data sequence; maps the second data sequence to corresponding time-frequency domain resources according to the second rule; enables fast and efficient rate matching and multiplexing of the polarization-coded data sequence, fully considers resource multiplexing, effectively improves resource utilization, saves hardware resources, and improves overall performance.

[0090] Figure 3 A flowchart of another communication method provided in an embodiment of the present application.

[0091] like Figure 3 As shown, the communication method may include the following steps:

[0092] Step 301: Acquire a polarization-encoded first data sequence.

[0093] It should be noted that the specific implementation of step 301 can refer to the various embodiments of the present application and will not be described in detail here.

[0094] Step 302: Determine the index corresponding to each bit of data in the second data sequence in the first data sequence based on the inverse mapping of sub-block interleaving and rate matching transformation.

[0095] As mentioned above, the combination of sub-block interleaving (blk_itl), rate matching (rm), and channel interleaving (chl_itl) can be regarded as a set of three operations, which can be regarded as randomly and repeatedly taking out a specific number of data from the data source after Polar encoding, and reorganizing the data sequence actually used for multiplexing.

[0096] In some embodiments, for ease of understanding, data with an index value of i in the second data sequence (expressed as i=chl_itl_idx) is used as an object for description. The data with an index value of i in the second data sequence indicates that the index in the second data sequence is i, that is, the data at the i+1th bit in the second data sequence.

[0097] For data with index value j (expressed as j=rm_idx) in the data sequence after rate matching, the relationship between j and i is shown in the following formula:

[0098]

[0099] j=0,1,…,E-1

[0100] Wherein, E is the data length after rate matching at the code block level (cb-level), N is the length of the first data sequence (Polar coding), and K is the length of the input bit stream including CRC.

[0101] Optionally, the second data sequence may be divided into at least one code block cb.

[0102] Optionally, in the case of a long effective load, the second data sequence may be divided into 2 cb, then the length of the second data sequence = 2*E, or it may be cb concatenation plus 1. That is, the final length of the second data sequence may be 2*E or 2*E+1 (this value will eventually just fill up the time-frequency domain resource unit, optionally, the time-frequency domain resource unit may be a resource element (RE)).

[0103] Optionally, the second data sequence includes 1 cb, then the length of the second data sequence is E.

[0104] The data with an index value of j in the rate-matched data sequence indicates that the data has an index of j in the rate-matched data sequence, that is, the data is at the j+1th bit in the rate-matched data sequence.

[0105] Furthermore, for sub-block interleaving, the following formula should be satisfied:

[0106]

[0107] blk_size = N / 32

[0108] k=tmp[floor(j / blk_size)]·blk_size+j%blk_size

[0109] Wherein, tmp

[32] is an array (i.e., the data sequence after sub-block interleaving), in which 0, 1, 2, 4, ... are the index values ​​of the sub-blocks corresponding to the first data sequence. blk_size is the size of the sub-block, that is, the number of bits of data included in each sub-block. An element in tmp

[32] is selected according to floor(j / blk_size), where j is rm_idx in the previous step.

[0110] Step 303: Obtain corresponding data for each bit from the first data sequence according to the above index to obtain a second data sequence to be multiplexed.

[0111] In some embodiments, based on the above index value, corresponding data of each bit is obtained from the first data sequence to form a second data sequence to be multiplexed.

[0112] As an example, for each bit chl_itl_idx[i] of the second data sequence, the corresponding data polar_enc[k] can be acquired from the first data sequence based on the index value k determined in the above step.

[0113] That is, the corresponding encoding value can be read from the first data sequence using k as the index, namely:

[0114] chl_itl_idx[i]=polar_enc[k].

[0115] Furthermore, after obtaining the data chl_itl_idx[i] of each bit of the second data sequence, the second data sequence can be directly constructed.

[0116] Step 304: Map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0117] It should be noted that the specific implementation of step 304 can refer to the various embodiments of the present application and will not be described in detail here.

[0118] The communication method of the embodiment of the present application obtains a first data sequence after polarization coding; determines the index corresponding to each bit of data in the second data sequence in the first data sequence based on the reverse mapping of sub-block interleaving and rate matching transformation; obtains the corresponding data of each bit from the first data sequence according to the index to obtain a second data sequence to be multiplexed; maps the second data sequence to the corresponding time-frequency domain resources according to the second rule; enables the Polar coding result to be stored as the source data, and the source data is reversely checked through address mapping without generating a large amount of repeated rate matching data, so as to obtain the data sequence to be multiplexed, and can quickly and efficiently rate match and multiplex the data sequence after polarization coding, while fully considering the reuse of resources, effectively improving the utilization of resources, saving hardware resources, effectively reducing the complexity of calculation, and improving the overall performance.

[0119] Figure 4 A flowchart of another communication method provided in an embodiment of the present application.

[0120] like Figure 4 As shown, the communication method may include the following steps:

[0121] Step 401: Acquire a polarization-encoded first data sequence.

[0122] Step 402: Based on the first rule and the first data sequence, obtain a second data sequence to be multiplexed.

[0123] It should be noted that the specific implementation of steps 401-402 can refer to the various embodiments of the present application and will not be described in detail here.

[0124] Step 403: Based on the preset parallelism, read a data sequence obtained by performing channel interleaving on the second data sequence from the second data sequence, and store the data sequence into the first queue.

[0125] In some embodiments, based on a preset parallelism, a data sequence after channel interleaving the second data sequence can be read from the second data sequence, and the read data can be stored in a first queue (First Input First Output, FIFO).

[0126] The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

[0127] Optionally, based on the length E of the second data sequence, the side length T (ie, the number of rows and columns) of the triangular interleaver is determined.

[0128] In some embodiments, chl itl (channel interleaving) uses a triangular interleaver, whose number of rows and columns T is the smallest integer satisfying T·(T+1) / 2≥E, the input bit stream is written into the triangular interleaver by row, and the last position is filled with a NULL bit (bit), and the output bit stream is read out from the triangular interleaver by column, and the NULL bit is skipped. Where E is the data length (cb-level) after rate matching, and E≤8192. According to E≤8192, the prior information T can be obtained. max =128, that is, the maximum side length of the triangular interleaver does not exceed 128.

[0129] As an example, take E=37 as an example to solve the side length T of the corresponding triangular interleaver. As a possible implementation, the binary method can be used to find the following by 7 comparisons (optionally, to reduce the number of logic levels, multi-beat comparisons can be used to reduce the number of logic levels. In this solution, {2, 2, 2, 1} and 4 clock cycles are used to implement it):

[0130] T 0 ·(T 0 +1) / 2<E

[0131] (T 0 +1)·((T 0 +1)+1) / 2≥E

[0132] Let the triangle interlacing size of side length T be S T =T·(T+1) / 2, below we use S T The triangular interleaver with a side length of T is represented by the following method:

[0133] 1) E = 37 and S 63 (2016), S. 31 (496), S. 95 (4560) comparison, we can get E 31 ;

[0134] 2) According to 1), E = 37 and S 15 (120), S 7 (28), S 23 (276) By comparison, we can get S 7 <E<S 15 ;

[0135] 3) According to 2), E = 37 and S 11 (66), S 9 (45), S 13 (91) By comparison, we can get S 7 <E<S 9 ; ​

[0136] 4) According to 3), E = 37 and S 8 (36) By comparison, we can get S 8 <E<S 9 .

[0137] Therefore, it can be concluded that the side length of the triangular interleaver is T = 9, and the number of NULL bits filled is T·(T+1) / 2-E = 8. Figure 6 As an example, for the second data sequence of E=37, it can be based on Figure 6 The triangular interleaver with a side length of T=9 is shown for interleaving. Further, the data sequence after channel interleaving can be read therefrom.

[0138] As an example, Figure 6 As shown, for the second data sequence chl_itl_idx[i] (where i=0, 1, ..., 36) of E=37, the triangular interleaver is written row by row, and the remaining filling NULL bits (i.e. Figure 6 (× in the figure).

[0139] Furthermore, by reading out by column, we can get the output sequence after channel interleaving:

[0140] The first column chl_itl_idx is {0,9,17,24,30,35};

[0141] The second column chl_itl_idx is {1,10,18,25,31,36};

[0142] The third column chl_itl_idx is {2,11,19,26,32};

[0143] The fourth column chl_itl_idx is {3,12,20,27,33};

[0144] The fifth column chl_itl_idx is {4,13,21,28,34};

[0145] The sixth column chl_itl_idx is {5,14,22,29};

[0146] The seventh column chl_itl_idx is {6,15,23};

[0147] The eighth column chl_itl_idx is {7,16};

[0148] The ninth column chl_itl_idx is {8}.

[0149] Furthermore, a rectangular coordinate system can be established based on the triangular interleaver to obtain the corresponding relationship between the sequence index after channel interleaving and the sequence index before channel interleaving. For the convenience of calculation and description, a rectangular coordinate system can be established with the position of chl_itl_idx[0] as the origin (0,0), the rows of the triangular interleaver as the x-axis, and the columns as the y-axis. As an example, Figure 6 As shown, establish a rectangular coordinate system as shown in the figure.

[0150] For any element position (x 0 ,y 0 ), the chl_itl_idx corresponding to this position satisfies:

[0151]

[0152] It can be seen that based on the above formula, the index corresponding to any position in the triangular interleaver in the second data sequence and the corresponding data can be obtained. Therefore, the data corresponding to the index can be directly read from the second data sequence without actually performing the operations of writing into the triangular interleaver and reading from the triangular interleaver.

[0153] As an example, for the second data sequence chl_itl_idx[i], (i=0, 1, ..., 36) of E=37, the corresponding triangular interleaver side length T=9 can be determined based on the bisection method. Furthermore, based on the above formula, the chl_itl_idx corresponding to each position in the first column can be solved: the first row is 0; the second row is 0+1×9-(1×(1-1)) / 2=9; the third row is 0+2×9-(2×(2-1)) / 2=17; the fourth row is 0+3×9-(3×(3-1)) / 2=24; the fifth row is 0+4×9-(4×(4-1)) / 2=30; the sixth row is 0+5×9-(5×(5-1)) / 2=35; the index corresponding to the elements in the seventh row is 0+6×9-(6×(6-1)) / 2=39>36, so the corresponding position should be a NULL bit, and the positions corresponding to the subsequent eighth and ninth rows are all NULL bits. Similarly, the chl_itl_idx corresponding to each position in the second column can be solved: the first row is 1; the second row is 1+1×9-(1×(1-1)) / 2=10; the third row is 2+2×9-(2×(2-1)) / 2=18; the fourth row is 1+3×9-(3×(3-1)) / 2=25; the fifth row is 1+4×9-(4×(4-1)) / 2=31; the sixth row is 1+5×9-(5×(5-1)) / 2=36; the index corresponding to the elements in the seventh row is 1+6×9-(6×(6-1)) / 2=40>36, so the corresponding position should be a NULL bit, and the corresponding position in the subsequent eighth row is also a NULL bit. By analogy, the output of each column of the triangular interleaver can be obtained based on the above formula, and the sequence after channel interleaving can be read.

[0154] Furthermore, the read sequence can be stored in the first queue.

[0155] Optionally, based on a preset parallelism, a sequence after channel interleaving is read from the second data sequence and stored in the first queue.

[0156] As an example, taking the preset parallelism of 32 as an example, when the number of remaining data in the column is not less than 32, 32 chl_itl_idx can be generated according to the above formula, and the corresponding data can be stored in the first queue; when the number of remaining data in the column is less than 32, the chl_itl_idx of the remaining number of data is generated according to the above formula, and the corresponding data is stored in the first queue.

[0157] Optionally, the data corresponding to the 32 chl_itl_idx obtained each time may be recorded as rate_matching_data[0-31].

[0158] Step 404: Map the data sequence stored in the first queue to the corresponding time-frequency domain resources.

[0159] In some embodiments, the data sequence stored in the first queue can be mapped to corresponding time-frequency domain resources.

[0160] In some embodiments, the number of bits to be mapped on each time domain symbol can be determined. Further, based on the preset parallelism, the data sequence mapped to each time domain symbol can be read from the first queue and mapped to the corresponding time-frequency domain resources.

[0161] The communication method of the embodiment of the present application obtains a first data sequence after polarization coding; obtains a second data sequence to be multiplexed based on a first rule and the first data sequence; reads a data sequence after channel interleaving the second data sequence from the second data sequence based on a preset parallelism, and stores the data sequence in a first queue; maps the data sequence stored in the first queue to corresponding time-frequency domain resources; so that the polarization-coded data sequence can be quickly and efficiently rate matched and multiplexed, while fully considering resource multiplexing, effectively improving resource utilization, saving hardware resources, effectively reducing calculation complexity, and improving overall performance.

[0162] Figure 5 A flowchart of another communication method provided in an embodiment of the present application.

[0163] like Figure 5 As shown, the communication method may include the following steps:

[0164] Step 501: Acquire a polarization-encoded first data sequence.

[0165] Step 502: Based on the first rule and the first data sequence, obtain a second data sequence to be multiplexed.

[0166] Step 503: Based on the preset parallelism, read a data sequence obtained by performing channel interleaving on the second data sequence from the second data sequence, and store the data sequence into the first queue.

[0167] It should be noted that the specific implementation of steps 501-503 can refer to the various embodiments of the present application and will not be described in detail here.

[0168] Step 504: determine the number of bits to be mapped on each time domain symbol.

[0169] In some embodiments, the data sequence in the first queue is a sequence obtained after a series of processing is performed on the UCI and is to be multiplexed and resource mapped.

[0170] In some embodiments, at least one time domain symbol corresponding to the UCI and the number of bits to be mapped on each time domain symbol can be determined based on the rate matching value E of the UCI (i.e., the number of bits included in the second data sequence to be multiplexed) and parameters pre-defined in the protocol.

[0171] In some embodiments, based on the rate matching value E of the UCI, the number of resource elements (RE) on each time domain symbol, and the modulation mode, at least one time domain symbol corresponding to the UCI and the number of bits to be mapped on each time domain symbol can be determined from a table predefined in the protocol.

[0172] As an example, the corresponding time domain symbol and the number of bits to be mapped on each time domain symbol may be determined based on the table shown below:

[0173] Table 1 PUCCH demodulation reference signal (DMRS) and UCI symbol

[0174]

[0175] In some embodiments, the number of groups of the UCI mapping (that is, the number of groups in Table 1 above) can be determined from a table predefined in the protocol according to the rate matching value E of the UCI, the number of REs on each time domain symbol, and the modulation mode. ), and the time domain symbol where each group is located. Further, the number of bits that can be mapped on each time domain symbol can be determined according to the number of REs on each time domain symbol and the modulation mode. In the process of resource mapping, for each UCI group For example, it is mapped from symbol 0 to large.

[0176] As an example, for example, the rate matching value of UCI is E=32. Based on the number of REs on each time domain symbol, the modulation mode, etc., the index of the time domain symbol mapped by the UCI is determined to be {0,2} and {3}, and the number of data bits that can be carried on each time domain symbol is 12, where {0,2} is The corresponding time domain symbol index set, {3} is The corresponding time domain symbol index set, and Therefore, when performing multiplexing and time-frequency domain resource mapping, it can be determined that 12 bits of data need to be mapped on time domain symbol #0 first, then 12 bits of data need to be mapped on time domain symbol #2, and finally the remaining 8 bits of data need to be mapped on time domain symbol #3.

[0177] Furthermore, in some embodiments, there are multiple UCIs. For the next UCI, it is necessary to start mapping at the remaining position after the mapping of the previous UCI is completed, and the mapping is still carried out in sequence from symbol 0 to large.

[0178] Step 505: Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources.

[0179] In some embodiments, multiplexing is performed at the time domain symbol level. When the data to be mapped on the time domain symbol is not less than a preset parallelism, data of bits of the preset parallelism are read for mapping; otherwise, the remaining bits of the data to be mapped are read for mapping.

[0180] In some embodiments, according to the UCI level (that is, for each UCI), the number of bits to be mapped on each time domain symbol can be calculated in advance, and multiplexed according to the above preset parallelism based on preset implementation rules.

[0181] In some embodiments, the first queue may select a special synchronous fifo that can write and read multiple data at the same time, and this fifo is referred to as efifo below.

[0182] Optionally, the first queue can implement data shaping.

[0183] In some embodiments, based on a preset parallelism, the obtained channel interleaved data sequence to be multiplexed (rate_matching_data) may be written into the first queue (efifo) according to the number of written data bytes (wr_data_num) (ie, step 504).

[0184] Optionally, the depth of the first queue may be set to be large enough by default.

[0185] Optionally, after a series of calculations, the depth of the first queue is increased to 160 to meet performance and resource requirements.

[0186] In some embodiments, when it is detected that the number of data in the first queue (data_cnt) is not less than the number of current multiplexing mapping data, the number of mapping data (multiplexing_len) data is read out.

[0187] In some embodiments, the read data may be written into the corresponding storage unit according to a preset address segmentation rule corresponding to a time-domain symbol index.

[0188] Optionally, the storage unit may use a single-port random-access memory (SPRAM) to implement multiplexing.

[0189] The communication method of the embodiment of the present application obtains a first data sequence after polarization coding; obtains a second data sequence to be multiplexed based on a first rule and the first data sequence; reads a data sequence after channel interleaving the second data sequence from the second data sequence based on a preset parallelism, and stores the data sequence in a first queue; determines the number of bits to be mapped on each time domain symbol; reads a data sequence mapped to each time domain symbol from the first queue based on the preset parallelism, and maps the data sequence to the corresponding time-frequency domain resources; enables fast and efficient rate matching and multiplexing of the polarization coded data sequence, while fully considering resource multiplexing, effectively improving resource utilization, saving hardware resources, effectively reducing calculation complexity, and improving overall performance.

[0190] In order to implement the above embodiments, the present application also proposes a communication device.

[0191] Figure 7 A schematic diagram of the structure of a communication device provided in an embodiment of the present application.

[0192] like Figure 7 As shown, the communication device includes: an encoding module 710, a matching module 720 and a multiplexing module 730.

[0193] The encoding module 710 is used to obtain a polarization-encoded first data sequence;

[0194] A matching module 720, configured to obtain a second data sequence to be multiplexed based on the first rule and the first data sequence;

[0195] The multiplexing module 730 is used to map the second data sequence to corresponding time-frequency domain resources according to a second rule.

[0196] Optionally, the matching module 720 is specifically used for:

[0197] Based on the first rule, determine the index corresponding to each bit of data in the second data sequence in the first data sequence;

[0198] According to the above index, the corresponding data of each bit is obtained from the first data sequence to obtain the above second data sequence.

[0199] Optionally, the matching module 720 is specifically used for:

[0200] Based on the inverse mapping of sub-block interleaving and rate matching transformation, the index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

[0201] Optionally, the multiplexing module 730 is specifically used for:

[0202] Based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing the data sequence in the first queue;

[0203] Mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources;

[0204] The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

[0205] Optionally, the multiplexing module 730 is specifically used for:

[0206] Determining the number of bits to be mapped on each time domain symbol;

[0207] Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources;

[0208] The number of bits of the data sequence read from the first queue each time does not exceed the preset parallelism.

[0209] Optionally, the above device further includes:

[0210] A processing module (not shown in the figure) is used to determine the side length of the triangular interleaver based on the length of the second data sequence.

[0211] The communication device of the embodiment of the present application obtains a first data sequence after polarization coding; obtains a second data sequence to be multiplexed based on a first rule and the first data sequence; maps the second data sequence to corresponding time-frequency domain resources according to the second rule; enables fast and efficient rate matching and multiplexing of the polarization-coded data sequence, while fully considering resource multiplexing, effectively improving resource utilization, saving hardware resources, and improving overall performance.

[0212] It should be noted that the aforementioned explanation of the embodiment of the communication method applied to the communication device is also applicable to the communication device of this embodiment, and will not be repeated here.

[0213] In order to implement the above embodiment, the present application also proposes a communication device, including one or more processors; wherein the above communication device is used to execute the above Figure 2-Figure 5 The communication method proposed in the embodiment.

[0214] In order to implement the above embodiment, the present application also provides a chip, including a processor and an interface; the above processor is used to read instructions to execute the above Figure 2-Figure 5 The communication method proposed in the embodiment.

[0215] In order to implement the above embodiment, the embodiment of the present application also provides another chip, including at least one processor and a communication interface; the above communication interface is used to receive a signal input to the above chip or a signal output from the above chip, and the above processor communicates with the above communication interface and implements the above through a logic circuit or executing a code instruction. Figure 2-Figure 5 The communication method proposed in the embodiment.

[0216] In order to implement the above embodiment, the present application also proposes a non-temporary computer-readable storage medium, and when the instructions in the storage medium are executed by the processor of the communication device, the communication device can execute the above Figure 2-Figure 5 The communication method proposed in the embodiment.

[0217] Figure 8 800 is a block diagram of a communication device according to an exemplary embodiment. For example, the communication device 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0218] Reference Figure 8 , the communication device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 814 , and a communication component 816 .

[0219] The processing component 802 generally controls the overall operation of the communication device 800, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 802 may include one or more processors 520 to execute instructions to complete all or part of the steps of the above-mentioned method. In addition, the processing component 802 may include one or more modules to facilitate the interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate the interaction between the multimedia component 808 and the processing component 802.

[0220] The memory 804 is configured to store various types of data to support operations on the communication device 800. Examples of such data include instructions for any application or method operating on the communication device 800, contact data, phone book data, messages, pictures, videos, etc. The memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0221] The power component 806 provides power to the various components of the communication device 800. The power component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the communication device 800.

[0222] The multimedia component 808 includes a screen that provides an output interface between the communication device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the communication device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0223] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), and when the communication device 800 is in an operation mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 804 or sent via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0224] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: home button, volume button, start button, and lock button.

[0225] The sensor assembly 814 includes one or more sensors for providing various aspects of status assessment for the communication device 800. For example, the sensor assembly 814 can detect the open / closed state of the communication device 800, the relative positioning of components, such as the display and keypad of the communication device 800, and the sensor assembly 814 can also detect the position change of the communication device 800 or a component of the communication device 800, the presence or absence of user contact with the communication device 800, the orientation or acceleration / deceleration of the communication device 800, and the temperature change of the communication device 800. The sensor assembly 814 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 814 may also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0226] The communication component 816 is configured to facilitate wired or wireless communication between the communication device 800 and other devices. The communication device 800 can access a wireless network based on a communication standard, such as WiFi, 4G or 5G, or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0227] In an exemplary embodiment, the communication device 800 may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above methods.

[0228] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, and the instructions can be executed by the processor 520 of the communication device 800 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0229] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0230] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0231] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0232] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute the instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0233] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0234] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0235] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0236] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A communication method, characterized in that: The method comprises: Acquire a polarization-encoded first data sequence; Based on a first rule and the first data sequence, obtaining a second data sequence to be multiplexed; Map the second data sequence to corresponding time-frequency domain resources according to a second rule.

2. The method according to claim 1, characterized in that The acquiring the second data to be multiplexed based on the first rule and the first data includes: Based on the first rule, determine the index corresponding to each bit of data in the second data sequence in the first data sequence; The corresponding data of each bit is obtained from the first data sequence according to the index to obtain the second data sequence.

3. The method according to claim 2, characterized in that The determining, based on the first rule, an index corresponding to each bit of data in the second data sequence in the first data sequence includes: Based on the inverse mapping of sub-block interleaving and rate matching transformation, an index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

4. The method according to any one of claims 1 to 3, characterized in that: Mapping the second data to corresponding time-frequency domain resources according to a second rule includes: Based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing the data sequence in a first queue; Mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources; The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

5. The method according to claim 4, characterized in that The mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources includes: Determining the number of bits to be mapped on each time domain symbol; Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources; The number of bits of the data sequence read from the first queue each time does not exceed the preset parallelism.

6. The method according to claim 4, characterized in that The method further comprises: Based on the length of the second data sequence, a side length of the triangular interleaver is determined.

7. A communication device, characterized in that: include: A coding module, used to obtain a first data sequence after polarization coding; A matching module, configured to obtain a second data sequence to be multiplexed based on a first rule and the first data sequence; A multiplexing module is used to map the second data sequence to corresponding time-frequency domain resources according to a second rule.

8. The device according to claim 7, characterized in that The matching module is specifically used for: Based on the first rule, determine the index corresponding to each bit of data in the second data sequence in the first data sequence; The corresponding data of each bit is obtained from the first data sequence according to the index to obtain the second data sequence.

9. The device according to claim 8, characterized in that The matching module is specifically used for: Based on the inverse mapping of sub-block interleaving and rate matching transformation, an index corresponding to each bit of data in the second data sequence in the first data sequence is determined.

10. The device according to any one of claims 7 to 9, characterized in that: The multiplexing module is specifically used for: Based on a preset parallelism, reading a data sequence after channel interleaving the second data sequence from the second data sequence, and storing the data sequence in a first queue; Mapping the data sequence stored in the first queue to the corresponding time-frequency domain resources; The number of bits of the data sequence read from the second data sequence each time does not exceed the preset parallelism, and the data sequence read each time is in the same column of the triangular interleaver.

11. The device according to claim 10, characterized in that The multiplexing module is specifically used for: Determining the number of bits to be mapped on each time domain symbol; Based on the preset parallelism, read the data sequence mapped to each time domain symbol from the first queue, and map it to the corresponding time-frequency domain resources; The number of bits of the data sequence read from the first queue each time does not exceed the preset parallelism.

12. The device according to claim 10, characterized in that The device also includes: A processing module is used to determine the side length of the triangular interleaver based on the length of the second data sequence.

13. A communication device, comprising: one or more processors; The communication device is used to execute the method according to any one of claims 1 to 6.

14. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to cause the computer to execute the method according to any one of claims 1-6.

15. A chip, characterized in that: Includes processor and interface; The processor is configured to read instructions to execute the method according to any one of claims 1 to 6.

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