Voltage reference source

Abstract

The invention provides a voltage reference source, and relates to the technical field of integrated circuits. The voltage reference source comprises a starting module, a feedback module and a power supply module, the power supply module comprises a first switch unit, a second switch unit, a first N-type transistor, a second N-type transistor and a first resistor; the output end of the first switch unit and the output end of the second switch unit are connected with the drain electrodes of the first N-type transistor and the second N-type transistor respectively. The control end of the first switch unit and the control end of the second switch unit are connected with the output end of the starting module. The output end of the starting module is further connected with the control end of the feedback module. The output end of the feedback module is connected with the drain electrode of the first N-type transistor. The source electrode of the second N-type transistor is grounded through the first resistor, and the drain electrode of the second N-type transistor is also connected with the grid electrode of the second N-type transistor; the source electrode of the second N-type transistor is the output end of the voltage reference source. Therefore, the PSRR is improved, and the working voltage is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a voltage reference source. Background Art

[0002] A voltage reference is a circuit that can generate a stable voltage. Ideally, the voltage generated is independent of load changes, power supply changes, temperature changes, and time. Voltage references are an extremely important component of contemporary analog integrated circuits. They provide reference voltages for series voltage regulators, A / D and D / A converters, and are also the regulated power supply or excitation source for most sensors. In addition, reference voltage sources can also be used as standard batteries, instrument gauge calibration standards, and precision current sources.

[0003] When designing a voltage reference source, in existing design solutions, most of the design structures are complex, which increases the design difficulty and design cost. Summary of the invention

[0004] The purpose of the present invention is to provide a voltage reference source to solve the problems of complex design structure in the prior art, in view of the above-mentioned deficiencies in the prior art.

[0005] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0006] In a first aspect, an embodiment of the present application provides a voltage reference source, the voltage reference source comprising: a startup module, a feedback module, and a power supply module; the power supply module comprises: a first switch unit, a second switch unit, a first N-type transistor, a second N-type transistor, and a first resistor;

[0007] The input end of the first switch unit and the input end of the second switch unit are both connected to a preset power supply, the output end of the first switch unit and the output end of the second switch unit are respectively connected to the drain of the first N-type transistor and the drain of the second N-type transistor, the control end of the first switch unit and the control end of the second switch unit are both connected to the output end of the startup module, and the input end of the startup module is connected to the preset power supply;

[0008] The output end of the startup module is also connected to the control end of the feedback module, the input end of the feedback module is connected to the preset power supply, and the output end of the feedback module is connected to the drain of the first N-type transistor;

[0009] The source of the first N-type transistor is grounded, the source of the second N-type transistor is grounded through the first resistor, the drain of the second N-type transistor is also connected to the gate of the second N-type transistor, and the drain of the second N-type transistor is also connected to the substrate of the second N-type transistor; the source of the second N-type transistor is the output end of the voltage reference source to output a reference voltage.

[0010] Optionally, the first N-type transistor and the second N-type transistor are transistors respectively comprising a P-type diffusion region, an N-type diffusion region, a polysilicon gate, and an N-well surrounding the P-type substrate;

[0011] The minimum distance between the P-type diffusion region and the N-type diffusion region in the first N-type transistor and the N-well is a first preset distance;

[0012] The minimum distance between the P-type diffusion region and the N-type diffusion region in the second N-type transistor and the N-well is a second preset distance, wherein the first preset distance is smaller than the second preset distance.

[0013] Optionally, the first switch unit and the second switch unit are respectively a first P-type transistor and a second P-type transistor;

[0014] Among them, the source of the first P-type transistor is the input end of the first switch unit, the gate of the first P-type transistor is the control end of the first switch unit, and the drain of the first P-type transistor is the output end of the first switch unit; the source of the second P-type transistor is the input end of the second switch unit, the gate of the second P-type transistor is the control end of the second switch unit, and the drain of the second P-type transistor is the output end of the second switch unit.

[0015] Optionally, the first switch unit is a switch array of M switch components connected in parallel, and the second switch unit is a switch array of N switch components connected in parallel.

[0016] Optionally, each switch component includes: a first switch device, a second switch device and a third P-type transistor, wherein one end of the first switch device and a source of the third P-type transistor are input ends of each switch component to connect the preset power supply;

[0017] The other end of the first switching device is connected to the gate of the third P-type transistor, and the drain of the third P-type transistor is the output end of each switching component; the other end of the first switching device is also connected to one end of the second switching device, and the other end of the second switching device is the control end of each switching component.

[0018] Optionally, the startup module includes: a third switch unit, a fourth switch unit and a second capacitor;

[0019] The input end of the third switch unit is connected to the preset power supply, the output end of the third switch unit is the output end of the startup module, and the control end of the third switch unit is connected to the output end of the fourth switch unit; the input end of the fourth switch unit is connected to the preset power supply, the output end of the fourth switch unit is also grounded through the second capacitor, and the control end of the fourth switch unit is grounded.

[0020] Optionally, the third switch unit and the fourth switch unit are both P-type transistors;

[0021] Among them, the source of the P-type transistor is the input end of the third switch unit and the fourth switch unit, the gate of the P-type transistor is the control end of the third switch unit and the fourth switch unit, and the drain of the P-type transistor is the output end of the third switch unit and the fourth switch unit.

[0022] Optionally, the feedback module includes: a first transistor, a second transistor, a second resistor and a second capacitor;

[0023] The input end of the first transistor is connected to the preset power supply, the output end of the first transistor is connected to the input end of the second transistor, the output end of the second transistor is grounded, the control end of the second transistor is connected to the drain of the first N-type transistor, and the control end of the second transistor is also grounded through the second resistor and the second capacitor;

[0024] The output end of the startup module is also connected to the control end of the first transistor and the output end of the first transistor.

[0025] Optionally, the first transistor is a P-type transistor;

[0026] The source of the P-type transistor is the input terminal of the first transistor, the gate of the P-type transistor is the control terminal of the first transistor, and the drain of the P-type transistor is the output terminal of the first transistor.

[0027] Optionally, the second transistor is an N-type transistor;

[0028] The drain of the N-type transistor is the input terminal of the second transistor, the gate of the N-type transistor is the control terminal of the second transistor, and the source of the N-type transistor is the output terminal of the second transistor.

[0029] Compared with the prior art, this application has the following beneficial effects:

[0030] The present application provides a voltage reference source, which includes: a startup module, a feedback module, and a power module; the power module includes: a first switch unit, a second switch unit, a first N-type transistor, a second N-type transistor, and a first resistor; the input end of the first switch unit and the input end of the second switch unit are both connected to a preset power supply, the output end of the first switch unit and the output end of the second switch unit are respectively connected to the drains of the first N-type transistor and the second N-type transistor, the control end of the first switch unit and the control end of the second switch unit are both connected to the output end of the startup module, and the input end of the startup module is connected to the preset power supply; the output end of the startup module is also connected to the control end of the feedback module, the input end of the feedback module is connected to the preset power supply, and the output end of the feedback module is connected to the drain of the first N-type transistor; the source of the first N-type transistor is grounded, the source of the second N-type transistor is grounded through the first resistor, and the drain of the second N-type transistor is also connected to the gate of the second N-type transistor; the source of the second N-type transistor is the output end of the voltage reference source to output a reference voltage. As a result, the entire voltage reference source has a simple structure and a small area, which improves the stability of the entire voltage reference source loop, improves the PSRR, enables the voltage reference source to operate in a lower voltage environment, and expands the application scenarios of the voltage reference source. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 A schematic diagram of the structure of a voltage reference source provided by the present application;

[0033] Figure 2 A schematic diagram of a layout of an N-type transistor provided in this application;

[0034] Figure 3 A schematic diagram of the structure of a switch assembly provided in an embodiment of the present application;

[0035] Figure 4 A schematic diagram of the structure of a startup module provided in an embodiment of the present application;

[0036] Figure 5 A schematic diagram of the structure of a feedback module provided in an embodiment of the present application.

[0037] Icon: 1-starting module, 2-power module, 3-feedback module, M1-first switch unit, M2-second switch unit, M3-first N-type transistor, M4-second N-type transistor, R1-first resistor, S1-first switch device, S2-second switch device, M5-third P-type transistor, M6-third switch unit, M7-fourth switch unit, C1-first capacitor, M8-first transistor, M9-second transistor, R2-second resistor, C2-second capacitor. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0039] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0040] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0041] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.

[0042] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0043] A voltage reference source provided by the present application is explained below through a specific example. Figure 1 This is a schematic diagram of the structure of a voltage reference source provided by this application. Figure 1 As shown, the voltage reference source includes: a startup module 1, a feedback module 3, and a power module 2; the power module 2 includes: a first switch unit M1, a second switch unit M2, a first N-type transistor M3, a second N-type transistor M4, and a first resistor R1.

[0044] The input end of the first switch unit M1 and the input end of the second switch unit M2 are both connected to a preset power supply, the output end of the first switch unit M1 and the output end of the second switch unit M2 are respectively connected to the drains of the first N-type transistor M3 and the second N-type transistor M4, the control end of the first switch unit M1 and the control end of the second switch unit M2 are both connected to the output end of the startup module 1, and the input end of the startup module 1 is connected to the preset power supply.

[0045] The output end of the start-up module 1 is also connected to the control end of the feedback module 3 , the input end of the feedback module 3 is connected to a preset power supply, and the output end of the feedback module 3 is connected to the drain of the first N-type transistor M3 .

[0046] The source of the first N-type transistor M3 is grounded, the source of the second N-type transistor M4 is grounded through the first resistor R1, the drain of the second N-type transistor M4 is also connected to the gate of the second N-type transistor M4, and the drain of the second N-type transistor M4 is also connected to the substrate of the second N-type transistor M4; the source of the second N-type transistor M4 is the output end of the voltage reference source to output a reference voltage.

[0047] The substrate and drain of the second N-type transistor M4 are connected to increase the potential of the substrate, attracting electrons, thereby reducing the electron concentration in the depletion region. Since the gate charge mirrors the depletion region charge, the gate voltage required for inversion is reduced, and the threshold voltage of the second N-type transistor M4 is also reduced.

[0048] The substrate and drain of the first N-type transistor M3 are not connected, and the threshold voltage of the first N-type transistor M3 is relatively high, forming a threshold voltage difference with the second N-type transistor M4, so that the voltage output by the entire voltage reference source is larger.

[0049] By setting the feedback module 3, a negative feedback loop is formed between the second switch unit M2 and the second N-type transistor M4. A positive feedback loop is formed between the first switch unit and the first N-type transistor. Compared with the conventional positive feedback loop, the negative feedback loop including the feedback module 3 can improve the stability of the entire voltage reference source loop and improve the PSRR (power supply ripple rejection ratio). The PSRR reaches the order of magnitude of the square of the intrinsic gain. Since each branch of the power module 2 has only two components stacked, the voltage after the preset power supply input can be reduced, so that the operating voltage of the entire voltage reference source circuit is reduced, so that the voltage reference source can operate in a lower voltage environment (for example, some low-level biological signals can be identified), which expands the application scenario of the voltage reference source.

[0050] In summary, in this embodiment, the voltage reference source includes: a startup module, a feedback module, and a power supply module; the power supply module includes: a first switch unit, a second switch unit, a first N-type transistor, a second N-type transistor, and a first resistor; the input end of the first switch unit and the input end of the second switch unit are both connected to a preset power supply, the output end of the first switch unit and the output end of the second switch unit are respectively connected to the drains of the first N-type transistor and the second N-type transistor, the control end of the first switch unit and the control end of the second switch unit are both connected to the output end of the startup module, and the input end of the startup module is connected to the preset power supply; the output end of the startup module is also connected to the control end of the feedback module, the input end of the feedback module is connected to the preset power supply, and the output end of the feedback module is connected to the drain of the first N-type transistor; the source of the first N-type transistor is grounded, the source of the second N-type transistor is grounded through the first resistor, and the drain of the second N-type transistor is also connected to the gate of the second N-type transistor; the source of the second N-type transistor is the output end of the voltage reference source to output a reference voltage. As a result, the entire voltage reference source has a simple structure and a small area, which improves the stability of the entire voltage reference source loop, improves the PSRR, enables the voltage reference source to operate in a lower voltage environment, and expands the application scenarios of the voltage reference source.

[0051] In the above Figure 1 Based on the corresponding embodiments, the present application also provides a layout of an N-type transistor. Figure 2 A schematic diagram of a layout of an N-type transistor provided in this application, such as Figure 2 As shown, the first N-type transistor M3 and the second N-type transistor M4 are transistors respectively including a P-type diffusion region, an N-type diffusion region, a polysilicon gate, and an N-well surrounding the P-type substrate.

[0052] The minimum distance between the P-type diffusion region and the N-type diffusion region in the first N-type transistor M3 and the N-well is a first preset distance. The minimum distance between the P-type diffusion region and the N-type diffusion region in the second N-type transistor M4 and the N-well is a second preset distance. The first preset distance is less than the second preset distance. Figure 2 In d.

[0053] The above describes an N-type transistor with a deep N-well, and a P-type diffusion region is used to bias the substrate.

[0054] The first N-type transistor M3 and the second N-type transistor M4 are designed differently. For example, the first preset distance of the first N-type transistor M3 may be 0.16 μm, and the second preset distance of the second N-type transistor M4 may be 5 μm. Except for the preset distance, the other designs of the first N-type transistor M3 and the second N-type transistor M4 are exactly the same.

[0055] The larger the difference between the first preset distance of the first N-type transistor M3 and the second preset distance of the second N-type transistor M4, the higher the threshold voltage difference can be formed. This threshold voltage difference is not generated by different transistors, so the mismatch caused by using different transistors is reduced.

[0056] Mismatch of MOS devices usually refers to a group of MOS devices with exactly the same design size placed in a very close area. Their electrical characteristics often show certain differences, which is usually closely related to factors such as random fluctuations in the doping process and edge effects of device size.

[0057] Since the well proximity effect causes the threshold voltage to change, this layout design method can generate a threshold voltage difference between MOS tubes of the same type, thereby reducing the mismatch when using different MOS tubes, reducing the complexity of the mask, and reducing the process cost.

[0058] In order to minimize layout-dependent effects other than the well proximity effect (such as the length of oxide diffusion, the spacing between oxides, etc.), the leverage effect of the well proximity effect is highlighted.

[0059] In summary, in this embodiment, the first N-type transistor and the second N-type transistor are respectively: a transistor including a P-type diffusion region, an N-type diffusion region, a polysilicon gate, and an N-well surrounding the P-type substrate; wherein the minimum distance between the P-type diffusion region and the N-type diffusion region in the first N-type transistor and the N-well is a first preset distance; and the minimum distance between the P-type diffusion region and the N-type diffusion region in the second N-type transistor and the N-well is a second preset distance, wherein the first preset distance is less than the second preset distance. Thus, the mismatch of using different transistors can be reduced, the complexity of the mask can be reduced, and the process cost can be reduced.

[0060] In another embodiment of the present application, continue to refer to Figure 1 The first switch unit M1 and the second switch unit M2 are respectively a first P-type transistor and a second P-type transistor.

[0061] Among them, the source of the first P-type transistor is the input end of the first switch unit M1, the gate of the first P-type transistor is the control end of the first switch unit M1, and the drain of the first P-type transistor is the output end of the first switch unit M1; the source of the second P-type transistor is the input end of the second switch unit M2, the gate of the second P-type transistor is the control end of the second switch unit M2, and the drain of the second P-type transistor is the output end of the second switch unit M2.

[0062] In summary, in this embodiment, the first switch unit and the second switch unit are respectively a first P-type transistor and a second P-type transistor; wherein the source of the first P-type transistor is the input terminal of the first switch unit, the gate of the first P-type transistor is the control terminal of the first switch unit, and the drain of the first P-type transistor is the output terminal of the first switch unit; the source of the second P-type transistor is the input terminal of the second switch unit, the gate of the second P-type transistor is the control terminal of the second switch unit, and the drain of the second P-type transistor is the output terminal of the second switch unit. Thus, the switch function is realized by the P-type transistor.

[0063] In another embodiment of the present application, continue to refer to Figure 1 The first switch unit M1 is a switch array of M switch components connected in parallel, and the second switch unit M2 is a switch array of N switch components connected in parallel.

[0064] The first switch unit M1 and the second switch unit M2 are configured as a programmable switch array, so that the control of the first switch unit M1 and the second switch unit M2 is more flexible.

[0065] For example, the first switch unit M1 may be a switch array including 14 switch components connected in parallel, and the second switch unit M2 may be a switch array including 12 switch components connected in parallel.

[0066] In summary, in this embodiment, the first switch unit is a switch array of M switch components connected in parallel, and the second switch unit is a switch array of N switch components connected in parallel. Thus, the control of the first switch unit and the second switch unit is more flexible.

[0067] Based on the above embodiments, the embodiments of the present application further provide a switch assembly. Figure 3 This is a schematic diagram of the structure of a switch assembly provided in an embodiment of the present application. Figure 3 As shown, each switch component includes: a first switch device S1, a second switch device S2 and a third P-type transistor M5, wherein one end of the first switch device S1 and the source of the third P-type transistor M5 are input ends of each switch component to connect a preset power supply.

[0068] The other end of the first switch device S1 is connected to the gate of the third P-type transistor M5, and the drain of the third P-type transistor M5 is the output end of each switch component; the other end of the first switch device S1 is also connected to one end of the second switch device S2, and the other end of the second switch device S2 is the control end of each switch component.

[0069] By controlling the first switch device S1 and the second switch device S2 and cooperating with the third P-type transistor M5, each switch component can be controlled more flexibly.

[0070] In summary, in this embodiment, each switch component includes: a first switch device, a second switch device and a third P-type transistor, wherein one end of the first switch device and the source of the third P-type transistor are the input end of each switch component to connect to a preset power supply; the other end of the first switch device is connected to the gate of the third P-type transistor, and the drain of the third P-type transistor is the output end of each switch component; the other end of the first switch device is also connected to one end of the second switch device, and the other end of the second switch device is the control end of each switch component. Thus, each switch component can be controlled more flexibly.

[0071] exist Figure 1 Based on the corresponding embodiment, the embodiment of the present application also provides a startup module. Figure 4 This is a schematic diagram of the structure of a startup module provided in an embodiment of the present application. Figure 4 As shown, the start-up module 1 includes: a third switch unit M6, a fourth switch unit M7 and a first capacitor C1.

[0072] The input end of the third switch unit M6 is connected to a preset power supply, the output end of the third switch unit M6 is the output end of the starting module 1, and the control end of the third switch unit M6 is connected to the output end of the fourth switch unit M7; the input end of the fourth switch unit M7 is connected to the preset power supply, the output end of the fourth switch unit M7 is also grounded through the first capacitor C1, and the control end of the fourth switch unit M7 is grounded.

[0073] After the fourth switch unit M7 is turned on, the first capacitor C1 continues to charge. When the charging voltage of the first capacitor C1 is the same as the voltage of the preset power supply, the fourth switch unit M7 is turned off. The charged first capacitor C1 continues to discharge, so that the third switch unit M6 continues to be turned on. Until the first capacitor C1 is discharged, the third switch unit M6 is turned off. In this process, the startup module 1 continues to supply power to the power module 2, so that the power module 2 is successfully started.

[0074] The startup module has a simple structure and occupies a small layout area. By charging the capacitor, the voltage reference source circuit can be charged when the capacitor works at an undesirable merging point, and after leaving this state, the charging switch unit is disconnected because the capacitor is charged enough.

[0075] In summary, in this embodiment, the startup module includes: a third switch unit, a fourth switch unit and a first capacitor; the input end of the third switch unit is connected to a preset power supply, the output end of the third switch unit is the output end of the startup module, and the control end of the third switch unit is connected to the output end of the fourth switch unit; the input end of the fourth switch unit is connected to the preset power supply, the output end of the fourth switch unit is also grounded through the first capacitor, and the control end of the fourth switch unit is grounded. Thus, the power module is successfully started and the design cost of the startup module is reduced.

[0076] In another embodiment of the present application, continue to refer to Figure 4 The third switch unit M6 and the fourth switch unit M7 are both P-type transistors.

[0077] Among them, the source of the P-type transistor is the input end of the third switch unit M6 and the fourth switch unit M7, the gate of the P-type transistor is the control end of the third switch unit M6 and the fourth switch unit M7, and the drain of the P-type transistor is the output end of the third switch unit M6 and the fourth switch unit M7.

[0078] In summary, in this embodiment, the third switch unit and the fourth switch unit are both P-type transistors; wherein the source of the P-type transistor is the input terminal of the third switch unit and the fourth switch unit, the gate of the P-type transistor is the control terminal of the third switch unit and the fourth switch unit, and the drain of the P-type transistor is the output terminal of the third switch unit and the fourth switch unit. Thus, the switch function is realized by the P-type transistor.

[0079] exist Figure 1 Based on the corresponding embodiment, the embodiment of the present application also provides a feedback module. Figure 5 A schematic diagram of the structure of a feedback module provided in an embodiment of the present application. Figure 5 As shown, the feedback module 3 includes: a first transistor M8, a second transistor M9, a second resistor R2 and a second capacitor C2.

[0080] The input end of the first transistor M8 is connected to a preset power supply, the output end of the first transistor M8 is connected to the input end of the second transistor M9, the output end of the second transistor M9 is grounded, the control end of the second transistor M9 is connected to the drain of the first N-type transistor M3, and the control end of the second transistor M9 is also grounded through the second resistor R2 and the second capacitor C2.

[0081] The output end of the start-up module 1 is also connected to the control end of the first transistor M8 and the output end of the first transistor M8. The start-up module 1 controls the first transistor M8 to be turned on, so that the entire supplementary module starts to work.

[0082] The PSRR is inversely proportional to the intrinsic gain of the first N-type transistor M3 and the second transistor M9, so that the voltage reference source provided by the present application has a higher PSRR.

[0083] The first switch unit M1, the first N-type transistor M3, the first transistor M8 and the second transistor M9 form a positive feedback loop, while the second switch unit M2, the first N-type transistor M3, the second N-type transistor M4, the first transistor M8 and the second transistor M9 form a negative feedback loop.

[0084] In summary, in this embodiment, the feedback module includes: a first transistor, a second transistor, a second resistor and a second capacitor; the input end of the first transistor is connected to a preset power supply, the output end of the first transistor is connected to the input end of the second transistor, the output end of the second transistor is grounded, the control end of the second transistor is connected to the drain of the first N-type transistor, and the control end of the second transistor is also grounded through the second resistor and the second capacitor; the output end of the startup module is also connected to the control end of the first transistor and the output end of the first transistor. Thus, the voltage reference source has a higher PSRR.

[0085] In another embodiment of the present application, continue to refer to Figure 5 , the first transistor M8 is a P-type transistor.

[0086] The source of the P-type transistor is the input terminal of the first transistor M8 , the gate of the P-type transistor is the control terminal of the first transistor M8 , and the drain of the P-type transistor is the output terminal of the first transistor M8 .

[0087] In another embodiment of the present application, continue to refer to Figure 5 , the second transistor M9 is an N-type transistor.

[0088] The drain of the N-type transistor is the input terminal of the second transistor M9 , the gate of the N-type transistor is the control terminal of the second transistor M9 , and the source of the N-type transistor is the output terminal of the second transistor M9 .

[0089] In summary, the first transistor is a P-type transistor, and the second transistor is an N-type transistor; wherein the source of the P-type transistor is the input terminal of the first transistor, the gate of the P-type transistor is the control terminal of the first transistor, and the drain of the P-type transistor is the output terminal of the first transistor; the drain of the N-type transistor is the input terminal of the second transistor, the gate of the N-type transistor is the control terminal of the second transistor, and the source of the N-type transistor is the output terminal of the second transistor. Thus, the feedback module is formed by the P-type transistor and the N-type transistor.

[0090] On the basis of the above-mentioned embodiments of the present application. The gate of the second switch unit M2, the gate of the second N-type transistor M4, the gate of the third switch unit M6 and the gate of the second switch unit M2 form a negative feedback loop. The gate of the first switch unit M1, the drain of the first N-type transistor M3 and the gate of the first switch unit M1 form a positive feedback loop. Compared with the conventional positive feedback loop, the negative feedback loop including the feedback module 3 can improve the stability of the entire voltage reference source loop and improve the PSRR. The PSRR reaches the order of magnitude of the square of the intrinsic gain. Since each branch of the power supply module 2 has only two transistors stacked, the voltage after the preset power supply input can be reduced, so that the operating voltage of the entire voltage reference source circuit is reduced, saving power consumption.

[0091] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention. It should be noted that similar numbers and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and variations. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection scope of the present invention.

Claims

1. A voltage reference source, characterized in that: The voltage reference source includes: a startup module, a feedback module, and a power module; the power module includes: a first switch unit, a second switch unit, a first N-type transistor, a second N-type transistor, and a first resistor; The input end of the first switch unit and the input end of the second switch unit are both connected to a preset power supply, the output end of the first switch unit and the output end of the second switch unit are respectively connected to the drain of the first N-type transistor and the drain of the second N-type transistor, the control end of the first switch unit and the control end of the second switch unit are both connected to the output end of the startup module, and the input end of the startup module is connected to the preset power supply; The output end of the startup module is also connected to the control end of the feedback module, the input end of the feedback module is connected to the preset power supply, and the output end of the feedback module is connected to the drain of the first N-type transistor; The source of the first N-type transistor is grounded, the source of the second N-type transistor is grounded through the first resistor, the drain of the second N-type transistor is also connected to the gate of the second N-type transistor, and the drain of the second N-type transistor is also connected to the substrate of the second N-type transistor; the source of the second N-type transistor is the output end of the voltage reference source to output a reference voltage.

2. The voltage reference source according to claim 1, characterized in that: The first N-type transistor and the second N-type transistor are transistors respectively comprising a P-type diffusion region, an N-type diffusion region, a polysilicon gate, and an N-well surrounding the P-type substrate; The minimum distance between the P-type diffusion region and the N-type diffusion region in the first N-type transistor and the N-well is a first preset distance; The minimum distance between the P-type diffusion region and the N-type diffusion region in the second N-type transistor and the N-well is a second preset distance, wherein the first preset distance is smaller than the second preset distance.

3. The voltage reference source according to claim 1, characterized in that: The first switch unit and the second switch unit are respectively a first P-type transistor and a second P-type transistor; Among them, the source of the first P-type transistor is the input end of the first switch unit, the gate of the first P-type transistor is the control end of the first switch unit, and the drain of the first P-type transistor is the output end of the first switch unit; the source of the second P-type transistor is the input end of the second switch unit, the gate of the second P-type transistor is the control end of the second switch unit, and the drain of the second P-type transistor is the output end of the second switch unit.

4. The voltage reference source according to claim 1, characterized in that: The first switch unit is a switch array of M switch components connected in parallel, and the second switch unit is a switch array of N switch components connected in parallel.

5. The voltage reference source according to claim 4, characterized in that: Each switch component includes: a first switch device, a second switch device and a third P-type transistor, wherein one end of the first switch device and a source of the third P-type transistor are input ends of each switch component to connect the preset power supply; The other end of the first switching device is connected to the gate of the third P-type transistor, and the drain of the third P-type transistor is the output end of each switching component; the other end of the first switching device is also connected to one end of the second switching device, and the other end of the second switching device is the control end of each switching component.

6. The voltage reference source according to claim 1, characterized in that: The startup module includes: a third switch unit, a fourth switch unit and a second capacitor; The input end of the third switch unit is connected to the preset power supply, the output end of the third switch unit is the output end of the startup module, and the control end of the third switch unit is connected to the output end of the fourth switch unit; the input end of the fourth switch unit is connected to the preset power supply, the output end of the fourth switch unit is also grounded through the second capacitor, and the control end of the fourth switch unit is grounded.

7. The voltage reference source according to claim 6, characterized in that: The third switch unit and the fourth switch unit are both P-type transistors; Among them, the source of the P-type transistor is the input end of the third switch unit and the fourth switch unit, the gate of the P-type transistor is the control end of the third switch unit and the fourth switch unit, and the drain of the P-type transistor is the output end of the third switch unit and the fourth switch unit.

8. The voltage reference source according to claim 1, characterized in that: The feedback module includes: a first transistor, a second transistor, a second resistor and a second capacitor; The input end of the first transistor is connected to the preset power supply, the output end of the first transistor is connected to the input end of the second transistor, the output end of the second transistor is grounded, the control end of the second transistor is connected to the drain of the first N-type transistor, and the control end of the second transistor is also grounded through the second resistor and the second capacitor; The output end of the startup module is also connected to the control end of the first transistor and the output end of the first transistor.

9. The voltage reference source according to claim 8, characterized in that: The first transistor is a P-type transistor; The source of the P-type transistor is the input terminal of the first transistor, the gate of the P-type transistor is the control terminal of the first transistor, and the drain of the P-type transistor is the output terminal of the first transistor.

10. The voltage reference source according to claim 8, characterized in that: The second transistor is an N-type transistor; The drain of the N-type transistor is the input terminal of the second transistor, the gate of the N-type transistor is the control terminal of the second transistor, and the source of the N-type transistor is the output terminal of the second transistor.

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