Memory wear leveling method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a wear leveling method and device of a memory, electronic equipment and a storage medium. The method comprises the following steps: if a data writing request for writing data into a first storage unit is received, writing first data stored in the first storage unit into a second storage unit which is currently in an idle state in the memory; obtaining a first erasing number of times corresponding to the first storage unit from an erasing number of times recording table; judging whether the first erasing frequency exceeds a preset frequency threshold value or not; if yes, writing second data stored in a third storage unit of the memory into the first storage unit; wherein the second data is cold data. Therefore, in the technical scheme, not only can the abrasion balance of the memory be realized, but also the waste of the storage space cannot be caused.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of memory technology, and in particular to a wear leveling method, device, electronic device, and storage medium for a memory. Background Art

[0002] Memory is a memory device used to store programs and data in a computer system. Memory can be divided into volatile memory and non-volatile memory. Non-volatile memory (NVM), such as read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM) and flash memory, has the characteristic that the stored data will not be lost after the current is turned off. Therefore, it can be used in embedded devices. The life of NVM is usually limited by the number of erase and write times. When the number of erase and write times reaches the maximum number of erase and write times, the erasure of NVM will become unstable and erase and write errors may occur. The life of NVM is the main factor that determines the life of embedded devices.

[0003] For NVM, its life is determined by the physical page that reaches the fastest number of erase and write times. Therefore, if wear leveling is not used to intervene, the life of NVM will be very short. In the prior art, when performing wear leveling on NVM, an independent sector is usually divided in NVM to store hot data. Usually, when the above-mentioned independent sector is divided, the number of physical pages contained in the sector will be more than the number of pages required to store hot data. In this way, multiple physical pages in the sector can be recycled, thereby avoiding erasing the same physical page every time to alleviate the wear of a certain physical page. However, this will cause the problem that the physical pages in the sector are not fully used, resulting in a waste of NVM storage space.

[0004] Therefore, it is urgent to propose a technical solution that can achieve wear leveling while avoiding the waste of NVM storage space. Summary of the invention

[0005] To overcome the problems existing in the related art, the embodiments of the present application provide a wear leveling method, device, electronic device and storage medium for a memory.

[0006] According to a first aspect of an embodiment of the present application, a wear leveling method for a memory is provided, the method comprising:

[0007] If a data write request to write data to a first storage unit is received, the first data stored in the first storage unit is written into a second storage unit in the memory that is currently in an idle state;

[0008] Acquire a first erasure number corresponding to the first storage unit from an erasure number record table;

[0009] Determining whether the first erasing and writing times exceeds a preset times threshold;

[0010] If so, the second data stored in the third storage unit of the memory is written into the first storage unit; wherein the second data is cold data.

[0011] According to a second aspect of an embodiment of the present application, a wear leveling device for a memory is provided, the device comprising:

[0012] A first writing module is configured to write the first data stored in the first storage unit into a second storage unit in the memory that is currently in an idle state if a data writing request to write data to the first storage unit is received;

[0013] An acquisition module, used for acquiring a first erasure number corresponding to the first storage unit from an erasure number record table;

[0014] A first judging module, used for judging whether the first erasing and writing times exceeds a preset times threshold;

[0015] The second writing module is used to write the second data stored in the third storage unit of the memory into the first storage unit if the first erasing and writing times exceeds the preset times threshold; wherein the second data is cold data.

[0016] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described in the first aspect.

[0017] According to a fourth aspect of an embodiment of the present application, a computer-readable storage medium is provided, on which a computer program is stored, and the program is executed by a processor to implement the method described in the first aspect.

[0018] According to a fifth aspect of an embodiment of the present application, a computer program product is provided, comprising instructions, which, when executed on a computer, cause the computer to execute the method according to the first aspect.

[0019] The technical solution provided by the embodiments of the present application may have the following beneficial effects:

[0020] The method provided by the embodiment of the present application, when data needs to be written to the first storage unit, in order to realize power-off protection of the data stored in the first storage unit, it is necessary to write the first data stored in the first storage unit into the second storage unit which is currently in an idle state in the memory, and after the first data is written into the second storage unit, it is determined whether the current first erasure and write times of the first memory exceeds a preset times threshold, and if it exceeds the threshold, the second data stored in the third storage unit is written into the first storage unit, wherein the second data is cold data; in the present technical solution, since the second data is cold data, the corresponding access times are relatively small, so that by writing the second data into the first storage unit, the frequency of subsequent accesses to the first storage unit can be reduced, thereby reducing the wear on the first storage unit, thereby achieving the effect of wear leveling; in addition, since after the second data in the third storage unit is written into the first storage unit, the subsequent third storage unit can be used to write other data, so there will be no waste of storage space; in the solution of the present application, it is only necessary to determine whether the first erasure and write times corresponding to the first storage unit exceeds the preset times threshold to determine whether the first storage unit needs to perform wear leveling, which is simple and convenient to operate and has a small amount of calculation.

[0021] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments of the present application. It should be understood that for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.

[0023] Figure 1 One of the method flow diagrams of the wear leveling method of the memory provided in the embodiment of the present application;

[0024] Figure 2 A schematic diagram of a first sub-record table and a second sub-record table in a wear leveling method for a memory provided in an embodiment of the present application;

[0025] Figure 3 A schematic diagram of an address mapping table and a first sub-record table stored in a storage unit in a wear leveling method for a memory provided in an embodiment of the present application;

[0026] Figure 4 A system framework diagram of a wear leveling method for a memory provided in an embodiment of the present application;

[0027] Figure 5 A second method flow chart of the wear leveling method for a memory provided in an embodiment of the present application;

[0028] Figure 6 A schematic diagram of an address mapping table update process in a wear leveling method for a memory provided in an embodiment of the present application;

[0029] Figure 7 A schematic diagram of the module composition of a wear leveling device for a memory provided in an embodiment of the present application;

[0030] Figure 8 An exemplary structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0031] The technical solution of the embodiment of the present application is described below in conjunction with the drawings in the embodiment of the present application.

[0032] The terms used in the following embodiments of the present application are for the purpose of describing specific embodiments, and are not intended to be used as limitations on the technical solutions of the present application. As used in the specification and appended claims of the present application, the singular expressions "a", "an", "said", "above", "the" and "this" are intended to include plural expressions as well, unless there is a clear indication to the contrary in the context.

[0033] It should also be understood that although the terms first, second, etc. may be used to describe a certain type of object in the following embodiments, the object should not be limited to these terms. These terms are used to distinguish the specific implementation objects of this type of object.

[0034] First, the embodiment of the present application provides a wear leveling method for a memory. The memory may be a volatile memory or a non-volatile memory. Any memory that needs wear leveling may use the method provided in the embodiment of the present application for wear leveling.

[0035] It should be noted that the user information (including but not limited to user device information, user key information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the embodiments of the present application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0036] The method provided in the embodiment of the present application can be applied to an electronic device, which can be a smart password key, a small card containing an embedded integrated circuit, or a security module of a water, electricity, and gas meter, etc. Specifically, the method provided in the embodiment of the present application can be applied to a microcontroller unit (MCU) of the above electronic device, and further, can be applied to a central processing unit (CPU) in the MCU.

[0037] Figure 1 FIG. 1 shows one of the method flow diagrams of the wear leveling method of the memory provided by the embodiment of the present application, such as Figure 1 As shown, the method comprises the following steps:

[0038] Step 102: If a data write request to write data to a first storage unit is received, the first data stored in the first storage unit is written into a second storage unit in the memory that is currently in an idle state.

[0039] Step 104: Obtain a first erasure count corresponding to the first storage unit from an erasure count record table.

[0040] Step 106, determining whether the first erasing and writing times exceeds a preset times threshold; if the determination result indicates that the first erasing and writing times exceeds the preset times threshold, executing step 108; otherwise, ending the process.

[0041] Step 108, writing the second data stored in the third storage unit of the memory into the first storage unit; wherein the second data is cold data.

[0042] It should be noted that the storage unit (including the first storage unit, the second storage unit and the third storage unit) mentioned in the embodiments of the present application refers to the smallest erase unit in the memory, and the smallest erase unit may be different for different memories. For example, the above storage unit may be a physical page, sector or physical block of the memory. The specific reference of the above storage unit can be selected according to the actual application scenario, and the embodiments of the present application do not limit the specific reference of the above storage unit.

[0043] In a feasible implementation, after receiving a data write request to write data to the first storage unit, it is usually necessary to erase the first data currently stored in the first storage unit, and then write the new data. In order to prevent the data in the first storage unit from being lost due to unexpected power failure or equipment failure after the first data in the first storage unit is erased and before the new data is written, therefore, after receiving a data write request to write data to the first storage unit, it is necessary to first perform power failure protection on the first data stored in the first storage unit, that is, to write the first data stored in the first storage unit to the second storage unit in the memory that is currently in an idle state.

[0044] Usually, when the operating system or program of an electronic device is running, the virtual address used is generated by the CPU, also called a logical address. The logical address needs to be converted into a physical address before data can be read and written in the memory. In order to achieve the conversion from the logical address to the physical address, it is usually necessary to maintain an address mapping table containing the correspondence between the logical address and the physical address in the memory. The address mapping table can also be called a mapping association pair (MAP) table. Therefore, after writing the first data into the second storage unit, it is necessary to establish a mapping relationship between the logical address of the first data and the physical address corresponding to the second storage unit.

[0045] Therefore, based on the above content, it is not difficult to understand that the second storage unit currently processing the idle state mentioned in the embodiment of the present application refers to a storage unit whose corresponding physical address does not establish a mapping relationship with any logical address.

[0046] In an embodiment of the present application, if the first erase and write times corresponding to the first storage unit do not exceed the preset times threshold, no further processing is required on the first storage unit, and the data write operation corresponding to the above data write request can be performed directly according to the normal data erase and write process.

[0047] Among them, the second data stored in the third storage unit is cold data, so that the frequency of access to the third storage unit is very low, that is, the wear of the third storage unit is small. Therefore, the second data stored in the third storage unit is written into the first storage unit, so that the hot data stored in the first storage unit can be replaced with cold data, thereby reducing the frequency of subsequent access to the first storage unit, and making the third storage unit become an idle storage unit, which can be used for subsequent data writing, thereby realizing wear balancing of each storage unit in the memory without causing waste of storage space.

[0048] In addition, it should be noted that in an embodiment of the present application, when the first erase and write times corresponding to the first storage unit exceeds a preset threshold, the second data stored in the third storage unit needs to be written into the first storage unit, that is, the first storage unit is occupied by the second data in the third storage unit. In this case, a storage unit can be reselected from the currently idle storage units to execute the data write operation corresponding to the above-mentioned data write request.

[0049] Exemplarily, the third storage unit can be determined by the following steps:

[0050] A non-idle storage unit with the smallest current number of erase / write times in the memory is determined according to the erase / write times record table as the third storage unit.

[0051] The erase count record table records the erase count of each storage unit in the memory. Therefore, when determining the third storage unit, the list of non-free storage units in the memory can be determined first, and the current erase count corresponding to each storage unit in the non-free storage unit list can be read from the erase count record table, and the non-free storage unit with the smallest current erase count can be determined as the third storage unit.

[0052] Of course, in some other embodiments, it is also possible to first determine a storage unit with the smallest current erase and write count based on the erase and write count record table, and then determine whether the storage unit is a non-free storage unit. If so, the storage unit is determined as the third storage unit; if the storage unit is a free storage unit, determine a storage unit with the second smallest current erase and write count based on the erase and write count record table, and determine whether the storage unit is a non-free storage unit; and so on, until the non-free storage unit with the smallest current erase and write count is determined.

[0053] Of course, the scheme described above selects the non-idle storage unit with the smallest current erase and write times as the third storage unit; in addition, in a feasible implementation, a non-idle storage unit whose difference between the current erase and write times and the first erase and write times corresponding to the first storage unit is greater than the target value can also be selected as the third storage unit. There are many ways to determine the third storage unit. In actual application scenarios, the appropriate method can be selected to determine the third storage unit according to actual needs. The embodiments of the present application only exemplarily list several possible ways to determine the third storage unit, and are not limitations of the embodiments of the present application.

[0054] Specifically, the process of writing the second data stored in the third storage unit of the memory into the first storage unit includes: first erasing the first data stored in the first storage unit, and then writing the second data into the first storage unit. That is, in this process, a data erasing operation is performed on the first storage unit, so after the second data is written into the first storage unit, the first erasing and writing times corresponding to the first storage unit need to be updated.

[0055] After writing the second data stored in the third storage unit into the first storage unit, the address mapping relationship is changed at the same time. At this time, the third storage unit becomes a garbage page, so the third storage unit can be added to the free storage unit queue, so that data writing operations can be performed in the third storage unit later.

[0056] The technical solution provided by the embodiment of the present application is that when data needs to be written to the first storage unit, in order to realize power-off protection of the data stored in the first storage unit, the first data stored in the first storage unit needs to be written into the second storage unit which is currently in an idle state in the memory. After the first data is written into the second storage unit, it is determined whether the current first erasure and write times of the first memory exceeds a preset times threshold. If it exceeds the preset times threshold, the second data stored in the third storage unit is written into the first storage unit, wherein the second data is cold data. In the technical solution, since the second data is cold data, the corresponding access times are relatively small. Thus, by writing the second data into the first storage unit, the frequency of subsequent accesses to the first storage unit can be reduced, thereby reducing the wear on the first storage unit, thereby achieving the effect of wear leveling. In addition, since after the second data in the third storage unit is written into the first storage unit, the subsequent third storage unit can be used to write other data, so there will be no waste of storage space. In the solution of the present application, it is possible to determine whether the first storage unit needs to perform wear leveling only by determining whether the first erasure and write times corresponding to the first storage unit exceeds the preset times threshold. The operation is simple and convenient, and the amount of calculation is small.

[0057] Among them, in a feasible implementation, the erasure times of each storage unit in the memory are recorded in the erasure times record table, so the erasure times of each storage unit can be read directly from the erasure times record table. However, considering that each time the first data is written into the second storage unit, or the second data is written into the first storage unit, the corresponding relationship between the logical address and the physical address of the data in the address mapping table needs to be modified, that is, the erasure operation of the storage unit storing the address mapping table needs to be performed, so the storage unit storing the address mapping table is erased frequently; and for each erasure times, when storing, it is usually stored in the form of binary, decimal or hexadecimal. When updating the erasure times, for the target system corresponding to the erasure times, the low-order value of the target system may change frequently, but the high-order value does not need to be updated frequently, and the high-order value only needs to be changed when a carry occurs. Therefore, in the embodiment of the present application, the erasure times record table can be split into two sub-record tables for storage respectively. That is, in the embodiment of the present application, the above-mentioned erasure count record table includes a first sub-record table and a second sub-record table;

[0058] The first sub-record table and the address mapping table of the memory are stored in the same storage unit, and the second sub-record table is stored in another storage unit;

[0059] The first sub-record table is used to record the target base low-order value corresponding to the number of erase and write times of each storage unit, and the second sub-record table is used to record the target base high-order value corresponding to the number of erase and write times of each storage unit, and the highest digit value in the target base low-order value and the lowest digit value in the target base high-order value are located in adjacent digits.

[0060] Among them, the specific number of digits of the above-mentioned target base low-order value can be one or more digits, and the specific number of digits of the above-mentioned target base high-order value can be one or more digits.

[0061] In the embodiment of the present application, any first sub-record table or any second sub-record table records the number of erasures and writes of multiple storage units contained in the memory. For example, one storage unit corresponds to one record item, and one record item can occupy three bytes of space, one byte of space in the first sub-record table, and two bytes of space in the second sub-record table. Figure 2As shown, assuming that each storage unit in the memory can be marked as T0, T1, T2, T3, T4, T5, T6..., in the first sub-record table, each storage unit occupies one byte space, which is used to record the low-order value of the number of erase and write times, and in the second sub-record table, each storage unit occupies two bytes of space, which are used to record the high-order value of the number of erase and write times. When recording the number of erase and write times corresponding to each storage unit, each storage unit in the first sub-record table records the low-order value of the number of erase and write times, and when it is necessary to carry to the high-order value recorded in the second sub-record table, the high-order value is recorded at the corresponding position of the byte corresponding to the storage unit in the second sub-record table.

[0062] It should be noted that Figure 2 The first sub-record table and the second sub-record table are merely listed as possible implementation forms. In specific implementations, more or less space may be allocated to each storage unit in the first sub-record table and the second sub-record table for recording the number of erase and write times.

[0063] For example, in a feasible implementation, the specific number of digits of the above-mentioned low-order value may be 8, that is, the low-order 8-digit value of the number of erasures is recorded in the first sub-record table. The specific number of digits of the above-mentioned high-order value may be 16, that is, the high-order 16-digit value of the number of erasures is recorded in the second sub-record table. In specific implementation, the specific number of digits of the above-mentioned low-order value and high-order value may be determined according to the actual application scenario. Here, only a possible specific number of digits of the low-order value and the high-order value is exemplarily listed, which is not a limitation of the present application solution.

[0064] In a specific implementation, the first sub-record table and the address mapping table of the memory are stored in a storage unit. In a storage unit, a part of the storage space of the storage unit is used to record the address mapping table, and a part of the storage space is used to record the first sub-record table. Figure 3 As shown. For example, in a feasible implementation, half of the storage space of the storage unit is used to store the address mapping table, and half of the storage space is used to store the first sub-record table. Especially for the NVM of embedded devices, the storage space is not large. Assuming that the space size of an NVM page is 512 bytes, the number of NVM pages that the chip operating system (Chip Operating System, COS) file system needs to manage is less than 256. Therefore, the number of valid bytes of the address mapping table is less than 256. Therefore, for an NVM page, half of the storage space (that is, 256 bytes) can be used to store the address mapping table, and the remaining half of the storage space is used to store the first sub-record table.

[0065] In a possible implementation, Figure 3As shown, the address mapping table records the mapping relationship between the logical page number and the physical page number. The logical page number is represented by the index position of the address mapping table, and the physical page number is represented by the storage content of the address mapping table. In a specific implementation, the address mapping table may also store the serial number (SerialNumber, SN) of the address mapping table. SN is used to represent the update sequence number of the address mapping table. In a specific implementation, there may be multiple address mapping tables, which are updated alternately for power-off protection and wear leveling of the address mapping table. SN is used to identify which address mapping table is the latest address mapping table. Figure 3 SN_h in the address mapping table is used to identify the serial number of the hth address mapping table, and SN_I is used to identify the serial number of the Ith address mapping table.

[0066] like Figure 3 As shown, the address mapping table also stores a flag of the address mapping table, which is used to identify whether the address mapping table is valid. The foreign domain XOR in the address mapping table is used to identify the check value of the address mapping table. When the check value is invalid, the address mapping table corresponding to the next newest SN is used as the current mapping table.

[0067] It should be noted that the above introduction to the address mapping table is only for introducing the storage of the address mapping table and the first sub-record table in a storage unit. The specific settings of the address mapping table and other contents do not belong to the content of the present application scheme, so the specific related contents of the above address mapping table will not be elaborated in detail.

[0068] In a feasible implementation manner, in the above step 104, obtaining the first erasure number corresponding to the first storage unit from the erasure number record table may include the following process:

[0069] The low-order value of the first erasure number is read from the first sub-record table, and the high-order value of the first erasure number is read from the second sub-record table; the first erasure number is determined based on the low-order value and the high-order value.

[0070] That is, in the embodiment of the present application, each time the first erase and write count is read, it is necessary to read the value corresponding to the first storage unit recorded in the first sub-record table and the second sub-record table, and splice the read low-order value and high-order value together in digit order to obtain the complete number sequence corresponding to the first erase and write count, and obtain the first erase and write count based on the complete number sequence.

[0071] For ease of understanding, the following example will be used to illustrate. For example, assuming that the lower digit value read from the first sub-record table is 1A, and the upper digit value read from the second sub-record table is 00, the obtained complete number sequence 001A corresponds to a first erasure count of 26.

[0072] It should be noted that the above is only an exemplary description based on reading the first erasure number corresponding to the first storage unit. For any storage unit in the memory, the erasure number corresponding to the storage unit is read according to the above process.

[0073] Generally, for a memory, the longer it is used, the greater the degree of wear of each storage unit in the memory, and the more times each storage unit is erased and written. If the same preset number threshold is used from beginning to end, each storage unit may exceed the preset number threshold later. Therefore, in order to avoid this situation, during the implementation of the solution, the specific value of the preset number threshold can be adjusted according to the actual use of each storage unit in the memory. Therefore, in a feasible implementation, before executing the writing of the second data stored in the third storage unit of the memory into the first storage unit, the method provided in the embodiment of the present application also includes the following process:

[0074] Determine whether the second erase and write times corresponding to the third storage unit is greater than the above-mentioned preset times threshold; if so, update the preset times threshold; when the first erase and write times exceeds the updated preset times threshold, execute the operation of writing the second data stored in the third storage unit of the memory into the first storage unit; wherein the updated preset times threshold is greater than the preset times threshold before the update.

[0075] In a feasible implementation, if the judgment result indicates that the second erase and write count is less than or equal to the above-mentioned preset count threshold, then continue to execute the operation of writing the second data stored in the third storage unit of the memory into the first storage unit; if the judgment result indicates that the second erase and write count is greater than the above-mentioned preset count threshold, then it means that the erase and write count corresponding to the non-idle storage unit with the smallest erase and write count in the memory has also reached the above-mentioned preset count threshold, and it can basically be determined that the current erase and write count of each storage unit in the memory has reached the preset count threshold. In this case, if the above-mentioned preset count threshold is continued to be used to determine whether each storage unit needs to be wear-leveled, it has become inappropriate, and therefore, it is necessary to execute an operation to update the preset count threshold.

[0076] Exemplarily, when the above-mentioned preset number threshold is updated, the target value can be added to the preset number threshold to obtain the updated preset number threshold. For example, the target value can be 10000, or it can be other values. The specific value of the target value can be set according to the actual application scenario, and the embodiment of the present application does not limit the specific value of the target value.

[0077] After the above-mentioned preset number threshold is updated, relative to the updated preset number threshold, the above-mentioned first preset number threshold may not necessarily exceed the updated preset number threshold, so it is necessary to re-determine whether the first erasure and writing number corresponding to the first storage unit exceeds the updated preset number threshold. If the first erasure and writing number does not exceed the updated preset number threshold, then there is no need to perform the operation of writing the second data stored in the third storage unit to the first storage unit; if the first erasure and writing number exceeds the updated preset number threshold, then the operation of writing the second data stored in the third storage unit of the memory into the first storage unit is performed.

[0078] Optionally, in a feasible implementation, in order to ensure the rationality of the updated preset number threshold, before executing the writing of the second data stored in the third storage unit of the memory into the first storage unit, it is also possible to determine again whether the second erase and write times corresponding to the third storage unit is greater than the updated preset number threshold; if the second erase and write times is still greater than the updated preset number threshold, the updated preset number threshold is updated again until the second erase and write times is less than the updated preset number threshold.

[0079] In the embodiment of the present application, by updating the preset number threshold when the second erase and write times corresponding to the third storage unit exceeds the preset number threshold, the specific value of the preset number threshold can always remain at a reasonable value as the wear of the memory becomes more and more serious, thereby ensuring the rationality of the wear leveling solution provided in the embodiment of the present application.

[0080] In the implementation of this solution, when writing data in each storage unit, it is necessary to perform an erase operation on the storage unit, that is, to erase the data currently stored in the storage unit and write new data in the storage unit. At this time, it is necessary to increase the erase count corresponding to the storage unit by 1. Therefore, in a feasible implementation, after writing the second data stored in the third storage unit of the memory into the first storage unit, the method provided in the embodiment of the present application also includes the following process:

[0081] The first erasure number corresponding to the first storage unit is updated to obtain an updated first erasure number; if the updated first erasure number is greater than the maximum erasure number that can be recorded in the first sub-record table, the low-order value corresponding to the updated first erasure number is written into the first sub-record table, and the high-order value corresponding to the updated first erasure number is written into the second sub-record table; if the updated first erasure number is less than or equal to the maximum erasure number that can be recorded in the first sub-record table, the values ​​of each digit corresponding to the updated first erasure number are written into the first sub-record table.

[0082] It is not difficult to understand that the above-mentioned writing of the second data stored in the third storage unit into the first storage unit is actually performing a data erasure operation on the first storage unit. Therefore, the above-mentioned updating of the first erasure number corresponding to the first storage unit is actually adding 1 to the first erasure number corresponding to the first storage unit to obtain the updated first erasure number.

[0083] In the embodiment of the present application, since the erase count record table is split into two sub-record tables, when writing the updated erase count corresponding to the first storage unit into the erase count record table, it is necessary to first determine whether the updated erase count is greater than the maximum erase count that can be recorded in the first sub-record table. If the updated erase count is greater than the maximum erase count that can be recorded in the first sub-record table, it is necessary to perform a carry process in the second sub-record table, that is, it is necessary to perform a data write operation in the first sub-record table and the second sub-record table at the same time. If the updated erase count corresponding to the first storage unit is less than or equal to the maximum erase count that can be recorded in the first sub-record table, it is not necessary to carry to a higher position at this time, and it is only necessary to write the values ​​of each digit corresponding to the erase count into the first sub-record table.

[0084] In a feasible implementation, a blank digit may be reserved in the erasure count recording bit corresponding to each storage unit in the first sub-record table and / or the second sub-record table to record some other attribute information of the storage unit, such as whether the storage unit stores sensitive information or whether the storage unit is a bad storage unit, etc. Therefore, in the embodiment of the present application, the digit located at the first target position among the digits corresponding to each storage unit in the first sub-record table is used to identify the first attribute information of the storage unit;

[0085] and / or,

[0086] The digit located at the second target position among the digits corresponding to each storage unit in the second sub-record table is used to identify the second attribute information of the storage unit.

[0087] That is, in the embodiment of the present application, for each storage unit, blank bits may be reserved only in the first sub-record table, or only in the second sub-record table, or both.

[0088] Exemplarily, one blank digit may be reserved in the first sub-record table and / or the second sub-record table for recording attribute information, or two or more blank digits may be reserved for recording attribute information. That is, the specific number of the first target position and / or the second target position may be one or more. In a specific implementation scenario, it can be selected according to actual needs, and the embodiment of the present application does not limit the specific position or the corresponding number of the first target position and / or the second target position.

[0089] In a feasible implementation, the first attribute information may be whether the storage unit is a bad storage unit, and the second attribute information may be whether sensitive information is stored in the storage unit; of course, the first attribute information and the second attribute information may also be other. In specific implementation, the specific attribute content of the first attribute information and the second attribute information may be set according to actual scene requirements.

[0090] For ease of understanding, the following will be explained with examples. For example, in a feasible implementation, the highest two digits in the high-order bits can be used to identify the second attribute information of the corresponding storage unit, such as identifying whether the storage unit stores sensitive information, such as key data, etc. The highest four digits in the low-order bits can be used to identify the first attribute information of the corresponding storage unit, such as identifying whether the storage unit is a bad storage unit, etc. Of course, this is only an exemplary description, and in the specific implementation, it can be set according to actual needs.

[0091] In a feasible implementation, a digit is set in the second sub-record table to indicate whether the data stored in each storage unit is sensitive information. In this way, when writing the data stored in a storage unit to an idle storage unit, it can be determined based on the value of the corresponding digit whether the storage unit stores sensitive information. If it is determined that the storage unit stores sensitive information, in order to protect the sensitive information, after writing the data stored in the storage unit to the idle storage unit, it is necessary to perform an operation of erasing all the data stored in the storage unit. Exemplarily, the above-mentioned sensitive information can be key data, of course, it can also be other, which is only an exemplary description here, and can be set according to actual needs during specific implementation.

[0092] Similarly, in an embodiment of the present application, a digit is provided in the first sub-record table to identify whether each storage unit is a bad storage unit. In this way, when erasing and writing data in the memory, these bad storage units can be avoided in time, thereby ensuring the integrity and security of the data.

[0093] Optionally, in a specific implementation manner, after writing the first data stored in the first storage unit into the second storage unit in the memory which is currently in an idle state, the method provided in the embodiment of the present application further includes the following process:

[0094] The mapping relationship between the first logical address and the first physical address recorded in the address mapping table is updated to a mapping relationship between the first logical address and the second physical address; wherein the first logical address is a logical address corresponding to the first data, the first physical address is a physical address corresponding to the first storage unit, and the second physical address is a physical address corresponding to the second storage unit;

[0095] Furthermore, after writing the second data stored in the third storage unit in the memory into the first storage unit, the method provided in the embodiment of the present application further includes:

[0096] The mapping relationship between the second logical address of the second data and the third physical address recorded in the above address mapping table is updated to a mapping relationship between the second logical address and the first physical address; wherein the second logical address is the logical address corresponding to the second data, and the third physical address is the physical address corresponding to the third storage unit.

[0097] The above-mentioned address mapping table stores a one-to-one correspondence between each logical address and each physical address. Specifically, the address mapping table may store a one-to-one correspondence between a logical page number and a physical page number, or a one-to-one correspondence between an address number of a logical address and an address number of a physical address. Of course, it may also be other correspondences as long as it can represent a one-to-one correspondence between a logical address and a physical address.

[0098] In addition, it should be noted that in the wear leveling method of the memory provided in the embodiment of the present application, the memory may be a non-volatile memory; for example, the non-volatile memory may be a ROM memory, or an EEPROM memory, or may also be a Flash memory. The embodiment of the present application only exemplarily lists several possible non-volatile memories. In specific implementation, the scheme may also be applied to other types of non-volatile memories, and the embodiment of the present application does not limit this.

[0099] Optionally, in a specific implementation, in the wear leveling method for a memory provided in an embodiment of the present application, the memory may also be a non-volatile memory having a storage capacity that is smaller than a target capacity value.

[0100] Exemplarily, the target capacity value may be 1 megabyte, and may be other values. This is merely an example and is not intended to limit the present application.

[0101] In a specific application scenario, the method provided in the embodiment of the present application can be applied in NVM. In this implementation scenario, a possible structure of the software system framework corresponding to the wear leveling method of the memory is as follows: Figure 4 As shown. The software system framework includes a file management layer, a file power-off protection layer, an NVM wear leveling layer, and a manufacturer NVM read-write interface layer. Among them, the file management layer is located at the top level of the entire framework, responsible for interacting with upper-level applications and providing an interface for the file system; the file power-off protection layer is established to cope with sudden power outages to ensure that the integrity of the data can be protected during power outages; the NVM wear leveling layer is to implement the wear leveling method provided in the embodiment of the present application, and to achieve uniform erasing of each storage page in the NVM; the manufacturer NVM read-write interface layer directly interacts with the NVM hardware (that is, the chip hardware NVM) and is responsible for specific read and write operations. The above four levels work together, from the top-level file management to the bottom-level hardware interface, to jointly ensure the efficient and long-term use of NVM devices.

[0102] Figure 5 The second method flow diagram of the wear leveling method of the memory provided in the embodiment of the present application is as follows: Figure 5 As shown, the method comprises the following steps:

[0103] Step 201: if a data write request to write data to a first storage unit is received, write the first data stored in the first storage unit to a second storage unit in the memory that is currently in an idle state.

[0104] Step 202: update the mapping relationship between the first logical address and the first physical address recorded in the address mapping table to a mapping relationship between the first logical address and the second physical address, and update the number of erasures and writes corresponding to the second storage unit in the first sub-record table and / or the second sub-record table.

[0105] The first logical address is a logical address corresponding to the first data, the first physical location is a physical address corresponding to the first storage unit, and the second physical address is a physical address corresponding to the second storage unit.

[0106] Step 203: read the lower-order value of the first erasure number from the first sub-record table, and read the higher-order value of the first erasure number from the second sub-record table.

[0107] Step 204, obtaining a first erasing and writing number based on the above low-order value and high-order value.

[0108] Step 205: Obtain the stored preset number threshold.

[0109] Step 206, determining whether the first erasing and writing times exceeds a preset times threshold; if so, executing step 207; otherwise, ending.

[0110] Step 207: Determine, according to the first sub-record table and the second sub-record table, a non-idle storage unit with the smallest current erasure count in the memory as the third storage unit.

[0111] Step 208 , determining whether the second erasing and writing times corresponding to the third storage unit is greater than a preset times threshold; if so, executing step 209 ; otherwise, executing step 210 .

[0112] Step 209, updating the above-mentioned preset number threshold, and entering step 205 again.

[0113] Step 210: write the second data stored in the third storage unit into the first storage unit.

[0114] Step 211, update the mapping relationship between the second logical address and the third physical address recorded in the address mapping table to the mapping relationship between the second logical address and the first physical address, and update the erasure count corresponding to the first storage unit in the first sub-record table and / or the second sub-record table.

[0115] The second logical address is a logical address corresponding to the second data, and the third physical address is a physical address corresponding to the third storage unit.

[0116] For example, in NVM, when a data write request to write data to the 24th physical page is received, the data stored in the 24th physical page is first written to the 8th physical page, that is, the 8th physical page is used to replace the 24th physical page and added to the file system. The 24th physical page is replaced from the file system and becomes a free page. Therefore, it may not be displayed in the address mapping table, such as Figure 6 As shown in the address mapping table above; if it is detected that the 24th physical page is a hot page and the 1st physical page in the NVM is a cold page, the cold data stored in the 1st physical page is written to the 24th physical page, that is, the 24th physical page is used to replace the 1st physical page in the address mapping table, as shown in Figure 6 As shown in the address mapping table below. Therefore, the first physical page becomes a free page, and the data can be written to the first physical page when the next erase operation is performed, thereby achieving the purpose of wear leveling.

[0117] Corresponding to the wear leveling method of the memory provided in the embodiment of the present application, based on the same idea, the embodiment of the present application also provides a wear leveling device of the memory, which is used to execute the wear leveling method of the memory provided in the embodiment of the present application. Figure 7 A schematic diagram of the module composition of the wear leveling device of the memory provided in the embodiment of the present application is shown in FIG. Figure 7 As shown, the device comprises:

[0118] A first writing module 301 is configured to write the first data stored in the first storage unit into a second storage unit in the memory that is currently in an idle state if a data writing request to write data to the first storage unit is received;

[0119] An acquisition module 302 is used to acquire a first erasure number corresponding to a first storage unit from an erasure number record table;

[0120] The first judging module 303 is used to judge whether the first erasing and writing times exceeds a preset times threshold;

[0121] The second writing module 304 is used to write the second data stored in the third storage unit of the memory into the first storage unit when the first erasing and writing times exceeds the preset times threshold; wherein the second data is cold data.

[0122] In an optional implementation manner, the above-mentioned erasure count record table includes a first sub-record table and a second sub-record table;

[0123] The first sub-record table and the address mapping table of the memory are stored in the same storage unit, and the second sub-record table is stored in another storage unit;

[0124] The first sub-record table is used to record the target base low-order value corresponding to the number of erase and write times of each storage unit, and the second sub-record table is used to record the target base high-order value corresponding to the number of erase and write times of each storage unit, and the highest digit value in the above target base low-order value and the lowest digit value in the target base high-order value are located in adjacent digits.

[0125] In an optional implementation, the acquisition module 302 is specifically configured to:

[0126] The low-order value of the first erasure number is read from the first sub-record table, and the high-order value of the first erasure number is read from the second sub-record table; the first erasure number is determined based on the low-order value and the high-order value.

[0127] In an optional implementation, the device provided in the embodiment of the present application further includes:

[0128] The determination module is used to determine the non-idle storage unit with the smallest current erasure number in the memory according to the erasure number record table as the third storage unit.

[0129] In an optional implementation, the device provided in the embodiment of the present application further includes:

[0130] A second judgment module is used to judge whether the second erasing and writing times corresponding to the third storage unit is greater than a preset times threshold;

[0131] A first updating module is used to update the preset number threshold when the second erasing number is greater than the preset number threshold; wherein the preset number threshold after the update is greater than the preset number threshold before the update;

[0132] When the first erasing and writing times exceeds the updated preset times threshold, the second writing module 304 writes the second data stored in the third storage unit of the memory into the first storage unit.

[0133] In an optional implementation, the device provided in the embodiment of the present application further includes:

[0134] A second updating module is used to update the first erasing and writing number corresponding to the first storage unit to obtain an updated first erasing and writing number;

[0135] A third writing module is used for writing the low-order value corresponding to the updated first erasure number into the first sub-record table, and writing the high-order value corresponding to the updated first erasure number into the second sub-record table if the updated first erasure number is greater than the maximum erasure number that can be recorded in the first sub-record table;

[0136] If the updated first erasure number is less than or equal to the maximum erasure number that can be recorded in the first sub-record table, the values ​​of each digit corresponding to the updated first erasure number are written into the first sub-record table.

[0137] In an optional implementation, the digit located at the first target position among the digits corresponding to each storage unit in the first sub-record table is used to identify the first attribute information of the storage unit;

[0138] and / or,

[0139] The digit located at the second target position among the digits corresponding to each storage unit in the second sub-record table is used to identify the second attribute information of the storage unit.

[0140] In an optional implementation, the device provided in the embodiment of the present application further includes:

[0141] A third updating module is used to update the mapping relationship between the first logical address and the first physical address recorded in the address mapping table to a mapping relationship between the first logical address and the second physical address; wherein the first logical address is a logical address corresponding to the first data, the first physical address is a physical address corresponding to the first storage unit, and the second physical address is a physical address corresponding to the second storage unit;

[0142] as well as,

[0143] The fourth update module is used to update the mapping relationship between the second logical address and the third physical address recorded in the address mapping table to a mapping relationship between the second logical address and the first physical address; wherein the second logical address is the logical address corresponding to the second data, and the third physical address is the physical address corresponding to the third storage unit.

[0144] In an optional implementation, the memory is a non-volatile memory;

[0145] Alternatively, the memory is a non-volatile memory having a storage capacity smaller than the target capacity value.

[0146] The wear leveling device of the memory provided in the embodiment of the present application is consistent with the wear leveling device of the present application Figures 1 to 6 The wear leveling method for the memory provided by the illustrated embodiment is based on the same inventive concept and has the same beneficial effects as the method adopted, run or implemented by the same.

[0147] The implementation process of the functions and effects of each module in the wear leveling device of the memory provided in the embodiment of the present application is specifically described in detail in the implementation process of the corresponding steps in the above method embodiment, which will not be repeated here.

[0148] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can refer to the partial description of the method embodiments. The device embodiments described above are merely schematic, wherein the modules described as separate components may or may not be physically separated, and the components illustrated as modules may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present application. A person of ordinary skill in the art may understand and implement it without creative work.

[0149] Understandably, Figure 7 The division of each module is only a division of logical functions. In actual implementation, the functions of the above modules can be integrated into the hardware entity of the embedded device. For example, the first writing module 301, the acquisition module 302, the first judgment module 303 and the second writing module 304 can be integrated into the MCU of the embedded device.

[0150] Some embodiments of the present application also provide an electronic device corresponding to the wear leveling method of the memory provided in the above-mentioned embodiment, the electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor executes the above program to implement the above Figures 1 to 6 The illustrated embodiment provides a wear leveling method for a memory.

[0151] Figure 8The hardware structure diagram of an electronic device provided in an embodiment of the present application includes: a processor 401, a transceiver 403 and a memory 402, and these components are connected and communicated through a communication bus 404. The transceiver 403 can be used for data write requests. The memory 402 is used to store a computer program, which can be executed by the processor. When the processor executes the computer program, the aforementioned Figures 1 to 6 A wear leveling method for a memory provided by any implementation in the illustrated embodiments.

[0152] The electronic device provided in the embodiment of the present application and the wear leveling method of the memory provided in the embodiment of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented therein.

[0153] The present application also provides a computer-readable storage medium corresponding to the wear leveling method of the memory provided in the above embodiment, on which a computer program is stored. When the computer program is executed by the processor, the above Figures 1 to 6 A wear leveling method for a memory provided in any implementation manner of the corresponding embodiment.

[0154] The computer-readable storage medium provided by the above-mentioned embodiments of the present application and the wear leveling method of the memory provided by the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.

[0155] The present application also provides a computer program product corresponding to the wear leveling method of the memory provided in the above embodiment. The computer program product includes a computer program. The computer program is executed by a processor to implement the above embodiment. Figures 1 to 6 A wear leveling method for a memory provided in any implementation manner of the corresponding embodiment.

[0156] The computer program product provided by the above-mentioned embodiments of the present application and the wear leveling method of the memory provided by the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.

[0157] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0158] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0159] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0160] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0161] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a smart phone or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.

[0162] Although the optional embodiments of the present application have been described, those skilled in the art, once informed of the basic creative concept, may make additional changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiment and all changes and modifications falling within the scope of the present application.

[0163] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of the present application in detail. It should be understood that the above description is only the specific implementation methods of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present application should be included in the scope of protection of the present application.

Claims

1. A wear leveling method for a memory, characterized in that: The method comprises: If a data write request to write data to a first storage unit is received, the first data stored in the first storage unit is written into a second storage unit in the memory that is currently in an idle state; Acquire a first erasure number corresponding to the first storage unit from an erasure number record table; Determining whether the first erasing and writing times exceeds a preset times threshold; If so, the second data stored in the third storage unit of the memory is written into the first storage unit; wherein the second data is cold data.

2. The method according to claim 1, characterized in that The erasure count record table includes a first sub-record table and a second sub-record table; Wherein, the first sub-record table and the address mapping table of the memory are stored in the same storage unit, and the second sub-record table is stored in another storage unit; The first sub-record table is used to record the target base low-order value corresponding to the number of erase and write times of each storage unit, and the second sub-record table is used to record the target base high-order value corresponding to the number of erase and write times of each storage unit, and the highest digit value in the target base low-order value and the lowest digit value in the target base high-order value are located in adjacent digits.

3. The method according to claim 2, characterized in that The obtaining the first erasure number corresponding to the first storage unit from the erasure number record table includes: Reading the lower value of the first erasure number from the first sub-record table, and reading the higher value of the first erasure number from the second sub-record table; The first erasure count is determined based on the lower-order value and the upper-order value.

4. The method according to claim 1, characterized in that: The third storage unit is determined by the following steps: According to the erasure number record table, a non-idle storage unit with the smallest current erasure number in the memory is determined as the third storage unit.

5. The method according to any one of claims 1 to 4, characterized in that: Before writing the second data stored in the third storage unit of the memory into the first storage unit, the method further includes: Determine whether the second erasing and writing times corresponding to the third storage unit is greater than the preset times threshold; If yes, then the preset number of times threshold is updated; wherein the preset number of times threshold after the update is greater than the preset number of times threshold before the update; When the first erasing and writing times exceeds the updated preset times threshold, an operation of writing the second data stored in the third storage unit of the memory into the first storage unit is performed.

6. The method according to claim 2 or 3, characterized in that: After writing the second data stored in the third storage unit of the memory into the first storage unit, the method further includes: Updating the first erasure and writing count corresponding to the first storage unit to obtain an updated first erasure and writing count; If the updated first erasure number is greater than the maximum erasure number that can be recorded in the first sub-record table, the low-order value corresponding to the updated first erasure number is written into the first sub-record table, and the high-order value corresponding to the updated first erasure number is written into the second sub-record table; If the updated first erasure number is less than or equal to the maximum erasure number that can be recorded in the first sub-record table, the values ​​of each digit corresponding to the updated first erasure number are written into the first sub-record table.

7. The method according to claim 2, characterized in that The digits located at the first target position among the digits corresponding to each storage unit in the first sub-record table are used to identify the first attribute information of the storage unit; and / or, The digit located at the second target position among the digits corresponding to each storage unit in the second sub-record table is used to identify the second attribute information of the storage unit.

8. The method according to claim 2, characterized in that: After writing the first data stored in the first storage unit into a second storage unit in the memory which is currently in an idle state, the method further includes: The mapping relationship between the first logical address and the first physical address recorded in the address mapping table is updated to a mapping relationship between the first logical address and the second physical address; wherein the first logical address is a logical address corresponding to the first data, the first physical address is a physical address corresponding to the first storage unit, and the second physical address is a physical address corresponding to the second storage unit; as well as, After writing the second data stored in the third storage unit in the memory into the first storage unit, the method further includes: The mapping relationship between the second logical address and the third physical address recorded in the address mapping table is updated to a mapping relationship between the second logical address and the first physical address; wherein the second logical address is the logical address corresponding to the second data, and the third physical address is the physical address corresponding to the third storage unit.

9. The method according to any one of claims 1 to 4, characterized in that: The memory is a non-volatile memory; or, The memory is a non-volatile memory having a storage capacity smaller than a target capacity value.

10. A wear leveling device for a memory, characterized in that: The device comprises: A first writing module, configured to write the first data stored in the first storage unit into a second storage unit in the memory that is currently in an idle state if a data writing request to write data to the first storage unit is received; An acquisition module, used for acquiring a first erasure number corresponding to the first storage unit from an erasure number record table; A first judging module, used for judging whether the first erasing and writing times exceeds a preset times threshold; The second writing module is used to write the second data stored in the third storage unit of the memory into the first storage unit if the first erasing and writing times exceeds the preset times threshold; wherein the second data is cold data.

11. An electronic device, characterized in that: The method comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method according to any one of claims 1 to 9.

12. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the method according to any one of claims 1 to 9.

13. A computer program product, characterized in that The method comprises instructions, which, when executed on a computer, cause the computer to execute the method according to any one of claims 1 to 9.

Images