Software simulation-based power consumption analysis method, apparatus and device, and medium

Abstract

The invention discloses a power consumption analysis method and device based on software simulation, equipment and a medium. The method comprises the steps of determining a target waveform file and a target statistical data set based on a target simulation file corresponding to a target hardware circuit and a preset scheduling model; analyzing and processing system scheduling information and signal updating information in each unit time interval in the target statistical data set based on the type characteristics of the target power consumption type, and determining a key information set; determining target key information and a target time range in the key information set based on the current analysis demand, and determining target power consumption data in the target waveform file based on the target key information and the target time range; and determining a target power consumption model based on the data type of the target power consumption data, and performing power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result. According to the technical scheme, the power consumption data needing to be analyzed can be positioned in advance, and the power consumption analysis efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the field of data processing technology, and in particular to a power consumption analysis method, device, equipment and medium based on software simulation. Background Art

[0002] As chip design becomes more and more complex, there are many complex processes from beginning to end. As the design process progresses, each design modification requires re-running the previous process, which brings extremely high optimization costs, and the optimization space becomes smaller as time goes by. Therefore, power consumption has become an indicator that chip designers are increasingly concerned about.

[0003] The existing technology usually needs to traverse the waveform data of the system during the complete simulation time when performing power consumption analysis, and then input the extracted signal flip rate or duty cycle data into the power consumption model according to the advancement of the time axis to estimate the power consumption of each cycle. The above process is repeated until the end of the simulation time point, and finally the complete power consumption information is counted and related analysis is performed.

[0004] However, if the waveform data of the system in the complete simulation time is traversed, a large amount of invalid data may be read, and many power consumption calculations that are not within the scope of concern may be performed, which reduces the efficiency of power consumption analysis. Therefore, how to improve the efficiency of power consumption analysis is an urgent problem to be solved. Summary of the invention

[0005] The present invention provides a power consumption analysis method, device, equipment and medium based on software simulation, which can solve the problem of low efficiency of power consumption analysis.

[0006] According to one aspect of the present invention, a power consumption analysis method based on software simulation is provided, comprising:

[0007] Obtain a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval;

[0008] Analyzing and processing system scheduling information and signal update information in each unit time interval based on the type characteristics of the target power consumption type, and determining a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals;

[0009] Determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range;

[0010] A target power consumption model is determined based on the data type of the target power consumption data, and power consumption analysis is performed on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0011] According to another aspect of the present invention, there is provided a power consumption analysis device based on software simulation, comprising:

[0012] An information acquisition module is used to acquire a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval;

[0013] An information analysis module, used to analyze and process system scheduling information and signal update information within each unit time interval based on the type characteristics of the target power consumption type, and determine a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals;

[0014] A data analysis module, used to determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range;

[0015] The power consumption analysis module is used to determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0016] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the power consumption analysis method based on software simulation described in any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the power consumption analysis method based on software simulation described in any embodiment of the present invention when executed.

[0021] According to another aspect of the present invention, a computer program product is provided, comprising a computer program, wherein when the computer program is executed by a processor, the power consumption analysis based on software simulation according to any embodiment of the present invention is implemented.

[0022] The technical solution of the embodiment of the present invention determines the target waveform file and target statistical data set corresponding to the target hardware circuit through the target simulation file and the preset scheduling model corresponding to the target hardware circuit; then, based on the type characteristics of the target power consumption type, the system scheduling information and signal update information in each unit time interval in the target statistical data set are analyzed and processed to determine the key information set corresponding to the target hardware circuit; further, based on the current analysis requirements, the target key information and target time range corresponding to the target hardware circuit are determined in the key information set, and the corresponding target power consumption data is determined in the target waveform file based on the target key information and target time range; finally, the target power consumption model is determined based on the data type of the target power consumption data, and the target power consumption data is analyzed based on the target power consumption model to obtain the target power consumption result corresponding to the target hardware circuit. Since the power consumption data to be analyzed is located in advance before the waveform data of the power consumption analysis is read, the problem of low efficiency of the power consumption analysis is solved, and the efficiency of the power consumption analysis is improved.

[0023] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 It is a flow chart of a power consumption analysis method provided by the prior art;

[0026] Figure 2 is a flowchart of a power consumption analysis method based on software simulation provided according to Embodiment 1 of the present invention;

[0027] Figure 3 is a flowchart of a power consumption analysis method based on software simulation provided according to Embodiment 2 of the present invention;

[0028] Figure 4 is a schematic diagram of hierarchical information provided according to Embodiment 2 of the present invention;

[0029] Figure 5 is a schematic diagram of an assignment update number provided according to Embodiment 2 of the present invention;

[0030] Figure 6 is a schematic diagram of a working state provided according to Embodiment 2 of the present invention;

[0031] Figure 7 is a flowchart of an optional power consumption analysis method based on software simulation provided according to Embodiment 2 of the present invention;

[0032] Figure 8 is a schematic diagram of a key information set determination process provided according to Embodiment 2 of the present invention;

[0033] Fig. 9 is a schematic diagram of a power consumption analysis system based on software simulation provided according to Embodiment 2 of the present invention;

[0034] Fig.10 is a schematic diagram of the structure of a power consumption analysis device based on software simulation according to Embodiment 3 of the present invention;

[0035] Fig.11 It is a structural schematic diagram of an electronic device for implementing the power consumption analysis method based on software simulation according to an embodiment of the present invention. DETAILED DESCRIPTION

[0036] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0037] It should be noted that the terms "first", "second", "target", "preset", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0038] Power consumption is an extremely important indicator in chip design. Figure 1 The flowchart of a power consumption analysis method provided by the prior art is shown. Specifically, first, a corresponding waveform file is generated by a software simulation tool, and the waveform file is traversed to obtain all waveform data information, wherein the waveform file records the signal waveform of the chip under different load and input conditions, including the clock signal, input and output signal and control signal under this project. Further, a power consumption model related to chip design and manufacturing process is established. The power consumption characteristics of different circuit modules under different working conditions are described by the power consumption model, and then the power consumption is calculated clock cycle by clock cycle through the relevant data such as the flip rate of the signal or the duration of high and low levels, and the power consumption data is analyzed and the main sources of power consumption are analyzed and identified, such as specific circuit modules or operating modes, to complete the power consumption analysis. Finally, specific power consumption optimization is performed based on the results, such as optimizing circuit design, improving layout or adopting more effective power management strategies. In addition, the optimization effect is verified by re-simulation, and the optimization strategy is repeatedly adjusted until the design requirements are met.

[0039] However, considering the optimization benefits and optimization costs, the actual application scenario generally does not optimize the power consumption of all parts of the entire system. Usually, only the key modules and key signals therein are optimized, and the optimization time range does not cover the entire simulation cycle. Therefore, if the power consumption analysis method in the prior art is used, a large amount of invalid data may be read, and many power consumption calculations that are not within the scope of concern are performed, so that the efficiency of power consumption analysis is reduced. Therefore, in order to solve the problem of low efficiency of power consumption analysis and improve the efficiency of power consumption analysis, an embodiment of the present invention proposes a power consumption analysis method based on software simulation.

[0040] Embodiment 1

[0041] Figure 2 This is a flowchart of a power consumption analysis method based on software simulation provided in the first embodiment of the present invention. This embodiment can be applied to the situation where the efficiency of power consumption analysis is improved. The method can be executed by a power consumption analysis device based on software simulation. The power consumption analysis device based on software simulation can be implemented in the form of hardware and / or software. The power consumption analysis device based on software simulation can be configured in an electronic device. Figure 2 As shown, the method includes:

[0042] S110. Obtain a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval.

[0043] The target hardware circuit may refer to a hardware circuit that needs to be analyzed for power consumption. Exemplarily, the target hardware circuit may be a chip. The simulation file may refer to a test file corresponding to the hardware circuit. Exemplarily, the simulation file may include source code corresponding to the hardware circuit and a corresponding test stimulus file. The target simulation file may refer to a simulation file corresponding to the target hardware circuit.

[0044] Among them, the preset scheduling model may refer to a pre-selected simulation mode. Optionally, the preset scheduling model includes: a preset clock cycle model, a preset event-driven model or a preset hybrid scheduling model. The preset clock cycle model may refer to a pre-selected clock cycle model. The clock cycle model may refer to a simulation mode based on clock drive, in which the behavior of the system is divided into several clock cycles, and certain operations are performed in each clock cycle. The clock cycle model has high efficiency and predictability, but has high requirements for system synchronization, and is suitable for simulating synchronous systems, such as digital circuits or microprocessors, in which the behavior of the system is driven by a global clock and operations are performed synchronously at the clock edge. The preset event-driven model may refer to a pre-selected event-driven model. The event-driven model is a simulation mode based on event drive, in which the behavior in the system is modeled as events, and these events are scheduled and processed according to the order in which they occur during the simulation process. The event-driven model has flexibility and accuracy, but may bring a large computational overhead, and is suitable for simulating discrete event systems, such as communication protocols or processor instruction execution. The preset hybrid scheduling model may refer to a pre-selected hybrid scheduling model. The hybrid scheduling model combines the characteristics of the event-driven model and the clock cycle model. In the hybrid scheduling model, the simulator dynamically chooses to use the event-driven model or the clock cycle model for simulation based on the structure and characteristics of the design. It can take into account the advantages of both models, improve simulation efficiency and accuracy, and better meet the needs of design verification.

[0045] The target waveform file may refer to a waveform file obtained after software simulation using the target simulation file and the preset scheduling model. The unit time interval may refer to a time period for evaluating the statistical time interval. Generally, the unit time interval in the current simulation process may be determined based on the actual analysis accuracy. For example, if the accuracy requirement is higher, the determined unit time interval is smaller.

[0046] Among them, the system scheduling information may refer to the number of times the scheduling task is obtained within a unit time interval. The signal update information may refer to the number of times each signal is updated within a unit time interval, and the total number of times each signal is updated. The target statistical data set may refer to a set consisting of various system scheduling information and signal update information within the same unit time interval. Usually, in the target statistical data set, the system scheduling information and the corresponding signal update information within the same unit time interval exist in pairs.

[0047] S120. Analyze and process system scheduling information and signal update information within each unit time interval based on the type characteristics of the target power consumption type, and determine a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals.

[0048] Among them, the target power consumption type may refer to the power consumption type selected for analysis. Exemplarily, the target power consumption type may be system power consumption or peak-valley power consumption. System power consumption may refer to the total energy consumed by the hardware circuit during the entire working cycle, which represents the average energy consumption level of the hardware circuit over a long period of time, and is crucial to understanding the overall energy consumption of the hardware circuit. Peak-valley power consumption may refer to the difference between the highest value (i.e., peak power consumption) and the lowest value (i.e., valley power consumption) of the hardware circuit power consumption in a specific time period. Peak-valley power consumption reflects the fluctuation of energy consumption of the hardware circuit under different workloads, which helps to evaluate the energy consumption stability and power consumption management effect of the circuit.

[0049] Among them, the key module may refer to the module whose signal flips most frequently within a unit time interval. The key signal may refer to the signal that flips most frequently within a unit time interval in the key module. The key information may refer to the data information composed of the key module and the key signal under the same target power consumption type. The key information set may refer to the set composed of the key information under each target power consumption type.

[0050] S130. Determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range.

[0051] The current analysis requirement may refer to the power consumption analysis requirement in the current actual application scenario. For example, the current analysis requirement may be an overall optimization requirement or an optimization requirement for a specific situation. The target key information may refer to the key information in the key information set that matches the current analysis requirement.

[0052] The target time range may refer to the time period range of the unit time interval corresponding to the target key information. The target power consumption data may refer to the power consumption data corresponding to the target key information and the target time range in the target waveform file.

[0053] S140: Determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0054] The target power consumption model may refer to a pre-selected model for power consumption estimation of power consumption data. Usually, different data types of power consumption data correspond to different power consumption models. The target power consumption result may refer to a power consumption estimation result obtained by performing power consumption analysis on the target power consumption data using the target power consumption model.

[0055] The technical solution of the embodiment of the present invention determines the target waveform file and target statistical data set corresponding to the target hardware circuit through the target simulation file and the preset scheduling model corresponding to the target hardware circuit; then, based on the type characteristics of the target power consumption type, the system scheduling information and signal update information in each unit time interval in the target statistical data set are analyzed and processed to determine the key information set corresponding to the target hardware circuit; further, based on the current analysis requirements, the target key information and target time range corresponding to the target hardware circuit are determined in the key information set, and the corresponding target power consumption data is determined in the target waveform file based on the target key information and target time range; finally, the target power consumption model is determined based on the data type of the target power consumption data, and the target power consumption data is analyzed based on the target power consumption model to obtain the target power consumption result corresponding to the target hardware circuit. Since the power consumption data to be analyzed is located in advance before the waveform data of the power consumption analysis is read, the problem of low efficiency of the power consumption analysis is solved, and the efficiency of the power consumption analysis is improved.

[0056] Embodiment 2

[0057] Figure 3 A flowchart of a power consumption analysis method based on software simulation is provided for the second embodiment of the present invention. This embodiment is refined based on the above-mentioned embodiment. In this embodiment, the operation of analyzing and processing the system scheduling information and signal update information within each unit time interval based on the type characteristics of the target power consumption type to determine the key information set corresponding to the target hardware circuit is specifically refined. Specifically, it may include: if the target power consumption type is system power consumption, based on the target level information corresponding to the target hardware circuit and the signal update information within each unit time interval, the first key module and the first key signal corresponding to the system power consumption are determined; if the target power consumption type is peak-valley power consumption, based on the changes in the system scheduling information within each unit time interval, the target working state corresponding to the target time interval is determined; based on the target working state corresponding to the target time interval and the target signal update information, the second key module and the second key signal corresponding to the peak-valley power consumption are determined; the first key module, the first key signal, the second key module and the second key signal are processed in combination to generate a key information set corresponding to the target hardware circuit. Figure 3 As shown, the method includes:

[0058] S210. Obtain a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model.

[0059] The target statistical data set includes system scheduling information and signal update information within each unit time interval.

[0060] Specifically, obtain the target simulation file corresponding to the target hardware circuit, perform software simulation on the test stimulus file and source code in the target simulation file according to the preset scheduling model, generate a complete target waveform file, and track and record the scheduling process and assignment update process in the simulation process, collect the number of scheduling times, the number of updates of each signal and the total number of updates within a period of time, and generate a target statistical data set containing system scheduling information and signal update information within each unit time interval.

[0061] Exemplarily, if the preset scheduling model is an event-driven model, the scheduling module in the event-driven model and the total event list in the scheduling module can be located during the simulation process, as well as the assignment module in the event-driven model, and the assigned signal index information can be obtained, wherein the signal index information is used to represent the mapping relationship between the signal and the update number or the total update number. Afterwards, the total number of events processed in each unit time interval T is counted as the system scheduling information, and the assignment update number and the total update number of each signal in each unit time interval T are counted as the signal update information. Finally, the system scheduling information and signal update information in each unit time interval are combined to generate a target statistical data set.

[0062] It is worth noting that the implementation steps of the clock cycle model are similar to those of the event-driven model. Events may not be directly included in the clock cycle model, but there is still a corresponding scheduling list on each effective clock edge. The number of schedulings performed on the effective clock edge within the unit time interval T can be counted to achieve the generation of a target statistical data set. In addition, the hybrid scheduling model essentially combines the first two scheduling methods. The scheduling models used in different time ranges are different. Therefore, it is necessary to track and record the two parts of the scheduling method at the same time, and finally summarize them into a complete target statistical data set. The embodiment of the present invention does not specifically limit the type of preset scheduling model.

[0063] S220: If the target power consumption type is system power consumption, determine a first key module and a first key signal corresponding to the system power consumption based on target level information corresponding to the target hardware circuit and signal update information within each unit time interval.

[0064] Among them, the hierarchical information may refer to the hierarchical information corresponding to the hardware circuit. Exemplarily, the hierarchical information may include various modules, submodules, signals and related hierarchical relationships corresponding to the hardware circuit. The target hierarchical information may refer to the hierarchical information corresponding to the target hardware circuit. Usually, in the design process of the hardware circuit, the hierarchical information corresponding to the hardware circuit can be determined, and the embodiments of the present invention do not limit this.

[0065] Figure 4 The figure shows a schematic diagram of hierarchical information provided by an embodiment of the present invention. Specifically, if the system of the hardware circuit includes a top-level module, the top-level module includes two sub-modules, sub-module 1 (module_1) and sub-module 2 (module_2), module_1 has 3 signals, namely signals a, b and c, and module_2 has 2 signals, namely signals d and e. Then the hierarchical relationship between the top-level module and sub-module module_1 and sub-module module_2, the hierarchical relationship between sub-module module_1 and signals a, b and c, and the hierarchical relationship between sub-module module_2 and signals d and e, constitute the hierarchical information corresponding to the hardware circuit.

[0066] The first key module may refer to a key module under the system power consumption type. The first key signal may refer to a key signal corresponding to the first key module under the system power consumption type.

[0067] In an optional embodiment, the first key module and the first key signal corresponding to the system power consumption are determined based on the target level information corresponding to the target hardware circuit and the signal update information within each unit time interval, including: determining each standard sub-module corresponding to the target hardware circuit and each standard signal contained in each standard sub-module based on the target level information corresponding to the target hardware circuit; determining the number of assignment updates corresponding to each standard signal based on the signal update information within each unit time interval; determining the target sub-module corresponding to the system power consumption and the target signal contained in the target sub-module based on the difference relationship between the number of assignment updates corresponding to each standard signal; and taking the target sub-module as the first key module and the target signal as the first key signal.

[0068] Among them, the standard submodule may refer to each submodule corresponding to the target hardware circuit in the target level information. The standard signal may refer to each signal corresponding to the target hardware circuit in the target level information. Figure 4 For example, the standard submodules may be submodule module_1 and submodule module_2. The standard signals may be signals a, b, c, d, and e.

[0069] The number of assignment updates may refer to the number of times the value of the signal changes. Figure 5 The figure shows a schematic diagram of the number of assignment updates provided by an embodiment of the present invention. Specifically, a submodule contains only two signals, signal A and signal B, and signal A is updated 7 times within the T1 unit time interval, updated 2 times within the T2 unit time interval, and there is no subsequent change, and signal B is updated 2 times within the T1 unit time interval, and there is no update within the T2 unit time interval and thereafter. Then the number of assignment updates of signal A within the T1 unit time interval is 7 times, the number of assignment updates within the T2 unit time interval is 2 times, and the total number of assignment updates is 9 times. Similarly, the number of assignment updates of signal B within the T1 unit time interval is 2 times, the number of assignment updates within the T2 unit time interval is 0 times, and the total number of assignment updates is 2 times. The total number of assignment updates of the submodule is the sum of the total number of assignment updates of signal A and signal B, that is, 11 times.

[0070] The target submodule may refer to the module whose signal flips most frequently within a unit time interval in the target hierarchical information. The target signal may refer to the signal whose signal flips most frequently within a unit time interval in the target submodule. Figure 4 For example, if the total number of assignment updates of signals a and b is N, the total number of assignment updates of signal c is L, the total number of assignment updates of signal d is N, the total number of assignment updates of signal e is S, and L>>N>>S. Then the total number of assignment updates of module_1 is 2N+L, the total number of assignment updates of module_2 is N+S, and the total number of assignment updates of module_1 is much larger than the total number of assignment updates of module_2. Therefore, in the system power consumption, the key module of dynamic power consumption is module_1, and the key signal of module_1 is c, the key module of static power consumption is module_2, and the key signal of module_2 is e. Therefore, module_1 can be used as the target submodule, and the corresponding target signal is signal c, and module_2 can be used as the target submodule, and the corresponding target signal is signal e. Thus, the determination of the first key module and the first key signal under the system power consumption type is completed, providing an effective basis for subsequent operations.

[0071] It is worth noting that the power consumption in the hardware circuit consists of two parts. The first part is the power consumption caused by the charging and discharging of the load capacitance, which is called dynamic power consumption, and the other part is the power consumption caused by leakage current, which is called static power consumption. Among them, dynamic power consumption includes flip power consumption and short circuit power consumption. Usually, the total power consumption of digital circuits can be calculated according to the formula: Estimate. Where C is the junction capacitance, N SW is the number of transistors flipped in a unit time interval, f is the system frequency, V DD is the power supply voltage, Q SC is the short-circuit charge during the flipping process, Ilesk is the leakage current. The first term in the formula is called flip power consumption, which is the power consumption that must be consumed by the digital circuit to complete the functional calculation, also known as effective power consumption. The second term in the formula is called short-circuit power consumption. Since the field effect (metal-oxide-semiconductor, MOS) tube may be turned on for a short time during the flipping process, a certain amount of power consumption is generated. This part of power consumption is also called invalid power consumption. These two parts together constitute the dynamic power consumption of the hardware circuit. The last term in the formula is the static power consumption, which exists in the entire cycle of the hardware circuit. As the complexity of the chip increases, the relative proportion of dynamic power consumption and static power consumption may change and be affected by many factors. Therefore, in the process of determining key modules and key signals, it is necessary to determine the key modules and key signals under dynamic power consumption and static power consumption respectively to improve the efficiency of subsequent power consumption analysis.

[0072] S230: If the target power consumption type is peak-valley power consumption, determine the target working state corresponding to the target time interval based on the change of the system scheduling information within each unit time interval.

[0073] The target time interval may refer to a unit time interval selected for data analysis. The target working state may refer to a working state corresponding to the target hardware circuit at the target time interval. Exemplarily, the target working state may include an active state or an inactive state.

[0074] In an optional embodiment, determining the target working state corresponding to the target time interval based on the change of the system scheduling information within each unit time interval may include: determining the average scheduling information corresponding to the full system scheduling information based on the system scheduling information within each unit time interval; determining the target working state corresponding to the target time interval based on the average scheduling information and a preset scheduling threshold; wherein the target working state includes an active state or an inactive state.

[0075] The average scheduling information may refer to data obtained after calculating the average of all system scheduling information. Figure 6 The figure shows a schematic diagram of a working state provided by an embodiment of the present invention. Specifically, the software simulation process includes four unit time intervals, namely 0 to t1, t1 to t2, t2 to t3 and t3 to t4, and the system scheduling information in the first unit time interval is n1, the system scheduling information in the second unit time interval is 0, the system scheduling information in the third unit time interval is n2, and the system scheduling information in the fourth unit time interval is n3. Then the average scheduling information can be: N = (n1 + 0 + n2 + n3) / 4.

[0076] Among them, the preset scheduling threshold can refer to a numerically value preset for evaluating system scheduling information. Exemplarily, the preset scheduling threshold can be determined according to the average scheduling information and the corresponding threshold setting rules. Specifically, 0.5 times the average scheduling information can be used as the preset scheduling threshold for the inactive state, and 1.5 times the average scheduling information can be used as the preset scheduling threshold for the active state. Taking the above Figure 6 as an example, if n1 << 0.5*N << n2 << 1.5*N << n3, the time range [0, t1] can be divided into an inactive state, and the part [t3, t4] can be divided into an active state, thereby providing a reference for subsequent power consumption analysis.

[0077] S240. Determine the second key module and the second key signal corresponding to the peak-valley power consumption based on the target working state and the target signal update information corresponding to the target time interval.

[0078] Among them, the target signal update information can refer to the signal update information corresponding to the target time interval. The second key module can refer to the key module in the peak-valley power consumption type. The second key signal can refer to the key signal corresponding to the second key module in the peak-valley power consumption type.

[0079] In an optional implementation manner, the determining the second key module and the second key signal corresponding to the peak-valley power consumption based on the target working state and the target signal update information corresponding to the target time interval includes: determining the preset screening rule corresponding to the target working state based on the state type of the target working state; determining the second key module and the second key signal corresponding to the peak-valley power consumption based on the preset screening rule and the target signal update information corresponding to the target time interval.

[0080] Among them, the preset screening rule can refer to a preset information screening rule. Exemplarily, if the target working state is the active state, the preset screening rule can be to screen the peak power consumption. If the target working state is the inactive state, the preset screening rule can be to screen the valley power consumption.

[0081] Specifically, if the target power consumption type is peak-valley power consumption, after determining the target working state corresponding to the target time interval, the preset screening rule corresponding to the target working state can be determined according to the state type of the target working state, that is, the preset screening rule corresponding to the target time interval. Furthermore, the preset screening rule is used to perform data screening in the target signal update information corresponding to the target time interval, so as to obtain the second key module and the second key signal in the active state, and the second key module and the second key signal in the inactive state by using the screened data.

[0082] It is worth noting that the determination process of the second key module and the second key signal in the active state, and the second key module and the second key signal in the inactive state, are consistent with the determination process of the first key module and the first key signal corresponding to the system power consumption, and are all determined based on the difference relationship between the number of assignment updates corresponding to each standard signal, and the embodiments of the present invention will not be elaborated here.

[0083] S250, combining and processing the first key module, the first key signal, the second key module and the second key signal to generate a key information set corresponding to the target hardware circuit.

[0084] Specifically, after obtaining the first key module and the first key signal corresponding to the system power consumption, and the second key module and the second key signal corresponding to the peak and valley power consumption, the first key module, the first key signal, the second key module and the second key signal corresponding to the same target hardware circuit can be combined and processed to generate a key information set corresponding to the target hardware circuit, providing an effective basis for subsequent power consumption analysis.

[0085] S260. Determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range.

[0086] Specifically, after generating a key information set corresponding to the target hardware circuit, the target key information corresponding to the target hardware circuit can be determined in the key information set according to the current analysis requirements. Exemplarily, if the current analysis requirement is an overall optimization requirement, the key information corresponding to the system power consumption is determined in the key information set as the target key information; if the current analysis requirement is a specific situation optimization requirement, the key information corresponding to the peak and valley power consumption is determined in the key information set as the target key information. Then, the unit time interval corresponding to the target key information is used as the target time range to provide a time interval to be retrieved. Finally, the corresponding target power consumption data is determined in the target waveform file based on the target key information and the target time range. In this way, before reading the waveform data of the power consumption analysis, the working cycle of the system and the key modules therein can be located in advance, and waveform data retrieval within a specific range can be performed according to the designer's analysis requirements for system power consumption and peak and valley power consumption, thereby improving the efficiency of subsequent power consumption analysis.

[0087] It is worth noting that, in the example of the present invention, the extended time period of the unit time interval corresponding to the target key information can also be used as the target time range. Exemplarily, the subsequent several seconds or more than ten seconds of the corresponding unit time interval can be added to the corresponding unit time interval as the target time range. The embodiment of the present invention is not limited to this.

[0088] S270: Determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0089] Specifically, after reading the target power consumption data, first, determine the corresponding target power consumption model according to whether the data type of the target power consumption data is static power consumption data or dynamic power consumption data. Then, input the target power consumption data into the target power consumption model for corresponding power consumption estimation, for example, analyzing the flipping frequency, high and low level duration or working status, etc. Finally, obtain the target power consumption result corresponding to the target hardware circuit.

[0090] It is worth noting that, usually, according to the principle of greater optimization benefits, dynamic power consumption estimation is performed on modules with high signal flipping frequency in active states, and static power consumption estimation is performed on parts with infrequent signal flipping in inactive states.

[0091] In an optional embodiment, after determining a target power consumption model based on the data type of the target power consumption data, and performing power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit, it also includes: determining a target power consumption optimization strategy based on the data type of the target power consumption data, and optimizing and processing the target simulation file based on the target power consumption optimization strategy.

[0092] Among them, the target power consumption optimization strategy may refer to a pre-selected power consumption optimization method. Generally, when optimizing chip power consumption, different optimization methods need to be adopted for dynamic power consumption and static power consumption. Exemplarily, for the optimization of dynamic power consumption, a series of methods can be used to reduce the power consumption generated by the chip during operation. For example, adjust the clock frequency, reduce the frequency of signal switching by reducing the clock frequency, thereby reducing the flip power consumption and short-circuit power consumption; use dynamic voltage and frequency scaling (Dynamic Voltage and Frequency Scaling, DVFS) technology to adjust the operating voltage and clock frequency of the chip in real time according to the workload to achieve a balance between power consumption and performance; implement effective power management strategies, such as sleep mode and partial power shutdown, to reduce dynamic power consumption when the chip is idle; optimize data transmission paths and logic designs, and reduce the length and complexity of data transmission paths, reduce the number of logic gates and signal delays, thereby reducing power consumption. Relatively speaking, the optimization method of static power consumption focuses more on reducing the power consumption of the chip when it is not working. For example, subthreshold voltage technology and high impedance logic are used to reduce the leakage current of transistors; manufacturing processes are improved to reduce transistor size and improve insulating layer materials; effective power management strategies are adopted, such as partial power shutdown and power gating; current paths and capacitive loads in circuits are reduced by optimizing circuit structure and layout; power-aware design is considered during the design process, that is, the leakage current and static power consumption of transistors are considered during design. Therefore, by comprehensively considering these optimization methods for dynamic power consumption and static power consumption, the overall power consumption of the chip can be effectively controlled to avoid excessive energy consumption or overheating of the device.

[0093] The technical solution of the embodiment of the present invention determines the target waveform file and the target statistical data set corresponding to the target hardware circuit through the target simulation file and the preset scheduling model corresponding to the target hardware circuit; further, if the target power consumption type is system power consumption, based on the target level information corresponding to the target hardware circuit and the signal update information in each unit time interval, the first key module and the first key signal corresponding to the system power consumption are determined; if the target power consumption type is peak-valley power consumption, based on the change of the system scheduling information in each unit time interval, the target working state corresponding to the target time interval is determined, based on the target working state corresponding to the target time interval and the target signal update information, the second key module and the second key signal corresponding to the peak-valley power consumption are determined, and the first key module, the first key signal, the second key module and the second key signal are combined and processed to generate the key information set corresponding to the target hardware circuit; further, based on the current analysis requirements, the target key information and the target time range corresponding to the target hardware circuit are determined in the key information set, and the corresponding target power consumption data is determined in the target waveform file based on the target key information and the target time range; finally, the target power consumption model is determined based on the data type of the target power consumption data, and the target power consumption data is analyzed based on the target power consumption model to obtain the target power consumption result corresponding to the target hardware circuit. Because the power consumption data to be analyzed is located in advance before the waveform data of the power consumption analysis is read, the problem of low efficiency of the power consumption analysis is solved and the efficiency of the power consumption analysis is improved.

[0094] Figure 7The flowchart of an optional power consumption analysis method based on software simulation provided by an embodiment of the present invention is shown. Specifically, first, the target simulation file corresponding to the target hardware circuit is software simulated based on the preset scheduling model to generate a complete target waveform file, and the scheduling process and the assignment update process in the simulation process are tracked and recorded to obtain a target statistical data set. Then, based on the changes in the system scheduling information in each unit time interval, the target working state corresponding to the target time interval is determined, the system working state analysis is completed, and based on the type characteristics of the target power consumption type and the target working state corresponding to the target time interval, the signal update information in each unit time interval is characterized and analyzed, and the key information set corresponding to the target hardware circuit is determined to implement module analysis. Afterwards, the target key information and target time range corresponding to the target hardware circuit are determined in the key information set according to the current analysis requirements, for example, the key modules, key signals and corresponding time ranges under dynamic power consumption, and the key modules, key signals and corresponding time ranges under static power consumption. And based on the target key information and target time range, the corresponding target power consumption data is determined in the target waveform file, waveform data analysis is implemented, and dynamic power consumption data or static power consumption data corresponding to the current analysis requirements are obtained. Furthermore, a dynamic power consumption model is constructed to perform dynamic power consumption analysis on the dynamic power consumption data to generate dynamic power consumption results, a static power consumption model is constructed to perform static power consumption analysis on the static power consumption data to generate static power consumption results, and the dynamic power consumption results are optimized using a dynamic power consumption optimization strategy, and the static power consumption results are optimized using a static power consumption optimization strategy. Finally, the optimized target simulation file is re-simulated to determine whether the simulation results meet the design expectations. If so, the power consumption optimization is completed. If not, the above operations are continued until the simulation results meet the design expectations.

[0095] It is worth noting that each hardware circuit has corresponding design expectations during the design phase, for example, low-power devices and frequencies cannot be too high. Therefore, when judging the simulation results, the design expectations can be directly used for judgment operations, and the embodiments of the present invention will not be further elaborated on this.

[0096] Figure 8The diagram shows a key information set determination process provided by an embodiment of the present invention. Specifically, after determining the system scheduling information and signal update information corresponding to the target hardware circuit, if the target power consumption type is system power consumption, the first key module and the first key signal corresponding to the system power consumption can be determined based on the target level information corresponding to the target hardware circuit and the signal update information within each unit time interval; if the target power consumption type is peak-valley power consumption, the target working state corresponding to the target time interval can be determined to be an active state or an inactive state based on the change of the system scheduling information within each unit time interval, and the second key module and the second key signal corresponding to the peak-valley power consumption can be determined based on the target working state and the target signal update information corresponding to the target time interval, and the first key module, the first key signal, the second key module and the second key signal are combined and processed to generate a key information set. Finally, the target key information and the target time range corresponding to the target hardware circuit are determined in the key information set according to the current analysis requirements, providing an effective basis for subsequent power consumption analysis.

[0097] Fig. 9 The figure shows a schematic diagram of a power consumption analysis system based on software simulation provided by an embodiment of the present invention. Specifically, the power consumption analysis system based on software simulation includes a local end and a cloud end. Among them, the local end is used to modify the source code and optimize the power consumption in the target simulation file, and the cloud end is used to perform software simulation of the target simulation file and the power consumption analysis method flow based on software simulation described in any embodiment of the present invention, exemplarily including power consumption prediction and power consumption analysis. Therefore, through the power consumption analysis system based on software simulation, the requirements for waveform retrieval can be effectively reduced, which reduces the computing pressure and transmission pressure on the cloud end.

[0098] Embodiment 3

[0099] Fig.10 The schematic diagram of the structure of a power consumption analysis device based on software simulation provided by the third embodiment of the present invention. Fig.10 As shown, the device includes: an information acquisition module 310, an information analysis module 320, a data parsing module 330 and a power consumption analysis module 340;

[0100] The information acquisition module 310 is used to acquire a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval;

[0101] The information analysis module 320 is used to analyze and process the system scheduling information and signal update information in each unit time interval based on the type characteristics of the target power consumption type, and determine the key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals;

[0102] A data analysis module 330, configured to determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range;

[0103] The power consumption analysis module 340 is used to determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0104] The technical solution of the embodiment of the present invention determines the target waveform file and target statistical data set corresponding to the target hardware circuit through the target simulation file and the preset scheduling model corresponding to the target hardware circuit; then, based on the type characteristics of the target power consumption type, the system scheduling information and signal update information in each unit time interval in the target statistical data set are analyzed and processed to determine the key information set corresponding to the target hardware circuit; further, based on the current analysis requirements, the target key information and target time range corresponding to the target hardware circuit are determined in the key information set, and the corresponding target power consumption data is determined in the target waveform file based on the target key information and target time range; finally, the target power consumption model is determined based on the data type of the target power consumption data, and the target power consumption data is analyzed based on the target power consumption model to obtain the target power consumption result corresponding to the target hardware circuit. Since the power consumption data to be analyzed is located in advance before the waveform data of the power consumption analysis is read, the problem of low efficiency of the power consumption analysis is solved, and the efficiency of the power consumption analysis is improved.

[0105] Optionally, the information analysis module 320 may specifically include: a first information analysis unit, a working status determination unit, a second information analysis unit, and an information set generation unit;

[0106] The first information analysis unit is used to determine the first key module and the first key signal corresponding to the system power consumption based on the target level information corresponding to the target hardware circuit and the signal update information in each unit time interval if the target power consumption type is system power consumption;

[0107] A working state determining unit, for determining a target working state corresponding to a target time interval based on changes in system scheduling information within each unit time interval if the target power consumption type is peak-valley power consumption;

[0108] A second information analysis unit, configured to determine a second key module and a second key signal corresponding to the peak and valley power consumption based on the target working state and target signal update information corresponding to the target time interval;

[0109] The information set generating unit is used for combining and processing the first key module, the first key signal, the second key module and the second key signal to generate a key information set corresponding to the target hardware circuit.

[0110] Optionally, the first information analysis unit may be specifically used for:

[0111] Based on the target level information corresponding to the target hardware circuit, determining each standard submodule corresponding to the target hardware circuit and each standard signal included in each standard submodule;

[0112] Based on the signal update information within each unit time interval, determine the number of assignment updates corresponding to each standard signal;

[0113] Determine the target submodule corresponding to the system power consumption and the target signal included in the target submodule based on the difference relationship between the number of times of assignment updates corresponding to the respective standard signals;

[0114] The target submodule is used as the first key module, and the target signal is used as the first key signal.

[0115] Optionally, the working status determination unit may be specifically used for:

[0116] Based on the system scheduling information in each unit time interval, determine the average scheduling information corresponding to the full amount of system scheduling information;

[0117] Based on the average scheduling information and a preset scheduling threshold, a target working state corresponding to the target time interval is determined; wherein the target working state includes an active state or an inactive state.

[0118] Optionally, the second information analysis unit may be specifically used for:

[0119] Based on the state type of the target working state, determining a preset screening rule corresponding to the target working state;

[0120] Based on the preset screening rule and the target signal update information corresponding to the target time interval, a second key module and a second key signal corresponding to the peak and valley power consumption are determined.

[0121] Optionally, the preset scheduling model may include: a preset clock cycle model, a preset event-driven model or a preset hybrid scheduling model.

[0122] Optionally, the power consumption analysis device based on software simulation may further include: an optimization processing module, which is used to determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model, and after obtaining the target power consumption result corresponding to the target hardware circuit, determine a target power consumption optimization strategy based on the data type of the target power consumption data, and optimize the target simulation file based on the target power consumption optimization strategy.

[0123] The power consumption analysis device based on software simulation provided in the embodiment of the present invention can execute the power consumption analysis method based on software simulation provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0124] Embodiment 4

[0125] Fig.11 A schematic diagram of an electronic device 410 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0126] like Fig.11 As shown, the electronic device 410 includes at least one processor 420, and a memory connected to the at least one processor 420 in communication, such as a read-only memory (ROM) 430, a random access memory (RAM) 440, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 420 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 430 or the computer program loaded from the storage unit 490 to the random access memory (RAM) 440. In the RAM 440, various programs and data required for the operation of the electronic device 410 can also be stored. The processor 420, the ROM 430, and the RAM 440 are connected to each other via a bus 450. An input / output (I / O) interface 460 is also connected to the bus 450.

[0127] Multiple components in the electronic device 410 are connected to the I / O interface 460, including: an input unit 470, such as a keyboard, a mouse, etc.; an output unit 480, such as various types of displays, speakers, etc.; a storage unit 490, such as a disk, an optical disk, etc.; and a communication unit 4100, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 4100 allows the electronic device 410 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0128] The processor 420 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 420 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The processor 420 performs the various methods and processes described above, such as the power consumption analysis method based on software simulation.

[0129] The method includes:

[0130] Obtain a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval;

[0131] Analyzing and processing system scheduling information and signal update information in each unit time interval based on the type characteristics of the target power consumption type, and determining a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals;

[0132] Determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range;

[0133] A target power consumption model is determined based on the data type of the target power consumption data, and power consumption analysis is performed on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

[0134] In some embodiments, the power consumption analysis method based on software simulation may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 490. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 410 via the ROM 430 and / or the communication unit 4100. When the computer program is loaded into the RAM 440 and executed by the processor 420, one or more steps of the power consumption analysis method based on software simulation described above may be performed. Alternatively, in other embodiments, the processor 420 may be configured to perform the power consumption analysis method based on software simulation in any other appropriate manner (e.g., by means of firmware).

[0135] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0136] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0137] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0138] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0139] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0140] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0141] The embodiment of the present application also discloses a computer program product, which includes a computer program, and when the computer program is executed by a processor, the power consumption analysis method based on software simulation provided by any embodiment of the present application is implemented. The program product and the power consumption analysis method based on software simulation disclosed in each embodiment of the present application belong to the same inventive concept, so it will not be described here.

[0142] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0143] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A power consumption analysis method based on software simulation, characterized in that: include: Obtain a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval; Analyzing and processing system scheduling information and signal update information in each unit time interval based on the type characteristics of the target power consumption type, and determining a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals; Determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range; A target power consumption model is determined based on the data type of the target power consumption data, and power consumption analysis is performed on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

2. The method according to claim 1, characterized in that The type characteristic analysis and processing of the system scheduling information and the signal update information in each unit time interval based on the target power consumption type to determine the key information set corresponding to the target hardware circuit includes: If the target power consumption type is system power consumption, determining a first key module and a first key signal corresponding to the system power consumption based on target level information corresponding to the target hardware circuit and signal update information within each unit time interval; If the target power consumption type is peak-valley power consumption, the target working state corresponding to the target time interval is determined based on the change of the system scheduling information within each unit time interval; Determine a second key module and a second key signal corresponding to the peak and valley power consumption based on the target working state and target signal update information corresponding to the target time interval; The first key module, the first key signal, the second key module and the second key signal are processed in combination to generate a key information set corresponding to the target hardware circuit.

3. The method according to claim 2, characterized in that The determining of the first key module and the first key signal corresponding to the system power consumption based on the target level information corresponding to the target hardware circuit and the signal update information in each unit time interval includes: Based on the target level information corresponding to the target hardware circuit, determining each standard submodule corresponding to the target hardware circuit and each standard signal included in each standard submodule; Based on the signal update information within each unit time interval, determine the number of assignment updates corresponding to each standard signal; Determine the target submodule corresponding to the system power consumption and the target signal included in the target submodule based on the difference relationship between the number of times of assignment updates corresponding to the respective standard signals; The target submodule is used as the first key module, and the target signal is used as the first key signal.

4. The method according to claim 2, characterized in that: The determining of the target working state corresponding to the target time interval based on the change of the system scheduling information within each unit time interval includes: Based on the system scheduling information in each unit time interval, determine the average scheduling information corresponding to the full amount of system scheduling information; Based on the average scheduling information and a preset scheduling threshold, a target working state corresponding to the target time interval is determined; wherein the target working state includes an active state or an inactive state.

5. The method according to claim 2, characterized in that: The determining of the second key module and the second key signal corresponding to the peak-valley power consumption based on the target working state and the target signal update information corresponding to the target time interval includes: Based on the state type of the target working state, determining a preset screening rule corresponding to the target working state; Based on the preset screening rule and the target signal update information corresponding to the target time interval, a second key module and a second key signal corresponding to the peak and valley power consumption are determined.

6. The method according to claim 1, characterized in that The preset scheduling model includes: a preset clock cycle model, a preset event-driven model or a preset hybrid scheduling model.

7. The method according to claim 1, characterized in that After determining a target power consumption model based on the data type of the target power consumption data, and performing power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit, the method further includes: A target power consumption optimization strategy is determined based on the data type of the target power consumption data, and the target simulation file is optimized based on the target power consumption optimization strategy.

8. A power consumption analysis device based on software simulation, characterized in that: include: An information acquisition module, used to acquire a target simulation file corresponding to a target hardware circuit, and determine a target waveform file and a target statistical data set corresponding to the target hardware circuit based on the target simulation file and a preset scheduling model; wherein the target statistical data set includes system scheduling information and signal update information within each unit time interval; An information analysis module, used to analyze and process system scheduling information and signal update information within each unit time interval based on the type characteristics of the target power consumption type, and determine a key information set corresponding to the target hardware circuit; wherein the key information includes key modules and key signals; A data analysis module, used to determine target key information and a target time range corresponding to a target hardware circuit in the key information set based on current analysis requirements, and determine corresponding target power consumption data in a target waveform file based on the target key information and the target time range; The power consumption analysis module is used to determine a target power consumption model based on the data type of the target power consumption data, and perform power consumption analysis on the target power consumption data based on the target power consumption model to obtain a target power consumption result corresponding to a target hardware circuit.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the power consumption analysis method based on software simulation according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the power consumption analysis method based on software simulation according to any one of claims 1 to 7 when executed.

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