Package structure

Abstract

The present invention provides a packaging structure, including: a housing, including a substrate; a conductive part, arranged on the substrate; a first chip, arranged on the conductive part; a first power terminal, a first end of the first power terminal having a chip connection part and a heat dissipation part connected to each other, the chip connection part is connected to the first chip, and the heat dissipation part cooperates with the substrate for heat dissipation; a second power terminal, a first end of the second power terminal is connected to the conductive part. The technical solution of the present application effectively solves the problem that the packaging structure in the related art limits the chip from exerting a higher junction temperature.

Description

Technical Field

[0001] The present invention relates to the technical field of packaging structures, and in particular to a packaging structure. Background Art

[0002] The packaging structure includes a copper-clad substrate, a chip arranged on the copper-clad substrate, and a current input terminal and a current output terminal connected to the chip. The packaging structure is packaged using a plastic tube shell, and the chip is sealed using epoxy resin, silicone gel or vacuum protection.

[0003] In the prior art, a large amount of heat is generated when the chip is switched and conducted. If the heat cannot be dissipated in time, there is a risk of burning the chip. Therefore, the instant heat dissipation capacity of the packaging structure and the temperature resistance of the packaging material limit the maximum operating junction temperature of the chip. Summary of the invention

[0004] The main purpose of the present invention is to provide a packaging structure to solve the problem of poor heat dissipation capacity of the packaging structure in the related technology, thereby solving the problem that the packaging technology limits the chip to achieve a higher junction temperature, and at the same time improve the reliable operation capability of the packaging structure in a higher temperature environment.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, a packaging structure is provided, including: a housing, including a substrate; a conductive part, arranged on the substrate; a first chip, arranged on the conductive part; a first power terminal, the first end of the first power terminal having a chip connecting part and a heat dissipation part connected to each other, the chip connecting part is connected to the first chip, and the heat dissipation part cooperates with the substrate for heat dissipation; a second power terminal, the first end of the second power terminal is connected to the conductive part.

[0006] Furthermore, the packaging structure also includes a heat conducting part arranged on the substrate, the heat conducting part and the conductive part are insulated and arranged, the heat conducting part and the conductive part are spaced apart, and the heat dissipation part is connected to the heat conducting part.

[0007] Furthermore, the chip connecting portion includes a first metal block, the heat dissipating portion includes a second metal block, and the first end of the first power terminal further includes a first connecting bridge arranged between the first metal block and the second metal block.

[0008] Furthermore, the packaging structure also includes a second chip, which is arranged in parallel with the first chip, and the second chip is arranged on the conductive part. The first metal block includes a first block connected to the first chip, a second block connected to the second chip, and a second connecting bridge connected between the first block and the second block.

[0009] Furthermore, the chip connecting portion and the heat dissipating portion are spaced apart in a first direction, the first block and the second block are spaced apart in a second direction, and the first direction is perpendicular to the second direction.

[0010] Furthermore, the heat dissipation portion is located on a side of the chip connecting portion away from the second power terminal.

[0011] Furthermore, a surface of the chip connection portion away from the substrate, a surface of the heat dissipation portion away from the substrate, and a surface of the first connection bridge away from the substrate form a planar portion, and the chip connection portion is connected to the first chip by sintering.

[0012] Furthermore, the surface of the first connecting bridge facing the substrate is an arc-shaped surface.

[0013] Furthermore, the housing includes an enclosure and a cover plate, the enclosure is arranged around the periphery of the substrate, the cover plate is arranged on an end of the enclosure away from the substrate, and the first power terminal and the second power terminal both pass through the enclosure.

[0014] Furthermore, the materials of the substrate, the enclosure and the cover are all ceramic.

[0015] Furthermore, the chip connecting portion, the first connecting bridge and the heat dissipating portion are an integrally formed structure.

[0016] Furthermore, the conductive part includes a first metal layer, and the thermal conductive part includes a second metal layer.

[0017] Furthermore, a coating is provided on the surface of the first chip.

[0018] Further, a step structure is provided between the first end of the first power terminal and the second end of the first power terminal.

[0019] Furthermore, the distance between the lowest point of the second connecting bridge and the conductive portion is greater than or equal to 0.2 mm.

[0020] The technical solution of the present invention is applied, and the packaging structure includes a housing, a conductive part, a first chip, a first power terminal and a second power terminal. Among them, the housing includes a substrate, the conductive part is arranged on the substrate, and the first chip is arranged on the conductive part. The substrate can support the conductive part and play an insulating function, and the conductive part can support the first chip and realize conductive connection. The first end of the first power terminal has a chip connection part connected to the first chip. The first end of the second power terminal is connected to the conductive part. The chip connection part of the first power terminal is connected to the first chip, the first chip is connected to the conductive part, and the second power terminal is connected to the conductive part, so that when the packaging structure is running, the current can flow between the first power terminal, the first chip and the conductive part. In this solution, the first end of the first power terminal is also provided with a heat dissipation part that cooperates with the substrate for heat dissipation, and the chip connection part and the heat dissipation part are connected to each other. By providing the heat dissipation part and making the heat dissipation part cooperate with the substrate for heat dissipation, the heat generated by the first chip during operation can be dissipated through the two opposite surfaces of the first chip. Specifically, the first surface of the first chip dissipates heat to the substrate through the conductive part, and the second surface of the first chip also dissipates heat to the substrate through the chip connection part and the heat dissipation part. Among them, the second surface of the first chip can transfer heat to the heat dissipation part through the chip connection part, and then cooperate with the heat dissipation of the substrate through the heat dissipation part, so that the heat can be transferred to the substrate and then to the outside of the packaging structure. Therefore, in the technical solution of the present application, double-sided heat dissipation of the first chip is achieved, which effectively improves the heat dissipation efficiency of the first chip and avoids heat accumulation. Therefore, the technical solution of the present application effectively solves the problem of poor heat dissipation capacity of the packaging structure in the related art, and can increase the maximum operating junction temperature of the silicon carbide chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The drawings constituting a part of the present application are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0022] Figure 1 A schematic diagram of a three-dimensional structure of an embodiment of a packaging structure according to the present invention is shown;

[0023] Figure 2 Shows Figure 1 A cross-sectional schematic diagram of a packaging structure;

[0024] Figure 3 Shows Figure 2 A schematic cross-sectional view of the packaging structure;

[0025] Figure 4 Shows Figure 1 A schematic diagram of the decomposition structure of the package structure;

[0026] Figure 5 Shows Figure 1 A schematic diagram of a three-dimensional structure when a substrate, a conductive portion, a first power terminal and a second power terminal of a packaging structure are connected;

[0027] Figure 6 Shows Figure 5 A schematic diagram of a three-dimensional structure of the packaging structure from another perspective;

[0028] Figure 7 Shows Figure 5 A schematic diagram of a three-dimensional structure of a first power terminal of a packaging structure;

[0029] Figure 8 Shows Figure 7 A bottom view schematically showing a first power terminal of ;

[0030] Fig. 9 Shows Figure 8 A schematic cross-sectional view of the first power terminal at AA;

[0031] Fig.10 Shows Figure 8 A schematic cross-sectional view of a first power terminal at position BB;

[0032] Fig.11 Shows Figure 5 A schematic top view of a packaging structure in which a substrate, a conductive portion, a heat dissipation portion, a first chip, and a second chip are connected.

[0033] The above drawings include the following reference numerals:

[0034] 10. Housing; 11. Base plate; 12. Enclosure; 13. Cover; 20. Conductive portion; 30. First chip; 40. First power terminal; 41. Chip connecting portion; 411. First metal block; 4111. First block; 4112. Second block; 4113. Second connecting bridge; 42. Heat dissipation portion; 421. Second metal block; 43. First connecting bridge; 431. Arc surface; 50. Second power terminal; 60. Control terminal; 70. Heat conducting portion; 80. Second chip. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0037] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the present invention. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0038] At present, silicon carbide modules and single-tube packages all use plastic tube shells, and the chip is sealed with epoxy resin, silicone gel or vacuum protection. Due to the limitations of packaging materials, the current maximum junction temperature of mass-produced packaging structures can only reach 200 degrees, and cannot work for a long time. It is difficult to further increase the maximum junction temperature of the device based on traditional packaging material systems. In addition, for the higher junction temperature of silicon carbide chips, the chip interconnection structure needs to have a higher instantaneous heat dissipation capability. The current double-sided heat dissipation structure is difficult to weld on the pin-fin water cooling plate, and can only be attached to the water cooling plate through thermal conductive silicone grease. It belongs to double-sided indirect water cooling. The introduction of silicone grease increases the junction-water thermal resistance of the device and reduces the efficiency of double-sided heat dissipation.

[0039] In view of the above problems existing in the current high-temperature packaging of devices, the high-temperature packaging device structure should be redesigned, a high-temperature packaging material system should be constructed, and a more efficient and reliable double-sided heat dissipation interconnection structure should be proposed to significantly increase the maximum junction temperature of the packaging structure.

[0040] like Figure 1 , Figure 2 as well as Figure 4As shown, the package structure of this embodiment includes: a housing 10, a conductive part 20, a first chip 30, a first power terminal 40, a second power terminal 50 and a control terminal 60. The housing 10 includes a substrate 11. The conductive part 20 is arranged on the substrate 11. The first chip 30 is arranged on the conductive part 20. The first end of the first power terminal 40 has a chip connection part 41 and a heat dissipation part 42 connected to each other, the chip connection part 41 is connected to the first chip 30, and the heat dissipation part 42 cooperates with the substrate 11 for heat dissipation. The first end of the second power terminal 50 is connected to the conductive part 20.

[0041] Applying the technical solution of this embodiment, the packaging structure includes a housing 10, a conductive part 20, a first chip 30, a first power terminal 40 and a second power terminal 50. Among them, the housing 10 includes a substrate 11, the conductive part 20 is arranged on the substrate 11, and the first chip 30 is arranged on the conductive part. The substrate 11 can support the conductive part 20 and play an insulating function. The conductive part 20 can support the first chip 30 and realize conductive connection. The chip connection part 41 of the first power terminal 40 is connected to the first chip 30, the first chip 30 is connected to the conductive part 20, and the second power terminal 50 is connected to the conductive part 20, so that when the packaging structure is running, the current can flow between the first power terminal 40, the first chip 30, the conductive part 20 and the second power terminal 50. In this solution, the first end of the first power terminal 40 is also provided with a heat dissipation part 42 that cooperates with the substrate 11 for heat dissipation, the chip connection part 41 and the heat dissipation part 42 are connected to each other, and the heat dissipation part 42 is insulated from the conductive part 20. By providing a heat dissipation portion 42 and coordinating the heat dissipation of the heat dissipation portion 42 with the substrate 11, the heat generated during the operation of the first chip 30 can be dissipated through the two opposite surfaces of the first chip 30. Specifically, the first surface of the first chip 30 dissipates heat to the substrate 11 through the conductive portion 20, and the second surface of the first chip 30 also dissipates heat to the substrate 11 through the chip connection portion 41 and the heat dissipation portion 42. Among them, the second surface of the first chip 30 can transfer heat to the heat dissipation portion 42 through the chip connection portion 41, and then cooperate with the substrate 11 for heat dissipation through the heat dissipation portion 42, so that the heat can be transferred to the substrate 11 and then to the outside of the packaging structure. Therefore, in the technical solution of the present application, double-sided heat dissipation of the first chip 30 is achieved, which effectively improves the heat dissipation efficiency of the first chip 30 and avoids heat accumulation. Therefore, the technical solution of the present application effectively solves the problem of poor heat dissipation capacity of the packaging structure in the related art, and improves the maximum operating junction temperature of the silicon carbide chip.

[0042] The second end of the first power terminal 40 passes through the outside of the housing 10, and the second end of the second power terminal 50 passes through the outside of the housing 10. The second end of the first power terminal 40 and the second end of the second power terminal 50 both pass through the outside of the housing 10, which facilitates the connection of the packaging structure.

[0043] The package structure further includes a control terminal 60, a first end of which is connected to the first chip 30, and a second end of which is extended to the outside of the housing 10. The control terminal 60 can control the on and off of the first chip 30, that is, to make the first chip 30 run or stop running. The second end of the control terminal 60 extends to the outside of the housing 10, which facilitates the connection of the control terminal 60.

[0044] It should be noted that the above-mentioned heat dissipation coordination between the heat dissipation part 42 and the substrate 11 means that the heat dissipation part 42 can directly contact the substrate 11 without any other structure between the two, thereby achieving heat dissipation; or, a heat-conducting structure can be provided between the heat dissipation part 42 and the substrate 11, and the heat dissipation part 42 transfers heat to the substrate 11 through the heat-conducting structure.

[0045] The packaging structure of this embodiment is a silicon carbide device.

[0046] like Figure 4 , Figure 5 , Figure 6 as well as Fig.11 As shown, in this embodiment, the packaging structure also includes a heat conducting portion 70 disposed on the substrate 11, the heat conducting portion 70 is insulated from the conductive portion 20, the heat conducting portion 70 is spaced apart from the conductive portion 20, and the heat dissipation portion 42 is connected to the heat conducting portion 70. The heat conducting portion 70 can conduct the heat on the heat dissipation portion 42 to the substrate 11, and then the heat can be transferred to the outside of the packaging structure through the substrate 11, so that the packaging structure has a better heat dissipation capability. The heat conducting portion 70 is insulated from the conductive portion 20 and spaced apart, so that conduction between the heat conducting portion 70 and the conductive portion 20 can be avoided.

[0047] It should be noted that the conductive part 20 includes a first metal layer, which may be preferably copper. The heat conducting part 70 includes a second metal layer, which may be preferably copper. The substrate 11 may be made of ceramic, and the conductive part 20 and the heat conducting part 70 may be made by coating the substrate 11 with copper.

[0048] The copper-clad ceramic structure described above can be made in the following ways:

[0049] DBC (Direct Bonded Copper): A composite substrate is made by sintering copper foil directly to the surface of Al2O3 and AlN ceramics at high temperature through hot melt bonding. Due to the high eutectic bonding strength between copper foil and ceramics, the copper thickness of DBC substrates can generally be 100μm-600μm. At the same time, ceramics and copper have good thermal conductivity, and DBC substrates also have good thermal stability.

[0050] DPC (Direct Plating Copper): It is a ceramic circuit processing technology developed on the basis of ceramic thin film processing. Ceramic is used as the circuit substrate, a metal layer is composited on the surface of the substrate by sputtering, and the circuit is formed by electroplating and photolithography.

[0051] AMB (Active Metal Brazing): AMB is developed based on DBC technology. At high temperature, AgCu solder containing active elements Ti and Zr wets and reacts at the interface between ceramic and metal, thereby achieving heterogeneous bonding between ceramic and metal.

[0052] In other embodiments, the heat conducting part may not be provided, and the heat dissipating part may be in direct contact with the substrate to achieve heat dissipation. Of course, the material of the heat dissipating part may also be a non-metallic material with excellent thermal conductivity.

[0053] like Figure 4 As shown, in this embodiment, the substrate 11 is a rectangular structure, and the first metal layer and the second metal layer are both rectangular structures. The area of ​​the second metal layer is smaller than the area of ​​the first metal layer. Of course, in other embodiments not shown in the figures, the substrate may not be arranged in a rectangular structure, but may be a quadrilateral, a pentagon, a hexagon or a circle. At the same time, the first metal layer and the second metal layer are not limited to a rectangular structure, and may be a quadrilateral, a pentagon, a hexagon or a circle.

[0054] In this embodiment, the substrate 11 adopts a rectangular structure, which has wide applicability in practical applications. The rectangular substrate is not only simple to manufacture, but also can provide good mechanical strength and stability in most cases. The rectangular substrate is also common in circuit board design, and is easy to integrate and connect with other components.

[0055] The first metal layer and the second metal layer are also designed as rectangular structures. The rectangular metal layer is also convenient in process manufacturing. In addition, the design of the rectangular metal layer can better match the rectangular substrate, making the overall structure more compact and reasonable. The area of ​​the second metal layer is smaller than that of the first metal layer. This design can optimize the electrical performance between the metal layers while reducing the amount of material used, thereby reducing costs.

[0056] However, the present invention is not limited to the rectangular structure design in the above embodiment. According to the needs of practical applications, the substrate can adopt different geometric shapes. For example, the substrate 11 can be designed into a quadrilateral, pentagon, hexagon or even a circular structure. Quadrilateral substrates can provide greater design flexibility and make circuit design more diverse; pentagonal and hexagonal substrates can provide unique mechanical and electrical properties in specific application scenarios; circular substrates can be considered for application in certain specific scenarios.

[0057] Similarly, the first metal layer and the second metal layer are not limited to rectangular structures and can be designed into quadrilaterals, pentagons, hexagons or circles according to actual needs. The design of polygonal metal layers can provide more contact surfaces and increase the stability and reliability of electrical connections; circular metal layers can be considered for application in certain specific scenarios.

[0058] In practical applications, the specific shape design of the substrate and metal layer needs to be comprehensively considered based on many factors. The first is the feasibility of the manufacturing process. Substrates and metal layers of different shapes will face different technical challenges during the manufacturing process. The second is the requirements for electrical performance. Metal layers of different shapes will affect the electrical characteristics of the circuit. In addition, mechanical strength and stability need to be considered. Substrates of different shapes will exhibit different mechanical properties during use.

[0059] In practical applications, a variety of geometric shapes can be designed according to actual application requirements to achieve the purpose of optimizing electrical performance, mechanical performance and manufacturing cost.

[0060] like Figures 7 to 9 As shown, in this embodiment, the chip connection portion 41 includes a first metal block 411, the heat dissipation portion 42 includes a second metal block 421, and the first end of the first power terminal 40 also includes a first connection bridge 43 disposed between the first metal block 411 and the second metal block 421. The first metal block 411 can be connected to the first chip 30, and the first connection bridge 43 connects the first metal block 411 and the second metal block 421, so that current can flow between the first chip 30, the first metal block 411, the first connection bridge 43 and the second metal block 421. The second metal block 421 allows the heat generated during the operation of the first chip 30 to be conducted to the heat conducting portion 70. The second metal block 421 can also improve the efficiency of heat conduction.

[0061] The second power terminal 50 includes a conductive metal sheet. The first metal block 411 and the second metal block 421 are different from the metal sheet. The thickness of the first metal block 411 and the second metal block 421 is much greater than that of the conductive metal sheet, or even greater than twice the thickness of the conductive metal sheet.

[0062] like Figures 4 to 6 As shown, in this embodiment, the package structure further includes a second chip 80, which is arranged in parallel with the first chip 30, and the second chip 80 is arranged on the conductive part 20. The first metal block 411 includes a first block 4111 connected to the first chip 30, a second block 4112 connected to the second chip 80, and a second connecting bridge 4113 connected between the first block 4111 and the second block 4112. By arranging the second chip 80 in parallel with the first chip 30, a larger current can be passed through the package structure.

[0063] In this solution, the packaging structure can pass a current of about 300A.

[0064] It should be noted that both the first chip 30 and the second chip 80 are silicon carbide MOSFET chips.

[0065] In this embodiment, the first power terminal 40 can not only realize the flow of current, but also conduct the heat generated by the first chip 30 and the second chip 80 during operation to the substrate 11 through the heat dissipation portion 42, and then the heat is conducted to the outside of the packaging structure through the substrate 11. The heat dissipation portion 42 is insulated from the conductive portion 20, which means that the heat dissipation portion 42 and the conductive portion 20 are independent of each other and have a gap.

[0066] The package structure further includes a first metal plate and a first bonding wire, wherein the first metal plate is disposed on the substrate and is spaced apart from the conductive portion 20. The first end of the control terminal 60 is disposed on the first metal plate. The first bonding wire is connected between the first metal plate and the gate of the first chip 30. The package structure further includes a second bonding wire, wherein the second bonding wire is connected between the gate of the first chip 30 and the gate of the second chip 80.

[0067] The conductive portion 20 further includes an escape notch, which extends along the second direction. The first metal plate is disposed on the substrate 11 at a position corresponding to the escape notch.

[0068] The packaging structure also includes a Kelvin source terminal, a second metal plate, and a third bonding wire. The second metal plate is arranged on the substrate 11 and is spaced apart from the first metal plate and the heat conducting portion 70. The first end of the Kelvin source terminal is arranged on the second metal plate. The third bonding wire is connected between the second metal plate and the heat conducting portion 70. The connection between the third bonding wire and the heat conducting portion is located on the side of the first power terminal away from the second power terminal to avoid damage to the third bonding wire during the sintering process. By setting the Kelvin source terminal, the loss of the switch of the packaging structure can be reduced.

[0069] like Figure 2 , Figure 3 and Fig.11 As shown, in this embodiment, the chip connection part 41 and the heat dissipation part 42 are arranged at intervals in the first direction, the first block 4111 and the second block 4112 are arranged at intervals in the second direction, and the first direction is arranged perpendicular to the second direction. Through the above arrangement, the arrangement of the first chip 30 and the second chip 80 is facilitated, and the arrangement position of the conductive part 20 and the heat conduction part 70 is also made more reasonable, that is, it is convenient to connect the first block 4111 with the first chip 30, the second block 4112 with the second chip 80, and the heat conduction part 70 with the heat dissipation part 42. At the same time, the size of the heat conduction part 70 in the second direction can be designed to be as large as possible, so as to facilitate the improvement of the heat dissipation effect.

[0070] The first metal plate and the second metal plate are spaced apart in the first direction, and the second metal plate and the heat conducting portion 70 are spaced apart in the second direction.

[0071] The source of the first chip 30 is connected to the first block 4111 , and the drain of the first chip 30 is connected to the conductive part 20 . The source of the second chip 80 is connected to the second block 4112 , and the drain of the second chip 80 is connected to the conductive part 20 .

[0072] like Figure 2 As shown, in this embodiment, the heat dissipation portion 42 is located on the side of the chip connection portion 41 away from the second power terminal 50. The heat dissipation portion 42 is connected to the heat conducting portion 70, and the chip connection portion 41 is arranged above the conductive portion 20. Therefore, the heat dissipation portion 42 is arranged on the side of the chip connection portion 41 away from the second power terminal 50, so that the overall structure of the first power terminal 40 is arranged more reasonably. When the heat dissipation portion 42 is arranged at other positions, it is necessary to arrange an avoidance area on the conductive portion 20 to avoid the heat dissipation portion 42 to achieve insulation, and the structure of the heat dissipation portion 42 and the chip connection portion 41 is more complicated. This embodiment comprehensively considers ensuring the insulation arrangement of the heat dissipation portion 42 and the conductive portion 20, simplifying the structure of the heat dissipation portion 42 and the chip connection portion 41, and increasing the conductive area and the heat dissipation area. Through the above-mentioned arrangement, this embodiment increases the area of ​​the conductive portion 20 and the area of ​​the heat dissipation portion 42 as much as possible, avoids the structural interference between the conductive portion 20 and the heat dissipation portion 42, and the structure of the heat dissipation portion 42 and the chip connection portion 41 is more simplified.

[0073] like Figure 2 and Figure 4 As shown, in this embodiment, the surface of the chip connection part 41 away from the substrate 11, the surface of the heat dissipation part 42 away from the substrate 11, and the surface of the first connection bridge 43 away from the substrate 11 form a plane part, and the chip connection part 41 is connected to the first chip 30 by sintering. The provision of the plane part facilitates the contact between the mold and the plane part when the chip connection part 41 and the first chip 30 are sintered, so that the chip connection part 41 can be more stably connected to the first chip 30.

[0074] There is a step structure between the first end of the first power terminal 40 and the second end of the first power terminal 40, which can increase the height of the second end of the first power terminal 40 without increasing the thickness of the second surface of the first chip 30 or the thickness of the surface of the second chip 80 away from the substrate 11.

[0075] It should be noted that the first power terminal 40 further includes a first connecting plate and a second connecting plate, wherein the first end of the first connecting plate is disposed on the heat dissipation portion 42. The second connecting plate is disposed at the second end of the first connecting plate. The plane portion, the first connecting plate and the second connecting plate constitute the above-mentioned step structure.

[0076] The second power terminal 50 includes a conductive metal sheet, a third connecting plate, and a fourth connecting plate. The conductive metal sheet is connected to the conductive portion 20. The first end of the third connecting plate is arranged on the conductive metal sheet. The fourth connecting plate is arranged on the second end of the third connecting plate. An open groove is arranged on the side of the conductive metal sheet facing the first power terminal 40, and the notch of the open groove is arranged on the surface of the conductive metal sheet facing the first power terminal 40, and the depth of the open groove in the direction from the substrate 11 to the conductive portion 20 is equal to the distance between the two surfaces of the conductive metal sheet in the direction from the substrate 11 to the conductive portion 20.

[0077] The second chip 80 and the first power terminal 40 are connected by a sintering process. The first power terminal 40 and the heat conducting part 70 are connected by a sintering process. The first chip 30 and the second chip 80 are both connected to the conductive part by a sintering process. The second power terminal 50 and the conductive part 20 are connected by a sintering process. The sintering process can be a nano silver sintering process.

[0078] The nano-silver sintering process is an innovative material connection technology, which is particularly suitable for the manufacture of electronic packaging and high-power devices. This process forms a connection layer with high conductivity and high thermal conductivity by sintering nano-scale silver particles at low temperature, which has significant technical advantages and wide application potential. The nano-silver sintering process has become an important technology in the manufacture of electronic packaging and high-power devices due to its low-temperature sintering, high conductivity, high thermal conductivity, mechanical strength and environmental protection characteristics. It not only improves the performance and reliability of electronic devices, but also provides a green and environmentally friendly solution. The benefits of using the nano-silver sintering process are as follows:

[0079] 1. Low-temperature sintering: A major advantage of the nanosilver sintering process is its low-temperature sintering characteristics. Conventional metal sintering processes usually require high temperatures (over 800°C) to achieve effective sintering, while nanosilver sintering can be completed between 200°C and 300°C. This low-temperature sintering characteristic makes the process particularly suitable for temperature-sensitive electronic components and materials, such as certain semiconductors and organic materials, thereby avoiding thermal damage and material degradation that may be caused by high temperatures.

[0080] 2. High conductivity: The connection layer formed by the nanosilver particles after sintering has excellent conductivity. As a metal, silver has the highest conductivity among all metals. The nanosilver sintering process can achieve close connection between silver particles at a lower temperature, thereby forming a low-resistance connection layer. This can significantly improve the performance and efficiency of electronic devices and circuit boards that require efficient electrical transmission.

[0081] 3. High thermal conductivity: In addition to high electrical conductivity, the nanosilver sintered layer also has high thermal conductivity. This means that it can effectively dissipate heat and avoid failure or performance degradation of electronic devices due to overheating. In high-power devices such as power semiconductors, LEDs, and high-frequency communication equipment, good thermal management is a key factor in ensuring their stability and long life.

[0082] 4. Mechanical strength and stability: The nanosilver sintering process can achieve close bonding of silver particles at a lower temperature, forming a connection layer with high mechanical strength and stability. Compared with traditional welding methods, the nanosilver sintered layer has higher reliability and durability, and can better resist fatigue and damage caused by mechanical stress and thermal cycles.

[0083] 5. Environmentally friendly features: The nanosilver sintering process does not contain lead and meets environmental protection requirements. Traditional soldering processes often use lead-containing solder, which, despite its superior performance, is harmful to the environment and health. Nanosilver sintering provides a green alternative that is in line with the environmental development trend in the future electronic packaging and manufacturing fields.

[0084] 6. Process flexibility: Nanosilver sintering materials are usually in the form of paste, which can be coated and printed by a variety of methods such as screen printing, spraying or dispensing. This flexibility enables the process to adapt to different manufacturing needs and design requirements, providing higher design freedom and manufacturing efficiency.

[0085] like Figure 7 As shown, in this embodiment, the surface of the first connection bridge 43 facing the substrate 11 is an arcuate surface 431. The above arrangement allows a gap between the first connection bridge 43 and the conductive part 20, and also allows a gap between the first connection bridge 43 and the heat-conducting part 70, so that the distance between the first connection bridge 43 and the conductive part 20 in the direction from the substrate 11 to the heat-conducting part 70 is large, thereby preventing the conductive part 20 from being directly connected to the heat dissipation part 42 through the first connection bridge 43. At the same time, compared with other cross-sectional forms, the surface of the first connection bridge 43 facing the substrate 11 is an arcuate surface 431, so that the first connection bridge 43 can avoid the generation of force concentration after heating, thereby improving the service life of the first power terminal 40.

[0086] It should be noted that the distance between the lowest point of the arc surface 431 and the conductive part 20 is greater than 0. The arc surface bulges away from the substrate. This makes the distance between the highest point of the arc surface 431 and the conductive part 20 larger, avoiding a short circuit between the conductive part 20 and the first connecting bridge 43.

[0087] like Fig.10As shown, in this embodiment, the distance between the lowest point of the second connection bridge 4113 and the conductive part 20 is greater than or equal to 0.2 mm. In this way, there is a gap between the surface of the second connection bridge 4113 facing the substrate 11 and the conductive part 20, avoiding direct conduction between the second connection bridge 4113 and the conductive part 20. The surface of the second connection bridge 4113 facing the substrate 11 is also an arc-shaped surface. The distance between the lowest point of the arc-shaped surface of the second connection bridge 4113 and the conductive part is greater than 0. The arc-shaped surface of the second connection bridge 4113 protrudes in the direction away from the substrate. In this way, the distance between the highest point of the arc-shaped surface of the second connection bridge 4113 and the conductive part is greater, avoiding direct conduction between the conductive part 20 and the second connection bridge 4113.

[0088] like Figure 4 As shown, in this embodiment, the housing 10 includes a panel 12 and a cover plate 13, the panel 12 is arranged around the periphery of the substrate 11, the cover plate 13 is covered at one end of the panel 12 away from the substrate 11, the first power terminal 40 and the second power terminal 50 both pass through the panel 12, and the control terminal 60 passes through the cover plate 13. By providing the panel 12 and the cover plate 13, the conductive part 20, the heat conductive part 70, the first end of the first power terminal 40, the first end of the second power terminal 50 and the first end of the control terminal 60 can be protected. The first power terminal 40 and the second power terminal 50 both pass through the panel, which facilitates the connection of the first power terminal 40 and the connection of the second power terminal 50. At the same time, the control terminal 60 passes through the position away from the first power terminal 40 and the second power terminal 50, which increases the creepage distance and avoids mutual influence between them.

[0089] A first avoidance groove and a second avoidance groove are provided on one side of the enclosure 12 away from the substrate 11. The first avoidance groove and the second avoidance groove extend from the cover plate 13 to the substrate 11. The first power terminal 40 passes through the first avoidance groove to pass out of the enclosure 12, and the second power terminal 50 passes through the second avoidance groove to pass out of the enclosure 12. The enclosure 12 and the substrate 11 are an integrally formed structure, or the enclosure 12 and the substrate 11 are connected by a sintering process.

[0090] A heat dissipation metal plate is also provided on one side of the substrate 11 away from the enclosure 12 , so as to improve the heat dissipation performance of the packaging structure.

[0091] The outer shell 10 also includes a plurality of protrusions, the enclosure 12 has a plurality of side walls, a corner is formed between any two adjacent side walls, a protrusion is provided at each corner, and the protrusion protrudes toward the interior of the outer shell 10, the cover plate 13 is connected to the plurality of protrusions, a screw is provided between each protrusion and the cover plate 13, and a plurality of mounting through holes are provided on the cover body, the top of the screw is located in the mounting through hole, and the top of the screw does not protrude from the side of the cover plate 13 away from the enclosure 12.

[0092] like Figure 4As shown, in this embodiment, the materials of the substrate 11, the enclosure 12 and the cover plate 13 are all ceramic. The chip connection portion 41, the first connection bridge 43 and the heat dissipation portion 42 are an integrally formed structure. The ceramic material can not only realize the insulation of the packaging structure, but also can export the heat conducted to the heat conducting portion 70, so that the heat dissipation capacity of the packaging structure is better. Ceramic materials have excellent high temperature resistance, which makes them perform well in high temperature environments. This feature is particularly important in the packaging structure, because the packaging structure will generate a lot of heat during operation, resulting in an increase in the junction temperature of the device. The high temperature tolerance of the ceramic material enables the packaging structure to operate normally at a higher junction temperature, thereby improving the working efficiency and reliability of the device. In addition, the ceramic material has a high thermal conductivity, which can effectively conduct heat from the inside of the device to the outside, further helping the packaging structure to maintain a stable operating temperature. Therefore, the ceramic material not only extends the service life of the packaging structure, but also improves its performance. The chip connection part 41, the first connection bridge 43 and the heat dissipation part 42 are an integrally formed structure, so that the first power terminal 40 can not only realize the flow of current, but also conduct the heat generated during the operation of the first chip 30 and the second chip 80 to the heat conduction part 70, which also facilitates the processing and manufacturing of the first power terminal 40.

[0093] There are many benefits to using an integrated molding structure. First, the integrated molding structure simplifies the manufacturing process and reduces assembly steps and connection points, thereby reducing production costs and potential manufacturing defects. Second, the integrated molding structure improves the mechanical strength and stability of the device and reduces failures due to vibration and mechanical stress. Third, this structure can significantly improve thermal management performance, allowing heat to be more evenly distributed and dissipated, thereby improving the reliability and operating efficiency of the device. Finally, the integrated molding structure helps to achieve a smaller and lighter design, helping to promote the miniaturization and efficiency of devices.

[0094] The material of the cover plate 13 is ceramic, and the specific ceramic material may be alumina, zirconium oxide, aluminum nitride or silicon carbide. Alumina has excellent mechanical strength and chemical corrosion resistance, and is suitable for applications with high durability requirements. Zirconia is known for its outstanding toughness and high temperature resistance, and performs well in high temperature and high stress environments. Aluminum nitride has high thermal conductivity and low expansion coefficient, can effectively dissipate heat, and is suitable for high-power electronic devices. Silicon carbide not only has high hardness and high wear resistance, but also can remain stable at extremely high temperatures, making it very popular in high-temperature electronic devices and high-frequency applications. The diversity and excellent properties of these ceramic materials provide a wide range of choices and significant performance improvements for the design and application of packaging structures.

[0095] The first chip 30 is provided with a coating. Preferably, it can be a PI coating, and the PI coating can include multiple layers. PI is polyimide. The second chip 80 is also coated with a coating, so that the first chip 30 and the second chip 80 can ensure insulation, long-term temperature resistance and moisture isolation.

[0096] It should be noted that the partial structure where the first power terminal is located inside the shell, the partial structure where the second power terminal is located inside the shell, the first metal plate, the second metal plate, the partial structure where the control terminal is located inside the shell, the partial structure where the Kelvin source terminal is located inside the shell, the first bonding wire, the second bonding wire and the third bonding wire are all coated with a coating, and the partial structure where the conductive part is exposed inside the shell, the partial structure where the heat dissipation part is exposed inside the shell, the partial structure where the substrate is exposed inside the enclosure, the partial structure where the first metal plate is exposed inside the shell, and the partial structure where the second metal plate is exposed inside the shell are also coated with a coating, that is, the structure where the packaging structure is located inside the shell and the partial structure exposed inside the shell are all coated with a coating, so that the packaging structure can ensure insulation, long-term temperature resistance and water vapor isolation.

[0097] Applying PI coating has many significant benefits, especially in improving the performance, reliability and durability of chips. The following are several major advantages of using PI coating:

[0098] 1. Excellent thermal stability: Polyimide materials have excellent thermal stability and can maintain their physical and chemical properties in high temperature environments. For chips working under high temperature conditions, PI coating can effectively protect the chip from thermal stress, thereby extending the service life of the chip. PI materials are generally able to withstand high temperatures, which makes it very valuable in high-temperature electronic devices and high-power applications.

[0099] 2. Electrical insulation performance: PI coating has good electrical insulation performance, which can prevent electrical short circuits and leakage inside the chip. Its high insulation ensures the safe operation of the chip in high voltage and high frequency environments, reducing the risk of electrical failure. This is especially important for electronic devices that require high reliability.

[0100] 3. Mechanical strength and flexibility: Polyimide materials have both high mechanical strength and flexibility, and can resist external mechanical stress and impact. The PI coating applied on the chip surface can provide additional protection to prevent the chip from being mechanically damaged during manufacturing, transportation and use. At the same time, the flexibility of the PI coating enables it to adapt to slight deformation and stress changes on the chip surface, maintaining the integrity and effectiveness of the coating.

[0101] 4. Chemical corrosion resistance: PI material has excellent chemical corrosion resistance and can resist erosion by various chemical reagents, solvents and corrosive gases. Coating with PI coating can effectively protect the chip from chemical corrosion, especially in some harsh working environments, such as industrial control, chemical production and environmental monitoring equipment.

[0102] 5. Low dielectric constant: Polyimide has a low dielectric constant, which is an important advantage for high-speed and high-frequency circuits. Low dielectric constant helps reduce loss and delay in signal transmission, improve signal transmission speed and integrity, and thus improve chip performance and efficiency.

[0103] 6. Process compatibility: PI coating can be applied by a variety of process methods, such as spin coating, spray coating and dip coating, and the process is relatively simple and suitable for large-scale production. This process compatibility enables PI coating to be widely used in the manufacture of different types of chips and electronic devices, providing a flexible solution.

[0104] The packaging structure of this embodiment adopts a unique porous copper bridge structure interconnection to perform nanosilver sintering interconnection on the upper surface of the first chip 30 and the second chip 80, so as to achieve the double-sided heat dissipation effect of the first chip 30 and the second chip 80, ensure the instantaneous high-power heat dissipation capability of the first chip 30 and the second chip 80, and meet the heat dissipation requirements of instantaneous high heat generation of 250°C and above. The first power terminal 40 also reduces the heat generation of the first chip 30 and the second chip 80 under the flow of large current, and dissipates the heat through the substrate 11 in time through the heat conducting part 70. In addition, the cross-sectional area of ​​the porous copper bridge structure interconnection has a larger cross-sectional area than the traditional aluminum wire bonding and copper clip welding, which greatly reduces the overall parasitic inductance of the packaging structure. The chip connection part 41, the heat dissipation part 42 and the first connection bridge 43 form a porous copper bridge structure interconnection.

[0105] Compared with the current packaging structure packaging technology, the packaging structure of this embodiment can increase the maximum junction temperature of the silicon carbide MOSFET chip to 250°C and above without causing the silicon carbide MOSFET chip to thermal runaway and burn, and the packaging material can withstand temperatures above 250°C for a long time and the insulation performance and other properties will not degrade. The current maximum junction temperature packaging structure has a junction temperature of 225°C, and it cannot work at this temperature for a long time. The common packaging structure has a maximum junction temperature of 175°C.

[0106] The overall structural design of the packaging structure of this embodiment ensures reliable electrical interconnection of the silicon carbide MOSFET chip, and can apply more advanced interconnection structure and interconnection process to ensure high temperature resistance and high interconnection reliability. The more advanced interconnection structure refers to the porous copper bridge structure interconnection.

[0107] On the one hand, the structural design of the porous copper bridge structure interconnection provides double-sided heat dissipation requirements for the silicon carbide MOSFET chip. On the other hand, the porous copper bridge structure interconnection and the main power electrode are an integral structure. The unique design enables the silicon carbide MOSFET chip to have lower resistance and inductance from the first power terminal 40, so that the packaging structure can withstand a larger current. In addition, a heat conducting portion 70 is provided between the heat dissipation portion 42 and the substrate 11, which ensures that the heat transferred by the silicon carbide MOSFET chip and the heat generated by the porous copper bridge structure interconnection itself can be dissipated in time through the substrate 11. This is also an important structural design for maintaining the double-sided heat dissipation temperature difference of the silicon carbide MOSFET chip. The main power electrode refers to the first power terminal.

[0108] like Fig.11 As shown, the distance between the conductive portion 20 and the heat conductive portion 70 is a, the area of ​​the conductive portion 20 is S1, and the area of ​​the heat conductive portion 70 is S2.

[0109] like Figure 2 As shown, the distance between the heat dissipation portion 42 and the conductive portion 20 is c, and the distance between the side of the fourth connecting plate facing the substrate and the bottom of the second avoidance groove is p.

[0110] like Fig. 9 As shown, the distance between the two side walls of the heat dissipation part 42 in the first direction is d, the distance between the two side walls of the chip connection part 41 in the first direction is e, the distance between the two side walls of the chip connection part 41 in the direction from the substrate 11 to the heat conduction part 70 is f, and the thickness of the plane part is also f. The thickness of the second connecting plate is i, and the value of f is greater than the value of i.

[0111] like Figure 3 As shown, the distance between the lowest point of the arc surface 431 and the conductive portion 20 is g, and the distance between the highest point of the arc surface 431 and the conductive portion 20 is h.

[0112] like Fig.10 As shown, the distance between the lowest point of the arc-shaped surface of the second connecting bridge 4113 and the conductive part 20 is l, and the distance between the highest point of the arc-shaped surface of the second connecting bridge 4113 and the conductive part 20 is b.

[0113] The ratio of the value of S1 to the value of S2 ranges from 1 to 3, which can take into account both the requirements of current conduction and heat dissipation.

[0114] The value of a is between 0.8 mm and 3 mm, which can ensure the insulation between the first chip 30 and the second chip 80 as well as the insulation between the conductive part 20 and the heat dissipation part 42. The value of a can be adjusted according to the insulation level of the device.

[0115] The value of d is between 5 mm and 6 mm, and can be 5 mm, 5.5 mm or 6 mm. In the present embodiment, d is 5.5 mm. The value of e is between 1.5 mm and 4 mm, and can be 1.5 mm, 2.65 mm or 4 mm. In the present embodiment, e is 2.65 mm. The ratio of the value of d to the value of e is in the range of 1.55 to 4, and the value of d is greater than the value of e. Such a setting can ensure that there is a sufficient distance between the chip connection part 41 and the heat dissipation part 42 to avoid a short circuit between the chip connection part 41 and the heat dissipation part 42, and can also ensure that the heat dissipation part has a good heat dissipation effect. Moreover, such a setting can also ensure the contact area between the heat dissipation part and the heat conduction part, ensure the heat dissipation effect, and ensure the contact area between the first metal block and the first chip and the second chip, and ensure the flow of current. Preferably, the ratio of the value of d to the value of e is in the range of 1.5 to 3.

[0116] The value of i is between 1 and 2 mm, and can be 1, 1.5 or 2. In the present embodiment, i is 1.5 mm. The value of f is between 2 and 4 mm, and can be 2, 2.35, 3 or 4. In the present embodiment, f is 2.35 mm. The ratio of the value of f to the value of i is between 1 and 2, so that the flow of current can be ensured.

[0117] The value of g is greater than or equal to 0.5 mm, so that there is a sufficient distance between the highest point of the arc-shaped surface of the second connecting bridge 4113 and the conductive part 20 to avoid a short circuit between the first connecting bridge 43 and the conductive part 20 .

[0118] The value of h is between 1.1 and 1.6 mm, and can be 1.1 mm, 1.43 mm, 1.5 mm or 1.6 mm. In the present embodiment, h is 1.43 mm. The value of f is between 1.37 mm and 3.7 mm, and can be 1.37 mm, 2 mm, 2.48 mm, 3 mm or 3.7 mm. In the present embodiment, f is 2.48 mm. The ratio of the value of h to the value of f is between 0.3 and 0.8, so that the distance between the highest point of the arc surface 431 and the side of the chip connection part away from the substrate is more reasonable, ensuring the insulation distance. It can also ensure the structural strength of the first connecting bridge.

[0119] The value of l is greater than or equal to 0.2 mm, so that there is a sufficient distance between the highest point of the arc-shaped surface of the second connecting bridge 4113 and the conductive part 20 to avoid a short circuit between the second connecting bridge 4113 and the conductive part 20 .

[0120] The ratio of the value of b to the value of f ranges from 0.3 to 0.8, so that the distance between the highest point of the arc surface of the second connecting bridge 4113 and the side of the chip connecting portion 41 away from the substrate 11 is more reasonable, ensuring the insulation distance.

[0121] The value of p is greater than 0, so that when the second power terminal 50 is installed, the installation torque of the second power terminal 50 meets the requirements and can be kept parallel to the terminal of the external structure connected to the second power terminal 50. It also allows the second end of the second power terminal 50 to deform, so as to avoid that when the depth of the second avoidance groove is the same as the thickness of the fourth connecting plate, the fourth connecting plate abuts against the side of the second avoidance groove close to the base plate 11, and the fourth connecting plate squeezes the enclosure 12, causing damage to the enclosure 12, or the fourth connecting plate squeezes the cover plate 13, causing wear at the junction of the cover plate 13 and the fourth connecting plate.

[0122] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the devices or elements referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention. The directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0123] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" may include both "above" and "below". The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used herein are interpreted accordingly.

[0124] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0125] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A packaging structure, characterized in that: include: A housing (10) comprising a base plate (11); A conductive portion (20) disposed on the substrate (11); A first chip (30) is arranged on the conductive portion (20); A first power terminal (40), wherein a first end of the first power terminal (40) comprises a chip connection portion (41) and a heat dissipation portion (42) which are connected to each other, the chip connection portion (41) being connected to the first chip (30), and the heat dissipation portion (42) being coordinated with the substrate (11) for heat dissipation; a second power terminal (50), a first end of the second power terminal (50) being connected to the conductive portion (20); The packaging structure further comprises a heat conducting portion (70) arranged on the substrate (11), the heat conducting portion (70) being insulated from the conductive portion (20), the heat conducting portion (70) being spaced apart from the conductive portion (20), and the heat dissipation portion (42) being connected to the heat conducting portion (70); The chip connection portion (41) comprises a first metal block (411), the package structure further comprises a second chip (80), the second chip (80) and the first chip (30) are arranged in parallel, the second chip (80) is arranged on the conductive portion (20), the first metal block (411) comprises a first block (4111) connected to the first chip (30), a second block (4112) connected to the second chip (80), and a second connection bridge (4113) connected between the first block (4111) and the second block (4112); The first block (4111) and the second block (4112) are arranged at intervals in the second direction, and the first block (4111), the second connecting bridge (4113) and the second block (4112) are arranged in sequence in the second direction.

2. The packaging structure according to claim 1, characterized in that: The heat dissipation portion (42) comprises a second metal block (421), and the first end of the first power terminal (40) further comprises a first connection bridge (43) arranged between the first metal block (411) and the second metal block (421).

3. The packaging structure according to claim 2, characterized in that: The chip connection portion (41) and the heat dissipation portion (42) are arranged at intervals in a first direction, and the first direction is arranged perpendicular to the second direction.

4. The packaging structure according to claim 2, characterized in that: The heat dissipation portion (42) is located on a side of the chip connection portion (41) away from the second power terminal (50).

5. The packaging structure according to claim 2, characterized in that: A surface of the chip connection portion (41) away from the substrate (11), a surface of the heat dissipation portion (42) away from the substrate (11), and a surface of the first connection bridge (43) away from the substrate (11) form a plane portion, and the chip connection portion (41) is connected to the first chip (30) by sintering.

6. The packaging structure according to claim 2, characterized in that: The surface of the first connecting bridge (43) facing the substrate (11) is a curved surface (431).

7. The packaging structure according to any one of claims 2 to 6, characterized in that: The housing (10) comprises a surrounding plate (12) and a cover plate (13); the surrounding plate (12) is arranged around the outer periphery of the substrate (11); the cover plate (13) is arranged to cover an end of the surrounding plate (12) away from the substrate (11); and the first power terminal (40) and the second power terminal (50) both pass through the surrounding plate (12).

8. The packaging structure according to claim 7, characterized in that: The materials of the substrate (11), the enclosure (12) and the cover plate (13) are all ceramic.

9. The packaging structure according to any one of claims 2 to 6, characterized in that: The chip connection portion (41), the first connection bridge (43) and the heat dissipation portion (42) are an integrally formed structure.

10. The packaging structure according to any one of claims 1 to 6, characterized in that: The conductive part (20) comprises a first metal layer, and the thermal conductive part (70) comprises a second metal layer.

11. The packaging structure according to any one of claims 1 to 6, characterized in that: A coating is provided on the surface of the first chip (30).

12. The packaging structure according to any one of claims 1 to 6, characterized in that: A step structure is provided between the first end of the first power terminal (40) and the second end of the first power terminal (40).

13. The packaging structure according to claim 3, characterized in that: The distance between the lowest point of the second connecting bridge (4113) and the conductive portion (20) is greater than or equal to 0.2 mm.

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