Preparation method of solar cell, solar cell and photovoltaic module
By using an ink layer as a mask and wet etching to remove TCO on the substrate sides, the method addresses efficiency loss in crystalline silicon solar cells by ensuring complete collection of charge carriers, enhancing light conversion efficiency.
Patent Information
- Application Number
- CN202410931333.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-11
- Publication Date
- 2024-12-24
AI Technical Summary
Crystalline silicon solar cells face efficiency loss due to uncollected photogenerated electrons and holes caused by the need for masking during physical vapor deposition, which leaves areas uncovered by TCO, leading to conduction leakage between the front and back sides.
A method involving the deposition of an ink layer as a mask protection layer, followed by a wet etching process to remove the TCO layer on the side of the semiconductor substrate, eliminating the need for a mask area and ensuring complete collection of photogenerated electrons and holes.
This approach enhances light conversion efficiency by preventing short circuits and allowing full collection of photogenerated charge carriers, thereby improving the performance of the solar cell.
Smart Images

Figure CN119181729A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of solar cells, and in particular to a method for preparing a solar cell, a solar cell, and a photovoltaic module. Background Art
[0002] Crystalline silicon solar cells need to prevent leakage caused by conduction between the front and back sides, so they need to be masked during the physical vapor deposition (PVD) process, with a mask width of 0.75mm or wider. Because this area is not covered by TCO (Transparent Conductive Oxides), its photogenerated electrons and holes cannot be collected, which will lead to efficiency loss of the crystalline silicon solar cell. Summary of the invention
[0003] The present disclosure provides a method for preparing a solar cell, a solar cell, and a photovoltaic module to at least solve the above technical problems existing in the prior art.
[0004] According to a first aspect of the present disclosure, a method for preparing a solar cell is provided, the method comprising:
[0005] S1: providing a semiconductor substrate, wherein the semiconductor substrate comprises a front side and a back side arranged opposite to each other;
[0006] S2: depositing a layer of intrinsic amorphous silicon layer on the front side, the back side and the side surface of the semiconductor substrate;
[0007] S3: depositing an amorphous silicon doping layer on the intrinsic amorphous silicon layer;
[0008] S4: depositing a TCO layer on the amorphous silicon doped layer;
[0009] S5: depositing ink layers on the front and back sides of the TCO layer;
[0010] S6: using the ink layer as a mask protection layer, and using a wet etching process to remove the TCO layer located on the side of the semiconductor substrate;
[0011] S7: preparing gate lines on the TCO layer.
[0012] In one embodiment, in step S6, the wet etching process is an acid etching process, and the solution of the wet etching process includes HNO 3 , HCl, H 2 SO 4 , HF or more.
[0013] In one embodiment, after step S6, the method further comprises: removing the ink layer on the front and back sides by using a wet etching process.
[0014] In one embodiment, when the ink layer on the front and back sides is removed by a wet etching process, the wet etching process is an alkaline etching process, and the solution of the wet etching process includes NaOH, KOH, K 2 CO 3 One or more alkaline substances.
[0015] In one embodiment, the ink layer has a thickness ranging from 5 to 20 μm.
[0016] In one embodiment, the ink layer has photosensitive properties.
[0017] In one possible implementation, the material of the ink layer includes photosensitive adhesive.
[0018] In one possible implementation, before step S2, the method further includes: pre-cleaning the semiconductor substrate, and performing gettering on the semiconductor substrate.
[0019] According to a second aspect of the present disclosure, a solar cell is provided, which is prepared by using the method for preparing a solar cell described in any one of the above embodiments.
[0020] According to a third aspect of the present disclosure, a photovoltaic assembly is provided, characterized by comprising the solar cell described in the above embodiment.
[0021] The method for preparing a solar cell, as well as the solar cell and photovoltaic module disclosed in the present invention, deposits an ink layer on the front and back sides of the TCO layer, uses the ink layer as a mask to protect the front and back TCO, uses wet etching to remove the TCO layer on the side of the semiconductor substrate, and subsequently removes the ink layer on the front and back sides of the semiconductor, thereby eliminating the need to form a mask area on the surface of the semiconductor substrate to prevent the front and back sides from being turned on. In this way, the solar cell can completely collect photogenerated electrons and holes, thereby improving the light conversion efficiency of the solar cell.
[0022] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an exemplary and non-limiting manner, in which:
[0024] In the drawings, the same or corresponding reference numerals represent the same or corresponding parts.
[0025] Figure 1 A flow chart of a method for preparing a solar cell provided in an embodiment of the present disclosure;
[0026] Figure 2a to Figure 2h A schematic diagram of the preparation process of a solar cell provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0027] In order to make the purpose, features, and advantages of the present disclosure more obvious and easy to understand, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present disclosure.
[0028] The present disclosure provides a method for preparing a solar cell. Figure 1 Flow chart of the method for preparing a solar cell provided in the embodiment of the present disclosure, see Figure 1 , the method comprises the following steps:
[0029] S1: providing a semiconductor substrate, wherein the semiconductor substrate comprises a front side and a back side arranged opposite to each other;
[0030] S2: depositing a layer of intrinsic amorphous silicon layer on the front side, back side and side of the semiconductor substrate;
[0031] S3: depositing an amorphous silicon doping layer on the intrinsic amorphous silicon layer;
[0032] S4: depositing a TCO layer on the amorphous silicon doped layer;
[0033] S5: depositing ink layers on the front and back sides of the TCO layer;
[0034] S6: using the ink layer as a mask protection layer, using a wet etching process to remove the TCO layer located on the side of the semiconductor substrate;
[0035] S7: preparing gate lines on the TCO layer.
[0036] The method for preparing a solar cell provided by the embodiment of the present disclosure is further described in detail below in conjunction with specific embodiments. Figure 2a to Figure 2h A schematic diagram of the preparation process of a solar cell provided in an embodiment of the present disclosure.
[0037] First, see Figure 2a, perform step S1 to provide a semiconductor substrate 10, the semiconductor substrate 10 includes a front side 101 and a back side 102 that are oppositely arranged.
[0038] The semiconductor substrate 10 can be a single semiconductor material substrate (such as a silicon substrate, a germanium substrate, etc.), a composite semiconductor material substrate (such as a germanium silicon substrate, etc.), or a silicon on insulator substrate (Silicon on Insulator, SOI), a germanium on insulator (Germanium on Insulator, GOI) substrate, etc.
[0039] Next, the method further includes: pre-cleaning the semiconductor substrate 10 and performing gettering on the semiconductor substrate 10 .
[0040] Next, see Figure 2b After the semiconductor substrate 10 is doped, the method further includes: texturing the front side 101, the back side 102 and the side of the semiconductor substrate 10. After the texturing step, the front side 101, the back side 102 and the side of the semiconductor substrate 10 are formed into a pyramid texture structure.
[0041] Specifically, the texturing process includes placing the semiconductor substrate 10 in a 0.5%-10% KOH solution and reacting it at 50-85° C. for 1 min-20 min. Under this condition, the velvet structure obtained is the best, which can reduce reflection and absorb more light sources.
[0042] Next, see Figure 2c , perform steps S2 and S3 to deposit an intrinsic amorphous silicon layer 20 on the front side 101 , the back side 102 and the side surface of the semiconductor substrate 10 ; and deposit an amorphous silicon doping layer 30 on the intrinsic amorphous silicon layer 20 .
[0043] In actual operation, the intrinsic amorphous silicon layer 20 and the amorphous silicon doped layer 30 can be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD) or other deposition methods; preferably, the chemical vapor deposition method is used.
[0044] like Figure 2c As shown, the intrinsic amorphous silicon layer 20 covers the entire surface of the semiconductor substrate 10 , and the amorphous silicon doping layer 30 covers the entire surface of the intrinsic amorphous silicon layer 20 .
[0045] In one embodiment, the amorphous silicon doping layer 30 includes an N-type amorphous silicon doping layer 31 located on the front surface of the intrinsic amorphous silicon layer 20 and a P-type amorphous silicon doping layer 32 located on the back surface of the intrinsic amorphous silicon layer 20 .
[0046] Next, see Figure 2d , performing step S4 to deposit a TCO layer 40 on the amorphous silicon doped layer 30 .
[0047] In actual operation, the TCO layer 40 can be formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD) or other deposition methods; preferably, physical vapor deposition.
[0048] In one embodiment, the TCO layer 40 is fully coated, that is, the TCO layer covers the entire surface of the amorphous silicon doped layer 30 .
[0049] In one embodiment, the material of the TCO layer includes SnO 2 、ZnO、In 2 O 3 、ITO、CdO、Cd 2 SnO 4 , FTO, AZO or a combination thereof.
[0050] Next, see Figure 2e , performing step S5 to deposit ink layers 50 on the front and back sides of the TCO layer 40 .
[0051] In one embodiment, the thickness of the ink layer 50 is in the range of 5 to 20 μm. When the thickness of the ink layer 50 is within this range, the technical effect intended to be achieved by the embodiment of the present disclosure can be achieved while saving materials and controlling costs.
[0052] In one embodiment, the ink layer 50 has a photosensitive property. In a specific embodiment, the material of the ink layer 50 includes but is not limited to photosensitive glue.
[0053] Next, see Figure 2f , perform step S6, use the ink layer 50 as a mask protection layer, and use a wet etching process to remove the TCO layer 40 located on the side of the semiconductor substrate 10.
[0054] In the embodiment of the present disclosure, an ink layer is deposited on the front and back sides of the TCO layer, and the ink layer is used as a mask to protect the TCO layers on the front and back sides, so that the TCO layer on the side of the semiconductor substrate is etched and removed, and the ink layers on the front and back sides are subsequently removed. Thereby, there is no need to form a mask area on the surface of the back substrate to prevent the front and back sides from being short-circuited. In this way, the solar cell can completely collect photogenerated electrons and holes, thereby improving the light conversion efficiency of the solar cell.
[0055] In actual operation, a wet etching process is used to remove the TCO layer 40 located at the side of the semiconductor substrate 10 .
[0056] Because the surface of the semiconductor substrate after texturing is a pyramid velvet structure, and the subsequently formed TCO layer is also a pyramid velvet structure, there are a lot of uneven places on the pyramid velvet structure, so dry etching may not be complete, resulting in side leakage short circuit. Because an amorphous silicon layer is formed on the surface of the semiconductor substrate, during dry etching, the bombardment with gas or laser (laser will cause irreversible damage to the semiconductor substrate) will cause the amorphous silicon layer and crystalline silicon to be destroyed, causing the battery efficiency to decrease, but wet etching completely avoids these two situations, and can completely remove the TCO layer on the side, and can retain the amorphous silicon layer on the side.
[0057] In one embodiment, when the TCO layer 40 located at the side of the semiconductor substrate 10 is removed by a wet etching process, the wet etching process is an acid etching process, and the etching solution used is a strong acid solution, including HNO 3 , HCl, H 2 SO 4 , HF or more.
[0058] Next, see Figure 2g The method further includes: removing the ink layer 50 on the front and back sides by using a wet etching process.
[0059] In one embodiment, when the ink layer 50 is removed by a wet etching process, the wet etching process is an alkaline etching process, and the solution used is an alkaline solution, wherein the concentration of the alkaline solution is relatively low, and the alkaline solution includes NaOH, KOH, NaHCO 3 , KCO 3 One or more alkaline substances.
[0060] Next, see Figure 2h , perform step S7 to prepare a gate line 60 on the TCO layer 40. The function of the gate line 60 is to collect and conduct current.
[0061] In actual operation, the process of forming the gate line 60 includes but is not limited to a screen printing process.
[0062] The embodiments of the present disclosure further provide a solar cell, which is prepared by using the method for preparing a solar cell in any of the above embodiments.
[0063] The embodiments of the present disclosure also provide a photovoltaic assembly, comprising the solar cell in the above embodiments.
[0064] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0065] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0066] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. A method for preparing a solar cell, characterized in that: The method comprises: S1: providing a semiconductor substrate, wherein the semiconductor substrate comprises a front side and a back side arranged opposite to each other; S2: depositing a layer of intrinsic amorphous silicon layer on the front side, the back side and the side surface of the semiconductor substrate; S3: depositing an amorphous silicon doping layer on the intrinsic amorphous silicon layer; S4: depositing a TCO layer on the amorphous silicon doped layer; S5: depositing ink layers on the front and back sides of the TCO layer; S6: using the ink layer as a mask protection layer, and using a wet etching process to remove the TCO layer located on the side of the semiconductor substrate; S7: preparing gate lines on the TCO layer.
2. The method according to claim 1, characterized in that: In step S6, the wet etching process is an acid etching process, and the solution of the wet etching process includes one or more of HNO3, HCl, H2SO4, and HF.
3. The method according to claim 1, characterized in that After step S6, the method further comprises: removing the ink layer on the front and back sides by using a wet etching process.
4. The method according to claim 3, characterized in that When the ink layer on the front and back sides is removed by a wet etching process, the wet etching process is an alkaline etching process, and the solution of the wet etching process includes one or more alkaline substances such as NaOH, KOH, K2CO3, etc.
5. The method according to claim 1, characterized in that The thickness of the ink layer ranges from 5 to 20 μm.
6. The method according to claim 1, characterized in that The ink layer has photosensitive properties.
7. The method according to claim 6, characterized in that The ink layer is photosensitive glue.
8. The method according to claim 1, characterized in that Before step S2, the method further includes: pre-cleaning the semiconductor substrate and performing gettering on the semiconductor substrate.
9. A solar cell, characterized in that: The solar cell is prepared by the method for preparing the solar cell according to any one of claims 1 to 8.
10. A photovoltaic module, characterized in that: Comprising a solar cell as claimed in claim 9.
Citation Information
Cited By
Heterojunction solar cell preparation method
CN122476718A
A method for preparing a heterojunction solar cell
CN122476718B
