Back contact solar cell and preparation method thereof

Abstract

The invention relates to a back contact solar cell and a preparation method thereof. The back contact solar cell comprises a monocrystalline silicon substrate, a tunneling oxide layer, a first doping type polycrystalline silicon layer, a second doping type polycrystalline silicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode, the tunneling oxide layer is arranged on one side of the monocrystalline silicon substrate, and the first doping type polycrystalline silicon layer, the second doping type polycrystalline silicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer. The intrinsic amorphous silicon layer is arranged between the first doping type polycrystalline silicon layer and the second doping type polycrystalline silicon layer, the first electrode is connected to the first doping type polycrystalline silicon layer, and the second electrode is connected to the second doping type polycrystalline silicon layer. According to the back contact solar cell, the generation of an electric leakage channel can be prevented, and the intrinsic amorphous silicon layer can perform chemical passivation on the monocrystalline silicon substrate, so that the conversion efficiency of the cell is improved.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a back-contact solar cell and a preparation method thereof. Background Art

[0002] Energy is the foundation of the world's economic and social development. In the future, energy demand will grow with the development of the world economy. Photovoltaic power generation, as a sustainable energy alternative, has developed rapidly in recent years.

[0003] At present, the solar cells used in photovoltaic power stations are mainly crystalline silicon solar cells. After improvements in front light trapping, metallization performance, and silicon wafer quality, the cells have developed from aluminum back field cells to the current TOPCon cells. In order to pursue the theoretical conversion efficiency of crystalline silicon solar energy to the extreme, full back electrode contact crystalline silicon solar cells (BC cells) are gradually considered to be the most likely to become mass-produced cells with higher conversion efficiency.

[0004] All-back-contact crystalline silicon solar cells (BC cells) place all metal electrodes of the cell on the back of the cell. Since there is no metal electrode blocking the front of the cell, the area of ​​the cell that absorbs sunlight can be maximized, reducing optical losses and thus improving photoelectric conversion efficiency. However, this type of cell also has a P region and an N region on the back, and leakage channels are easily formed between the P and N regions, reducing cell efficiency. Therefore, the formation of leakage channels for this type of cell will become a difficult process that constrains the highest efficiency. Summary of the invention

[0005] Based on this, it is necessary to provide a back-contact solar cell and a method for preparing the same to solve the problem of a leakage channel formed between the P region and the N region of a BC cell.

[0006] The first aspect of the present invention is to provide a back contact solar cell, the scheme is as follows:

[0007] A back-contact solar cell comprises a single crystal silicon substrate, a tunneling oxide layer, a first doped type polycrystalline silicon layer, a second doped type polycrystalline silicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode; the tunneling oxide layer is arranged on one side of the single crystal silicon substrate, the first doped type polycrystalline silicon layer, the second doped type polycrystalline silicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer, the intrinsic amorphous silicon layer is arranged between the first doped type polycrystalline silicon layer and the second doped type polycrystalline silicon layer, the first electrode is connected to the first doped type polycrystalline silicon layer, and the second electrode is connected to the second doped type polycrystalline silicon layer.

[0008] In one embodiment, the thickness of the tunnel oxide layer is 1 nm to 3 nm.

[0009] In one of the embodiments, the thickness of the first doping type polysilicon layer is 80 nm to 300 nm.

[0010] In one embodiment, the thickness of the second doping type polysilicon layer is 80 nm to 300 nm.

[0011] In one of the embodiments, the thickness of the intrinsic amorphous silicon layer is 80nm-300nm.

[0012] In one of the embodiments, the back-contact solar cell comprises a front-side passivation anti-reflection layer, and the front-side passivation anti-reflection layer is disposed on the second side of the single-crystalline silicon substrate.

[0013] In one of the embodiments, the back-contact solar cell includes a back-side passivation anti-reflection layer, and the back-side passivation anti-reflection layer entirely covers the first doped type polysilicon layer, the second doped type polysilicon layer, and the intrinsic amorphous silicon layer.

[0014] The second aspect of the present invention is to provide a method for preparing a back-contact solar cell, the scheme is as follows:

[0015] A method for preparing a back contact solar cell comprises the following steps:

[0016] A tunneling oxide layer is prepared on one side of a single crystal silicon substrate, and a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer are prepared on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is located between the first doping type polysilicon layer and the second doping type polysilicon layer;

[0017] preparing a first electrode connected to the first doping type polysilicon layer;

[0018] A second electrode connected to the second doping type polysilicon layer is prepared.

[0019] In one embodiment, the step of preparing a tunneling oxide layer on the first side of the single crystal silicon substrate, and preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is disposed between the first doping type polysilicon layer and the second doping type polysilicon layer comprises:

[0020] forming a first tunneling oxide layer on a first side of a single crystal silicon substrate;

[0021] forming a first intrinsic amorphous silicon layer on the first tunneling oxide layer;

[0022] removing the first intrinsic amorphous silicon layer in the first region to expose the first tunneling oxide layer in the first region;

[0023] preparing a first doping type polysilicon layer on the first tunneling oxide layer in the first region;

[0024] removing the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region, and retaining the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the third region, wherein the third region is located between the first region and the second region;

[0025] A second tunneling oxide layer and a second doping type polysilicon layer are prepared on the single crystal silicon substrate in the second region.

[0026] In one embodiment, the step of removing the first intrinsic amorphous silicon layer in the first region comprises:

[0027] preparing an etching protection film on the first intrinsic amorphous silicon layer, wherein the etching protection film exposes the first intrinsic amorphous silicon layer in a first area;

[0028] The first intrinsic amorphous silicon layer in the first region is removed by etching.

[0029] In one embodiment, the step of preparing a first doping type polysilicon layer on the first tunneling oxide layer in the first region comprises:

[0030] forming a second intrinsic amorphous silicon layer on the first tunneling oxide layer in the first region;

[0031] A first doping diffusion process is performed to transform the second intrinsic amorphous silicon layer into a first doping type polysilicon layer, transform the etching protection film into a doping protection film, and form a first doped oxide layer on the surface of the doping protection film.

[0032] In one embodiment, the step of removing the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region comprises:

[0033] removing the doped protective film and the first doped oxide layer in the second region, and retaining the doped protective film and the first doped oxide layer in the third region;

[0034] Under the protection of the first doped oxide layer and the doped protection film, the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region are removed by etching.

[0035] In one embodiment, the step of preparing a second tunneling oxide layer and a second doped type polysilicon layer on the single crystal silicon substrate in the second region comprises:

[0036] Depositing a second tunnel oxide layer on the entire surface of the first side;

[0037] forming a third intrinsic amorphous silicon layer on the second tunneling oxide layer;

[0038] Performing a second doping diffusion process to transform the third intrinsic amorphous silicon layer into a second doping type polysilicon layer, and forming a second doped oxide layer on the surface of the second doping type polysilicon layer;

[0039] removing the second doped oxide layer on the first region and the third region;

[0040] Under the protection of the first doped oxide layer, the doped protection film and the second doped oxide layer, etching and removing the second tunneling oxide layer and the second doped type polysilicon layer on the first region and the third region;

[0041] The first doped oxide layer, the doped protection film and the second doped oxide layer in the second region are removed.

[0042] Compared with the conventional technology, the above-mentioned back contact solar cell and its preparation method have the following beneficial effects:

[0043] The above-mentioned back-contact solar cell and its preparation method arrange an intrinsic amorphous silicon layer between the first doped type polysilicon layer and the second doped type polysilicon layer on the back side to prevent the generation of leakage channels, and the intrinsic amorphous silicon layer can chemically passivate the single crystal silicon substrate, repair interface dangling bonds, and eliminate internal recombination centers, thereby improving the conversion efficiency of the battery. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] FIG1 is a schematic structural diagram of a back contact solar cell according to an embodiment;

[0045] FIG2 is a schematic diagram of preparing a first tunneling oxide layer and a first intrinsic amorphous silicon layer on a single crystal silicon substrate;

[0046] FIG3 is a schematic diagram of preparing an etching protection film on the first intrinsic amorphous silicon layer;

[0047] FIG4 is a schematic diagram of removing the etching protection film on the first region;

[0048] FIG5 is a schematic diagram of a first doping diffusion process;

[0049] FIG6 is a schematic diagram of removing the doped protective film and the first doped oxide layer in the second region;

[0050] 7 is a schematic diagram of removing the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region;

[0051] FIG8 is a schematic diagram of preparing a second tunneling oxide layer and a second doped type polysilicon layer;

[0052] FIG9 is a schematic diagram of removing the second doped oxide layer on the first region and the third region;

[0053] 10 is a schematic diagram of etching and removing the second tunneling oxide layer and the second doped type polysilicon layer on the first region and the third region, and removing the first doped oxide layer, the doped protection film and the second doped oxide layer in the second region;

[0054] FIG. 11 is a schematic diagram of preparing a back passivation anti-reflection layer and a front passivation anti-reflection layer.

[0055] Description of reference numerals:

[0056] 100, back contact solar cell; 110, single crystal silicon substrate; 114, velvet; 120, tunneling oxide layer; 130, first doping type polycrystalline silicon layer; 140, second doping type polycrystalline silicon layer; 150, intrinsic amorphous silicon layer; 160, first electrode; 170, second electrode; 180, back passivation anti-reflection layer; 190, front passivation anti-reflection layer; 111, first region; 112, second region; 113, third region; 121, first tunneling oxide layer; 150, first intrinsic amorphous silicon layer; 200, etching protection film; 201, doping protection film; 202, first doped oxide layer; 122, second tunneling oxide layer; 142, second doped oxide layer. DETAILED DESCRIPTION

[0057] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present invention, so the present invention is not limited by the specific embodiments disclosed below.

[0058] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0059] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0060] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0061] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0062] As shown in FIG. 1 , a back-contact solar cell 100 according to an embodiment of the present invention includes a single crystal silicon substrate 110 , a tunneling oxide layer 120 , a first doped type polysilicon layer 130 , a second doped type polysilicon layer 140 , an intrinsic amorphous silicon layer 150 , a first electrode 160 , and a second electrode 170 .

[0063] The tunnel oxide layer 120 is disposed on one side of the single crystal silicon substrate 110. The first doping type polysilicon layer 130, the second doping type polysilicon layer 140 and the intrinsic amorphous silicon layer 150 are respectively disposed on the tunnel oxide layer 120, and the intrinsic amorphous silicon layer 150 is disposed between the first doping type polysilicon layer 130 and the second doping type polysilicon layer 140.

[0064] The first electrode 160 is connected to the first doping type polysilicon layer 130 , and the second electrode 170 is connected to the second doping type polysilicon layer 140 .

[0065] The single crystal silicon substrate 110 may be N-type doped or P-type doped.

[0066] The single crystal silicon substrate 110 has a first side and a second side that are arranged opposite to each other. The tunneling oxide layer 120, the first doping type polysilicon layer 130, the second doping type polysilicon layer 140, the intrinsic amorphous silicon layer 150, the first electrode 160 and the second electrode 170 are all arranged on the first side of the single crystal silicon substrate 110. The second side of the single crystal silicon substrate 110 can be set to a velvet surface 114.

[0067] The first side of the single crystal silicon substrate 110 includes a first region, a second region and a third region. The third region is located between the first region and the second region. The first doping type polysilicon layer 130 is disposed in the first region. The second doping type polysilicon layer 140 is disposed in the second region. The intrinsic amorphous silicon layer 150 is disposed in the third region.

[0068] The material of the tunnel oxide layer 120 may be, but is not limited to, SiO x The thickness of the tunnel oxide layer 120 is, for example, 1-3 nm, and specifically, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, etc.

[0069] The thickness of the first doped type polysilicon layer 130 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0070] The thickness of the second doping type polysilicon layer 140 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0071] The first doping type polysilicon layer 130 and the second doping type polysilicon layer 140 have opposite doping types. For example, the first doping type polysilicon layer 130 is P-type doped, and the second doping type polysilicon layer 140 is N-type doped. Alternatively, the first doping type polysilicon layer 130 is N-type doped, and the second doping type polysilicon layer 140 is P-type doped.

[0072] The thickness of the intrinsic amorphous silicon layer 150 is, for example, 80 nm to 300 nm, and specifically, for example, 80 nm, 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, etc.

[0073] In some examples, the back contact solar cell 100 includes a back passivation anti-reflection layer 180, which entirely covers the first doped type polysilicon layer 130, the second doped type polysilicon layer 140, and the intrinsic amorphous silicon layer 150. The material of the back passivation anti-reflection layer 180 may be, but is not limited to, aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0074] In some examples, the back contact solar cell 100 includes a front passivation anti-reflection layer 190 disposed on the second side of the single crystal silicon substrate 110. The material of the front passivation anti-reflection layer 190 can be, but is not limited to, aluminum oxide, silicon nitride, silicon oxide, silicon oxynitride, and the like.

[0075] Optionally, the first electrode 160 and the second electrode 170 may be made of metal materials such as silver and aluminum.

[0076] Furthermore, the present invention also provides a method for preparing the back-contact solar cell 100 according to any of the above examples.

[0077] The above-mentioned back-contact solar cell has an intrinsic amorphous silicon layer arranged between the first doped type polysilicon layer and the second doped type polysilicon layer on the back side to prevent the generation of leakage channels, and the intrinsic amorphous silicon layer can chemically passivate the single crystal silicon substrate, repair interface dangling bonds, and eliminate internal recombination centers, thereby improving the conversion efficiency of the battery.

[0078] A method for preparing a back contact solar cell 100 according to an embodiment includes the following steps:

[0079] Step S10, preparing a tunneling oxide layer 120 on the first side of the single crystal silicon substrate 110, and preparing a first doped type polysilicon layer 130, a second doped type polysilicon layer 140 and an intrinsic amorphous silicon layer 150 on the tunneling oxide layer 120, the intrinsic amorphous silicon layer 150 being located between the first doped type polysilicon layer 130 and the second doped type polysilicon layer 140.

[0080] Step S20 , preparing a first electrode 160 connected to the first doping type polysilicon layer 130 .

[0081] Step S30 , preparing a second electrode 170 connected to the second doping type polysilicon layer 140 .

[0082] Before preparing the tunnel oxide layer 120 on the single crystal silicon substrate 110, the single crystal silicon substrate 110 is preferably subjected to chemical polishing to remove metal ions and other impurity ions. The treatment liquid is at least one of NH4OH solution, NaOH solution, and KOH solution. The temperature of the treatment liquid is above 60°C.

[0083] In some examples, step S10 includes:

[0084] Step S11 , as shown in FIG. 2 , a first tunneling oxide layer 121 is formed on a first side of a single crystal silicon substrate 110 .

[0085] Optionally, the preparation method of the first tunnel oxide layer 121 may be, but is not limited to, high temperature oxidation, nitric acid oxidation, ozone oxidation, etc.

[0086] Step S12 , as shown in FIG. 2 , forms a first intrinsic amorphous silicon layer 150 on the first tunneling oxide layer 121 .

[0087] Optionally, the preparation method of the first intrinsic amorphous silicon layer 150 may be but is not limited to low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition, hot wire vapor deposition, physical vapor deposition, etc.

[0088] Step S13 , removing the first intrinsic amorphous silicon layer 150 in the first region 111 to expose the first tunneling oxide layer 121 in the first region 111 .

[0089] In some examples, step S13 includes:

[0090] In step S131 , as shown in FIGS. 3 and 4 , an etching protection film 200 is formed on the first intrinsic amorphous silicon layer 150 , and the etching protection film 200 exposes the first intrinsic amorphous silicon layer 150 in the first region 111 .

[0091] Optionally, the etching protection film 200 may be, but is not limited to, silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiO x N y ) etc. The thickness of the etching protection film 200 is, for example, 10 nm to 100 nm.

[0092] Optionally, the preparation method of the etching protection film 200 may be but is not limited to low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition, physical vapor deposition, etc.

[0093] As shown in Fig. 4, the etching protection film 200 can be deposited on the entire surface and then laser treated to remove the portion on the first area 111. The laser treatment uses, for example, a laser with a wavelength of 355 nm and a working power of 50 W. The width of the laser treated area is, for example, 300 μm to 500 μm.

[0094] Step S132 , etching and removing the first intrinsic amorphous silicon layer 150 in the first region 111 .

[0095] The etching solution used for etching includes, for example, alkali, additives and water. The alkali is, for example, NaOH, KOH, and the like.

[0096] Step S14 , forming a first doping type polysilicon layer 130 on the first tunneling oxide layer 121 in the first region 111 .

[0097] In some examples, step S14 includes:

[0098] Step S141 , forming a second intrinsic amorphous silicon layer 150 on the first tunneling oxide layer 121 in the first region 111 .

[0099] Step S142 , as shown in FIG. 5 , performs a first doping diffusion process to transform the second intrinsic amorphous silicon layer 150 into a first doped type polysilicon layer 130 , transform the etching protection film 200 into a doped protection film 201 , and form a first doped oxide layer 202 on the surface of the doped protection film 201 .

[0100] The first doping diffusion process is, for example, a boron diffusion process. The etching protection film 200 is also doped with B atoms to become borosilicate glass (BSG), that is, the doped protection film 201, and effectively blocks the diffusion of B atoms into the first intrinsic amorphous silicon layer 150, and forms boron-rich silicon oxide on the surface of the doped protection film 201, that is, the first doped oxide layer 202. The thickness of the first doped oxide layer 202 is 10nm~100nm.

[0101] The doping concentration of the first doping type polysilicon layer 130 is about 3×10 20 cm -3 .

[0102] Step S15 , removing the first tunnel oxide layer 121 and the first intrinsic amorphous silicon layer 150 in the second region 112 , and retaining the first tunnel oxide layer 121 and the first intrinsic amorphous silicon layer 150 in the third region 113 . The third region 113 is located between the first region 111 and the second region 112 .

[0103] In some examples, step S15 includes:

[0104] Step S151 , as shown in FIG. 6 , remove the doped protection film 201 and the first doped oxide layer 202 in the second region 112 , and retain the doped protection film 201 and the first doped oxide layer 202 in the third region 113 .

[0105] In step S152 , as shown in FIG. 7 , under the protection of the first doped oxide layer 202 and the doped protection film 201 , the first tunneling oxide layer 121 and the first intrinsic amorphous silicon layer 150 in the second region 112 are removed by etching.

[0106] The method of removing the doped protective film 201 and the first doped oxide layer 202 of the second region 112 is, for example, laser processing. The laser processing uses, for example, a laser with a wavelength of 532 nm and an operating power of 30 W. The width of the laser processing region is, for example, 150 μm to 350 μm.

[0107] The etching solution used to etch and remove the first tunnel oxide layer 121 and the first intrinsic amorphous silicon layer 150 of the second region 112 includes, for example, alkali, additives and water. The alkali is, for example, NaOH, KOH, etc.

[0108] Step S16 , as shown in FIG. 8 , a second tunneling oxide layer 122 and a second doped type polysilicon layer 140 are formed on the single crystal silicon substrate 110 in the second region 112 .

[0109] In some examples, step S16 includes:

[0110] Step S161 , depositing a second tunnel oxide layer 122 on the entire surface of the first side.

[0111] Optionally, the second tunnel oxide layer 122 may be prepared by, but is not limited to, high temperature oxidation, nitric acid oxidation, ozone oxidation, and the like.

[0112] Step S162 , forming a third intrinsic amorphous silicon layer 150 on the second tunneling oxide layer 122 .

[0113] Optionally, the preparation method of the first intrinsic amorphous silicon layer 150 may be but is not limited to low pressure chemical vapor deposition, plasma enhanced chemical vapor deposition, catalytic chemical vapor deposition, atomic layer deposition, hot wire vapor deposition, physical vapor deposition, etc.

[0114] Step S163 , performing a second doping diffusion process to transform the third intrinsic amorphous silicon layer 150 into a second doped type polysilicon layer 140 , and forming a second doped oxide layer 142 on the surface of the second doped type polysilicon layer 140 .

[0115] The second doping diffusion process is, for example, a phosphorus diffusion process. A phosphorus-rich silicon oxide (PSG) is formed on the surface of the second doping type polysilicon layer 140, that is, a second doped oxide layer 142. The thickness of the second doped oxide layer 142 is 10 nm to 40 nm.

[0116] The doping concentration of the second doping type polysilicon layer 140 is about 3×10 21 cm -3 .

[0117] In step S164 , as shown in FIG. 9 , the second doped oxide layer 142 on the first region 111 and the third region 113 is removed.

[0118] The second doped oxide layer 142 of the first region 111 is removed by laser treatment, for example. The laser treatment uses a laser with a wavelength of 532 nm and a working power of 30 W. The width of the laser-treated region is, for example, 100 μm to 300 μm.

[0119] In step S165 , as shown in FIG. 10 , under the protection of the first doped oxide layer 202 , the doped protection film 201 and the second doped oxide layer 142 , the second tunneling oxide layer 122 and the second doped type polysilicon layer 140 on the first region 111 and the third region 113 are etched away.

[0120] The etching solution includes, for example, alkali, additives, and water. The alkali is, for example, NaOH, KOH, etc. The processing temperature is above 70° C., and the processing time is 200 to 500 seconds. While the second tunneling oxide layer 122 and the second doped type polysilicon layer 140 on the first region 111 and the third region 113 are etched away, a pyramid velvet surface 114 is generated on the second side of the single crystal silicon substrate 110.

[0121] Step S166 , as shown in FIG. 10 , remove the first doped oxide layer 202 , the doped protection film 201 , and the second doped oxide layer 142 in the second region 112 .

[0122] The first doped oxide layer 202 , the doped protection film 201 , and the second doped oxide layer 142 in the second region 112 may be removed by cleaning with a 2 wt % HF solution.

[0123] In some of the examples, as shown in FIG. 11 , the method for preparing a back-contact solar cell 100 further includes the step of preparing a back-side passivation anti-reflection layer 180 , which entirely covers the first doped type polycrystalline silicon layer 130 , the second doped type polycrystalline silicon layer 140 , and the intrinsic amorphous silicon layer 150 .

[0124] In some examples, as shown in FIG. 11 , the method for preparing the back-contact solar cell 100 further includes the step of preparing a front passivation anti-reflection layer 190 , where the front passivation anti-reflection layer 190 is disposed on the second side of the single crystal silicon substrate 110 .

[0125] In some examples, a layer of aluminum oxide with a thickness of about 3nm to 10nm is deposited on the front and back of the battery. The atomic layer passivation film can be deposited by one of PEALD, ALD, and PVD, and trimethylaluminum and H2O or trimethylaluminum and O3 can be used as the reaction gas. Then, a passivation anti-reflection film with a thickness of 70nm to 110nm and a refractive index of 2.0% to 2.4% is deposited on the front and back of the battery. The passivation anti-reflection film can be at least one of silicon nitride, silicon oxide, and silicon oxynitride.

[0126] In step S20 and step S30, the first electrode 160 and the second electrode 170 may be printed with silver paste, aluminum paste, etc. by a printing process, and then sintered at 700° C. to 900° C. to achieve metallization.

[0127] The above-mentioned method for preparing a back-contact solar cell deposits the corresponding film layer under a specific process and then selects the ion diffusion method to dope to prepare the emitter, which will cause the inlocal diffusion of ions. If a second different type of emitter is prepared, a leakage channel will be formed. The intrinsic amorphous silicon layer is formed between the first doped type polysilicon layer and the second doped type polysilicon layer by laser selective processing and chemical etching to prevent the generation of leakage channels, and the intrinsic amorphous silicon layer can chemically passivate the single crystal silicon substrate, repair the interface dangling bonds, and eliminate the internal recombination center, thereby improving the conversion efficiency of the battery.

[0128] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0129] The above-mentioned embodiments only express several implementation methods of the present invention, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be based on the attached claims, and the description can be used to interpret the content of the claims.

Claims

1. A back contact solar cell, characterized in that: It includes a single crystal silicon substrate, a tunneling oxide layer, a first doping type polysilicon layer, a second doping type polysilicon layer, an intrinsic amorphous silicon layer, a first electrode and a second electrode; the tunneling oxide layer is arranged on the first side of the single crystal silicon substrate, the first doping type polysilicon layer, the second doping type polysilicon layer and the intrinsic amorphous silicon layer are respectively arranged on the tunneling oxide layer, the intrinsic amorphous silicon layer is arranged between the first doping type polysilicon layer and the second doping type polysilicon layer, the first electrode is connected to the first doping type polysilicon layer, and the second electrode is connected to the second doping type polysilicon layer.

2. The back contact solar cell according to claim 1, characterized in that The thickness of the tunnel oxide layer is 1 nm to 3 nm; and / or The thickness of the first doping type polysilicon layer is 80nm-300nm; and / or The thickness of the second doping type polysilicon layer is 80nm-300nm; and / or The thickness of the intrinsic amorphous silicon layer is 80nm-300nm.

3. The back contact solar cell according to claim 1, characterized in that The back-contact solar cell includes a front-side passivation anti-reflection layer disposed on the second side of the single-crystal silicon substrate.

4. The back contact solar cell according to any one of claims 1 to 3, characterized in that: The back-contact solar cell comprises a back-side passivation anti-reflection layer, and the back-side passivation anti-reflection layer entirely covers the first doped type polysilicon layer, the second doped type polysilicon layer and the intrinsic amorphous silicon layer.

5. A method for preparing a back contact solar cell, characterized in that: The following steps are involved: A tunneling oxide layer is prepared on one side of a single crystal silicon substrate, and a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer are prepared on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is located between the first doping type polysilicon layer and the second doping type polysilicon layer; preparing a first electrode connected to the first doping type polysilicon layer; A second electrode connected to the second doping type polysilicon layer is prepared.

6. The preparation method according to claim 5, characterized in that: The step of preparing a tunneling oxide layer on the first side of the single crystal silicon substrate, and preparing a first doping type polysilicon layer, a second doping type polysilicon layer and an intrinsic amorphous silicon layer on the tunneling oxide layer, wherein the intrinsic amorphous silicon layer is disposed between the first doping type polysilicon layer and the second doping type polysilicon layer comprises: forming a first tunneling oxide layer on a first side of a single crystal silicon substrate; forming a first intrinsic amorphous silicon layer on the first tunneling oxide layer; removing the first intrinsic amorphous silicon layer in the first region to expose the first tunneling oxide layer in the first region; preparing a first doping type polysilicon layer on the first tunneling oxide layer in the first region; removing the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region, and retaining the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the third region, wherein the third region is located between the first region and the second region; A second tunneling oxide layer and a second doping type polysilicon layer are prepared on the single crystal silicon substrate in the second region.

7. The preparation method according to claim 6, characterized in that: The step of removing the first intrinsic amorphous silicon layer in the first region comprises: preparing an etching protection film on the first intrinsic amorphous silicon layer, wherein the etching protection film exposes the first intrinsic amorphous silicon layer in a first area; The first intrinsic amorphous silicon layer in the first region is removed by etching.

8. The preparation method according to claim 7, characterized in that: The step of preparing a first doped type polysilicon layer on the first tunneling oxide layer in the first region comprises: forming a second intrinsic amorphous silicon layer on the first tunneling oxide layer in the first region; A first doping diffusion process is performed to transform the second intrinsic amorphous silicon layer into a first doping type polysilicon layer, transform the etching protection film into a doping protection film, and form a first doped oxide layer on the surface of the doping protection film.

9. The preparation method according to claim 8, characterized in that: The step of removing the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region comprises: removing the doped protective film and the first doped oxide layer in the second region, and retaining the doped protective film and the first doped oxide layer in the third region; Under the protection of the first doped oxide layer and the doped protection film, the first tunneling oxide layer and the first intrinsic amorphous silicon layer in the second region are removed by etching.

10. The preparation method according to claim 9, characterized in that: The step of preparing a second tunneling oxide layer and a second doped type polysilicon layer on the single crystal silicon substrate in the second region comprises: Depositing a second tunnel oxide layer on the entire surface of the first side; forming a third intrinsic amorphous silicon layer on the second tunneling oxide layer; Performing a second doping diffusion process to transform the third intrinsic amorphous silicon layer into a second doping type polysilicon layer, and forming a second doped oxide layer on the surface of the second doping type polysilicon layer; removing the second doped oxide layer on the first region and the third region; Under the protection of the first doped oxide layer, the doped protection film and the second doped oxide layer, etching and removing the second tunneling oxide layer and the second doped type polysilicon layer on the first region and the third region; The first doped oxide layer, the doped protection film and the second doped oxide layer in the second region are removed.

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