A power amplifier system based on in-phase power synthesis

Abstract

The present invention provides a power amplifier system based on in-phase power synthesis, including an input port, an output port, and multiple power amplification paths, all connected to the input port, including at least one main power amplification path and at least one auxiliary power amplification path, for amplifying one input signal of the same phase received from each input port, and when at least one auxiliary power amplification path is in a working state, load modulation is performed on the main power amplification path to reduce the load impedance of the main power amplification path; an in-phase synthesizer is connected between the multiple power amplification paths and the output port, for power synthesis of the amplified signals output by each power amplification path at the same phase, and the synthesized output signal is transmitted to the output port for output. The present application scheme can get rid of the limitation of the 90° phase on the bandwidth, realize the in-phase power synthesis of multiple PAs in a wider frequency band, and maintain high back-off power efficiency at the same time.

Description

Technical Field

[0001] The present application relates to the field of radio frequency and microwave technology, and in particular to a power amplifier system based on in-phase power synthesis. Background Art

[0002] From the first time radio communication technology entered the practical stage to the current 5G mobile communication, communication technology has developed rapidly for hundreds of years. Whether it is early radio communication technology or modern mobile communication technology, or today's artificial intelligence and smart Internet of Things, no matter how complex the system is, it cannot do without the most basic and important device, that is - the RF power amplifier. As the core device in the communication module, the performance of the power amplifier directly determines the signal propagation distance, signal propagation quality and signal propagation bandwidth.

[0003] In 4G / 5G communication systems, the RF front-end power amplifier module must be able to output 32dBmLTE linear power (MPR=0) at a relatively low voltage. At this time, the peak-to-average ratio will be as high as 4dB. Under high-speed communication, the peak-to-average ratio is much greater than 6dB. In other cases, such as WiFi7, the peak-to-average ratio can be as high as 15dB. Therefore, the efficiency of the power point when the saturated output power is backed off by 6dB or more is very important for mobile terminal applications.

[0004] At present, the industry mainly improves the back-off power efficiency from various key points of the signal transmission path. This includes digital pre-distortion (DPD) technology that optimizes the input signal; dynamic power modulation technologies such as envelope tracking (ET) and envelope elimination and recovery (EER) that optimize the system working state; and Doherty, Out-phasing, LMBA and other technologies that dynamically modulate the load. These design architectures are complex and it is difficult to achieve broadband performance. Among them, the Doherty solution proposed in 1936 is widely used.

[0005] However, the Doherty scheme for dynamically modulating the load requires a 90° phase relationship for synthesis. However, due to the inclusion of a 90° impedance transformation network in its architecture and the influence of the amplifier's own parasitic impedance, it is difficult to extend the bandwidth of this architecture beyond an octave to a certain extent. Summary of the invention

[0006] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a power amplifier based on in-phase power synthesis to solve the technical problem that the bandwidth of the existing architecture is difficult to expand to more than an octave.

[0007] In order to solve one or more of the above technical problems, the technical solution adopted in this application is:

[0008] A power amplifier system based on in-phase power synthesis, the system comprising an input port, an output port, and:

[0009] A plurality of power amplification paths, all connected to the input port, including at least one main power amplification path and at least one auxiliary power amplification path, for amplifying one input signal of the same phase received from the input port, wherein when the at least one auxiliary power amplification path is in a working state, load modulation is performed on the main power amplification path to reduce the load impedance of the main power amplification path;

[0010] The in-phase synthesizer is connected between the multiple power amplification paths and the output port, and is used to perform power synthesis on the same phase of the amplified signals output by each power amplification path, and transmit the synthesized output signal to the output port for output.

[0011] In a preferred embodiment, each of the power amplification paths comprises:

[0012] A power amplification unit, used for amplifying an input signal of the same phase received by the power amplification path from the input port;

[0013] The impedance conversion network is connected to the power amplification unit and is used to perform load modulation on the power amplification unit in the power amplification path where the impedance conversion network is located.

[0014] In a preferred embodiment, the main power amplification path and the auxiliary power amplification path use different types of power amplification units.

[0015] In a preferred manner, when the system output power is less than a first threshold, the at least one main power amplification path is in an operating state, and the at least one auxiliary power amplification path is in an off state.

[0016] In a preferred manner, when the system output power is not less than the first threshold, the at least one auxiliary power amplification path is in an operating state.

[0017] In a preferred embodiment, when the at least one auxiliary power amplification path is in operation, load modulation is performed on the main power amplification path to reduce the load impedance of the main power amplification path, which includes:

[0018] When the at least one auxiliary power amplification path is in a working state, it performs load modulation on the at least one main power amplification path to reduce the load impedance of the main power amplification path until the difference between the load impedance of the at least one main power amplification path and the load impedance of the at least one auxiliary power amplification path is less than a second threshold.

[0019] In a preferred embodiment, the initial load impedance of the at least one main power amplification path is ZC, the number of the auxiliary power amplification paths is N, and when the load impedance of the at least one main power amplification path is reduced to be equal to the load impedance of the at least one auxiliary power amplification path, the load impedance of the at least one main power amplification path becomes ZC / (N+1).

[0020] In a preferred embodiment, the impedance conversion network includes a first capacitor, a second capacitor, a first coupling line and a second coupling line;

[0021] The first end of the first capacitor and the first end of the first coupling line are connected to the first input port of the impedance conversion network, and the first end of the second capacitor and the first end of the second coupling line are connected to the second input port of the impedance conversion network;

[0022] The second end of the second capacitor and the second end of the first coupling line are connected to the first output port of the impedance conversion network, and the second end of the first capacitor and the second end of the second coupling line are connected to the second output port of the impedance conversion network.

[0023] In a preferred embodiment, the in-phase synthesizer includes multiple signal input ports, one signal output port, and M pairs of coupling lines connected between the multiple signal input ports and the signal output port, wherein the positive input port and the negative input port of at least one pair of signal input ports are connected to the positive coupling line and the negative coupling line of different pairs of coupling lines, wherein M is equal to the number of power amplification paths.

[0024] In a preferred embodiment, the multi-channel signal input terminals of the in-phase synthesizer are not isolated from each other.

[0025] In a preferred embodiment, an isolation module is provided between at least two signal input ends of the in-phase synthesizer.

[0026] In a preferred embodiment, the in-phase synthesizer includes multiple signal input ports, one signal output port, and M pairs of coupling lines connected between the multiple signal input ports and the signal output port, wherein the positive input port and the negative input port of each pair of signal input ports are connected to the positive coupling line and the negative coupling line of a corresponding pair of coupling lines, wherein M is equal to the number of power amplification paths.

[0027] In a preferred embodiment, an isolation module is provided between at least two signal input ports in the in-phase synthesizer.

[0028] In a preferred embodiment, the system further comprises:

[0029] The in-phase power divider is connected between the input port and the multiple power amplification paths, and is used to distribute the power of an input signal input from the input port and divide it into multiple in-phase signals for output.

[0030] In a preferred embodiment, each of the power amplification paths further includes an input impedance matching circuit unit located at a signal input side of the power amplification unit, and / or an output impedance matching circuit unit located at a signal output side of the power amplification unit.

[0031] The solution proposed in this application can get rid of the bandwidth limitation of 90° phase and realize power synthesis of signals output by multiple PAs at the same phase, thereby achieving narrowband, octave or even 10-octave working bandwidth and high back-off power efficiency.

[0032] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 is an architecture diagram of a power amplifier system based on in-phase power synthesis provided in Example 1 of the present application;

[0035] Figure 2 It is a schematic diagram of the change of the impedance of the power amplifier system based on in-phase power synthesis with the working state provided in the first embodiment of the present application;

[0036] Figure 3 It is a schematic diagram of simulation results of a power amplifier system based on in-phase power synthesis provided in Example 1 of the present application;

[0037] Figure 4 is a circuit diagram of an impedance conversion network provided in Example 1 of the present application;

[0038] Figure 5 is a circuit diagram of an in-phase synthesizer provided in Example 1 of the present application;

[0039] Figure 6 is another circuit diagram of the in-phase synthesizer provided in Example 1 of the present application;

[0040] Figure 7This is another architecture diagram of a power amplifier system based on in-phase power synthesis provided in the first embodiment of the present application;

[0041] Figure 8 is an architecture diagram of a power amplifier system based on in-phase power synthesis provided in Embodiment 2 of the present application;

[0042] Fig. 9 It is a schematic diagram of simulation results of a power amplifier system based on in-phase power synthesis provided in Example 2 of the present application;

[0043] Fig.10 is a circuit diagram of an in-phase synthesizer provided in Example 2 of the present application;

[0044] Fig.11 is an architecture diagram of a power amplifier system based on in-phase power synthesis provided in Embodiment 3 of the present application;

[0045] Fig.12 It is a schematic diagram of simulation results of a power amplifier system based on in-phase power synthesis provided in Example 3 of the present application;

[0046] Fig.13 is a circuit diagram of an in-phase synthesizer provided in Example 3 of the present application;

[0047] Fig.14 is an architecture diagram of a power amplifier system based on in-phase power synthesis provided in Embodiment 4 of the present application;

[0048] Fig.15 This is a circuit diagram of the in-phase synthesizer provided in Example 4 of the present application. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0050] As described in the background technology, the current Doherty scheme for dynamic load modulation requires a 90° phase relationship for synthesis. However, due to the inclusion of a 90° impedance conversion network in its architecture and the influence of the amplifier's own parasitic impedance, the bandwidth of this architecture is difficult to expand beyond an octave to a certain extent.

[0051] Based on this, the embodiment of the present application creatively proposes a new power amplifier based on in-phase power synthesis, which can get rid of the bandwidth limitation of 90° phase and realize power synthesis of signals output by multiple PAs at the same phase, thereby achieving narrowband, octave or even 10-octave working bandwidth and high back-off power efficiency.

[0052] The present application will be described in detail below through specific embodiments.

[0053] Embodiment 1

[0054] Figure 1 The architecture diagram of the power amplifier system based on in-phase power synthesis provided in the first embodiment of the present application is shown, which generally includes: an input port RFInput, an output port RFOutput, a plurality of power amplifier paths 100 and an in-phase synthesizer 200. The plurality of power amplifier paths 100 and the in-phase synthesizer 200 are sequentially connected between the input port RFInput and the output port RFOutput. Each power amplifier path 100 receives an input signal from the input port RFInput. It should be noted that in the embodiment of the present application, the input signals received by each power amplifier path 100 have the same phase. The plurality of power amplifier paths 100 amplify the input signals of the same phase received from the input port RFInput to obtain each amplified signal. The in-phase synthesizer 200 is connected between the plurality of power amplifier paths 100 and the output port RFOutput, and is used to perform power synthesis on the amplified signals output by each power amplifier path 100 at the same phase, and the synthesized output signals are transmitted to the output port RFOutput for output.

[0055] In some specific embodiments, the power amplification path 100 includes at least one main power amplification path 110 and at least one auxiliary power amplification path 120, that is, the power amplification path 100 uses two or more power amplifiers, and by performing phase compensation between different branches, the signals output by multiple power amplification paths can be power synthesized at the same phase.

[0056] In some specific embodiments, each of the power amplification paths 100 includes a power amplification unit and an impedance conversion network. The power amplification unit is used to amplify an input signal of the same phase received by the power amplification path from the input port RFInput; the impedance conversion network is connected to the power amplification unit and is used to perform load modulation on the power amplification unit of the power amplification path.

[0057] In the embodiments of the present application, the positional relationship between the impedance conversion network and the power amplifier unit is not specifically limited, and can be set according to actual needs during specific implementation. For example, in some specific embodiments, along the transmission direction of the signal, the impedance conversion network is set in front of the power amplifier unit, that is, the impedance conversion network is set between the input port RFInput and the power amplifier unit; in other specific embodiments, along the transmission direction of the signal, the impedance conversion network is set behind the power amplifier unit, that is, the impedance conversion network is set between the power amplifier unit and the output port RFOutput.

[0058] Further references Figure 1 As shown, in the embodiment of the present application, the power amplification path 100 includes a main power amplification path 110 and an auxiliary power amplification path 120. The main power amplification path 110 includes a main power amplification unit 130a and a first impedance conversion network 140a, and the auxiliary power amplification path 120 includes an auxiliary power amplification unit 130b and a second impedance conversion network 140b. The first impedance conversion network 140a is connected between the input port RFInput and the main power amplification path 110, and the second impedance conversion network 140b is connected between the auxiliary power amplification unit 130b and the output port RFOutput.

[0059] In some specific embodiments, the power amplifier unit of the main power amplifier path 110 is of a different type from the power amplifier unit of the auxiliary power amplifier path 120, that is, the main power amplifier unit 130a is of a different type from the auxiliary power amplifier unit 130b. The power amplifier unit of the main power amplifier path 110 remains in an on state at low input power, while the power amplifier unit of the auxiliary power amplifier path 120 is in an off state at low input power, and is driven by the input power to enter a class C or class B state at high input power, also called a Peaking PA.

[0060] The in-phase power synthesis of the power amplifier system provided in the implementation of the present application can be designed with structures such as in-phase (Wilkinson power divider, 180° transformer synthesis) or 90° (coupled line synthesis, 90° hybrid coupler synthesis, etc.) to design the power amplification unit.

[0061] In some specific embodiments, the impedance conversion network of the main power amplification path 110 and the impedance conversion network of the auxiliary power amplification path 120 can be the same or different, that is, the first impedance conversion network 140a and the second impedance conversion network 140b can be the same or different, which is not specifically limited here and can be set according to actual product requirements during specific implementation. As a preferred example, the main power amplification path 110 and the auxiliary power amplification path 120 use impedance conversion networks with the same phase offset, that is, the first impedance conversion network 140a and the second impedance conversion network 140b have the same phase offset, so as to ensure that the phases of the amplified signals output by the main power amplification path 110 and the auxiliary power amplification path 120 are consistent when the in-phase synthesizer 200 synthesizes power.

[0062] In some specific embodiments, the main power amplifier path 110 and the auxiliary power amplifier path 120 both amplify an input signal of the same phase received from their respective input ports RFInput, and when the auxiliary power amplifier path 120 is in a working state, the main power amplifier path 110 is load modulated to reduce the load impedance of the main power amplifier path 110.

[0063] In some specific embodiments, when the system output power is less than the first threshold, the main power amplification path 110 is in the working state, and the auxiliary power amplification path 120 is in the off state. Figure 2 In the state 1 shown, only the main power amplification unit 130a is turned on, and the auxiliary power amplification unit 130b is in the off state, which presents a low impedance state at the port of the in-phase combiner 200. When the system output power is not less than the first threshold, the auxiliary power amplification path 120 is in the working state. When the auxiliary power amplification path 120 is in the working state, it load modulates the main power amplification path 110 to reduce the load impedance of the main power amplification path 110 until the difference between the load impedance of the main power amplification path 110 and the load impedance of the auxiliary power amplification path 120 is less than the second threshold. Figure 2 In the states 2 and 3 shown, the main power amplifying unit 130a and the auxiliary power amplifying unit 130b are both turned on, but at the beginning, the output powers of the main power amplifying unit 130a and the auxiliary power amplifying unit 130b are different, and the output power of the auxiliary power amplifying unit 130b forms a load modulation effect on the main power amplifying unit 130a, until the main power amplifying unit 130a and the auxiliary power amplifying unit 130b maintain the same working state, and the difference between the load impedance of the main power amplifying path 110 and the load impedance of the auxiliary power amplifying path 120 is less than the second threshold value (including but not limited to the main power amplifying unit 130a and the auxiliary power amplifying unit 130b entering the saturation state and outputting the same power).

[0064] It should be noted that in the embodiment of the present application, the specific values ​​of the first threshold and the second threshold are not limited, and can be set according to actual product requirements without violating the inventive concept of the present application. For example, the first threshold can be 0 or any non-zero number.

[0065] In some specific embodiments, the initial load impedance of at least one main power amplification path is ZC, the number of auxiliary power amplification paths is N, and when the load impedance of at least one main power amplification path decreases and becomes equal to the load impedance of at least one auxiliary power amplification path, the load impedance of the at least one main power amplification path becomes ZC / (N+1).

[0066] Further references Figure 2 As shown, in the amplifier architecture, the main power amplifying unit 130a is in the on state and is supplied with working current to provide small signal amplification gain. The auxiliary power amplifying unit 130b is in the Class C state, and the working current is less than 1mA, which can be considered as the off state. Usually, the output of the auxiliary power amplifying unit 130b presents a high impedance, which can be converted into a low impedance at the port of the in-phase combiner 200 through a second impedance conversion network 140b. At this time, the load impedance of the main power amplifying unit 130a is close to 50ohm. In the case of low input power, for example, when the input power is less than 0dBm, the auxiliary power amplifying unit 130b is still in the Class C state, the overall gain of the architecture is 16dB, and the gain bandwidth covers 1GHz~3GHz, such as Figure 3 As shown. Continue to increase the input power, when the output power reaches the first threshold (such as 25dBm), the output power efficiency reaches 40%; at this time, the auxiliary power amplification unit 130b also starts to output RF power and participate in power synthesis; the load impedance of the main power amplification unit 130a begins to become less than 50ohm due to the load modulation effect of the auxiliary power amplification path. Continue to increase the input power, when the output power of the main power amplification unit 130a and the output power of the auxiliary power amplification unit 130b are close, the load impedance of the main power amplification unit 130a is close to 25ohm, and the load impedance of the auxiliary power amplification unit 130b is close to 25ohm. At this time, the load impedance of the system changes from the initial 50ohm to two 25ohms in parallel, that is, the impedance changes by 4 times, that is, 6dB. The impedance changes with the working state as shown in Figure 2 In this embodiment, the frequency is 1 GHz to 3 GHz, and the output power efficiency of 6 dB saturated power back-off is 45% to 70%.

[0067] From the above content, it can be seen that when the initial load impedance of the main power amplification path 110 is 50ohm and the number N of auxiliary power amplification paths is 1, when the load impedance of the main power amplification path is reduced to be equal to the load impedance of the auxiliary power amplification path, the load impedance of the main power amplification path becomes ZC / (N+1)=50 / (1+1)=25ohm, which is the same as the experimental results.

[0068] It is understandable that the initial load impedance of the main power amplification path 110 is set to the industry's standard impedance value (i.e., 50 ohms) so that the signal can be transmitted in the circuit with maximum power under this impedance matching. This means that during the signal transmission process, signal attenuation and reflection will be minimized, thereby ensuring the quality and stability of the signal.

[0069] In some specific embodiments, reference Figure 4 As shown, the impedance conversion network (including the first impedance conversion network 140a and the second impedance conversion network 140b) generally includes a first capacitor 141, a second capacitor 142, a first coupling line 143 and a second coupling line 144. The first end of the first capacitor 141 and the first end of the first coupling line 143 are connected to the first input port Port1 of the impedance conversion network, the first end of the second capacitor 142 and the first end of the second coupling line 144 are connected to the second input port Port2 of the impedance conversion network; the second end of the second capacitor 142 and the second end of the first coupling line 143 are connected to the first output port Port3 of the impedance conversion network, and the second end of the first capacitor 141 and the second end of the second coupling line 144 are connected to the second output port Port4 of the impedance conversion network.

[0070] It should be noted that in the embodiment of the present application, the impedance conversion network mainly performs load modulation and converts the power amplification unit from a high-impedance state to a low-impedance state. Therefore, the specific implementation of the impedance conversion network is not limited. In addition to the impedance conversion network of the above-mentioned structure, other forms of impedance conversion networks can also be used in the embodiment of the present application.

[0071] The in-phase synthesizer 200 can perform power synthesis of in-phase (or 180° anti-phase) signals. In some specific embodiments, the in-phase synthesizer includes a multi-channel signal input port, a signal output port, and M pairs of coupling lines connected between the multi-channel signal input port and the signal output port, wherein the positive input port and the negative input port of at least one pair of signal input ports are connected to the positive coupling line and the negative coupling line of different pairs of coupling lines, wherein M is equal to the number of power amplification paths.

[0072] In some specific implementations, the multiple signal input terminals of the in-phase synthesizer 200 are not isolated from each other.

[0073] In some specific implementations, an isolation module is provided between at least two signal input terminals of the in-phase synthesizer 200. To increase the degree of isolation, an isolation module (not shown) is further provided between the same-pole ports of different signal input ports. For example, an isolation module is provided between the positive ports of different signal input ports, and an isolation module is provided between the negative ports of different signal input ports. The isolation module may include an isolation resistor, or a parallel connection of an isolation resistor and a capacitor.

[0074] The following takes M=2 as an example to illustrate the in-phase synthesizer 200 provided in the embodiment of the present application.

[0075] The present application embodiment is a synthesizer using a differential structure, referring to Figure 5 As shown, the in-phase synthesizer 200 includes two signal input ports 2101 and 2102 , a signal output port 220 , and two pairs of coupled lines 2301 and 2302 . The two pairs of coupled lines 2301 and 2302 are connected between the two signal input ports 2101 and 2102 and the signal output port 220 .

[0076] The signal input port 2101 includes a positive input port 2101a and a negative input port 2101b, and the signal input port 2102 includes a positive input port 2102a and a negative input port 2102b. The positive input port 2101a is connected to the positive coupling line 2301a of the first pair of coupling lines 2301, and the negative input port 2101b is connected to the negative coupling line 2302b of the second pair of coupling lines 2302. The negative coupling line 2301b of the first pair of coupling lines 2301 is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, for example, in series. The positive input port 2102a is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, and the negative input port 2102b is connected to the negative coupling line 2301b of the first pair of coupling lines 2301.

[0077] The positive output port 220 a of the signal output port 220 is connected to the positive coupling line 2301 a of the first pair of coupling lines 2301 , and the negative output port 220 b is connected to the negative coupling line 2302 b of the second pair of coupling lines 2302 .

[0078] Reference Figure 6 As shown, Figure 5The difference is that, in the embodiment of the present application, the output port RFOutput is a single-ended output port, that is, the output signal of the output port RFOutput is a single-ended output signal. In specific implementation, an output balun 240 can be connected between the output port RFOutput and the signal output port 220 of the in-phase synthesizer 200. The output balun 240 plays a role in converting from a differential signal to a single-ended signal. It couples the signal output port 220 of the in-phase synthesizer 200 to the output port RFOutput, and converts the differential signal output by the in-phase synthesizer 200 into a single-ended signal. The output balun 240 can be a balun with an impedance ratio of 1:1.

[0079] In some specific embodiments, the system further includes a co-phase power divider 300, further referring to Figure 1 As shown, the in-phase power divider 300 is connected between the input port RFInput and the multiple power amplification paths 100, and is used to distribute the power of an input signal input from the input port RFInput, and divide it into multiple in-phase signals for output.

[0080] The in-phase power divider 300 receives an input signal from the input port RFInput, distributes the power thereof, and outputs multiple differential signals, for example, outputs 2 or more signals of the same phase, N≥2. Figure 1 In FIG. 3 , the in-phase power divider 300 has two output ports, which are marked as 3101 and 3102 respectively.

[0081] Each same-phase signal output by the in-phase power divider 300 is amplified by one branch of the multi-channel power amplification path 100 to obtain an amplified same-phase signal. Figure 1 In the embodiment, the power amplification path 100 includes a main power amplification path 110 and an auxiliary power amplification path 120 for amplifying each path of the same phase.

[0082] In practical applications, if the original input signal is a single-ended input signal and the in-phase power divider 300 is a power divider with a differential structure, an input balun (not shown) can be connected between the single-ended signal input port and the differential signal input port (not shown) of the in-phase power divider 300. The input balun (not shown) plays a role in converting from a single-ended signal to a differential signal, and couples the single-ended signal input port RFin to the differential signal input port of the in-phase power divider 300. The input balun (not shown) can be a balun with an impedance ratio of 1:1.

[0083] It should be noted that the circuit structures of the in-phase power divider 300 and the in-phase synthesizer 200 in the implementation of the present application can be mutually inverted, so it is only necessary to change Figure 5 and Figure 6The multiple signal input ports in the two types of in-phase synthesizers shown are used as the multiple signal output ports of the in-phase power divider 300, and the signal output port in the in-phase synthesizer 200 is used as the signal input port of the in-phase power divider 300, then the circuit structure of the entire in-phase synthesizer 200 can still be applied to the in-phase power divider 300.

[0084] In the entire power amplifier system based on in-phase power synthesis, the circuit structures of the differential power divider and the differential combiner can be selected to be different. For example, the in-phase power combiner 200 can be selected as follows: Figure 5 The differential power divider structure shown, the in-phase power divider 300 is selected as Figure 5 The reverse working mode (i.e., combiner working mode) of the differential power divider structure is shown.

[0085] Of course, in the entire power amplifier system, the circuit structures of the in-phase power divider 300 and the in-phase synthesizer 200 can be selected to be substantially the same. For example, the in-phase power divider 300 can be selected as follows: Figure 5 or Figure 6 In the reverse working mode (i.e., the power divider working mode) of the in-phase synthesizer structure shown, the in-phase synthesizer 200 selects Figure 5 or Figure 6 The in-phase synthesizer structure is shown.

[0086] In order to optimize the impedance matching in the power amplification path 100, in a preferred embodiment, at least one power amplification path 100 further includes an impedance matching circuit unit, wherein the impedance matching circuit unit is used to achieve impedance matching of the power amplification unit, and the impedance matching here may include input impedance matching at the signal input side of the power amplification unit, and output impedance matching at the signal output side of the power amplification unit, or one of the two. Therefore, the impedance matching circuit may include at least one or a combination of an input impedance matching circuit unit and an output impedance matching circuit unit.

[0087] Reference Figure 7As shown, in particular, each power amplification path 100 includes an impedance matching circuit unit, and the impedance matching circuit unit includes an input impedance matching circuit unit and an output impedance matching circuit unit. For example, the main power amplification path 110 includes an input impedance matching circuit unit 1501, a first impedance conversion network 140a, a main power amplification unit 130a, an input impedance matching circuit unit 1502 and an output impedance matching circuit unit 1601, which are sequentially connected between the in-phase power divider 300 and the in-phase power combiner 200, wherein the input impedance matching circuit unit 1501, 1502 and the output impedance matching circuit unit 1601 are respectively used to match the input impedance and output impedance of the main power amplification unit 130a. The auxiliary power amplification path 120 includes an input impedance matching circuit unit 1503, an auxiliary power amplification unit 130b, an output impedance matching circuit unit 1602 and a second impedance conversion network 140b, which are sequentially connected between the in-phase power divider 300 and the in-phase power combiner 200, wherein the input impedance matching circuit unit 1503 and the output impedance matching circuit unit 1602 are respectively used to match the input impedance and output impedance of the auxiliary power amplification unit 130b.

[0088] Embodiment 2

[0089] Figure 8 The architecture diagram of the power amplifier system based on in-phase power synthesis provided in the second embodiment of the present application is shown. The power amplifier system based on in-phase power synthesis generally includes: an input port RFInput, an output port RFOutput, a plurality of power amplifier paths 100 and an in-phase synthesizer 200. The plurality of power amplifier paths 100 and the in-phase synthesizer 200 are sequentially connected between the input port RFInput and the output port RFOutput. Each power amplifier path 100 receives an input signal from the input port RFInput. It should be noted that in the embodiment of the present application, the input signal received by each power amplifier path 100 has the same phase. The plurality of power amplifier paths 100 amplify the input signals of the same phase received from the input port RFInput to obtain each amplified signal. The in-phase synthesizer 200 is connected between the plurality of power amplifier paths 100 and the output port RFOutput, and is used to perform power synthesis on the amplified signals output by each power amplifier path 100 at the same phase, and the synthesized output signal is transmitted to the output port RFOutput for output.

[0090] The difference from the first embodiment is that, in the embodiment of the present application, the power amplification path 100 includes a main power amplification path 110 and two auxiliary power amplification paths 1201 and 1202, that is, the power amplification path 100 adopts a three-way power amplifier, and by performing phase compensation between different branches, the signals output by multiple power amplification paths can be power synthesized at the same phase.

[0091] Further references Figure 8 As shown, the main power amplification path 110 includes a main power amplification unit 130a and a first impedance conversion network 140a, the auxiliary power amplification path 1201 includes an auxiliary power amplification unit 130b1 and a second impedance conversion network 140b1, and the auxiliary power amplification path 1202 includes an auxiliary power amplification unit 130b2 and a second impedance conversion network 140b2. Among them, the main power amplification path 110 in the embodiment of the present application has the same structure as the main power amplification path in the first embodiment, and the two auxiliary power amplification paths 1201 and 1202 have the same structure as the auxiliary power amplification paths in the first embodiment. The relevant contents can be referred to as shown in the previous text, and will not be repeated here one by one.

[0092] In some specific embodiments, the power amplification unit of the main power amplification path 110 is of a different type from the power amplification units of the auxiliary power amplification paths 1201 and 1202 , and the power amplification units of the auxiliary power amplification paths 1201 and 1202 are of the same type.

[0093] In some specific embodiments, the impedance conversion network of the main power amplification path 110, the impedance conversion network of the auxiliary power amplification path 1201, and the impedance conversion network of the auxiliary power amplification path 1202 can be the same or different, which is not specifically limited here, and can be set according to actual product requirements during specific implementation. As a preferred example, the main power amplification path 110 and the auxiliary power amplification paths 1201 and 1202 use the same phase-shifted impedance conversion network, so that the phases of the amplified signals output by the main power amplification path 110 and the auxiliary power amplification paths 1201 and 1202 are guaranteed to be consistent when the in-phase synthesizer 200 synthesizes the power.

[0094] In some specific embodiments, the main power amplification path 110 and the auxiliary power amplification paths 1201 and 1202 amplify an input signal of the same phase received from their respective input ports RFInput, and when the auxiliary power amplification paths 1201 and 1202 are in working state, the main power amplification path 110 is load modulated to reduce the load impedance of the main power amplification path 110.

[0095] In some specific embodiments, when the system output power is less than the first threshold, the main power amplification path 110 is in working state, and the auxiliary power amplification paths 1201 and 1202 are in off state. At this time, only the main power amplification unit 130a is turned on, and the auxiliary power amplification units 130b1 and 130b2 are in off state, which present a low impedance state at the port of the in-phase combiner 200. When the system output power is not less than the first threshold, the auxiliary power amplification paths 1201 and 1202 are in working state. When the auxiliary power amplification paths 1201 and 1202 are in working state, they load modulate the main power amplification path 110 to reduce the load impedance of the main power amplification path 110 until the difference between the load impedance of the main power amplification path 110 and the load impedance of the auxiliary power amplification paths 1201 and 1202 is less than the second threshold. The main power amplifying unit 130a and the auxiliary power amplifying units 130b1 and 130b2 are all turned on, but at the beginning, the output powers of the main power amplifying unit 130a and the auxiliary power amplifying units 130b1 and 130b2 are different, and the output powers of the auxiliary power amplifying units 130b1 and 130b2 form a load modulation effect on the main power amplifying unit 130a until the main power amplifying unit 130a and the auxiliary power amplifying units 130b1 and 130b2 maintain the same working state, and the difference between the load impedance of the main power amplifying path 110 and the load impedance of the auxiliary power amplifying paths 1201 and 1202 is less than a second threshold value (including but not limited to the main power amplifying unit 130a and the auxiliary power amplifying units 130b1 and 130b2 entering a saturated state and outputting the same power).

[0096] The main power amplifier unit 130a in the amplifier architecture is in the on state and is supplied with working current to provide small signal amplification gain. The auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 are both in the class C state, with working current less than 1mA, and can be considered to be in the off state. At this time, the outputs of the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 present high impedance, which are converted into low impedance at the power combiner port through the second impedance conversion network 140b1 and the second impedance conversion network 140b2 respectively. At this time, the load impedance of the main power amplifier unit 130a is close to 50ohm. When the input power is small, when the input power is less than 0dBm, the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 are still in the Class C state, the overall gain of the architecture is 16dB, and the gain bandwidth covers 1GHz~3GHz, such as Fig. 9As shown. Continue to increase the input power. When the output power reaches the first threshold (such as 25dBm), the output power efficiency of all frequency points in the frequency band reaches 35%; at this time, the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 also start to output RF power and participate in power synthesis; the load impedance of the main power amplifier unit 130a becomes less than 50ohm due to the load modulation effect of the auxiliary power amplifier path. Continue to increase the input power. When the output power of the main power amplifier unit 130a and the output power of the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 are close, the load impedance of the main power amplifier unit 130a is close to 17ohm, and the load impedance of the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 are both close to 17ohm; at this time, the load impedance of the system changes from the initial 50ohm to three 17ohm parallel synthesis, that is, the impedance changes by 9 times, that is, 9dB. In this embodiment, the frequency is 1 GHz to 3 GHz, and the output power efficiency of 9 dB saturated power back-off is 45% to 70%.

[0097] From the above content, it can be seen that when the initial load impedance of the main power amplification path 110 is 50ohm and the number of auxiliary power amplification paths N is 2, when the load impedance of the main power amplification path is reduced to be equal to the load impedance of the auxiliary power amplification path, the load impedance of the main power amplification path becomes ZC / (N+1)=50 / (2+1)=17ohm, which is the same as the experimental results.

[0098] In addition, refer to Fig.10 As shown, the structure of the in-phase synthesizer 200 in the embodiment of the present application is also different from that in the first embodiment. Fig.10 As shown, in the embodiment of the present application, the in-phase synthesizer 200 includes three signal input ports 2101, 2102, 2103, one signal output port 220, and three pairs of coupled lines 2301, 2302 and 2303. The three pairs of coupled lines 2301, 2302 and 2303 are connected between the three signal input ports 2101, 2102, 2103 and the signal output port 220.

[0099] The signal input port 2101 includes a positive input port 2101a and a negative input port 2101b, the signal input port 2102 includes a positive input port 2102a and a negative input port 2102b, and the signal input port 2103 includes a positive input port 2103a and a negative input port 2103b. The positive input port 2101a is connected to the positive coupling line 2301a of the first pair of coupling lines 2301, and the negative input port 2101b is connected to the negative coupling line 2302b of the second pair of coupling lines 2302. The positive input port 2102a is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, and the negative input port 2102b is connected to the negative coupling line 2303b of the third pair of coupling lines 2303. The positive input port 2103a is connected to the positive coupling line 2303a of the third pair of coupling lines 2303, and the negative input port 2103b is connected to the negative coupling line 2301b of the first pair of coupling lines 2301. The positive coupling line 2301a of the first pair of coupling lines 2301 is connected to the negative coupling line 2303b of the third pair of coupling lines 2303, the negative coupling line 2301b of the first pair of coupling lines 2301 is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, and the negative coupling line 2302b of the second pair of coupling lines 2301 is connected to the positive coupling line 2303a of the second pair of coupling lines 2303, for example, in series.

[0100] The positive output port 220 a of the signal output port 220 is connected to the positive coupling line 2301 of the first pair of coupling lines 2301 , and the negative output port 220 b is connected to the negative coupling line 2302 b of the third pair of coupling lines 2303 .

[0101] Embodiment 3

[0102] Fig.11The architecture diagram of the power amplifier system based on in-phase power synthesis provided in the third embodiment of the present application is shown. The power amplifier system based on in-phase power synthesis generally includes: an input port RFInput, an output port RFOutput, a plurality of power amplifier paths 100 and an in-phase synthesizer 200. The plurality of power amplifier paths 100 and the in-phase synthesizer 200 are sequentially connected between the input port RFInput and the output port RFOutput. Each power amplifier path 100 receives an input signal from the input port RFInput. It should be noted that, in the embodiment of the present application, the input signal received by each power amplifier path 100 has the same phase. The plurality of power amplifier paths 100 amplify the input signals of the same phase received from the input port RFInput to obtain each amplified signal. The in-phase synthesizer 200 is connected between the plurality of power amplifier paths 100 and the output port RFOutput, and is used to perform power synthesis on the amplified signals output by each power amplifier path 100 at the same phase, and the synthesized output signal is transmitted to the output port RFOutput for output.

[0103] The difference from the second embodiment is that, in the embodiment of the present application, the power amplification path 100 includes a main power amplification path 110 and three auxiliary power amplification paths 1201, 1202 and 1203, that is, the power amplification path 100 adopts a four-way power amplifier, and by performing phase compensation between different branches, the signals output by multiple power amplification paths can be power synthesized at the same phase.

[0104] Further references Fig.11 As shown, the main power amplification path 110 in the embodiment of the present application has the same structure as the main power amplification path in Example 1, and the three auxiliary power amplification paths 1201, 1202, and 1203 have the same structure as the auxiliary power amplification paths in Example 2. The relevant contents can be referred to as shown in the previous text and will not be repeated here one by one.

[0105] In some specific embodiments, the power amplification unit of the main power amplification path 110 is of different types from the power amplification units of the auxiliary power amplification paths 1201 , 1202 , and 1203 , and the power amplification units of the auxiliary power amplification paths 1201 , 1202 , and 1203 are of the same type.

[0106] In some specific embodiments, the impedance conversion network of the main power amplification path 110, the impedance conversion network of the auxiliary power amplification path 1201, the impedance conversion network of the auxiliary power amplification path 1202, and the impedance conversion network of the auxiliary power amplification path 1203 can be the same or different, which is not specifically limited here, and can be set according to actual product requirements during specific implementation. As a preferred example, the main power amplification path 110 and the auxiliary power amplification paths 1201, 1202, and 1203 use the same phase-shifted impedance conversion network, so that the phases of the amplified signals output by the main power amplification path 110 and the auxiliary power amplification paths 1201, 1202, and 1203 are guaranteed to be consistent when the in-phase synthesizer 200 synthesizes power.

[0107] In some specific embodiments, the main power amplification path 110 and the auxiliary power amplification paths 1201, 1202, 1203 all amplify an input signal of the same phase received from their respective input ports RFInput, and when the auxiliary power amplification paths 1201, 1202, 1203 are in working state, the main power amplification path 110 is load modulated to reduce the load impedance of the main power amplification path 110.

[0108] In some specific embodiments, when the system output power is less than the first threshold, the main power amplification path 110 is in working state, and the auxiliary power amplification paths 1201, 1202, and 1203 are in off state. At this time, only the main power amplification unit 130a is turned on, and the auxiliary power amplification units 130b1, 130b2, and 130b3 are in off state, and they present a low impedance state at the port of the in-phase combiner 200. When the system output power is not less than the first threshold, the auxiliary power amplification paths 1201, 1202, and 1203 are in working state. When the auxiliary power amplification paths 1201, 1202, and 1203 are in working state, they load modulate the main power amplification path 110 to reduce the load impedance of the main power amplification path 110 until the difference between the load impedance of the main power amplification path 110 and the load impedance of the auxiliary power amplification paths 1201, 1202, and 1203 is less than the second threshold. The main power amplifying unit 130a and the auxiliary power amplifying units 130b1, 130b2, 130b3 are all turned on, but at the beginning, the output powers of the main power amplifying unit 130a and the auxiliary power amplifying units 130b1, 130b2, 130b3 are different, and the output powers of the auxiliary power amplifying units 130b1, 130b2, 130b3 form a load modulation effect on the main power amplifying unit 130a, until the main power amplifying unit 130a and the auxiliary power amplifying units 130b1, 130b2, 130b3 maintain the same working state, and the difference between the load impedance of the main power amplifying path 110 and the load impedance of the auxiliary power amplifying paths 1201, 1202, 1203 is less than a second threshold value (including but not limited to the main power amplifying unit 130a and the auxiliary power amplifying units 130b1, 130b2, 130b3 entering a saturated state and outputting the same power).

[0109] The main power amplifier unit 130a in the amplifier architecture is in the on state, and is supplied with working current to provide small signal amplification gain. The auxiliary power amplifier unit 130b1, the auxiliary power amplifier unit 130b2, and the auxiliary power amplifier unit 130b3 are all in the class C state, and the working current is less than 1mA, and they can all be considered to be in the off state. At this time, the outputs of the auxiliary power amplifier unit 130b1, the auxiliary power amplifier unit 130b2, and the auxiliary power amplifier unit 130b3 present high impedance, which is converted into low impedance at the power combiner port through the second impedance conversion network 140b1, the second impedance conversion network 140b2, and the second impedance conversion network 140b3 respectively. At this time, the load impedance of the main power amplifier unit 130a is close to 50ohm. When the input power is small, that is, the input power is less than 0 dBm, the auxiliary power amplification unit 130b1, the auxiliary power amplification unit 130b2, and the auxiliary power amplification unit 130b3 are still in the Class C state, the overall gain of the architecture is 16 dB, and the gain bandwidth covers 1 GHz to 3 GHz. Fig.12 As shown. Continue to increase the input power. When the output power reaches the first threshold (such as 25dBm), the output power efficiency of all frequency points in the frequency band reaches 35%; at this time, the auxiliary power amplifier unit 130b1, the auxiliary power amplifier unit 130b2 and the auxiliary power amplifier unit 130b3 also start to output RF power and participate in power synthesis; the load impedance of the main power amplifier unit 130a becomes less than 50ohm due to the load modulation effect of the auxiliary power amplifier path. Continue to increase the input power. When the output power of the main power amplifier unit 130a is close to the output power of the auxiliary power amplifier unit 130b1, the auxiliary power amplifier unit 130b2 and the auxiliary power amplifier unit 130b3, the load impedance of the main power amplifier unit 130a is close to 12.5ohm, and the load impedance of the auxiliary power amplifier unit 130b1 and the auxiliary power amplifier unit 130b2 are both close to 12.5ohm; at this time, the load impedance of the system changes from the initial 50ohm to four 12.5ohm parallel synthesis, that is, the impedance changes by 16 times, that is, 12dB. In this embodiment, the frequency is 1 GHz to 3 GHz, and the output power efficiency of 12 dB saturated power back-off is 35% to 75%. Fig.12 The efficiency at each power point at 3 GHz is lower than that of the other two curves because the parasitic capacitance of the amplifier die causes the amplifier output impedance to no longer be in a high impedance state at 3 GHz.

[0110] From the above content, it can be seen that when the initial load impedance of the main power amplification path 110 is 50ohm and the number of auxiliary power amplification paths is 3, when the load impedance of the main power amplification path is reduced to be equal to the load impedance of the auxiliary power amplification path, the load impedance of the main power amplification path becomes ZC / (N+1)=50 / (3+1)=12.5ohm, which is the same as the experimental results.

[0111] In addition, refer to Fig.13 As shown, the structure of the in-phase synthesizer 200 in the embodiment of the present application is also different from that in the first embodiment. Fig.13 As shown, in the embodiment of the present application, the in-phase synthesizer 200 includes four signal input ports 2101, 2102, 2103, and 2104, one signal output port 220, and four pairs of coupled lines 2301, 2302, 2303, and 2304. The four pairs of coupled lines 2301, 2302, 2303, and 2304 are connected between the four signal input ports 2101, 2102, 2103, and 2104 and the signal output port 220.

[0112] The signal input port 2101 includes a positive input port 2101a and a negative input port 2101b, the signal input port 2102 includes a positive input port 2102a and a negative input port 2102b, the signal input port 2103 includes a positive input port 2103a and a negative input port 2103b, and the signal input port 2104 includes a positive input port 2104a and a negative input port 2104b.

[0113] The positive input port 2101a is connected to the positive coupling line 2301a of the first pair of coupling lines 2301, and the negative input port 2101b is connected to the negative coupling line 2303b of the third pair of coupling lines 2303. The positive input port 2102a is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, and the negative input port 2102b is connected to the negative coupling line 2301b of the first pair of coupling lines 2301. The positive input port 2103a is connected to the positive coupling line 2303a of the third pair of coupling lines 2303, and the negative input port 2103b is connected to the negative coupling line 2302b of the second pair of coupling lines 2302. The positive input port 2104a is connected to the positive coupling line 2304a of the fourth pair of coupling lines 2304, and the negative input port 2104b is connected to the negative coupling line 2304b of the third pair of coupling lines 2304. The positive coupling line 2301a of the first pair of coupling lines 2301 is connected to the negative coupling line 2304b of the fourth pair of coupling lines 2304, the negative coupling line 2301b of the first pair of coupling lines 2301 is connected to the positive coupling line 2302a of the second pair of coupling lines 2302, the negative coupling line 2302b of the second pair of coupling lines 2302 is connected to the positive coupling line 2303a of the third pair of coupling lines 2303, and the negative coupling line 2303b of the third pair of coupling lines 2303 is connected to the positive coupling line 2304a of the fourth pair of coupling lines 2304, for example, in series.

[0114] The positive output port 220 a of the signal output port 220 is connected to the positive coupling line 2301 of the first pair of coupling lines 2301 , and the negative output port 220 b is connected to the negative coupling line 2302 b of the fourth pair of coupling lines 2303 .

[0115] Embodiment 4

[0116] Fig.14The architecture diagram of the power amplifier system based on in-phase power synthesis provided in the fourth embodiment of the present application is shown. The power amplifier system based on in-phase power synthesis generally includes: an input port RFInput, an output port RFOutput, a plurality of power amplifier paths 100 and an in-phase synthesizer 200. The plurality of power amplifier paths 100 and the in-phase synthesizer 200 are sequentially connected between the input port RFInput and the output port RFOutput. Each power amplifier path 100 receives an input signal from the input port RFInput. It should be noted that in the embodiment of the present application, the input signals received by each power amplifier path 100 have the same phase. The plurality of power amplifier paths 100 amplify the input signals of the same phase received from the input port RFInput to obtain each amplified signal. The in-phase synthesizer 200 is connected between the plurality of power amplifier paths 100 and the output port RFOutput, and is used to perform power synthesis on the amplified signals output by each power amplifier path 100 at the same phase, and the synthesized output signals are transmitted to the output port RFOutput for output.

[0117] The difference from the first embodiment is that in the embodiment of the present application, the power amplifier path 100 includes a main power amplifier path 110 and N auxiliary power amplifier paths 1201-120N, that is, the power amplifier path 100 uses N+1 power amplifiers, and by performing phase compensation between different branches, the signals output by multiple power amplifier paths can be power synthesized at the same phase.

[0118] Further references Fig.14 As shown, the main power amplification path 110 in the embodiment of the present application has the same structure as the main power amplification path in the first embodiment, and the N auxiliary power amplification paths 1201-120N have the same structure as the auxiliary power amplification paths in the first embodiment. The relevant contents can be referred to as shown in the previous text and will not be repeated here.

[0119] In some specific embodiments, the power amplification units of the main power amplification path 110 and the power amplification units of the auxiliary power amplification paths 1201 - 120N are of different types, and the power amplification units of the auxiliary power amplification paths 1201 - 120N are of the same type.

[0120] In some specific embodiments, the impedance conversion network of the main power amplification path 110 and the impedance conversion network of the auxiliary power amplification paths 1201-120N can be the same or different, which is not specifically limited here and can be set according to actual product requirements during specific implementation. As a preferred example, the main power amplification path 110 and the auxiliary power amplification paths 1201-120N use the same phase-shifted impedance conversion network, so that the phases of the amplified signals output by the main power amplification path 110 and the auxiliary power amplification paths 1201-120N are guaranteed to be consistent when the in-phase synthesizer 200 synthesizes the power.

[0121] In some specific embodiments, the main power amplification path 110 and the auxiliary power amplification paths 1201-120N both amplify an input signal of the same phase received from their respective input ports RFInput, and when the auxiliary power amplification paths 1201-120N are in working state, the main power amplification path 110 is load modulated to reduce the load impedance of the main power amplification path 110.

[0122] In some specific embodiments, when the system output power is less than the first threshold, the main power amplification path 110 is in working state, and the auxiliary power amplification paths 1201-120N are in off state. At this time, only the main power amplification unit 130a is turned on, and the auxiliary power amplification units 130b1-130bN are in off state, and they present a low impedance state at the port of the in-phase combiner 200. When the system output power is not less than the first threshold, the auxiliary power amplification paths 1201-120N are in working state. When the auxiliary power amplification paths 1201-120N are in working state, they load modulate the main power amplification path 110 to reduce the load impedance of the main power amplification path 110 until the difference between the load impedance of the main power amplification path 110 and the load impedance of the auxiliary power amplification paths 1201-120N is less than the second threshold. The main power amplifying unit 130a and the auxiliary power amplifying units 130b1-130bN are both turned on, but at the beginning, the output powers of the main power amplifying unit 130a and the auxiliary power amplifying units 130b1-130bN are different, and the output powers of the auxiliary power amplifying units 130b1-130bN form a load modulation effect on the main power amplifying unit 130a until the main power amplifying unit 130a and the auxiliary power amplifying units 130b1-130bN maintain the same working state, and the difference between the load impedance of the main power amplifying path 110 and the load impedance of the auxiliary power amplifying path 1201-120N is less than a second threshold value (including but not limited to the main power amplifying unit 130a and the auxiliary power amplifying units 130b1-130bN entering a saturated state and outputting the same power).

[0123] The main power amplifier unit 130a in the amplifier architecture is in the on state, and is supplied with working current to provide small signal amplification gain. The auxiliary power amplifier units 130b1-130bN are all in the class C state, and the working current is less than 1mA, and they can all be considered to be in the off state. At this time, the output of the auxiliary power amplifier units 130b1-130bN presents high impedance, which is converted to low impedance at the power synthesizer port through the second impedance conversion network 140b1-140bN. At this time, the load impedance of the main power amplifier unit 130a is close to 50ohm. When the input power is small, when the input power is less than 0dBm, the auxiliary power amplifier units 130b1-130bN are still in the Class C state. Continue to increase the input power, at this time the auxiliary power amplifier units 130b1-130bN also start to output RF power and participate in power synthesis; the load impedance of the main power amplifier unit 130a becomes less than 50ohm due to the load modulation effect of the auxiliary power amplifier path. Continue to increase the input power. When the output power of the main power amplifying unit 130a and the output power of the auxiliary power amplifying units 130b1-130bN are close, the load impedance of the main power amplifying unit 130a is close to 50 / (N+1)ohm, and the load impedance of the auxiliary power amplifying units 130b1-130bN is close to 50 / (N+1)ohm. At this time, the load impedance shown by the system changes from the original 50ohm to (N+1) 50 / (N+1)ohm in parallel.

[0124] In addition, refer to Fig.15 As shown, the structure of the in-phase synthesizer 200 in the embodiment of the present application is also different from that in the first embodiment. Fig.15 As shown, in an embodiment of the present application, the in-phase synthesizer 200 includes (N+1) signal input ports 2101-210 (N+1), a signal output port 220, and (N+1) pairs of coupling lines 2301-230 (N+1). The (N+1) pairs of coupling lines 2301-230 (N+1) are connected between the (N+1) signal input ports 2101-210 (N+1) and the signal output port 220. Each pair of coupling lines includes a positive coupling line and a negative coupling line. For example, the positive coupling line and the negative coupling line of the i-th pair of coupling lines are marked as 230ia and 230ib, respectively, where 1≤i≤N+1. And the positive input port and the negative input port of each signal input port are connected to the positive coupling line and the negative coupling line of the corresponding pair of differential coupling lines.

[0125] The signal input port 210i includes a positive input port 210ia and a negative input port 210ib. The positive input port 210ia is connected to the positive coupling line 230ia of the i-th pair of differential coupling lines 230i, and the negative input port 210ib is connected to the negative coupling line 230(i+1)b of the i+1-th pair of differential coupling lines 230(i+1). The negative coupling line 230ib of the i-th pair of coupling lines 230i is connected to the positive coupling line 230(i+1)a of the i+1-th pair of coupling lines 230(i+1), for example, in series. Where 1≤i≤(N+1).

[0126] The positive output port 220 a and the negative output port 220 b of the signal output port 220 are connected to the positive coupling line 2301 a of the first pair of coupling lines 2301 and the (N+1)th pair of negative coupling lines 230 (N+1) b, respectively.

[0127] In order to increase the degree of isolation, in the embodiment of the present application, an isolation module may be further provided between the same-pole ports of different signal input ports, for example, an isolation module may be provided between the positive ports of different signal input ports, and an isolation module may be provided between the negative ports of different signal input ports. The isolation module may include an isolation resistor, or an isolation resistor and a capacitor in parallel.

[0128] Further references Fig.15 As shown, in order to increase the isolation, an isolation resistor R12b is provided between the positive input port 2101a of the signal input port 2101 and the positive input port 2102a of the signal input port 2102, and an isolation resistor R12a is provided between the negative input port 2101b of the signal input port 2101 and the negative output port 2102b of the signal input port 2102. Similarly, an isolation resistor RN(N+1)a is provided between the positive input port 210Na of the signal input port 210N and the positive input port 210(N+1)a of the signal input port 210(N+1), and an isolation resistor RN(N+1)b is provided between the negative input port 210Nb of the signal input port 210N and the negative output port 210(N+1)b of the signal input port 210(N+1).

[0129] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can refer to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without creative work.

[0130] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0131] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0132] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A power amplifier system based on in-phase power synthesis, characterized in that: The system includes an input port, an output port, and: A plurality of power amplification paths, all connected to the input port, including at least one main power amplification path and at least one auxiliary power amplification path, for amplifying one input signal of the same phase received from the input port, wherein when the at least one auxiliary power amplification path is in a working state, load modulation is performed on the main power amplification path to reduce the load impedance of the main power amplification path; an in-phase synthesizer connected between the plurality of power amplification paths and the output port, and configured to perform power synthesis on the same phase of the amplified signals output by each power amplification path, obtain a synthesized output signal and transmit it to the output port for output, and the load impedance of the auxiliary power amplification path gradually increases from 0 to a value where the difference between the load impedance of the auxiliary power amplification path and the load impedance of the main power amplification path is less than a second threshold; Each of the power amplification paths comprises: A power amplification unit, used for amplifying an input signal of the same phase received by the power amplification path from the input port; The impedance conversion network is connected to the power amplification unit and is used to perform load modulation on the power amplification unit in the power amplification path where the impedance conversion network is located.

2. The power amplifier system based on in-phase power synthesis as claimed in claim 1, characterized in that: The main power amplification path and the auxiliary power amplification path use different types of power amplification units.

3. The power amplifier system based on in-phase power synthesis as claimed in claim 1, characterized in that: When the system output power is less than a first threshold, the at least one main power amplification path is in an operating state, and the at least one auxiliary power amplification path is in an off state.

4. The power amplifier system based on in-phase power synthesis as claimed in claim 3, characterized in that: When the system output power is not less than the first threshold, the at least one auxiliary power amplification path is in an operating state.

5. The power amplifier system based on in-phase power synthesis as claimed in claim 4, characterized in that: When the at least one auxiliary power amplification path is in the working state, load modulation is performed on the main power amplification path to reduce the load impedance of the main power amplification path, which includes: When the at least one auxiliary power amplification path is in a working state, it performs load modulation on the at least one main power amplification path to reduce the load impedance of the main power amplification path until the difference between the load impedance of the at least one main power amplification path and the load impedance of the at least one auxiliary power amplification path is less than a second threshold.

6. The power amplifier system based on in-phase power synthesis as claimed in claim 5, characterized in that: The initial load impedance of the at least one main power amplification path is ZC, the number of the auxiliary power amplification paths is N, and when the load impedance of the at least one main power amplification path is reduced to be equal to the load impedance of the at least one auxiliary power amplification path, the load impedance of the at least one main power amplification path becomes ZC / (N+1).

7. The power amplifier system based on in-phase power synthesis as claimed in claim 1, characterized in that: The impedance conversion network includes a first capacitor, a second capacitor, a first coupling line and a second coupling line; The first end of the first capacitor and the first end of the first coupling line are connected to the first input port of the impedance conversion network, and the first end of the second capacitor and the first end of the second coupling line are connected to the second input port of the impedance conversion network; The second end of the second capacitor and the second end of the first coupling line are connected to the first output port of the impedance conversion network, and the second end of the first capacitor and the second end of the second coupling line are connected to the second output port of the impedance conversion network.

8. The power amplifier system based on in-phase power synthesis according to any one of claims 1 to 7, characterized in that: The in-phase synthesizer includes multiple signal input ports, one signal output port, and M pairs of coupling lines connected between the multiple signal input ports and the signal output port, wherein the positive input port and the negative input port of at least one pair of signal input ports are connected to the positive coupling line and the negative coupling line of different pairs of coupling lines, wherein M is equal to the number of power amplification paths.

9. The power amplifier system based on in-phase power synthesis as claimed in claim 8, characterized in that: The multi-channel signal input terminals of the in-phase synthesizer are not isolated from each other.

10. The power amplifier system based on in-phase power synthesis as claimed in claim 8, characterized in that: An isolation module is arranged between at least two signal input ends of the in-phase synthesizer.

11. The power amplifier system based on in-phase power synthesis according to any one of claims 1 to 7, characterized in that: The in-phase synthesizer includes multiple signal input ports, one signal output port, and M pairs of coupling lines connected between the multiple signal input ports and the signal output port, wherein the positive input port and the negative input port of each pair of signal input ports are connected to the positive coupling line and the negative coupling line of a corresponding pair of coupling lines, wherein M is equal to the number of power amplification paths.

12. The power amplifier system based on in-phase power synthesis as claimed in claim 11, characterized in that: An isolation module is arranged between at least two signal input ports in the in-phase synthesizer.

13. The power amplifier system based on in-phase power synthesis according to any one of claims 1 to 7, characterized in that: The system further comprises: The in-phase power divider is connected between the input port and the multiple power amplification paths, and is used to distribute the power of an input signal input from the input port and divide it into multiple in-phase signals for output.

14. The power amplifier system based on in-phase power synthesis according to any one of claims 1 to 7, characterized in that: Each of the power amplification paths further includes an input impedance matching circuit unit located at a signal input side of the power amplification unit, and / or an output impedance matching circuit unit located at a signal output side of the power amplification unit.

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