Timing method and system of communication baseband software simulator
By introducing algorithm accelerator simulation module and time slice management into the communication baseband software simulator, the poor simulation results and timing errors caused by hardware accelerators are solved in the prior art, and a more accurate communication baseband software simulation and tasks are achieved. Align.
Patent Information
- Application Number
- CN202411043775.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-01-29
- Filing Date
- 2024-07-31
- Publication Date
- 2024-12-24
AI Technical Summary
The existing communication baseband software simulation solution does not consider hardware accelerator, resulting in poor simulation results and timing errors.
Design a timing method for communication baseband software simulator. Through interconnected communication software simulation modules and algorithm accelerator simulation modules, time slices are generated periodically, and whether the module completes simulation tasks, discards unfinished time slices, and completes the task. The slot is switched to realize the simulation of the accelerator and the joint simulation of the software.
Improve the simulation effect, avoid the problems of timing offset and timing out-synchronization between multiple modules, and ensure consistent task alignment and performance.
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Figure CN119182480A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of software simulation, and in particular to a timing method and system for a communication baseband software simulator. Background Art
[0002] Modern communication baseband chips generally adopt the architecture of general-purpose processor + dedicated accelerator, in which the general-purpose processor (such as ARM / DSP, etc.) runs the communication software, performs complex protocol processing and multi-task scheduling, and drives various accelerator modules to perform data operations; the dedicated accelerator is a series of ASIC modules that execute specific signal / data processing algorithms. In order to achieve better development efficiency, a series of simulation programs are usually used to simulate the communication-related software calculation process.
[0003] For example, Chinese patent CN202210734464.X discloses a device for software simulation of 5G mobile network environment, including: a device bridging module, used to obtain the connection serial port between the business software and the server, and bridge the target test device based on the connection serial port; a data testing module, used to test the 5G communication network parameters between the business software and the server based on the target test device; an evaluation module, used to evaluate the robust performance of the business software based on the 5G communication network parameters, and complete the simulation of the business software in the 5G mobile network. By bridging the target test device between the business software and the server, efficient and accurate simulation of the network parameters in the 5G mobile network environment is achieved, which facilitates accurate evaluation of the robust performance of the business software in different situations, greatly shortens the detection time, improves the detection efficiency, and saves a lot of manpower and material resources.
[0004] However, during the actual implementation process, the inventors found that this type of simulation solution usually only focuses on the simulation of the software and system parts, and does not take into account that the running process of the software in the actual machine environment may be related to the hardware accelerator, resulting in poor simulation effect; at the same time, since baseband software usually uses slots as separation points during operation, and the performance of the simulator itself is somewhat different from that of the actual machine, it is easy to cause timing errors during simulation. Summary of the invention
[0005] In view of the above problems existing in the prior art, a timing method and system for a communication baseband software simulator are now provided.
[0006] The specific technical solutions are as follows:
[0007] A timing method for a communication baseband software simulator, the communication baseband software simulator comprising a communication software simulation module and an algorithm accelerator simulation module connected to each other, when the communication software simulation module simulates a communication program, the communication software simulation module also calls the algorithm accelerator simulation module to perform simulation calculation on the communication program;
[0008] The timing method comprises:
[0009] Step S1: When the communication software simulation module starts to simulate the communication program, a time slice corresponding to the communication program is periodically generated;
[0010] Step S2: when the time slice is received, determining whether the communication software simulation module and the algorithm accelerator simulation module have both completed the simulation task;
[0011] If yes, go to step S3;
[0012] If not, discard the current time slice, and then return to step S1 to receive the next time slice;
[0013] Step S3: When all the simulation tasks are completed, switch to the next slot, then return to step S1 and configure new simulation tasks.
[0014] On the other hand, after executing step S1, the method further includes:
[0015] Step A11: the communication software simulation module sends the task to be calculated and the time slice to the algorithm accelerator simulation module;
[0016] Step A12: the algorithm accelerator simulation module calculates the task to be calculated and generates timing using the time slice;
[0017] Step A13: After completing the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal;
[0018] In the step S2, the accelerator task completion signal is used to determine whether the algorithm accelerator simulation module has completed the simulation task.
[0019] On the other hand, the step S1 comprises:
[0020] Step S11: after confirming that the communication software simulation module has received the communication program and started simulation, a periodic timer is established for the current simulation task;
[0021] Step S12: using the periodic timer to generate the time slice;
[0022] Step S13: The communication software simulation module performs simulation based on the time slice.
[0023] On the other hand, the step S2 comprises:
[0024] Step S21: when receiving the time slice, determining whether the communication software simulation module has completed the current simulation task;
[0025] If yes, go to step S22;
[0026] If not, go to step S23;
[0027] Step S22: determining whether the algorithm accelerator simulation module has completed the current simulation task;
[0028] If yes, go to step S3;
[0029] If not, go to step S23;
[0030] Step S23: Abandon the current time slice, and then return to step S1 to receive the next time slice.
[0031] On the other hand, the step S3 comprises:
[0032] Step S31: Determine whether all the simulation tasks in the current slot have been completed;
[0033] If yes, go to step S32;
[0034] If not, wait until the simulation task is completed and turn to step S32;
[0035] Step S32: switch to the next slot, then return to step S1 and configure a new simulation task.
[0036] A timing system for a communication baseband software simulator, used to implement the above timing method, comprising:
[0037] a time slice generating module, which periodically generates time slices corresponding to the communication program when the communication software simulation module starts to simulate the communication program;
[0038] A determination module, when receiving the time slice, determines whether the communication software simulation module and the algorithm accelerator simulation module have both completed the simulation task;
[0039] When the judgment module fails to complete the simulation task, the current time slice is abandoned;
[0040] The slot switching module switches to the next slot and configures a new simulation task when all the simulation tasks are completed.
[0041] On the other hand, it also includes an accelerator scheduling module, the accelerator scheduling module includes:
[0042] An information receiving module, wherein the information receiving module receives the task to be calculated and the time slice sent by the communication software simulation module to the algorithm accelerator simulation module;
[0043] A processing module, wherein the processing module calculates the task to be calculated and generates a timing using the time slice;
[0044] A signal output module, wherein after the signal output module completes the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal;
[0045] The determination module uses the accelerator task completion signal to determine whether the algorithm accelerator simulation module has completed the simulation task.
[0046] On the other hand, the time slice generation module includes:
[0047] A timing module, when confirming that the communication software simulation module has received the communication program and started simulation, the timing module establishes a periodic timer for the current simulation task;
[0048] A generating module, wherein the generating module uses the periodic timer to generate the time slice;
[0049] A simulation control module controls the communication software simulation module to perform simulation based on the time slice.
[0050] On the other hand, the discrimination module comprises:
[0051] A first determination module, when receiving the time slice, the first determination module determines whether the communication software simulation module has completed the current simulation task;
[0052] A second determination module, wherein the second determination module determines whether the algorithm accelerator simulation module has completed the current simulation task;
[0053] A determination output module, wherein the determination output module selects to switch to a next slot or abandon the time slice according to the output results of the first determination module and the second determination module.
[0054] On the other hand, the slot switching module includes:
[0055] A simulation task determination module, which determines whether all the simulation tasks in the current slot have been completed;
[0056] A switching module, wherein the switching module switches to the next slot and configures a new simulation task when the simulation task is executed.
[0057] The above technical solution has the following advantages or beneficial effects:
[0058] In view of the fact that the simulation software in the prior art does not consider the simulation of the accelerator, it is easy to make mistakes in the real machine environment, especially the problem that the slots cannot be effectively aligned. In this solution, the simulation process of the algorithm accelerator is added during the simulation process. At the same time, during the simulation of the communication software simulation module, the corresponding time slice (tick) is generated and the execution of the actual simulation task is judged. Generally speaking, a group of time slices corresponds to a group of slots. Due to the performance limitation in the simulation environment, the task of the current slot may not be completed at the location where the time slice is scheduled to be generated, which leads to the timing offset of the overall simulation process and the problem of timing asynchrony between multiple simulation modules. In this regard, by adding additional task checking steps and abandoning the corresponding time slice when the task is not completed, the dynamic adjustment of the actual time of the slot is realized, which is convenient for the subsequent alignment of each task. BRIEF DESCRIPTION OF THE DRAWINGS
[0059] The embodiments of the present invention will be described more fully with reference to the attached drawings, which are provided for illustration and description only and are not intended to limit the scope of the present invention.
[0060] Figure 1 A schematic diagram of a simulation module according to an embodiment of the present invention;
[0061] Figure 2 A schematic diagram of a method according to an embodiment of the present invention;
[0062] Figure 3 This is a schematic diagram of step A3 of an embodiment of the present invention;
[0063] Figure 4 This is a schematic diagram of step S1 of an embodiment of the present invention;
[0064] Figure 5 This is a schematic diagram of step S2 of an embodiment of the present invention;
[0065] Figure 6 This is a schematic diagram of step S3 of an embodiment of the present invention;
[0066] Figure 7 A schematic diagram of a system according to an embodiment of the present invention;
[0067] Figure 8A schematic diagram of an accelerator scheduling module according to an embodiment of the present invention;
[0068] Fig. 9 A schematic diagram of a time slice generation module according to an embodiment of the present invention;
[0069] Fig.10 Schematic diagram of a discrimination module according to an embodiment of the present invention;
[0070] Fig.11 A schematic diagram of a slot switching module according to an embodiment of the present invention; DETAILED DESCRIPTION
[0071] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0072] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.
[0073] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.
[0074] The present invention comprises:
[0075] A timing method for a communication baseband software simulator, such as Figure 1 As shown, the communication baseband software simulator includes a communication software simulation module A1 and an algorithm accelerator simulation module A2 which are connected to each other. When the communication software simulation module A1 simulates the communication program, the communication software simulation module A1 also calls the algorithm accelerator simulation module A2 to perform simulation calculation on the communication program.
[0076] like Figure 2 As shown, the timing method includes:
[0077] Step S1: When the communication software simulation module starts to simulate the communication program, a time slice corresponding to the communication program is periodically generated;
[0078] Step S2: when the time slice is received, determining whether the communication software simulation module and the algorithm accelerator simulation module have completed the simulation task;
[0079] If yes, go to step S3;
[0080] If not, the current time slice is discarded, and then the process returns to step S1 to receive the next time slice;
[0081] Step S3: When all simulation tasks are completed, switch to the next slot, then return to step S1 and configure a new simulation task.
[0082] Specifically, in view of the problem that the simulation process in the prior art usually only considers simulating the software part, and lacks the link of simulating the algorithm accelerator, resulting in poor simulation effect, in this embodiment, the communication baseband software simulator is improved, and a communication software simulation module A1 for simulating the operation of communication-related software and an algorithm accelerator simulation module A2 for simulating auxiliary calculations in the software processing process are respectively set. Both use the same time slice (tick) to schedule related services, thereby realizing joint simulation of the entire system and achieving better simulation effect.
[0083] Furthermore, in view of the problem that the simulator performance problem during the simulation process may not be able to correctly complete the task in a slot, resulting in the problem of timing errors in the service scheduling between multiple modules, in this embodiment, on the basis of constructing the above-mentioned communication software simulation module A1 and algorithm accelerator simulation module A2, additional corresponding inspection steps are added. Specifically, the timing of the communication software simulation module A1 and the algorithm accelerator simulation module A2 is carried out using time slices. Usually, a group of time slices corresponds to a group of slots, and the modules perform service scheduling based on the slots. In this step, before switching the slots, the simulation tasks currently executed by the communication software simulation module A1 and the algorithm accelerator simulation module A2 are checked in advance. If the corresponding tasks are not fully executed, the current time slice is abandoned, and the next time slice is waited for and rechecked until the task is completed before switching the slots. Through the above-mentioned setting, the length of the physical time of the slot is variable, avoiding the problem of timing confusion.
[0084] In the implementation process, the above timing method is mainly configured as a software embodiment in the corresponding simulation system. Among them, the communication software simulation module A1 mainly simulates the operating system and the baseband-related software running on the system, and the algorithm accelerator simulation module A2 simulates the auxiliary calculation process in the actual algorithm accelerator. Both use time slices to realize the timing process.
[0085] In one embodiment, after executing step S1, Figure 3 As shown, it also includes:
[0086] Step A11: the communication software simulation module sends the task to be calculated and the time slice to the algorithm accelerator simulation module;
[0087] Step A12: the algorithm accelerator simulation module calculates the task to be calculated and generates timing using time slices;
[0088] Step A13: After completing the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal;
[0089] In step S2, the accelerator task completion signal is used to determine whether the algorithm accelerator simulation module has completed the simulation task.
[0090] Specifically, in the simulation process, in order to achieve effective scheduling of the algorithm accelerator simulation module, after the communication software simulation module starts to simulate the simulation task, the software tasks and hardware tasks are scheduled separately according to the business situation. When the algorithm accelerator module needs to be scheduled, the communication software simulation module sends the tasks to be calculated and the time slice to the algorithm accelerator simulation module, and then the algorithm accelerator simulation module calculates multiple tasks to be calculated according to a certain timing sequence, and uses the time slice to generate timing. When the calculation is completed, the data is returned to the communication software simulation module, and an accelerator task completion signal is generated at the same time. In one embodiment, the accelerator task completion signal can be a modification of a specific key value. In the subsequent judgment step, the key value can be relied on to determine whether the algorithm accelerator simulation module has completed the simulation task.
[0091] In one embodiment, Figure 4 As shown, step S1 includes:
[0092] Step S11: after confirming that the communication software simulation module has received the communication program and started simulation, a periodic timer is established for the current simulation task;
[0093] Step S12: using a periodic timer to generate a time slice;
[0094] Step S13: The communication software simulation module performs simulation based on the time slice.
[0095] Specifically, in order to achieve a better simulation effect, in this embodiment, after confirming that the communication software simulation module receives the communication program and starts simulation, a periodic timer is established for the current simulation task. The periodic timer can generate a time slice according to a specific clock cycle, and the time slice is used for the communication software simulation module to simulate and the corresponding discrimination process. In one embodiment, after the time slice is generated, the discrimination process of step S2 is triggered by an interrupt.
[0096] In one embodiment, Figure 5 As shown, step S2 includes:
[0097] Step S21: when receiving the time slice, determining whether the communication software simulation module has completed the current simulation task;
[0098] If yes, go to step S22;
[0099] If not, go to step S23;
[0100] Step S22: determining whether the algorithm accelerator simulation module has completed the current simulation task;
[0101] If yes, go to step S3;
[0102] If not, go to step S23;
[0103] Step S23: Abandon the current time slice, and then return to step S1 to receive the next time slice.
[0104] Specifically, in order to address the problem in the prior art that the task may not be completed correctly in a slot, resulting in timing errors in business scheduling between multiple modules, in this embodiment, after receiving the time slice and before updating the slot according to the time slice, it is determined whether the communication software simulation module and the algorithm accelerator simulation module have completed the task respectively. If completed, scheduling the next slot can be started; if any one of them is not completed, the current time slice is discarded until the task is completed.
[0105] In one embodiment, Figure 6 As shown, step S3 includes:
[0106] Step S31: Determine whether all simulation tasks in the current slot have been completed;
[0107] If yes, go to step S32;
[0108] If not, wait until the simulation task is completed and go to step S32;
[0109] Step S32: Switch to the next slot, then return to step S1 and configure a new simulation task.
[0110] A timing system for a communication baseband software simulator, such as Figure 7 As shown, the timing method for implementing the above-mentioned timing method includes:
[0111] The time slice generating module 1, when the communication software simulation module starts to simulate the communication program, the time slice generating module periodically generates a time slice corresponding to the communication program;
[0112] The judging module 2, when receiving the time slice, judges whether the communication software simulation module and the algorithm accelerator simulation module have completed the simulation task;
[0113] When the judgment module 2 fails to complete the simulation task, it abandons the current time slice;
[0114] Slot switching module 3, when all simulation tasks are completed, slot switching module 3 switches to the next slot and configures a new simulation task.
[0115] Specifically, in view of the problem that the simulator performance problem during the simulation process may not be able to correctly complete the task in a slot, resulting in the problem of timing errors in the service scheduling between multiple modules, in this embodiment, on the basis of constructing the above-mentioned communication software simulation module A1 and algorithm accelerator simulation module A2, additional corresponding inspection steps are added. Specifically, the timing of the communication software simulation module A1 and the algorithm accelerator simulation module A2 is carried out using the time slice generated by the time slice generation module 1. Under normal circumstances, a group of time slices corresponds to a group of slots, and each module performs service scheduling based on the slot. In this step, before switching the slot, the discrimination module 2 pre-checks the simulation tasks currently executed by the communication software simulation module A1 and the algorithm accelerator simulation module A2. If the corresponding task is not fully executed, the current time slice is abandoned, and the next time slice is waited for and re-checked until the task is completed. The slot switching module 3 performs slot switching again. Through the above setting, the length of the physical time of the slot is variable, avoiding the problem of timing confusion.
[0116] In one embodiment, an accelerator scheduling module 4 is also included, such as Figure 8 As shown, the accelerator scheduling module 4 includes:
[0117] An information receiving module 41, the information receiving module 41 receives the tasks to be calculated and the time slices sent by the communication software simulation module to the algorithm accelerator simulation module;
[0118] The processing module 42 calculates the task to be calculated and generates timing using time slices;
[0119] The signal output module 43, after the signal output module 43 completes the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal;
[0120] The judging module 2 uses the accelerator task completion signal to judge whether the algorithm accelerator simulation module has completed the simulation task.
[0121] Specifically, in the simulation process, in order to achieve effective scheduling of the algorithm accelerator simulation module, after the communication software simulation module starts to simulate the simulation task, the software tasks and hardware tasks are scheduled separately according to the business situation. When the algorithm accelerator module needs to be scheduled, the communication software simulation module sends the tasks to be calculated and the time slice to the algorithm accelerator simulation module, and then the algorithm accelerator simulation module calculates multiple tasks to be calculated according to a certain timing sequence, and uses the time slice to generate timing. When the calculation is completed, the data is returned to the communication software simulation module, and an accelerator task completion signal is generated at the same time. In one embodiment, the accelerator task completion signal can be a modification of a specific key value. In the subsequent judgment step, the key value can be relied on to determine whether the algorithm accelerator simulation module has completed the simulation task.
[0122] In one embodiment, Fig. 9 As shown, the time slice generating module 1 includes:
[0123] The timing module 11, when confirming that the communication software simulation module receives the communication program and starts simulation, the timing module 11 establishes a periodic timer for the current simulation task;
[0124] A generating module 12, wherein the generating module 12 uses a periodic timer to generate a time slice;
[0125] The simulation control module 13 controls the communication software simulation module to perform simulation based on time slices.
[0126] Specifically, in order to achieve a better simulation effect, in this embodiment, after confirming that the communication software simulation module receives the communication program and starts simulation, the timing module 11 establishes a periodic timer for the current simulation task. The generation module 12 can generate a time slice according to a specific clock cycle according to the periodic timer, and the time slice is used for the simulation control module 13 to perform simulation and the corresponding judgment process.
[0127] In one embodiment, Fig.10 As shown, the discrimination module 2 includes:
[0128] The first determination module 21, when receiving the time slice, determines whether the communication software simulation module has completed the current simulation task;
[0129] A second determination module 22, the second determination module 22 determines whether the algorithm accelerator simulation module has completed the current simulation task;
[0130] The determination output module 23 selects to switch to the next slot or abandon the time slice according to the output results of the first determination module and the second determination module.
[0131] Specifically, in order to address the problem in the prior art that a task may not be completed correctly in a slot, resulting in timing errors in business scheduling between multiple modules, in this embodiment, after receiving the time slice and before updating the slot according to the time slice, the first judgment module 21 and the second judgment module 22 respectively determine whether the communication software simulation module and the algorithm accelerator simulation module have completed the task, and output them to the judgment output module 23 for processing. If completed, scheduling of the next slot can be started; if any item is not completed, the current time slice is discarded until the task is completed.
[0132] In one embodiment, Fig.11 As shown, the slot switching module 3 includes:
[0133] A simulation task determination module 31 determines whether all simulation tasks in the current slot have been completed;
[0134] The switching module 32 switches to the next slot and configures a new simulation task when the simulation task is completed.
[0135] The above are only preferred embodiments of the present invention, and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the description and illustrations of the present invention should be included in the protection scope of the present invention.
Claims
1. A timing method for a communication baseband software simulator, characterized in that: The communication baseband software simulator comprises a communication software simulation module and an algorithm accelerator simulation module which are connected to each other. When the communication software simulation module simulates the communication program, the communication software simulation module also calls the algorithm accelerator simulation module to perform simulation calculation on the communication program. The timing method comprises: Step S1: When the communication software simulation module starts to simulate the communication program, a time slice corresponding to the communication program is periodically generated; Step S2: when the time slice is received, determining whether the communication software simulation module and the algorithm accelerator simulation module have both completed the simulation task; If yes, go to step S3; If not, discard the current time slice, and then return to step S1 to receive the next time slice; Step S3: When all the simulation tasks are completed, switch to the next slot, then return to step S1 and configure new simulation tasks.
2. The timing method according to claim 1, characterized in that: After executing step S1, the method further includes: Step A11: the communication software simulation module sends the task to be calculated and the time slice to the algorithm accelerator simulation module; Step A12: the algorithm accelerator simulation module calculates the task to be calculated and generates timing using the time slice; Step A13: After completing the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal; In the step S2, the accelerator task completion signal is used to determine whether the algorithm accelerator simulation module has completed the simulation task.
3. The timing method according to claim 1, characterized in that: The step S1 comprises: Step S11: after confirming that the communication software simulation module has received the communication program and started simulation, a periodic timer is established for the current simulation task; Step S12: using the periodic timer to generate the time slice; Step S13: The communication software simulation module performs simulation based on the time slice.
4. The timing method according to claim 1, characterized in that: The step S2 comprises: Step S21: when receiving the time slice, determining whether the communication software simulation module has completed the current simulation task; If yes, go to step S22; If not, go to step S23; Step S22: determining whether the algorithm accelerator simulation module has completed the current simulation task; If yes, go to step S3; If not, go to step S23; Step S23: Abandon the current time slice, and then return to step S1 to receive the next time slice.
5. The timing method according to claim 1, characterized in that: The step S3 comprises: Step S31: Determine whether all the simulation tasks in the current slot have been completed; If yes, go to step S32; If not, wait until the simulation task is completed and turn to step S32; Step S32: switch to the next slot, then return to step S1 and configure a new simulation task.
6. A timing system for a communication baseband software simulator, characterized in that: Used to implement the timing method according to any one of claims 1 to 5, comprising: a time slice generating module, which periodically generates time slices corresponding to the communication program when the communication software simulation module starts to simulate the communication program; A determination module, when receiving the time slice, determines whether the communication software simulation module and the algorithm accelerator simulation module have both completed the simulation task; When the judgment module fails to complete the simulation task, the current time slice is abandoned; The slot switching module switches to the next slot and configures a new simulation task when all the simulation tasks are completed.
7. The timing system according to claim 6, characterized in that: The system also includes an accelerator scheduling module, wherein the accelerator scheduling module includes: An information receiving module, wherein the information receiving module receives the task to be calculated and the time slice sent by the communication software simulation module to the algorithm accelerator simulation module; A processing module, wherein the processing module calculates the task to be calculated and generates a timing using the time slice; A signal output module, wherein after the signal output module completes the task to be calculated, the algorithm accelerator simulation module generates an accelerator task completion signal; The determination module uses the accelerator task completion signal to determine whether the algorithm accelerator simulation module has completed the simulation task.
8. The timing system according to claim 6, characterized in that: The time slice generation module comprises: A timing module, when confirming that the communication software simulation module has received the communication program and started simulation, the timing module establishes a periodic timer for the current simulation task; A generating module, wherein the generating module uses the periodic timer to generate the time slice; A simulation control module controls the communication software simulation module to perform simulation based on the time slice.
9. The timing system according to claim 6, characterized in that: The discrimination module comprises: A first determination module, when receiving the time slice, the first determination module determines whether the communication software simulation module has completed the current simulation task; A second determination module, wherein the second determination module determines whether the algorithm accelerator simulation module has completed the current simulation task; A determination output module, wherein the determination output module selects to switch to a next slot or abandon the time slice according to the output results of the first determination module and the second determination module.
10. The timing system according to claim 6, characterized in that: The slot switching module includes: A simulation task determination module, which determines whether all the simulation tasks in the current slot have been completed; A switching module, wherein the switching module switches to the next slot and configures a new simulation task when the simulation task is executed.
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