MBB device-based data collection method, device, storage medium, and electronic device

Abstract

The present disclosure relates to a data collection method based on an MBB device, a data collection device based on an MBB device, a storage medium, and an electronic device. The data collection method based on an MBB device includes generating a local bit rate of the MBB device and a first time interval T1 obtained by dividing the MBB device's clock frequency based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device; generating a PCIe TLP MSI message based on the MBB device's local bit rate timing, and sending the PCIe TLP MSI message to a host at the first time interval T1, so that the host can calibrate the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and a second time interval T2 of receiving the PCIe TLP MSI message, thereby ensuring that the local bit rate of the MBB device matches the remote bit rate of the host in real time; and based on the real-time matching of the local bit rate of the MBB device and the remote bit rate of the host, performing data collection and transmission on a peripheral device through the MBB device to improve data transmission efficiency.

Description

Technical Field

[0001] The present disclosure relates to the field of network communication technologies, and in particular to a data collection method based on an MBB device, a data collection apparatus based on an MBB device, a storage medium, and an electronic device. Background Art

[0002] PCI-Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. PCIE is a high-speed serial point-to-point dual-channel, high-bandwidth transmission protocol. Connected devices are allocated dedicated channel bandwidth and do not share bus bandwidth. It primarily supports features such as active power management, error reporting, end-to-end reliable transmission, hot swapping, and Quality of Service (QoS). Mobile broadband (MBB) devices provide a mobile computer with a wireless data connection to mobile phone services. MBB devices support one or more mobile network radio technologies. When MBB devices use the PCIE interface for data transmission, data transmission efficiency must be considered due to the limited memory available. Summary of the Invention

[0003] In view of this, embodiments of the present disclosure aim to provide a data collection method based on an MBB device, a data collection apparatus based on an MBB device, a storage medium, and an electronic device.

[0004] The technical solution of the present disclosure is achieved as follows:

[0005] In a first aspect, the present disclosure provides a data collection method based on an MBB device, wherein a host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device.

[0006] The data collection method based on MBB devices provided in the embodiments of the present disclosure includes:

[0007] Generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device;

[0008] generating a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and sending the PCIe TLP MSI message to the host at the first time interval T1 as a period, so that the host calibrates the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time; wherein the remote bit rate of the host is determined by the second time interval T2 for the host to receive the PCIe TLP MSI message;

[0009] Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

[0010] In some embodiments, the collecting and transmitting data from the peripheral device through the MBB device based on the real-time matching of the local bit rate of the MBB device with the remote bit rate of the host includes:

[0011] receiving a transaction feature capture instruction sent by the host; wherein the transaction feature capture instruction includes data feature information for starting data transmission;

[0012] Based on the data feature information in the transaction feature capture instruction, determining collected data in a data collection process that matches the data feature information;

[0013] Starting data transmission at a target baud rate determined based on a local bit rate of the MBB device based on a collection time corresponding to the collected data matching the data characteristic information.

[0014] In some embodiments, the data characteristic information includes at least one of the following:

[0015] The interval period between N consecutive rising edges is the same;

[0016] The interval period between N consecutive falling edges is the same.

[0017] In some embodiments, the target baud rate determined based on the local bit rate of the MBB device includes:

[0018] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0019] In a second aspect, the present disclosure provides a data collection method based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The method includes:

[0020] receiving a PCIe TLP MSI message sent by the MBB device at a first time interval T1 as a period; wherein the first time interval T1 is obtained by dividing a clock of the MBB device;

[0021] Calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by a power management integrated circuit (PMIC) of the MBB device;

[0022] Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

[0023] In some embodiments, the real-time calibration of the clock frequencies of the host and the MBB device based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes:

[0024] determining a time difference between the second time interval T2 and the first time interval T1;

[0025] Based on the time difference between the second time interval T2 and the first time interval T1, the clock frequency of the host is adjusted so that the remote bit rate of the host matches the local bit rate of the MBB device in real time.

[0026] In some embodiments, adjusting the clock frequency of the host based on the time difference between the second time interval T2 and the first time interval T1 so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes:

[0027] Determine a clock deviation based on a time difference between the second time interval T2 and the first time interval T1, in combination with a clock rate and a transmission delay parameter of the PCIE interface;

[0028] The clock frequency of the host is adjusted according to the clock deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

[0029] In some embodiments, based on real-time matching of a local bit rate of the MBB device with a remote bit rate of the host, collecting and transmitting data from a peripheral device through the MBB device includes:

[0030] Generate transaction feature capture instructions based on the data feature information of the collected data required by the application;

[0031] sending the transaction feature capture instruction to the MBB device, so that the MBB device monitors the collected data obtained during the data collection process in real time based on the data feature information included in the transaction feature capture instruction, and determines a collection time corresponding to the collected data matching the data feature information;

[0032] Start receiving, based on a collection time corresponding to the collected data matching the data characteristic information, the collected data transmitted by the MBB device at a target baud rate; wherein the data characteristic information includes at least one of the following:

[0033] The interval period between N consecutive rising edges is the same;

[0034] The interval period between N consecutive falling edges is the same.

[0035] In some embodiments, the target baud rate determined based on the local bit rate of the MBB device includes:

[0036] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0037] In a third aspect, the present disclosure provides a data collection device based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The device includes:

[0038] an information generation module, configured to generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device;

[0039] a message sending module, configured to generate a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and send the PCIe TLP MSI message to the host at a first time interval T1, so that the host can calibrate the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and a second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time; wherein the remote bit rate of the host is determined by the second time interval T2 for receiving the PCIe TLP MSI message by the host;

[0040] The data transmission module is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

[0041] In a fourth aspect, the present disclosure provides a data collection device based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The device includes:

[0042] a message receiving module, configured to receive PCIeTLP MSI messages sent by the MBB device at a first time interval T1; wherein the first time interval T1 is obtained by dividing a clock of the MBB device;

[0043] a bit rate matching module, configured to calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by a power management integrated circuit (PMIC) of the MBB device;

[0044] The data transmission module is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

[0045] In a third aspect, the present disclosure provides a computer-readable storage medium storing a data collection program based on an MBB device. When the data collection program based on the MBB device is executed by a processor, the data collection method based on the MBB device described in the first aspect is implemented.

[0046] In a fourth aspect, the present disclosure provides an electronic device, including a memory, a processor, and an MBB device-based data collection program stored in the memory and executable on the processor. When the processor executes the MBB device-based data collection program, the MBB device-based data collection method described in the first aspect is implemented.

[0047] According to an embodiment of the present disclosure, a data collection method based on an MBB device is provided. In this method, a host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The method includes: generating a local bit rate of the MBB device and a first time interval T1 obtained by dividing the MBB device clock frequency based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device; generating a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and periodically sending the PCIe TLP MSI message to the host at the first time interval T1, so that the host calibrates the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and a second time interval T2 of receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time. The remote bit rate of the host is determined by the second time interval T2 of receiving the PCIe TLP MSI message by the host; and based on the real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data collection and transmission from the peripheral device is performed via the MBB device. In this application, when a host collects data from a peripheral device through an MBB device, the host and the MBB device transmit data through the PCIE interface. Given that the MBB device has relatively small memory, data transmission is performed by matching the local bit rate of the MBB device with the remote bit rate of the host in real time. This improves data transmission efficiency and reduces unexpected memory usage caused by data accumulation.

[0048] Additional aspects and advantages of the present disclosure will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 This is a data collection method based on MBB equipment according to an exemplary embodiment. Figure 1 ;

[0050] Figure 2FIG1 is a schematic diagram showing a connection structure between a host and an MBB device according to an exemplary embodiment;

[0051] Figure 3 This is a data collection method based on MBB equipment according to an exemplary embodiment. Figure 2 ;

[0052] Figure 4 This is a schematic diagram of the structure of a data collection device based on an MBB device according to an exemplary embodiment. Figure 1 ;

[0053] Figure 5 This is a schematic diagram of the structure of a data collection device based on an MBB device according to an exemplary embodiment. Figure 2 . DETAILED DESCRIPTION

[0054] The following describes in detail embodiments of the present disclosure, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0055] PCI-Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. PCIE is a high-speed serial point-to-point dual-channel, high-bandwidth transmission protocol. Connected devices are allocated dedicated channel bandwidth and do not share bus bandwidth. It primarily supports features such as active power management, error reporting, end-to-end reliable transmission, hot swapping, and Quality of Service (QoS). Mobile broadband (MBB) devices provide a mobile computer with a wireless data connection to mobile phone services. MBB devices support one or more mobile network radio technologies. When MBB devices use the PCIE interface for data transmission, data transmission efficiency must be considered due to the limited memory available.

[0056] In response to the above situation, the present disclosure provides a data collection method based on MBB devices. Figure 1 This is a data collection method based on MBB equipment according to an exemplary embodiment. Figure 1 .like Figure 1 As shown, the data collection method based on MBB devices includes:

[0057] Step 10: Generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device.

[0058] Step 11: Generate a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and send the PCIe TLP MSI message to the host at the first time interval T1, so that the host can calibrate the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time. The remote bit rate of the host is determined by the second time interval T2 for receiving the PCIe TLP MSI message by the host.

[0059] Step 12: Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

[0060] In this exemplary embodiment, the first time interval T1 obtained by dividing the clock of the MBB (Mobile Broadband) device can be obtained by obtaining a clock signal with a frequency of F_main from a master clock and then dividing it to obtain a clock signal with a frequency of F_div. Therefore, the frequency division ratio (N) is F_main divided by F_div. In other words, N = F_main / F_div. The first time interval T1 (corresponding to the clock period of F_div) is 1 / F_div.

[0061] In this exemplary embodiment, Figure 2 FIG. 1 is a schematic diagram showing a connection structure between a host and an MBB device according to an exemplary embodiment. Figure 2 As shown, the host and the MBB device are connected via a PCIE interface, and the MBB device is connected to the sampling peripheral.

[0062] Among them, Figure 2 As shown in Figure 1, PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) uses a data transmission mode based on messages (TLPs), and all bus transactions are implemented through messages. Figure 2As shown, MSI (Message Signaled Interrupts) is an interrupt mechanism in PCIe that uses memory write request (TLP) to submit interrupt requests to the processor. When sending MSI messages using the PCIe interface, the MSI messages can be encapsulated into TLPs and transmitted to the host via the PCIe link. In this exemplary embodiment, due to a bit rate mismatch between the MBB device and the host, which affects data transmission between the two, to improve data transmission efficiency and reduce data accumulation in the MBB device memory after collection, this application implements real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, thereby improving data transmission efficiency.

[0063] The real-time calibration of the clock frequencies of the host and the MBB device based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time, includes:

[0064] Calculate the clock deviation based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 of receiving the PCIe TLP MSI message, combined with parameters such as the clock rate and transmission delay of the PCIE interface;

[0065] The host adjusts its clock frequency based on the calculated clock deviation to reduce or eliminate the deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

[0066] In this exemplary embodiment, a time difference between a first time interval T1 between the MBB device sending the PCIe TLP MSI message to the host and a second time interval T2 between the host receiving the PCIe TLP MSI message can be used to calculate a clock offset based on parameters such as the PCIE interface clock rate and transmission delay. Based on the calculated clock offset, the host adjusts its clock frequency to reduce or eliminate the offset, thereby synchronizing the clock frequencies of the host and the MBB device. This ensures that the local bit rate of the MBB device matches the remote bit rate of the host in real time. Data transmission is then performed with the local bit rate of the MBB device matching the remote bit rate of the host in real time, effectively improving data transmission efficiency.

[0067] The host connects to the MBB device through the PCIE interface, and the MBB device connects to peripherals through the USB interface. The host runs the PCIe (Audio) Interface Driver component, which manages the PCIe audio interface device and ensures correct and efficient transmission of audio signals between the host and the PCIe audio device.

[0068] In this exemplary embodiment, the Host PCIe MHI Driver is a PCIe interface driver for connecting a modem to a host. The MHI (Modem Host Interface) is the communication interface between the modem and the host. This driver is primarily used for PCIe-based devices, enabling the modem to connect to the host via the PCIe interface.

[0069] The Host PCIe RC Driver, also known as the PCIe root complex driver, manages and controls the root complex (RC) devices on the PCIe bus. It obtains PCIe root complex information through the device tree and registers the driver with the kernel to control and manage PCIe devices.

[0070] In this application, when a host collects data from a peripheral device through an MBB device, the host and the MBB device transmit data through the PCIE interface. Given that the MBB device has relatively small memory, data transmission is performed by matching the local bit rate of the MBB device with the remote bit rate of the host in real time. This improves data transmission efficiency and reduces unexpected memory usage caused by data accumulation.

[0071] In some embodiments, the collecting and transmitting data from the peripheral device through the MBB device based on the real-time matching of the local bit rate of the MBB device with the remote bit rate of the host includes:

[0072] receiving a transaction feature capture instruction sent by the host; wherein the transaction feature capture instruction includes data feature information for starting data transmission;

[0073] Based on the data feature information in the transaction feature capture instruction, determining collected data in a data collection process that matches the data feature information;

[0074] Starting data transmission at a target baud rate determined based on a local bit rate of the MBB device based on a collection time corresponding to the collected data matching the data characteristic information.

[0075] In this exemplary embodiment, the host's upper-layer app issues a capture transaction. The host PCIe (Audio) Interface issues a transaction feature capture instruction to the MBB device connected to the PCIe interface and writes the instruction into the MBB device's transaction capture observation area. The MBB device and sampling peripheral on the PCIe interface perform real-time sampling based on the negotiated bit rate and cyclically overwrite the data in the MBB device's data buffer connected to the PCIe interface.

[0076] At the same time, the MBB device calls the data collection monitoring thread based on the transaction feature capture instruction to monitor the data collected by the MBB device and compares the data features of the collected data with the data feature information in the transaction feature capture instruction to see if they are the same. If the data features of the collected data are the same as the data feature information in the transaction feature capture instruction, the collection time of the collected data with the same data features as the data feature information in the transaction feature capture instruction is determined as the data node for starting data transmission and submitted to the upper-layer APP. Figure 2 The transaction capture is complete. Wait for the upper-layer app to send the next transaction. For example, based on the capture point (the data node where data transmission begins), obtain the capture point data context in the USB / PCM interface data buff of the MBB device on the PCIe interface. Based on the capture point, the Host PCIe MHIDriver begins real-time sampling and synchronous transmission of MBB device data on the PCIe interface.

[0077] For example, based on the data node that starts data transmission, the MBB device starts transmitting the collected data to the host. The data feature information in the transaction feature capture instruction is used to characterize the validity of the collected data. For example, the data feature information includes at least one of the following:

[0078] The interval period between N consecutive rising edges is the same;

[0079] The intervals between N consecutive falling edges are the same. This means that stable data has been collected, indicating that the system is operating stably and effectively. The collected data is valid. The MBB device can then transmit the collected valid data to the host. This helps improve the effectiveness of data collection and transmission.

[0080] In some embodiments, the target baud rate determined based on the local bit rate of the MBB device includes:

[0081] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0082] In this exemplary embodiment, after determining the data node to start data transmission, data transmission can be performed based on the target baud rate between the host and the MBB device. The target baud rate can be determined based on the local bit rate of the MBB device. This facilitates configuration of a reasonable data transmission rate, suitable for data collection scenarios, and helps reduce mismatches between data collection and transmission.

[0083] Assume that the clock output by the MBB device PMIC is F = 1 kHz, with a unit time of 1 second; T = 1 / F = 1 millisecond (i.e., one PCIe TLP MSI message is sent in 1 millisecond). Therefore, 1000 PCIe TLP MSI messages can be transmitted per unit time, resulting in an actual local bit rate of 1 Kbps.

[0084] Assume that the local bit rate and the remote bit rate are negotiated to be B = 1 Kbps. Within one bit rate transmission time (T = 1 mS), the MBB device transmits N = 10 PCIe TLP data packets to the host PCIe driver. One [PCIe TLP data packet] contains S = 1024 data symbols.

[0085] That is, the target baud rate: B*N*S=1Kbps*10*1024=10Mbps.

[0086] In this exemplary embodiment, during data transmission, the sampled data is directly synchronized to the Host PCIe (Audio) Interface Ring buff, and the MBB device transmits the data collected based on the negotiated target baud rate to the Host PCIe MHI Driver via PCIe TLP data packets.

[0087] The present disclosure provides a data collection method based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. Figure 3 This is a data collection method based on MBB equipment according to an exemplary embodiment. Figure 2 .like Figure 3 As shown, the method includes:

[0088] Step 30: Receive PCIe TLP MSI messages sent by the MBB device at the first time interval T1; wherein the first time interval T1 is obtained by dividing the clock of the MBB device;

[0089] Step 31: Calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by the power management integrated circuit (PMIC) of the MBB device;

[0090] Step 32: Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

[0091] In this exemplary embodiment, the first time interval T1 obtained by dividing the clock of the MBB (Mobile Broadband) device can be obtained by obtaining a clock signal with a frequency of F_main from a master clock and then dividing it to obtain a clock signal with a frequency of F_div. Therefore, the frequency division ratio (N) is F_main divided by F_div. In other words, N = F_main / F_div. The first time interval T1 (corresponding to the clock period of F_div) is 1 / F_div.

[0092] In this exemplary embodiment, PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) uses a message (TLP)-based data transfer mode, and all bus transactions are implemented via messages. MSI (Message Signaled Interrupts) is an interrupt mechanism in PCIe that uses memory write requests (TLPs) to submit interrupt requests to the processor. When sending MSI messages using the PCIe interface, they are encapsulated into TLPs and transmitted to the host via the PCIe link.

[0093] In this exemplary embodiment, due to a bit rate mismatch between the MBB device and the host, data transmission between the two is affected. To improve data transmission efficiency and reduce data accumulation in the MBB device memory after data collection, this application implements real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, thereby improving data transmission efficiency.

[0094] In this exemplary embodiment, Figure 2 As shown in the figure, the host connects to the MBB device through the PCIE interface, and the MBB device connects to the peripheral device through the USB interface. The PCIe (Audio) Interface Driver component runs in the host and manages the PCIe audio interface device, ensuring the correct and efficient transmission of audio signals between the host and the PCIe audio device.

[0095] In this exemplary embodiment, the Host PCIe MHI Driver is a PCIe interface driver for connecting a modem to a host. The MHI (Modem Host Interface) is the communication interface between the modem and the host. This driver is primarily used for PCIe-based devices, enabling the modem to connect to the host via the PCIe interface.

[0096] In this application, when a host collects data from a peripheral device through an MBB device, the host and the MBB device transmit data through the PCIE interface. Given that the MBB device has relatively small memory, data transmission is performed by matching the local bit rate of the MBB device with the remote bit rate of the host in real time. This improves data transmission efficiency and reduces unexpected memory usage caused by data accumulation.

[0097] In some embodiments, the real-time calibration of the clock frequencies of the host and the MBB device based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes:

[0098] determining a time difference between the second time interval T2 and the first time interval T1;

[0099] Based on the time difference between the second time interval T2 and the first time interval T1, the clock frequency of the host is adjusted so that the remote bit rate of the host matches the local bit rate of the MBB device in real time.

[0100] In this exemplary embodiment, determining the time difference between the second time interval T2 and the first time interval T1 includes:

[0101] Based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, combined with parameters such as the clock rate and transmission delay of the PCIE interface, the clock deviation is calculated.

[0102] In some embodiments, adjusting the clock frequency of the host based on the time difference between the second time interval T2 and the first time interval T1 so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes:

[0103] Determine a clock deviation based on a time difference between the second time interval T2 and the first time interval T1, in combination with a clock rate and a transmission delay parameter of the PCIE interface;

[0104] The clock frequency of the host is adjusted according to the clock deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

[0105] In some embodiments, based on real-time matching of a local bit rate of the MBB device with a remote bit rate of the host, collecting and transmitting data from a peripheral device through the MBB device includes:

[0106] Generate transaction feature capture instructions based on the data feature information of the collected data required by the application;

[0107] sending the transaction feature capture instruction to the MBB device, so that the MBB device monitors the collected data obtained during the data collection process in real time based on the data feature information included in the transaction feature capture instruction, and determines a collection time corresponding to the collected data matching the data feature information;

[0108] Start receiving, based on a collection time corresponding to the collected data matching the data characteristic information, the collected data transmitted by the MBB device at a target baud rate; wherein the data characteristic information includes at least one of the following:

[0109] The interval period between N consecutive rising edges is the same;

[0110] The interval period between N consecutive falling edges is the same.

[0111] In this exemplary embodiment, the host may issue a transaction feature capture instruction to the MBB device connected to the PCIE interface via a PCIE interface. Based on the transaction feature capture instruction, the MBB device invokes a data collection monitoring thread to monitor the data collected by the MBB device and compares the data features of the collected data with the data feature information in the transaction feature capture instruction. If the data features of the collected data are the same as the data feature information in the transaction feature capture instruction, the collection time of the collected data with the same data feature information as the data feature information in the transaction feature capture instruction is determined as the data node at which data transmission starts. The MBB device then begins transmitting the collected data to the host based on the data node at which data transmission starts. The data feature information in the transaction feature capture instruction is used to indicate the validity of the collected data. For example, the data feature information includes at least one of the following:

[0112] The interval period between N consecutive rising edges is the same;

[0113] The intervals between N consecutive falling edges are the same. This means that stable data has been collected, indicating that the system is operating stably and effectively. The collected data is valid. The MBB device can then transmit the collected valid data to the host. This helps improve the effectiveness of data collection and transmission.

[0114] In some embodiments, the target baud rate includes:

[0115] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0116] In this exemplary embodiment, after determining the data node to start data transmission, data transmission can be performed based on the target baud rate between the host and the MBB device. The target baud rate can be determined based on the local bit rate of the MBB device. This facilitates configuration of a reasonable data transmission rate, suitable for data collection scenarios, and helps reduce mismatches between data collection and transmission.

[0117] The present disclosure provides a data collection device based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. Figure 4 This is a schematic diagram of the structure of a data collection device based on an MBB device according to an exemplary embodiment. Figure 1 .like Figure 4 As shown, the device includes:

[0118] An information generation module 40 is configured to generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device.

[0119] The message sending module 41 is configured to generate a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and send the PCIe TLP MSI message to the host at a first time interval T1, so that the host can calibrate the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and a second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time. The remote bit rate of the host is determined by the second time interval T2 for receiving the PCIe TLP MSI message by the host.

[0120] The data transmission module 42 is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

[0121] In this exemplary embodiment, the first time interval T1 obtained by dividing the clock of the MBB (Mobile Broadband) device can be obtained by obtaining a clock signal with a frequency of F_main from a master clock and then dividing it to obtain a clock signal with a frequency of F_div. Therefore, the frequency division ratio (N) is F_main divided by F_div. In other words, N = F_main / F_div. The first time interval T1 (corresponding to the clock period of F_div) is 1 / F_div.

[0122] In this exemplary embodiment, Figure 2 As shown, the host and the MBB device are connected via a PCIE interface, and the MBB device is connected to the sampling peripheral.

[0123] Among them, Figure 2 As shown in Figure 1, PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) uses a data transmission mode based on messages (TLPs), and all bus transactions are implemented through messages. Figure 2As shown, MSI (Message Signaled Interrupts) is an interrupt mechanism in PCIe that uses memory write request (TLP) to submit interrupt requests to the processor. When sending MSI messages using the PCIe interface, the MSI messages can be encapsulated into TLPs and transmitted to the host via the PCIe link. In this exemplary embodiment, due to a bit rate mismatch between the MBB device and the host, which affects data transmission between the two, to improve data transmission efficiency and reduce data accumulation in the MBB device memory after collection, this application implements real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, thereby improving data transmission efficiency.

[0124] The real-time calibration of the clock frequencies of the host and the MBB device based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time, includes:

[0125] Calculate the clock deviation based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 of receiving the PCIe TLP MSI message, combined with parameters such as the clock rate and transmission delay of the PCIE interface;

[0126] The host adjusts its clock frequency based on the calculated clock deviation to reduce or eliminate the deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

[0127] In this exemplary embodiment, the host connects to the MBB device through a PCIE interface, and the MBB device connects to peripherals through a USB interface. The host runs the PCIe (Audio) Interface Driver component, which manages the PCIe audio interface device and ensures accurate and efficient transmission of audio signals between the host and the PCIe audio device.

[0128] In this exemplary embodiment, the Host PCIe MHI Driver is a PCIe interface driver for connecting a modem to a host. The MHI (Modem Host Interface) is the communication interface between the modem and the host. This driver is primarily used for PCIe-based devices, enabling the modem to connect to the host via the PCIe interface.

[0129] The Host PCIe RC Driver, also known as the PCIe root complex driver, manages and controls the root complex (RC) devices on the PCIe bus. It obtains PCIe root complex information through the device tree and registers the driver with the kernel to control and manage PCIe devices.

[0130] In this application, when a host collects data from a peripheral device through an MBB device, the host and the MBB device transmit data through the PCIE interface. Given that the MBB device has relatively small memory, data transmission is performed by matching the local bit rate of the MBB device with the remote bit rate of the host in real time. This improves data transmission efficiency and reduces unexpected memory usage caused by data accumulation.

[0131] In some embodiments, the data transmission module is used to

[0132] receiving a transaction feature capture instruction sent by the host; wherein the transaction feature capture instruction includes data feature information for starting data transmission;

[0133] Based on the data feature information in the transaction feature capture instruction, determining collected data in a data collection process that matches the data feature information;

[0134] Starting data transmission at a target baud rate determined based on a local bit rate of the MBB device based on a collection time corresponding to the collected data matching the data characteristic information.

[0135] The host's upper-layer app sends a capture transaction. The host PCIe (Audio) Interface sends a transaction feature capture command to the MBB device connected to the PCIe interface and writes the command into the MBB device's transaction capture observation area. The MBB device and sampling peripheral on the PCIe interface perform real-time sampling based on the negotiated bit rate and cyclically overwrite the data in the MBB device's data buffer connected to the PCIe interface.

[0136] At the same time, the MBB device calls the data collection monitoring thread based on the transaction feature capture instruction to monitor the data collected by the MBB device and compares the data features of the collected data with the data feature information in the transaction feature capture instruction to see if they are the same. If the data features of the collected data are the same as the data feature information in the transaction feature capture instruction, the collection time of the collected data with the same data features as the data feature information in the transaction feature capture instruction is determined as the data node for starting data transmission and submitted to the upper-layer APP. Figure 2The transaction capture is complete. Wait for the upper-layer app to send the next transaction. For example, based on the capture point (the data node where data transmission begins), obtain the capture point data context in the USB / PCM interface data buff of the MBB device on the PCIe interface. Based on the capture point, the Host PCIe MHIDriver begins real-time sampling and synchronous transmission of MBB device data on the PCIe interface.

[0137] For example, based on the data node that starts data transmission, the MBB device starts transmitting the collected data to the host. The data feature information in the transaction feature capture instruction is used to characterize the validity of the collected data. For example, the data feature information includes at least one of the following:

[0138] The interval period between N consecutive rising edges is the same;

[0139] The intervals between N consecutive falling edges are the same. This means that stable data has been collected, indicating that the system is operating stably and effectively. The collected data is valid. The MBB device can then transmit the collected valid data to the host. This helps improve the effectiveness of data collection and transmission.

[0140] In some embodiments, the target baud rate determined based on the local bit rate of the MBB device includes:

[0141] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0142] In this exemplary embodiment, after determining the data node to start data transmission, data transmission can be performed based on the target baud rate between the host and the MBB device. The target baud rate can be determined based on the local bit rate of the MBB device. This facilitates configuration of a reasonable data transmission rate, suitable for data collection scenarios, and helps reduce mismatches between data collection and transmission.

[0143] Assume that the clock output by the MBB device PMIC is F = 1 kHz, with a unit time of 1 second; T = 1 / F = 1 millisecond (i.e., one PCIe TLP MSI message is sent in 1 millisecond). Therefore, 1000 PCIe TLP MSI messages can be transmitted per unit time, resulting in an actual local bit rate of 1 Kbps.

[0144] Assume that the local bit rate and the remote bit rate are negotiated to be B = 1 Kbps. Within one bit rate transmission time (T = 1 mS), the MBB device transmits N = 10 PCIe TLP data packets to the host PCIe driver. One [PCIe TLP data packet] contains S = 1024 data symbols.

[0145] That is, the target baud rate: B*N*S=1Kbps*10*1024=10Mbps.

[0146] In this exemplary embodiment, during data transmission, the sampled data is directly synchronized to the Host PCIe (Audio) Interface Ring buff, and the MBB device transmits the data collected based on the negotiated target baud rate to the Host PCIe MHI Driver via PCIe TLP data packets.

[0147] The present disclosure provides a data collection device based on an MBB device. A host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. Figure 5 This is a schematic diagram of the structure of a data collection device based on an MBB device according to an exemplary embodiment. Figure 2 .like Figure 5 As shown, the device includes:

[0148] The message receiving module 50 is configured to receive PCIe TLP MSI messages sent by the MBB device at a first time interval T1; wherein the first time interval T1 is obtained by dividing a clock of the MBB device;

[0149] a bit rate matching module 51 configured to calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by a power management integrated circuit (PMIC) of the MBB device;

[0150] The data transmission module 52 is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

[0151] In this exemplary embodiment, the first time interval T1 obtained by dividing the clock of the MBB (Mobile Broadband) device can be obtained by obtaining a clock signal with a frequency of F_main from a master clock and then dividing it to obtain a clock signal with a frequency of F_div. Therefore, the frequency division ratio (N) is F_main divided by F_div. In other words, N = F_main / F_div. The first time interval T1 (corresponding to the clock period of F_div) is 1 / F_div.

[0152] In this exemplary embodiment, PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) uses a message (TLP)-based data transfer mode, and all bus transactions are implemented via messages. MSI (Message Signaled Interrupts) is an interrupt mechanism in PCIe that uses memory write requests (TLPs) to submit interrupt requests to the processor. When sending MSI messages using the PCIe interface, they are encapsulated into TLPs and transmitted to the host via the PCIe link.

[0153] In this exemplary embodiment, due to a bit rate mismatch between the MBB device and the host, data transmission between the two is affected. To improve data transmission efficiency and reduce data accumulation in the MBB device memory after data collection, this application implements real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, thereby improving data transmission efficiency.

[0154] In this exemplary embodiment, Figure 2 As shown in the figure, the host connects to the MBB device through the PCIE interface, and the MBB device connects to the peripheral device through the USB interface. The PCIe (Audio) Interface Driver component runs in the host and manages the PCIe audio interface device, ensuring the correct and efficient transmission of audio signals between the host and the PCIe audio device.

[0155] In this exemplary embodiment, the Host PCIe MHI Driver is a PCIe interface driver for connecting a modem to a host. The MHI (Modem Host Interface) is the communication interface between the modem and the host. This driver is primarily used for PCIe-based devices, enabling the modem to connect to the host via the PCIe interface.

[0156] In this application, when a host collects data from a peripheral device through an MBB device, the host and the MBB device transmit data through the PCIE interface. Given that the MBB device has relatively small memory, data transmission is performed by matching the local bit rate of the MBB device with the remote bit rate of the host in real time. This improves data transmission efficiency and reduces unexpected memory usage caused by data accumulation.

[0157] In some embodiments, the bit rate matching module is used to

[0158] determining a time difference between the second time interval T2 and the first time interval T1;

[0159] Based on the time difference between the second time interval T2 and the first time interval T1, the clock frequency of the host is adjusted so that the remote bit rate of the host matches the local bit rate of the MBB device in real time.

[0160] In this exemplary embodiment, determining the time difference between the second time interval T2 and the first time interval T1 includes:

[0161] Based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, combined with parameters such as the clock rate and transmission delay of the PCIE interface, the clock deviation is calculated.

[0162] The adjusting the clock frequency of the host based on the time difference between the second time interval T2 and the first time interval T1 so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes:

[0163] The host adjusts its clock frequency based on the calculated clock deviation to reduce or eliminate the deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

[0164] In some embodiments, the data transmission module is used to

[0165] Generate transaction feature capture instructions based on the data feature information of the collected data required by the application;

[0166] sending the transaction feature capture instruction to the MBB device, so that the MBB device monitors the collected data obtained during the data collection process in real time based on the data feature information included in the transaction feature capture instruction, and determines a collection time corresponding to the collected data matching the data feature information;

[0167] Start receiving, based on a collection time corresponding to the collected data matching the data characteristic information, the collected data transmitted by the MBB device at a target baud rate; wherein the data characteristic information includes at least one of the following:

[0168] The interval period between N consecutive rising edges is the same;

[0169] The interval period between N consecutive falling edges is the same.

[0170] In this exemplary embodiment, the host may issue a transaction feature capture instruction to the MBB device connected to the PCIE interface via a PCIE interface. Based on the transaction feature capture instruction, the MBB device invokes a data collection monitoring thread to monitor the data collected by the MBB device and compares the data features of the collected data with the data feature information in the transaction feature capture instruction. If the data features of the collected data are the same as the data feature information in the transaction feature capture instruction, the collection time of the collected data with the same data feature information as the data feature information in the transaction feature capture instruction is determined as the data node at which data transmission starts. The MBB device then begins transmitting the collected data to the host based on the data node at which data transmission starts. The data feature information in the transaction feature capture instruction is used to indicate the validity of the collected data. For example, the data feature information includes at least one of the following:

[0171] The interval period between N consecutive rising edges is the same;

[0172] The intervals between N consecutive falling edges are the same. This means that stable data has been collected, indicating that the system is operating stably and effectively. The collected data is valid. The MBB device can then transmit the collected valid data to the host. This helps improve the effectiveness of data collection and transmission.

[0173] In some embodiments, the target baud rate determined based on the local bit rate of the MBB device includes:

[0174] Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

[0175] In this exemplary embodiment, after determining the data node to start data transmission, data transmission can be performed based on the target baud rate between the host and the MBB device. The target baud rate can be determined based on the local bit rate of the MBB device. This facilitates configuration of a reasonable data transmission rate, suitable for data collection scenarios, and helps reduce mismatches between data collection and transmission.

[0176] The present disclosure provides a computer-readable storage medium storing a data collection program based on an MBB device. When executed by a processor, the data collection program based on the MBB device implements the data collection method based on the MBB device described in the above embodiments.

[0177] The present disclosure provides an electronic device, including a memory, a processor, and an MBB device-based data collection program stored in the memory and executable on the processor. When the processor executes the MBB device-based data collection program, the MBB device-based data collection method described in each of the above embodiments is implemented.

[0178] It should be noted that the logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can retrieve and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transmit a program for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion having one or more wires (electronic device), a portable computer disk cartridge (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic devices, and portable compact disc read-only memory (CDROM). Furthermore, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing it in a suitable manner if necessary, and then storing it in a computer memory.

[0179] It should be understood that various parts of the present disclosure can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used to implement: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0180] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0181] In the description of the present disclosure, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation to the present disclosure.

[0182] In addition, the terms "first" and "second" used in the embodiments of the present disclosure are only used for descriptive purposes and should not be understood as indicating or implying relative importance, or implicitly indicating the number of technical features indicated in the embodiments. Therefore, the features defined in the embodiments of the present disclosure with terms such as "first" and "second" can explicitly or implicitly indicate that the embodiment includes at least one such feature. In the description of the present disclosure, the word "plurality" means at least two or two or more, such as two, three, four, etc., unless otherwise clearly and specifically defined in the embodiments.

[0183] In this disclosure, unless otherwise clearly specified or limited in the embodiments, the terms "installed," "connected," "connect," and "fixed" appearing in the embodiments should be understood in a broad sense. For example, the connection can be a fixed connection, a detachable connection, or an integral connection. It can also be a mechanical connection, an electrical connection, etc.; of course, it can also be a direct connection, or an indirect connection through an intermediate medium, or it can be the internal communication between two elements, or the interaction between two elements. For those skilled in the art, the specific meanings of the above terms in this disclosure can be understood based on the specific implementation.

[0184] In the present disclosure, unless otherwise expressly specified or limited, when a first feature is "above" or "below" a second feature, it may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Furthermore, when a first feature is "above," "above," or "above" a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is "below," "below," or "below" a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.

[0185] Although the embodiments of the present disclosure have been shown and described above, it is understood that the above embodiments are illustrative and are not to be construed as limitations on the present disclosure. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present disclosure.

Claims

1. A data collection method based on MBB equipment, characterized in that: The host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The method includes: Generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device; generating a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and sending the PCIe TLP MSI message to the host at the first time interval T1 as a period, so that the host calibrates the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and the second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time; wherein the remote bit rate of the host is determined by the second time interval T2 for the host to receive the PCIe TLP MSI message; Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

2. The MBB device-based data collection method according to claim 1, characterized in that: The real-time matching of the local bit rate of the MBB device with the remote bit rate of the host and the collection and transmission of data from the peripheral device through the MBB device include: receiving a transaction feature capture instruction sent by the host; wherein the transaction feature capture instruction includes data feature information for starting data transmission; Based on the data feature information in the transaction feature capture instruction, determining collected data in a data collection process that matches the data feature information; Starting data transmission at a target baud rate determined based on a local bit rate of the MBB device based on a collection time corresponding to the collected data matching the data characteristic information.

3. The MBB device-based data collection method according to claim 2, wherein: The data characteristic information includes at least one of the following: The interval period between N consecutive rising edges is the same; The interval period between N consecutive falling edges is the same.

4. The MBB device-based data collection method according to claim 2, wherein: The target baud rate determined based on the local bit rate of the MBB device includes: Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

5. A data collection method based on MBB equipment, characterized in that: The host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The method includes: receiving a PCIe TLP MSI message sent by the MBB device at a first time interval T1, wherein the first time interval T1 is obtained by dividing a clock of the MBB device; Calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by a power management integrated circuit (PMIC) of the MBB device; Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data of the peripheral device is collected and transmitted through the MBB device.

6. The MBB device-based data collection method according to claim 5, characterized in that: The real-time calibrating of the clock frequencies of the host and the MBB device based on the second time interval T2 of receiving the PCIe TLP MSI message and the first time interval T1, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time, includes: determining a time difference between the second time interval T2 and the first time interval T1; Based on the time difference between the second time interval T2 and the first time interval T1, the clock frequency of the host is adjusted so that the remote bit rate of the host matches the local bit rate of the MBB device in real time.

7. The MBB device-based data collection method according to claim 6, wherein: The adjusting the clock frequency of the host based on the time difference between the second time interval T2 and the first time interval T1 so that the remote bit rate of the host matches the local bit rate of the MBB device in real time includes: Determine a clock deviation based on a time difference between the second time interval T2 and the first time interval T1, in combination with a clock rate and a transmission delay parameter of the PCIE interface; The clock frequency of the host is adjusted according to the clock deviation, so that the clock frequencies of the host and the MBB device are synchronized, and the local bit rate of the MBB device matches the remote bit rate of the host in real time.

8. The MBB device-based data collection method according to claim 5, wherein: Based on real-time matching between the local bit rate of the MBB device and the remote bit rate of the host, data collection and transmission of the peripheral device are performed through the MBB device, including: Generate transaction feature capture instructions based on the data feature information of the collected data required by the application; sending the transaction feature capture instruction to the MBB device, so that the MBB device monitors the collected data obtained during the data collection process in real time based on the data feature information included in the transaction feature capture instruction, and determines a collection time corresponding to the collected data matching the data feature information; Start receiving, based on a collection time corresponding to the collected data matching the data characteristic information, the collected data transmitted by the MBB device at a target baud rate; wherein the data characteristic information includes at least one of the following: The interval period between N consecutive rising edges is the same; The interval period between N consecutive falling edges is the same.

9. The MBB device-based data collection method according to claim 8, characterized in that: The target baud rate includes: Target baud rate P; where P = N*B*S; B is the local bit rate of the MBB device; B = 1 / f; f is the first time interval T1 obtained by dividing the clock of the MBB device; S is the data symbol bits contained in a PCIE TLP packet, where S = 1024; and N is the number of PCIE TLP data packets transmitted in the first time interval T1.

10. A data collection device based on MBB equipment, characterized in that: The host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The apparatus includes: an information generation module, configured to generate, based on a clock frequency output by a power management integrated circuit (PMIC) of the MBB device, a local bit rate of the MBB device and a first time interval T1 obtained by dividing the clock frequency of the MBB device; a message sending module, configured to generate a PCIe TLP MSI message based on the local bit rate timing of the MBB device, and periodically send the PCIe TLP MSI message to the host at the first time interval T1, so that the host can calibrate the clock frequencies of the host and the MBB device in real time based on the first time interval T1 carried in the PCIe TLP MSI message and a second time interval T2 for receiving the PCIe TLP MSI message, so that the local bit rate of the MBB device matches the remote bit rate of the host in real time; wherein the remote bit rate of the host is determined by the second time interval T2 for receiving the PCIe TLP MSI message by the host; The data transmission module is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

11. A data collection device based on MBB equipment, characterized in that: The host and the MBB device are connected via a PCIE interface, and the MBB device is connected to a peripheral device. The apparatus includes: a message receiving module, configured to receive PCIe TLP MSI messages sent by the MBB device at a first time interval T1; wherein the first time interval T1 is obtained by dividing a clock of the MBB device; a bit rate matching module, configured to calibrate the clock frequencies of the host and the MBB device in real time based on the second time interval T2 and the first time interval T1 of receiving the PCIe TLP MSI message, so that the remote bit rate of the host matches the local bit rate of the MBB device in real time; wherein the local bit rate of the MBB device is generated based on the clock frequency output by a power management integrated circuit (PMIC) of the MBB device; The data transmission module is configured to collect and transmit data from a peripheral device through the MBB device based on real-time matching of the local bit rate of the MBB device with the remote bit rate of the host.

12. A computer-readable storage medium, characterized in that A data collection program based on an MBB device is stored thereon. When the data collection program based on the MBB device is executed by the processor, the data collection method based on the MBB device according to any one of claims 1 to 9 is implemented.

13. An electronic device, characterized in that: The method comprises a memory, a processor, and a data collection program based on an MBB device that is stored in the memory and can be run on the processor. When the processor executes the data collection program based on the MBB device, the data collection method based on the MBB device according to any one of claims 1 to 9 is implemented.

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