Preparation method of large-area laminated cell

Abstract

The invention discloses a preparation method of a large-area laminated cell, and belongs to the field of solar cells, the large-area laminated cell comprises a top cell and a bottom cell, the top cell is a perovskite solar cell, the bottom cell is a crystalline silicon cell, a composite layer is arranged between the top cell and the bottom cell, and the composite layer is used for connecting the top cell and the bottom cell in series. The method further comprises the following steps that S1, a composite layer is formed on the crystalline silicon cell through magnetron sputtering; a wide-band-gap perovskite cell is used as a top cell, a narrow-band-gap silicon cell is used as a bottom cell, and the top cell and the bottom cell are connected in series through a composite layer; meanwhile, the molecular ferroelectric layer is grown in situ on the absorption layer of the perovskite cell through slit coating, the molecular ferroelectric layer can greatly enhance a built-in electric field of the perovskite top cell, sufficient driving force is provided to separate charges and transmit the charges, non-radiative recombination generated by perovskite surface defects is reduced, and the performance of the perovskite top cell is improved. Therefore, the open-circuit voltage of the perovskite cell is improved, and the photoelectric conversion efficiency of the laminated cell is improved.

Description

Technical Field

[0001] The present invention relates to the field of batteries, and more specifically, to a method for preparing a large-area laminated battery. Background Art

[0002] The entire photovoltaic market has been expanding, and traditional crystalline silicon solar cells alone cannot meet the demand for photovoltaic power generation capacity; the photovoltaic market needs to develop and innovate, and perovskite cells have gradually emerged as thin-film solar cells in recent years. The stacked cell is composed of two or more junction cells in series. The top cell of the two-junction stacked cell uses a wide bandgap material, and the bottom cell uses a narrow bandgap light-absorbing material. The bandgap of silicon is 1.12eV, which is close to the optimal bandgap of the bottom cell. Therefore, a top cell combination with a suitable bandgap is required. The optimal bandgap of the top cell material is about 1.65-1.75eV. Perovskite materials have optoelectronic properties such as adjustable bandgap, high absorption coefficient and low-voltage bandgap absorption. They are the most suitable choice as top cells and have great development potential.

[0003] The existing large-area perovskite thin films prepared on suede silicon bottom cells have many defects on the surface and very serious non-radiative recombination. At the same time, due to the suede structure of silicon cells, it is difficult to achieve uniform growth of many functional layer materials with nanometer-level thickness.

[0004] To this end, a method for preparing a large-area laminated battery is proposed. Summary of the invention

[0005] In view of the problems existing in the prior art, the purpose of the present invention is to provide a method for preparing a large-area tandem battery, which can solve the problem of serious non-radiative recombination of perovskites in large-area silicon perovskite tandem batteries.

[0006] To solve the above problems, the present invention adopts the following technical solutions.

[0007] A method for preparing a large-area stacked cell, comprising a top cell and a bottom cell, wherein the top cell is a perovskite solar cell, the bottom cell is a crystalline silicon cell, a composite layer is provided between the top cell and the bottom cell, and the composite layer is used to connect the top cell and the bottom cell in series, and further comprising the following steps:

[0008] S1, magnetron sputtering composite layer on crystalline silicon cell;

[0009] S2, preparing a perovskite hole transport layer by slit coating on the composite layer;

[0010] S3, preparing a perovskite absorption layer by slit coating on the perovskite hole transport layer;

[0011] S4, preparing a molecular ferroelectric in-situ growth layer by slit coating on the perovskite absorption layer;

[0012] S5, evaporating an electron transport layer on the molecular ferroelectric in-situ grown layer;

[0013] S6. atomic layer deposition of an intermediate protective layer on the electron transport layer;

[0014] S7, magnetron sputtering a transparent conductive thin film layer on the intermediate protective layer;

[0015] S8, evaporating an anti-reflection thin film layer on the transparent conductive thin film layer;

[0016] S9. Screen-printing is performed on the ITO at the bottom of the crystalline silicon cell to prepare a metal electrode Ag, and screen-printing is performed on the anti-reflection film layer to prepare a metal grid line electrode Ag.

[0017] Furthermore, the band gap of the perovskite solar cell is 1.65eV-1.75eV.

[0018] Further, the thickness of the sputtered composite layer in S1 is 5nm-40nm;

[0019] The perovskite hole transport layer prepared in S2 is a SAM material with a thickness of 5nm-30nm;

[0020] The thickness of the molecular ferroelectric in-situ grown layer in S4 is 1-20 nm.

[0021] Further, the thickness of the perovskite absorption layer in S3 is 600nm-1μm;

[0022] The thickness of the electron transport layer in S5 is 5-30 nm;

[0023] The thickness of the intermediate protective layer in S6 is 5-20 nm;

[0024] The thickness of the S7 transparent conductive film layer is 40nm-200nm;

[0025] The thickness of the S8 anti-reflection film layer is 100-200 nm.

[0026] Furthermore, the front metal grid line electrode is a front metal grid line silver electrode;

[0027] The anti-reflection thin film layer is a MgF2 or LiF anti-reflection thin film layer;

[0028] The transparent conductive film layer is an ITO, IZO, AZO or FTO transparent conductive film layer.

[0029] Further, the intermediate protective layer is a SnO2 intermediate protective layer;

[0030] The electron transport layer is SnO2, C 60or PCBM electron transport layer;

[0031] The passivation layer is a LiF or MgF2 passivation layer;

[0032] The perovskite hole transport layer is a SAM perovskite hole transport layer containing a phosphoric acid group such as Meo-2PACz or Me-4PAC;

[0033] The composite layer is ITO, IZO or VTTO.

[0034] Furthermore, in said S3, when preparing the perovskite absorption layer on the perovskite hole transport layer, the following steps are included:

[0035] S3.1, the slit coating knife head coats a 5 μm perovskite absorber layer wet film;

[0036] S3.2, slowly vacuum dry at 0.1 Torr pressure for 180 s;

[0037] S3.3, annealing at 150°C for 10 min;

[0038] In the above S4, when the molecular ferroelectric layer is in-situ grown on the perovskite absorption layer, the following steps are included:

[0039] S4.1, the slit coating knife head coats a 12 μm molecular ferroelectric layer wet film;

[0040] S4.2. Anneal at 100°C for 10 minutes.

[0041] Furthermore, the concentration of the solution of the perovskite absorption layer is 1.4M, and the composition of the solution of the perovskite absorption layer is Cs 0.22 FA 0.78 Pb(I 0.85 Br 0.15 )3. The molecular ferroelectric in-situ growth layer is a lead iodide-containing molecular ferroelectric material such as (R(L)-LIPF)2PbI4 or (DFPD)2PbI4.

[0042] Compared with the prior art, the present invention has the following beneficial effects:

[0043] The present invention uses a wide-bandgap perovskite cell as a top cell and a narrow-bandgap silicon cell as a bottom cell, and realizes the series connection of the top cell and the bottom cell through a composite layer; at the same time, a molecular ferroelectric layer is in-situ grown on the absorption layer of the perovskite cell by slit coating. The molecular ferroelectric layer can greatly enhance the built-in electric field of the perovskite top cell, provide sufficient driving force to separate and transmit charges, reduce the non-radiative recombination caused by defects on the perovskite surface, and significantly improve the open circuit voltage of the perovskite cell, thereby greatly improving the photoelectric conversion efficiency of the entire stacked cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 This is a structural diagram of a large-area laminated battery of the present invention;

[0045] Figure 2 The JV curve of the crystalline silicon / perovskite tandem battery prepared by adding a molecular ferroelectric in-situ growth layer in the present invention;

[0046] Figure 3 This is a JV curve diagram of a crystalline silicon / perovskite tandem battery prepared without adding a molecular ferroelectric in-situ growth layer according to the present invention. DETAILED DESCRIPTION

[0047] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention; it is obvious that the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments, and all other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making creative work are within the scope of protection of the present invention.

[0048] Embodiment 1:

[0049] See also Figures 1 to 3 , a preparation method of a large-area stacked battery, comprising a top battery and a bottom battery, wherein the top battery is a perovskite solar cell, and the band gap of the perovskite solar cell is 1.65eV-1.75eV, the bottom battery is a crystalline silicon battery, a composite layer is provided between the top battery and the bottom battery, and the composite layer is used to connect the top battery and the bottom battery in series, and the large-area stacked battery comprises, from top to bottom, a front metal grid electrode, an anti-reflection film layer, a transparent conductive film layer, an intermediate protective layer, an electron transport layer, a molecular ferroelectric in-situ growth layer, the molecular ferroelectric in-situ growth layer is (R(L)-LIPF)2PbI4, a perovskite absorption layer, the concentration of the solution of the perovskite absorption layer is 1.4M, and the composition of the solution of the perovskite absorption layer is Cs 0.22 FA 0.78 Pb(I 0.85 Br 0.15 ) 3. Perovskite hole transport layer, composite layer, crystalline silicon bottom cell and back electrode; also includes the following steps:

[0050] S1. First, clean the surface of the crystalline silicon cell to remove all surface dirt and oxide layer. Place the cleaned crystalline silicon cell into the sputtering chamber and evacuate it to a base pressure below 10^-5Torr to ensure that there is no impurity gas affecting the sputtering process. Then, magnetron sputter an ITO composite layer with a thickness of 5nm-40nm on the crystalline silicon cell.

[0051] S2. Slit coating is performed on the composite layer to prepare a perovskite hole transport layer of the SAM material, wherein a MgF2 passivation layer is provided on the surface of the perovskite hole transport layer, and the thickness of the perovskite hole transport layer is 5nm-30nm;

[0052] S3, preparing a perovskite absorption layer with a thickness of 600nm-1μm by slit coating on the perovskite hole transport layer;

[0053] S4, preparing a molecular ferroelectric in-situ growth layer with a thickness of 1-20 nm by slit coating on the perovskite absorption layer;

[0054] S5, vapor-depositing an electron transport layer with a thickness of 5-30 nm on the molecular ferroelectric in-situ growth layer, wherein a MgF2 passivation layer is provided on the surface of the electron transport layer, and the electron transport layer is a PCBM electron transport layer;

[0055] S6, atomic layer deposition of an intermediate protective layer with a thickness of 5-20 nm on the electron transport layer, wherein the intermediate protective layer is SnO2;

[0056] S7, magnetron sputtering a transparent conductive film layer with a thickness of 40nm-200nm on the intermediate protective layer, and the transparent conductive film layer is FTO;

[0057] S8, vapor-depositing an anti-reflection thin film layer with a thickness of 100-200 nm on the transparent conductive thin film layer, wherein the anti-reflection thin film layer is a LiF anti-reflection thin film layer;

[0058] S9. Screen-printing is performed on the ITO at the bottom of the crystalline silicon cell to prepare a metal electrode Ag, and screen-printing is performed on the anti-reflection film layer to prepare a metal grid line electrode Ag.

[0059] The metal grid line electrode is a metal grid line silver electrode;

[0060] The perovskite hole transport layer is a SAM perovskite hole transport layer containing a phosphoric acid group such as Meo-2PACz or Me-4PAC;

[0061] In S3, when preparing the perovskite absorption layer on the perovskite hole transport layer, the steps include:

[0062] S3.1, the slit coating knife head coats a 5 μm perovskite absorber layer wet film;

[0063] S3.2, slowly vacuum dry at 0.1 Torr pressure for 180 s;

[0064] S3.3, annealing at 150°C for 10 min;

[0065] In S4, when the molecular ferroelectric layer is in situ grown on the perovskite absorption layer, the following steps are included:

[0066] S4.1, the slit coating knife head coats a 12 μm molecular ferroelectric layer wet film;

[0067] S4.2. Anneal at 100°C for 10 minutes.

[0068] The above is only a preferred specific implementation of the present invention; however, the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical solution and its improved conception within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for preparing a large-area stacked cell, comprising a top cell and a bottom cell, wherein the top cell is a perovskite solar cell, the bottom cell is a crystalline silicon cell, a composite layer is provided between the top cell and the bottom cell, and the composite layer is used to connect the top cell and the bottom cell in series, characterized in that: The following steps are also included: S1, magnetron sputtering composite layer on crystalline silicon cell; S2, preparing a perovskite hole transport layer by slit coating on the composite layer; S3, preparing a perovskite absorption layer by slit coating on the perovskite hole transport layer; S4, preparing a molecular ferroelectric in-situ growth layer by slit coating on the perovskite absorption layer; S5, evaporating an electron transport layer on the molecular ferroelectric in-situ grown layer; S6. atomic layer deposition of an intermediate protective layer on the electron transport layer; S7, magnetron sputtering a transparent conductive thin film layer on the intermediate protective layer; S8, evaporating an anti-reflection thin film layer on the transparent conductive thin film layer; S9. Screen-printing is performed on the ITO at the bottom of the crystalline silicon cell to prepare a metal electrode Ag, and screen-printing is performed on the anti-reflection film layer to prepare a metal grid line electrode Ag.

2. The method for preparing a large-area laminated battery according to claim 1, characterized in that: The band gap of the perovskite solar cell is 1.65eV-1.75eV.

3. The method for preparing a large-area laminated battery according to claim 2, characterized in that: The thickness of the sputtered composite layer in S1 is 5nm-40nm; The perovskite hole transport layer prepared in S2 is a SAM material with a thickness of 5nm-30nm; The thickness of the molecular ferroelectric in-situ grown layer in S4 is 1-20 nm.

4. The method for preparing a large-area laminated battery according to claim 3, characterized in that: The thickness of the perovskite absorption layer in S3 is 600nm-1μm; The thickness of the electron transport layer in S5 is 5-30 nm; The thickness of the intermediate protective layer in S6 is 5-20 nm; The thickness of the S7 transparent conductive film layer is 40nm-200nm; The thickness of the S8 anti-reflection film layer is 100-200 nm.

5. The method for preparing a large-area laminated battery according to claim 4, characterized in that: The front metal grid line electrode is a front metal grid line silver electrode; The anti-reflection film layer is a LiF anti-reflection film layer; The transparent conductive film layer is a FTO transparent conductive film layer.

6. The method for preparing a large-area laminated battery according to claim 5, characterized in that: The intermediate protective layer is a SnO2 intermediate protective layer; The electron transport layer is a PCBM electron transport layer; The passivation layer is a MgF2 passivation layer; The perovskite hole transport layer is a Me-4PAC SAM perovskite hole transport layer containing phosphoric acid groups; The composite layer is ITO.

7. The method for preparing a large-area laminated battery according to claim 6, characterized in that: In the above S3, when preparing the perovskite absorption layer on the perovskite hole transport layer, the following steps are included: S3.1, the slit coating knife head coats a 5 μm perovskite absorber layer wet film; S3.2, slowly vacuum dry at 0.1 Torr pressure for 180 s; S3.3, annealing at 150°C for 10 min; In the above S4, when the molecular ferroelectric layer is in-situ grown on the perovskite absorption layer, the following steps are included: S4.1, the slit coating knife head coats a 12 μm molecular ferroelectric layer wet film; S4.

2. Anneal at 100°C for 10 minutes.

8. The method for preparing a large-area laminated battery according to claim 7, characterized in that: The concentration of the solution of the perovskite absorption layer is 1.4M, and the composition of the solution of the perovskite absorption layer is Cs 0.22 FA 0.78 Pb(I 0.85 Br 0.15 )3. The molecular ferroelectric in-situ grown layer is (R(L)-LIPF)2PbI4.

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