Positive-polarity square-wave power supply circuit, test device for device under test, and power supply method

Abstract

The present application provides a positive square-wave power supply circuit, a test device for a device under test, and a power supply method. The positive square-wave power supply circuit includes a square-wave generating unit, and the square-wave generating unit includes a plurality of cascaded half-bridge structures. Each half-bridge structure includes a high-voltage DC power supply, an energy storage module, a first switching module located on the first bridge arm, and a second switching module located on the second bridge arm. The high-voltage DC power supply and the energy storage module are connected in parallel. The power supply circuit has a simple structure, good scalability, is independent between levels, and the output square-wave waveform parameters can be flexibly adjusted. It is suitable as a positive square-wave power supply circuit for high-voltage SiC package insulation assessment, and solves the problem in the prior art that there is a lack of a high-voltage positive square-wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside the high-voltage silicon carbide device exposed to the positive square-wave voltage.

Description

Technical Field

[0001] This application relates to the field of high-voltage SiC package insulation assessment. Specifically, it relates to a positive-polarity square-wave power supply circuit, a test device for a device under test, and a method for supplying power to a device under test using any one of the positive-polarity square-wave power supply circuits. Background Art

[0002] Silicon carbide (SiC), as a third-generation wide-bandgap semiconductor device, is considered to be a core device for the future power grid development due to its excellent characteristics such as high voltage, high frequency, high temperature resistance, fast switching speed, and low loss.

[0003] However, due to the lack of a high-voltage positive-polarity square-wave power supply for high-voltage SiC package insulation assessment, there is almost no research on partial discharge under high-voltage slew rate and high-amplitude square-wave conditions in actual high-voltage silicon carbide devices at present, and it still remains at the stage of testing on samples of internal components of the devices.

[0004] The generated square-wave signal is relatively single and cannot meet the multi-signal requirements of semiconductor devices, resulting in complicated and cumbersome testing. Summary of the Invention

[0005] The main purpose of this application is to provide a positive-polarity square-wave power supply circuit, a test device for a device under test, and a method for supplying power to a device under test using any one of the positive-polarity square-wave power supply circuits, so as to at least solve the problem in the prior art that the lack of a high-voltage positive-polarity square-wave power supply for high-voltage SiC package insulation assessment leads to the inability to fully evaluate the partial discharge inside a high-voltage silicon carbide device exposed to a positive-polarity square-wave voltage.

[0006] To achieve the above object, according to one aspect of this application, a positive-polarity square-wave power supply circuit is provided, including: a square-wave generating unit for generating a positive-polarity square-wave signal. The square-wave generating unit includes a plurality of cascaded half-bridge structures. Each half-bridge structure includes a high-voltage DC power supply, an energy storage module, a first switching module located on the first bridge arm, and a second switching module located on the second bridge arm. The high-voltage DC power supply and the energy storage module are connected in parallel. The first end of the first switching module is electrically connected to the positive pole of the high-voltage DC power supply, and the second end of the second switching module is electrically connected to the negative pole of the high-voltage DC power supply.

[0007] Optionally, the first end of the first switching module is electrically connected to the positive pole of the high-voltage DC power supply, and the control end of the first switching module is used to input a first control signal; the first end of the second switching module is electrically connected to the second end of the first switching module, the control end of the second switching module is used to input a second control signal, and the second end of the second switching module is electrically connected to the negative pole of the high-voltage DC power supply, wherein the first switching module and the second switching module are connected in a half-bridge configuration.

[0008] Optionally, each of the switching modules includes a MOS device.

[0009] Optionally, the energy storage module includes at least one energy storage capacitor.

[0010] Optionally, the power supply circuit further includes: a current limiting unit connected in series with the square wave generating unit.

[0011] Optionally, the current limiting unit includes at least one current limiting resistor.

[0012] Optionally, in the case where the current limiting unit includes a plurality of current limiting resistors, all of the current limiting resistors are connected in series.

[0013] According to another aspect of the present application, there is provided a test device for a device under test, including: any one of the positive-polarity square wave power supply circuits as described above, the positive-polarity square wave power supply circuit being used to supply power to the device under test during the package insulation test of the device under test; a test circuit, being used to be electrically connected to the device under test and used to perform a package insulation test on the device under test.

[0014] According to another aspect of the present application, there is provided a method for supplying power to a device under test using any one of the positive-polarity square wave power supply circuits as described above. The method includes: controlling each switching device in the half-bridge structure in the square wave generating unit to conduct or cut off according to a preset period to provide the positive-polarity square wave power supply to the device under test; wherein, the switching devices on the first bridge arm of the half-bridge structure and the switching devices on the second bridge arm do not conduct simultaneously, the first bridge arm is the main branch of the half-bridge structure, and the second bridge arm is the current discharge branch of the half-bridge structure.

[0015] Optionally, controlling each switching device in the half-bridge structure in the square-wave generating unit to conduct or cut off according to a preset period includes: controlling the switching devices in the first bridge arm of the square-wave generating unit to conduct, and controlling the switching devices in the second bridge arm of the square-wave generating unit to cut off, so as to provide a high level to the device under test; after providing the high level to the device under test, controlling the switching devices in the first bridge arm of the square-wave generating unit to cut off, and controlling the switching devices in the second bridge arm of the square-wave generating unit to cut off; controlling the switching devices in the first bridge arm of the square-wave generating unit to cut off, and controlling the switching devices in the second bridge arm of the square-wave generating unit to conduct, so as to provide a low level to the device under test; after providing the low level to the device under test, controlling the switching devices in the first bridge arm of the square-wave generating unit to cut off, and controlling the switching devices in the second bridge arm of the square-wave generating unit to cut off, so as to provide the positive-polarity square-wave power supply to the device under test.

[0016] Optionally, the half-bridge structure includes a first switching module and a second switching module. Controlling the switching devices in the first bridge arm of the square-wave generating unit to conduct, and controlling the switching devices in the second bridge arm of the square-wave generating unit to cut off, so as to provide a high level to the device under test, includes: controlling all the switching devices in the first switching module to conduct, and controlling the switching devices in the second switching module to cut off, so as to provide a high level to the device under test.

[0017] Optionally, the half-bridge structure includes a first switching module and a second switching module. Controlling the switching devices in the first bridge arm of the square-wave generating unit to cut off, and controlling the switching devices in the second bridge arm of the square-wave generating unit to cut off, includes: controlling all the switching devices in the first switching module to cut off, and controlling all the switching devices in the second switching module to cut off.

[0018] Optionally, the half-bridge structure includes a first switching module and a second switching module. Controlling the switching devices in the first bridge arm of the square-wave generating unit to cut off, and controlling the switching devices in the second bridge arm of the square-wave generating unit to conduct, so as to provide a low level to the device under test, includes: controlling all the switching devices in the first switching module to cut off, and controlling all the switching devices in the second switching module to conduct, so as to provide a low level to the device under test.

[0019] Optionally, the half-bridge structure includes a first switch module and a second switch module, and controls the switching devices in the first bridge arm of the square-wave generating unit to be turned off, and controls the switching devices in the second bridge arm of the square-wave generating unit to be turned off, so as to provide the positive-polarity square-wave power supply for the device under test, including: controlling all the switching devices in the first switch module to be turned off, and controlling all the switching devices in the second switch module to be turned off, so as to provide the positive-polarity square-wave power supply for the device under test.

[0020] Optionally, the square-wave generating unit includes n cascaded half-bridge structures, and the high level provided by the square-wave generating unit to the device under test is , where V DUT is the voltage value of the high level, i is the number of stages of the half-bridge structure, n is the number of all the half-bridge structures, and V DCi is the voltage value of the high-voltage DC power supply in the i-th stage of the half-bridge structure, and the low level provided by the square-wave generating unit to the device under test is 0.

[0021] Applying the technical solution of the present application, the above-mentioned polarity square-wave power supply circuit includes a square-wave generating unit, which is used to generate a positive-polarity square-wave signal. The square-wave generating unit includes a plurality of cascaded half-bridge structures. Each half-bridge structure includes a high-voltage DC power supply, an energy storage module, a first switch module located on the first bridge arm, and a second switch module located on the second bridge arm. The high-voltage DC power supply and the energy storage module are connected in parallel. The first end of the first switch module is electrically connected to the positive pole of the high-voltage DC power supply, and the second end of the second switch module is electrically connected to the negative pole of the high-voltage DC power supply. This power supply circuit has a simple structure, good scalability, is independent of each other between levels, and the output square-wave waveform parameters can be flexibly adjusted. It is suitable as a positive-polarity square-wave power supply circuit for high-voltage SiC package insulation assessment, and solves the problem in the prior art that there is a lack of a high-voltage positive-polarity square-wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside the high-voltage silicon carbide device exposed to the positive-polarity square-wave voltage. Description of the Drawings

[0022] The specification drawings forming a part of the present application are used to provide a further understanding of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation to the present application. In the drawings:

[0023] Figure 1 Shows a parametric schematic diagram of a positive-polarity square-wave voltage waveform provided in an embodiment of the present application;

[0024] Figure 2 Shows a schematic diagram of the effect of partial discharge testing based on existing test standards;

[0025] Figure 3 The schematic structural diagram of a positive-polarity square-wave power supply circuit provided in an embodiment of the present application is shown;

[0026] Figure 4 The schematic structural diagram of another positive-polarity square-wave power supply circuit provided in an embodiment of the present application is shown;

[0027] Figure 5 The schematic structural diagram of another positive-polarity square-wave power supply circuit provided in an embodiment of the present application is shown;

[0028] Figure 6 The schematic logic diagram of a method for supplying power to a device under test by using any one of the positive-polarity square-wave power supply circuits provided in an embodiment of the present application is shown;

[0029] Figure 7 The schematic diagram of the simulation waveform of a positive-polarity square wave provided in an embodiment of the present application is shown;

[0030] Figure 8 The schematic structural diagram of a test device for a device under test provided in an embodiment of the present application is shown;

[0031] Figure 9 The schematic logic diagram of a control signal transmission provided in an embodiment of the present application is shown;

[0032] Figure 10 The schematic diagram of the key pins of a 4 V to 800 V isolated power module provided in an embodiment of the present application is shown;

[0033] Figure 11 The waveform diagram of the output voltage applied across the device under test and the output current flowing through the device under test provided in an embodiment of the present application is shown;

[0034] Figure 12 The schematic diagram of the voltage output characteristics at different sample capacitance values provided in an embodiment of the present application is shown;

[0035] Figure 13 The schematic diagram of the output voltage waveform when different numbers of stages of the square-wave generating unit are input provided in an embodiment of the present application is shown;

[0036] Figure 14 The schematic diagram of the output voltage waveform when drive signals with different duty cycles are set provided in an embodiment of the present application is shown;

[0037] Figure 15 The schematic diagram of the output voltage waveform when drive signals with different frequencies are set provided in an embodiment of the present application is shown;

[0038] Figure 16 The figure shows a schematic diagram of the output voltage waveform when different delay times are set for the driving signal provided in the embodiments of the present application.

[0039] Among them, the above-mentioned drawings include the following reference numerals:

[0040] 01, positive square wave power supply circuit; 02, test circuit; 10, square wave generation unit; 11, half-bridge structure; 111, energy storage module; 112, first switch module; 113, second switch module; 20, device under test; 30, current limiting unit. Detailed implementation manners

[0041] It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0042] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0043] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so as to implement the embodiments of the present application described herein. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0044] As introduced in the background art, the voltage level of high-voltage silicon carbide devices can reach up to 27 kV at most, and the high voltage amplitude increases the electric field stress inside the module. While high-voltage silicon carbide devices can withstand higher temperatures, during the repeated on and off processes, the drain-source level of the device bears high voltage in the off state, while the device hardly bears voltage in the on state. Therefore, the internal chip and packaging insulation structure of the device bear positive square wave voltage, and this voltage has characteristics such as high amplitude, high voltage slew rate, and high repetition frequency. And under the positive square wave voltage, the weak links of the insulation are more likely to discharge. Figure 1The positive-polarity square-wave voltage waveform is parameterized, and its indicators include voltage amplitude, rise time, fall time, pulse width, and pulse period. For the positive-polarity square-wave voltage, the pulse period is the reciprocal of the frequency, and the ratio of the pulse width to the pulse period is the duty cycle.

[0045] Currently, the existing standard for evaluating the insulation performance of IGBT power devices stipulates the partial discharge measurement requirements of IGBT power devices under 50 Hz (or 60 Hz) AC voltage. Referring to the existing standard, the partial discharge test procedure is as Figure 2 shown. Figure 2 In, the horizontal axis represents time, and the vertical axis represents the effective value of the applied 50 Hz test voltage, where U m is the maximum blocking voltage of the power device. During the test, the gate, collector, and emitter of the IGBT power device need to be short-circuited, and an AC voltage is applied between the short-circuited part and the metal bottom plate. The effective value of this AC voltage rises to 1.5U m / in 10 s, and then remains for 60 s (as shown in t Figure 2 in). During the t 1 period, partial discharge phenomena may occur. After that, the effective value of this AC voltage drops to 1.1U 1 / m in 10 s, and then remains for 30 s (as shown in t in). The partial discharge level of the device under test is measured in the last 5 s of the t Figure 2 period. The maximum discharge amount standards for components and sub-components to pass the test are 10 pC and 50 pC respectively. 2 During the t 2 period, the partial discharge level of the device under test is measured in the last 5 s. The maximum discharge amount standards for components and sub-components to pass the test are 10 pC and 50 pC respectively.

[0046] The main defects of the existing standard for evaluating high-voltage silicon carbide devices are mainly three points: First, this standard uses an AC voltage with a relatively low du / dt (instead of a bipolar square-wave voltage with a much higher du / dt) for partial discharge assessment, and the partial discharge phenomena of high-voltage silicon carbide devices under AC conditions are different from those under bipolar square-wave conditions; Second, the AC condition itself is different from the positive-polarity square-wave voltage condition actually endured by the internal chips and packaging insulation structures of high-voltage silicon carbide devices, and relevant literature also points out that partial discharge phenomena are more likely to occur under the positive-polarity repetitive square-wave voltage condition; Third, this standard only tests the insulation performance between the bottom plate and other insulated parts, and does not evaluate the insulation performance of the insulation structure composed of chips and packaging materials. In summary, the assessment content of this standard is not rigorous and comprehensive when applied to high-voltage silicon carbide devices. And the existing standard can no longer fully evaluate the partial discharge problems inside high-voltage silicon carbide devices exposed to positive-polarity square-wave voltage, and it is called for adding square-wave voltage assessment in the reliability assessment of silicon carbide devices.

[0047] However, due to the lack of a high-voltage positive square-wave power supply for the insulation assessment of high-voltage SiC packages, there is almost no research on partial discharge under high-voltage slew rate and high-amplitude square-wave conditions in actual high-voltage silicon carbide devices at present. The research still stays at testing samples of internal components of the devices. Therefore, there is a lack of guidelines for suppressing partial discharge of DBC under square-wave conditions and high-voltage slew rate (>50 kV / μs).

[0048] To solve the problem in the prior art that there is a lack of a high-voltage positive square-wave power supply for the insulation assessment of high-voltage SiC packages, resulting in the inability to fully evaluate the partial discharge inside high-voltage silicon carbide devices exposed to positive square-wave voltages, embodiments of the present application provide a positive square-wave power supply circuit, a method for supplying power to a device under test using any one of the above positive square-wave power supply circuits, and a test device for the device under test.

[0049] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention.

[0050] Figure 3 The structure diagram of a positive square-wave power supply circuit is shown. The positive square-wave power supply circuit is used to provide a test power supply for the package insulation test of a device under test, as Figure 3 and Figure 4 shown. The power supply circuit includes: a square-wave generating unit 10 for generating a positive square-wave signal. The square-wave generating unit 10 includes a plurality of cascaded half-bridge structures 11. Each of the half-bridge structures 11 includes a high-voltage DC power supply V DCn , an energy storage module 111, a first switch module 112 located on the first bridge arm, and a second switch module 113 located on the second bridge arm. The high-voltage DC power supply V DCn is connected in parallel with the energy storage module 111. The first end of the first switch module 112 is electrically connected to the positive pole of the high-voltage DC power supply V DCn , and the second end of the second switch module 113 is electrically connected to the negative pole of the high-voltage DC power supply V DCn .

[0051] Among them, as Figure 4 shown, the square-wave generating unit is used to provide a positive square-wave power supply for the device under test 20. In this way, a square-wave generating unit with a lower voltage level can be used to achieve the square-wave output function through a cascaded manner.

[0052] The above-mentioned polarity square-wave power supply circuit of the present application includes a square-wave generating unit. The square-wave generating unit includes a plurality of cascaded half-bridge structures, and each half-bridge structure includes at least two switching modules. The square-wave generating unit is used to generate a positive-polarity square-wave signal. The power supply circuit has a simple structure, good scalability, is independent between levels, and the output square-wave waveform parameters can be flexibly adjusted. It is suitable as a positive-polarity square-wave power supply circuit for high-voltage SiC package insulation assessment, and solves the problem in the prior art that there is a lack of a high-voltage positive-polarity square-wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside high-voltage silicon carbide devices exposed to positive-polarity square-wave voltages.

[0053] In some examples, such as Figure 4 shown, the above-mentioned square-wave generating unit further includes: a high-voltage DC power supply V DCn ; an energy storage module 111. The first end of the energy storage module 111 is electrically connected to the positive electrode of the high-voltage DC power supply V DCn , and the second end of the energy storage module 111 is electrically connected to the negative electrode of the high-voltage DC power supply V DCn .

[0054] Specifically, n in the high-voltage DC power supply V DCn is the total number of levels of the half-bridge structure. The high-voltage DC power supply of the first-level half-bridge structure is V DC1 , the high-voltage DC power supply of the second-level half-bridge structure is V DC2 , and the high-voltage DC power supply of the i-level half-bridge structure is V DCi . The high-voltage DC power supply V DCi is used to supply energy to the bus of the half-bridge structure. The output voltage of each square-wave generating unit is clamped by the high-voltage DC power supply V DCi and the energy storage unit, and there is no risk of overvoltage in a single square-wave generating unit.

[0055] In some examples, such as Figure 4 and Figure 5 shown, the above-mentioned energy storage module 111 includes N series-connected energy storage capacitors C n . Among them, in the case where the energy storage module 111 includes only one energy storage capacitor C n , the first end of the energy storage capacitor C n is electrically connected to the positive electrode of the high-voltage DC power supply V DCn , and the second end of the energy storage capacitor C n is electrically connected to the negative electrode of the high-voltage DC power supply V DCn .

[0056] In some examples, the energy storage module includes at least one energy storage capacitor.

[0057] In some examples, the energy storage module may include multiple energy storage capacitors. A certain number of energy storage capacitors can increase the stability of the circuit. For example, by setting two energy storage capacitors, in the case where one of them is damaged, the other can play a role to ensure the stability of the circuit.

[0058] Among them, the high-voltage DC power supply V DCn The n in and the energy storage capacitor C n The n in both represent the total number of stages of the half-bridge structure. The energy storage capacitor of the first-stage half-bridge structure is C 1 , the energy storage capacitor of the second-stage half-bridge structure is C 2 , and the energy storage capacitor of the i-th stage half-bridge structure is C i .

[0059] Among them, the energy storage capacitor C i is used to improve the voltage stability. The output voltage of each square-wave generating unit is clamped by the high-voltage DC power supply V DCi and the energy storage capacitor C i , and there is no risk of overvoltage for a single square-wave generating unit.

[0060] In some examples, as Figure 4 shown, the above-mentioned switch module includes a first switch module 112 and a second switch module 113. Among them, the first end of the above-mentioned first switch module 112 is electrically connected to the positive pole of the above-mentioned high-voltage DC power supply V DCn , the control end of the above-mentioned first switch module 112 is used to input a first control signal, and the above-mentioned first switch module 112 is located on the first bridge arm of the above-mentioned half-bridge structure 11; the first end of the above-mentioned second switch module 113 is electrically connected to the second end of the above-mentioned first switch module 112, the control end of the above-mentioned second switch module 113 is used to input a second control signal, and the second end of the above-mentioned second switch module 113 is electrically connected to the negative pole of the above-mentioned high-voltage DC power supply V DCn , where the above-mentioned first switch module 112 and the above-mentioned second switch module 113 are connected in a half-bridge manner, and the above-mentioned second switch module 113 is located on the second bridge arm of the above-mentioned half-bridge structure 11.

[0061] In some examples, as Figure 4 and Figure 5 shown, the above-mentioned first switch module 112 includes: a main-branch MOS device S n-1 , the first end of the above-mentioned main-branch MOS device S n-1 is electrically connected to the positive pole of the above-mentioned high-voltage DC power supply V DCn , the control end of the above-mentioned main-branch MOS device S n-1 is used to input the above-mentioned first control signal, and the second end of the above-mentioned main-branch MOS device S n-1 is electrically connected to the first end of the above-mentioned second switch module 113.

[0062] Among them, the main-branch MOS device S n-1 where n represents the total number of levels of the half-bridge structure, 1 represents the main branch, and the main-branch MOS device of the first-level half-bridge structure is S 1-1 , and the high-voltage DC power supply of the second-level half-bridge structure is S 2-1 , and the high-voltage DC power supply of the i-th level half-bridge structure is S i-1 .

[0063] In some examples, each of the above-mentioned switching modules includes one MOS device.

[0064] In some examples, there may be multiple main-branch MOS devices. Multiple main-branch MOS devices can increase the stability of the circuit. In the case where one main-branch MOS device is damaged, the other main-branch MOS devices can continue to function. In addition, setting multiple main-branch MOS devices can increase the accuracy of control and prevent the output failure of the square-wave power supply caused by mis-conduction of one of them.

[0065] Among them, the main-branch SiC MOSFET switch S i-1 is used to provide the high level of the square wave.

[0066] In some examples, as Figure 4 and Figure 5 shown, the above-mentioned second switching module 113 includes: a current-discharging-branch MOS device S n-2 , the first end of the above-mentioned current-discharging-branch MOS device S n-2 is electrically connected to the second end of the above-mentioned first switching module 112, the control end of the above-mentioned current-discharging-branch MOS device S n-2 is used to input the above-mentioned second control signal, and the second end of the above-mentioned current-discharging-branch MOS device S n-2 is electrically connected to the negative pole of the above-mentioned high-voltage DC power supply V DCn .

[0067] Among them, n in the current-discharging-branch MOS device S n-2 represents the total number of levels of the half-bridge structure, 2 represents the current-discharging branch, the main-branch MOS device of the first-level half-bridge structure is S 1-2 , the high-voltage DC power supply of the second-level half-bridge structure is S 2-2 , and the high-voltage DC power supply of the i-th level half-bridge structure is S i-2 .

[0068] Among them, the current-discharging-branch SiC MOSFET switch S i-2 is used to provide the low level of the square wave.

[0069] In some examples, as Figure 4As shown, the above power supply circuit further includes: a current limiting unit 30 connected in series with the above square wave generating unit 10. Among them, the current limiting unit 30 is electrically connected to the above device under test 20 and the above square wave generating unit 10 respectively, and the current limiting unit 30 is used to limit the current in the loop to be less than or equal to the maximum current threshold.

[0070] In some examples, the above current limiting unit includes at least one current limiting resistor.

[0071] Among them, as Figure 4 and Figure 5 shown, the above current limiting unit 30 includes: a current limiting resistor R s , the first end of the above current limiting resistor R s is electrically connected to the first end of the above square wave generating unit, and the second end of the above current limiting resistor R s is electrically connected to the first end of the above device under test 20, and the second end of the above device under test 20 is grounded and electrically connected to the second end of the above square wave generating unit.

[0072] Specifically, the above power supply circuit can achieve flexible output of different voltage levels through appropriate circuit design and switch control; adopting a modular design, the design schemes of the square wave generating units at different levels are exactly the same, which simplifies the complexity of the circuit design and increases the reliability.

[0073] In some examples, when the above current limiting unit includes multiple current limiting resistors, all of the above current limiting resistors are connected in series. This can increase the resistance value of the current limiting resistor.

[0074] The embodiment of the present application also provides a method for supplying power to a device under test by using any one of the above positive polarity square wave power supply circuits. As Figure 6 shown, the method includes:

[0075] Step S101, controlling each switching device in the half-bridge structure in the square wave generating unit to conduct or cut off according to a preset period to provide the above positive polarity square wave power supply to the above device under test; among them, the switching devices on the first bridge arm of the above half-bridge structure and the switching devices on the second bridge arm are not simultaneously conducted, the first bridge arm is the main branch of the half-bridge structure, and the second bridge arm is the current discharge branch of the half-bridge structure.

[0076] The above power supply method of the present application includes: controlling each switching device in the half-bridge structure in the square wave generating unit to conduct or cut off according to a preset period, so as to provide a positive-polarity square wave power supply to the device under test; wherein, the switching devices on the first bridge arm of the half-bridge structure and the switching devices on the second bridge arm do not conduct simultaneously, the first bridge arm is the main branch of the half-bridge structure, and the second bridge arm is the current discharge branch of the half-bridge structure. This power supply method can achieve flexible outputs of different voltage levels through appropriate circuit design and switch control, and solves the problem in the prior art that there is a lack of a high-voltage positive-polarity square wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside the high-voltage silicon carbide device exposed to the positive-polarity square wave voltage.

[0077] In some examples, controlling each switching device in the half-bridge structure in the square wave generating unit to conduct or cut off according to a preset period includes: controlling the switching devices on the first bridge arm in the above square wave generating unit to conduct, and controlling the switching devices on the second bridge arm in the above square wave generating unit to cut off, so as to provide a high level to the above device under test; after providing the high level to the above device under test, controlling the switching devices on the first bridge arm in the above square wave generating unit to cut off, and controlling the switching devices on the second bridge arm in the above square wave generating unit to cut off; controlling the switching devices on the first bridge arm in the above square wave generating unit to cut off, and controlling the switching devices on the second bridge arm in the above square wave generating unit to conduct, so as to provide a low level to the above device under test; after providing the low level to the above device under test, controlling the switching devices on the first bridge arm in the above square wave generating unit to cut off, and controlling the switching devices on the second bridge arm in the above square wave generating unit to cut off, so as to provide the above positive-polarity square wave power supply to the above device under test.

[0078] Among them, the first bridge arm is the main branch, and the second bridge arm is the current discharge branch. Through appropriate circuit design and switch control, flexible outputs of different voltage levels are achieved.

[0079] In some examples, as Figure 4 shown, the above half-bridge structure 11 includes a first switch module 112 and a second switch module 113. Controlling the switching devices on the first bridge arm in the above square wave generating unit to conduct, and controlling the switching devices on the second bridge arm in the above square wave generating unit to cut off, so as to provide a high level to the above device under test 20 includes: controlling all the switching devices in the above first switch module 112 to conduct, and controlling the above switching devices in the above second switch module 113 to cut off, so as to provide a high level to the above device under test 20.

[0080] Among them, at least one switching device is included in the first switch module and the second switch module. When all the switching devices in the first switch module are fully conducting and all the switching devices in the current discharge branch are turned off, a high level of the square wave is provided to the device under test.

[0081] In some examples, such as Figure 4 As shown, the above-mentioned half-bridge structure 11 includes a first switch module 112 and a second switch module 113, controlling the above-mentioned switching devices of the first bridge arm in the above-mentioned square-wave generating unit to turn off, and controlling the above-mentioned switching devices of the second bridge arm in the above-mentioned square-wave generating unit to turn off, including: controlling all the above-mentioned switching devices in the first switch module 112 to turn off, and controlling all the above-mentioned switching devices in the second switch module 113 to turn off.

[0082] Among them, synchronously turning off all the above-mentioned switching devices in the first switch module and all the above-mentioned switching devices in the second switch module to switch the high level of the square wave to a low level.

[0083] In some examples, such as Figure 4 As shown, the above-mentioned half-bridge structure 11 includes a first switch module 112 and a second switch module 113, controlling the above-mentioned switching devices of the first bridge arm in the above-mentioned square-wave generating unit to turn off, and controlling the above-mentioned switching devices of the second bridge arm in the above-mentioned square-wave generating unit to turn on, so as to provide a low level to the above-mentioned device under test 20, including: controlling all the above-mentioned switching devices in the first switch module 112 to turn off, and controlling all the above-mentioned switching devices in the second switch module 113 to turn on, so as to provide a low level to the above-mentioned device under test 20.

[0084] Among them, at least one switching device is included in the first switch module and the second switch module. When all the switching devices in the first switch module are turned off and all the switching devices in the discharge branch are turned on, a low level of the square wave is provided to the device under test.

[0085] In some examples, such as Figure 4 As shown, the above-mentioned half-bridge structure 11 includes a first switch module 112 and a second switch module 113, controlling the above-mentioned switching devices of the first bridge arm in the above-mentioned square-wave generating unit to turn off, and controlling the above-mentioned switching devices of the second bridge arm in the above-mentioned square-wave generating unit to turn off, so as to provide the above-mentioned positive-polarity square-wave power supply to the above-mentioned device under test 20, including: controlling all the above-mentioned switching devices in the first switch module 112 to turn off, and controlling all the above-mentioned switching devices in the second switch module 113 to turn off, so as to provide the above-mentioned positive-polarity square-wave power supply to the above-mentioned device under test 20.

[0086] Among them, synchronously turning off all the above-mentioned switching devices in the first switch module and all the above-mentioned switching devices in the second switch module to switch the low level of the square wave to a high level.

[0087] In some examples, such as Figure 3 and Figure 4As shown, the above square-wave generating unit 10 includes n cascaded half-bridge structures 11, and the high level provided by the above square-wave generating unit 10 to the above device under test 20 is , where, V DUT is the voltage value of the above high level, i is the number of stages of the above half-bridge structure 11, n is the number of all the above half-bridge structures, V DCi is the voltage value of the high-voltage DC power supply in the i-th stage of the above half-bridge structure 11, and the low level provided by the above square-wave generating unit 10 to the above device under test 20 is 0.

[0088] Among them, through appropriate circuit design and switch control, flexible outputs of different voltage levels are achieved.

[0089] In some examples, as Figure 5 shown, the working process of the positive-polarity square-wave power supply circuit for high-voltage SiC package insulation assessment can be divided into the following four working stages:

[0090] Assume that the capacitor C i has been pre-charged, and the main-branch SiC MOSFET switch S i-1 and the discharge-branch SiC MOSFET switch S i-2 are both in the off state.

[0091] In the first stage, the main-branch SiC MOSFET switch S i-1 is synchronously turned on, and the discharge-branch SiC MOSFET switch S i-2 remains off, and the voltage across the device under test DUT is ;

[0092] In the second stage, the main-branch SiC MOSFET switch S i-1 is synchronously turned off, and the discharge-branch SiC MOSFET switch S i-2 remains off;

[0093] In the third stage, the discharge-branch SiC MOSFET switch S i-2 is synchronously turned on, and the main-branch SiC MOSFET switch S i-1 remains off, and the voltage across the device under test DUT is ;

[0094] In the fourth stage, the discharge-branch SiC MOSFET switch S i-2 is synchronously turned off, and the main-branch SiC MOSFET switch S i-1 remains off.

[0095] In some examples, Figure 7 is a schematic diagram of the simulation waveform of a positive-polarity square wave, and the simulation waveform output by the positive-polarity square-wave power supply circuit is asFigure 7 as shown

[0096] The embodiment of the present application also provides a test device for a device under test, as Figure 8 shown, including: any one of the above-mentioned positive-polarity square-wave power supply circuits 01, and the positive-polarity square-wave power supply circuit 01 is used to supply power to the device under test 20 during the package insulation test of the device under test; a test circuit 02, which is used to be electrically connected to the device under test 20 and is used to perform a package insulation test on the device under test 20.

[0097] The above-mentioned test device for the device under test of the present application includes: any one of the positive-polarity square-wave power supply circuits, and the positive-polarity square-wave power supply circuit is used to supply power to the device under test during the package insulation test of the device under test; a test circuit, which is used to be electrically connected to the device under test and is used to perform a package insulation test on the device under test. This test device can achieve flexible outputs of different voltage levels through appropriate circuit design and switch control, and solves the problem in the prior art that there is a lack of a high-voltage positive-polarity square-wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside the high-voltage silicon carbide device exposed to the positive-polarity square-wave voltage.

[0098] In order to implement the precise control function of the square-wave power supply and considering the requirements of the IO port quantity and hardware performance for the construction of the visualization control system, a field programmable gate array (FPGA) is used in this embodiment to generate control signals. Through program writing, multiple different digital signals can be output to meet the control requirements of the square-wave power supply.

[0099] In order to achieve complete isolation between the FPGA control system and the high-voltage output part and considering the construction of a square-wave power supply with a higher voltage level, the control signal transmission logic as Figure 9 shown is adopted in this embodiment. As Figure 9 shown, the electrical signal output by the FPGA is converted into an optical signal via an optical fiber transmitter, and then converted into an electrical signal again via an optical fiber transmission line, which is used for the drive control and output voltage control of the high / low-side SiC MOSFET in the square-wave generation unit.

[0100] The selected 24 V to 800 V isolated power supply module in the above embodiment is as Figure 10 shown. This module has a TTL voltage regulation interface of 0 to 5 V to adjust the output voltage magnitude in proportion. The acquisition of the 0 to 5 V modulation voltage is achieved through a digital-to-analog conversion chip (PWM to Analog Converter, PAC), which can linearly convert the PWM input signal with a duty cycle of 0% to 100% into an analog voltage output signal of 0 to 5 V.

[0101] Since the anti-shoot-through function of the upper and lower bridge arms in the above embodiments is achieved by the dead-time programming resistor outside the driver for the selected half-bridge driver, therefore, only a simple counter program needs to be written and written into the FPGA, without having to consider the setting of the dead time, and the functions of flexible control of the frequency and duty cycle can be achieved. This will not be elaborated here.

[0102] The cascaded nanosecond-level rise-time high-voltage positive square-wave power supply in the above embodiments is for PD experiments on high-voltage silicon carbide devices and their equivalent samples. The high-voltage silicon carbide devices and their equivalent samples act as loads and are highly resistive-capacitive. The LTspice simulation software is used to build a 5-stage square-wave power supply circuit, and the feasibility of the topology is verified through simulation.

[0103] In the simulation circuit diagram, the SPICE model of the main branch switch S i-1 and the discharge branch switch S i-2 selects SiC MOSFET discrete devices; the voltage of the high-voltage DC power supply V DCi is set to 1 kV; the capacitance value of the energy storage capacitor C i is set to 0.5 μF; the drive circuit is replaced by an ideal PWM signal source. The rise / fall time of the ideal PWM signal source is set to 15 ns, the high / low levels are set to -5 / 20 V respectively, and the dead time is set to 1 μs; the current-limiting resistor is set to 100 Ω; the DUT is equivalent by the method of resistor in parallel with capacitor, where the resistance value of the resistor is set to 100 MΩ and the capacitance value of the capacitor is set to 20 - 400 pF; the square-wave repetition frequency f sw is set to 100 kHz, that is, the square-wave period T sw is 10 μs; the duty cycle D is set to 50%, then theoretically the high-level duration D×T sw of the square wave is 5 μs.

[0104] Under the normal working mode, the waveforms of the output voltage applied across the DUT and the output current flowing through the DUT are as Figure 11 shown.

[0105] As shown in Figure 2, when the square-wave period T sw is set to 10 μs and the duty cycle D is set to 50%, theoretically the high-level duration D×T sw of the square wave should be 5 μs, while the actual arrival time of the falling edge lags by 1 μs, and numerically it is exactly equal to the set 1 μs dead time. The generation of this trailing stage is due to the high resistive-capacitive load characteristic of the DUT. After the main branch switch S i-1 is closed, there is almost no discharge path for the residual charge on the DUT, resulting in a relatively high voltage still being maintained across the DUT. Only when the discharge branch switch S i-2After conduction, the residual charge on the DUT is discharged to the ground through the discharge branch switch S i-2 and the voltage across the DUT is forced to be set to "0".

[0106] When setting different sample capacitance values, the output characteristics of the square wave power supply are as Figure 12 shown Figure 12 where A is the output voltage curve when V = 20 pF, B is the output voltage curve when V = 50 pF, C is the output voltage curve when V = 100 pF, D is the output voltage curve when V = 200 pF, and E is the output voltage curve when V = 400 pF. It can be Figure 12 seen that the rise / fall time of the output voltage of the square wave power supply increases with the increase of the sample capacitance value.

[0107] Figure 13 and Figure 14 and Figure 15 and Figure 16 respectively show the output voltage waveform diagrams when different numbers of square wave generation units are put into operation, when drive signals with different duty cycles or different frequencies are set, and when different delay times are set for the drive signal.

[0108] For ease of observation, in the simulation of this embodiment, the dead time is reset to 50 ns to avoid the high-level duration D×T of the square wave sw deviating from the observed value.

[0109] As Figure 13 shown, a is the graph of the output voltage when there is one square wave generation sub-unit, b is the graph of the output voltage when there are two square wave generation sub-units, c is the graph of the output voltage when there are three square wave generation sub-units, d is the graph of the output voltage when there are four square wave generation sub-units, and e is the graph of the output voltage when there are five square wave generation sub-units.

[0110] It can be Figure 13 seen that when different numbers of square wave generation units are put into operation, the amplitude of the output voltage is equal to the sum of the amplitudes of the high-voltage DC power supplies V DCi in the square wave generation units put into operation, verifying the function of flexible adjustment of the output voltage of the square wave power supply proposed in the above embodiment.

[0111] As Figure 14 shown, a1 is the waveform diagram of the output voltage when the duty cycle of the drive signal is 0.1, a2 is the waveform diagram of the output voltage when the duty cycle of the drive signal is 0.3, a3 is the waveform diagram of the output voltage when the duty cycle of the drive signal is 0.5, a4 is the waveform diagram of the output voltage when the duty cycle of the drive signal is 0.7, and a5 is the waveform diagram of the output voltage when the duty cycle of the drive signal is 0.9.

[0112] It can be Figure 14 seen that when setting the square wave period Tsw is 10 μs. By setting different duty cycles for the driving signal, square waves with different pulse widths can be obtained, verifying the function of flexible adjustment of the duty cycle of the square wave power supply proposed in the above embodiment.

[0113] As Figure 15 shown, when the duty cycle D is set to 0.5 and different repetition frequencies are set for the driving signal, square waves with different repetition frequencies can be obtained, verifying the function of flexible adjustment of the repetition frequency of the square wave power supply proposed in the above embodiment.

[0114] From Figure 16 this, according to different waveform requirements, by setting different driving delays for the driving signal, a square wave similar to a staircase wave can be obtained, verifying the function of flexible adjustment of the waveform shape of the square wave power supply proposed in the above embodiment.

[0115] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0116] 1). The above-mentioned polarity square wave power supply circuit of the present application includes a square wave generating unit. The square wave generating unit includes a plurality of cascaded half-bridge structures, and each half-bridge structure includes at least two switching modules. The square wave generating unit is used to generate a positive polarity square wave signal. This power supply circuit has a simple structure, good scalability, is independent between levels, and the output square wave waveform parameters can be flexibly adjusted, and is suitable as a positive polarity square wave power supply circuit for high-voltage SiC package insulation assessment, solving the problem in the prior art that there is a lack of a high-voltage positive polarity square wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside high-voltage silicon carbide devices exposed to positive polarity square wave voltages.

[0117] 2). The above-mentioned test device for the device under test of the present application includes: any positive polarity square wave power supply circuit. The positive polarity square wave power supply circuit is used to supply power to the device under test during the package insulation test of the device under test; a test circuit, which is used to be electrically connected to the device under test and is used to perform package insulation tests on the device under test. This test device can achieve flexible output of different voltage levels through appropriate circuit design and switch control, solving the problem in the prior art that there is a lack of a high-voltage positive polarity square wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside high-voltage silicon carbide devices exposed to positive polarity square wave voltages.

[0118] 3), The above power supply method of the present application includes: controlling each switching device in the half-bridge structure of the square wave generating unit to conduct or cut off according to a preset period to provide a positive square wave power supply to the device under test; wherein, the switching devices on the first bridge arm of the half-bridge structure and the switching devices on the second bridge arm do not conduct simultaneously. The first bridge arm is the main branch of the half-bridge structure, and the second bridge arm is the discharge branch of the half-bridge structure. This power supply method can achieve flexible output of different voltage levels through appropriate circuit design and switch control, solving the problem in the prior art that there is a lack of a high-voltage positive square wave power supply for high-voltage SiC package insulation assessment, resulting in the inability to fully evaluate the partial discharge inside high-voltage silicon carbide devices exposed to positive square wave voltages.

[0119] The foregoing are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A device for testing a device under test, characterized in that: include: A positive polarity square wave power supply circuit, the positive polarity square wave power supply circuit is used to power the device under test when the device under test is subjected to a package insulation test, the positive polarity square wave power supply circuit comprises: a square wave generating unit, used to generate a positive polarity square wave signal, the square wave generating unit comprises a plurality of cascaded half-bridge structures, each of the half-bridge structures comprises a high voltage DC power supply, an energy storage module, a first switch module located on a first bridge wall, and a second switch module on a second bridge wall, the high voltage DC power supply and the energy storage module are connected in parallel, a first end of the first switch module is electrically connected to a positive electrode of the high voltage DC power supply, a second end of the second switch module is electrically connected to a negative electrode of the high voltage DC power supply, the first bridge wall is a main branch of the half-bridge structure, the second bridge wall is a leakage branch of the half-bridge structure, the device under test is a high resistance-capacitance device, and a rise time and / or fall time of an output voltage of the square wave power supply output by the positive polarity square wave power supply circuit are both positively correlated with a capacitance of the device under test; It also includes: an FPGA, an optical fiber transmitter and an optical fiber transmission circuit, wherein the plurality of first electrical signals output by the FPGA are converted into corresponding optical signals through the optical fiber transmitter, and then converted into corresponding plurality of second electrical signals through the optical fiber transmission line, and respectively input into the first switch module, the second switch module and the high-voltage DC power supply; A dead time programming resistor, electrically connected to the FPGA, the optical fiber transmitter and the optical fiber transmission circuit respectively, and the dead time programming resistor is used to realize the anti-straight-through function of the first bridge wall and the second bridge wall; The test circuit is used to be electrically connected to the device under test and to perform a package insulation test on the device under test.

2. The testing device according to claim 1, characterized in that: in, The first end of the first switch module is electrically connected to the positive electrode of the high-voltage DC power supply, and the control end of the first switch module is used to input a first control signal; The first end of the second switch module is electrically connected to the second end of the first switch module, the control end of the second switch module is used to input a second control signal, and the second end of the second switch module is electrically connected to the negative electrode of the high-voltage DC power supply, wherein the first switch module and the second switch module are connected in a half-bridge manner.

3. The testing device according to claim 1, characterized in that: Each of the switch modules includes a MOS device.

4. The testing device according to claim 1, characterized in that: The energy storage module includes at least one energy storage capacitor.

5. The testing device according to claim 1, characterized in that: The power supply circuit further includes: a current limiting unit connected in series with the square wave generating unit.

6. The testing device according to claim 5, characterized in that: The current limiting unit includes at least one current limiting resistor.

7. The testing device according to claim 6, characterized in that: In the case that the current limiting unit includes a plurality of current limiting resistors, all the current limiting resistors are connected in series.

8. A method for powering a device under test using a positive polarity square wave power supply circuit, characterized in that: The positive polarity square wave power supply circuit is a power supply circuit in a test device for a device under test as claimed in any one of claims 1 to 7, and the method comprises: Controlling each switch device in the half-bridge structure in the square wave generating unit to be turned on or off according to a preset period, so as to provide the positive polarity square wave power supply to the device under test; The switch device on the first bridge wall of the half-bridge structure and the switch device on the second bridge wall are not turned on at the same time, the first bridge wall is the main branch of the half-bridge structure, and the second bridge wall is the leakage branch of the half-bridge structure; Controlling each switch device in the half-bridge structure in the square wave generating unit to be turned on or off according to a preset period includes: Controlling the switch device of the first bridge wall in the square wave generating unit to be turned on, and controlling the switch device of the second bridge wall in the square wave generating unit to be turned off, so as to provide a high level to the device under test; After providing a high level to the device under test, controlling the switch device of the first bridge wall in the square wave generating unit to be turned off, and controlling the switch device of the second bridge wall in the square wave generating unit to be turned off; Controlling the switch device of the first bridge wall in the square wave generating unit to be turned off, and controlling the switch device of the second bridge wall in the square wave generating unit to be turned on, so as to provide a low level to the device under test; After providing a low level to the device under test, the switch device of the first bridge wall in the square wave generating unit is controlled to be turned off, and the switch device of the second bridge wall in the square wave generating unit is controlled to be turned off, so as to provide the positive polarity square wave power supply to the device under test.

9. The method according to claim 8, characterized in that The half-bridge structure includes a first switch module and a second switch module, which controls the switch device of the first bridge wall in the square wave generating unit to be turned on, and controls the switch device of the second bridge wall in the square wave generating unit to be turned off, so as to provide a high level to the device under test, including: All the switch devices in the first switch module are controlled to be turned on, and the switch devices in the second switch module are controlled to be turned off, so as to provide a high level to the device under test.

10. The method according to claim 8, characterized in that The half-bridge structure includes a first switch module and a second switch module, and controls the switch device of the first bridge wall in the square wave generating unit to be turned off, and controls the switch device of the second bridge wall in the square wave generating unit to be turned off, including: All the switch devices in the first switch module are controlled to be turned off, and all the switch devices in the second switch module are controlled to be turned off.

11. The method according to claim 8, characterized in that The half-bridge structure includes a first switch module and a second switch module, which controls the switch device of the first bridge wall in the square wave generating unit to be turned off, and controls the switch device of the second bridge wall in the square wave generating unit to be turned on, so as to provide a low level to the device under test, including: All the switch devices in the first switch module are controlled to be turned off, and all the switch devices in the second switch module are controlled to be turned on, so as to provide a low level to the device under test.

12. The method according to claim 8, characterized in that The half-bridge structure includes a first switch module and a second switch module, controls the switch device of the first bridge wall in the square wave generating unit to be turned off, and controls the switch device of the second bridge wall in the square wave generating unit to be turned off, so as to provide the positive polarity square wave power supply to the device under test, including: All the switch devices in the first switch module are controlled to be turned off, and all the switch devices in the second switch module are controlled to be turned off, so as to provide the positive polarity square wave power supply to the device under test.

13. The method according to claim 8, characterized in that The square wave generating unit includes n cascaded half-bridge structures, and the high level provided by the square wave generating unit to the device under test is ,in, V DUT is the voltage value of the high level, i is the number of stages of the half-bridge structure, n is the number of all the half-bridge structures, V DCi is the voltage value of the high-voltage DC power supply in the i-th stage half-bridge structure, and the low level provided by the square wave generating unit to the device under test is 0.

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