A LDO circuit and method for improving output overcharge

Abstract

The present invention discloses an LDO circuit and method for improving output overcharging, comprising a comparator, a first amplifier connected to a low static power consumption circuit through a first NMOS tube, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor connected to the low static power consumption circuit and generating a feedback voltage, a comparator connected to the low static power consumption circuit through a fourth PMOS tube, and based on a comparison between a second reference voltage generated inside a circuit and a driving voltage, controlling the on and off of a switch controller of the fourth PMOS tube; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on an external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube, so as to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

Description

Technical Field

[0001] The present invention relates to the technical field of power management chips, and in particular to an LDO circuit and method for improving output overcharging. Background Art

[0002] See also Figure 2 , Figure 2 FIG. 1 is a static power consumption LDO circuit in the prior art. Figure 2 As shown, the circuit may include a circuit input terminal, a circuit output terminal and a ground terminal, a first amplifier, a second amplifier, a third amplifier, a PMOS tube M3 and an output sampling module.

[0003] Among them, when the voltage of the external input terminal is lower than the preset voltage of the output terminal, the voltage of the output terminal of the circuit will decrease as the voltage of the input terminal of the circuit decreases. At this time, the first sampling signal decreases, the gate voltage of M1 increases, the gate voltage of M3 decreases, and the PMOS tube M3 is in a linear region; the third amplifier outputs the gate voltage of M4 based on the drain voltage of M2 and the output terminal voltage, and makes the source voltage of M4 change with the output terminal voltage and have the same value; at this time, the PMOS tube M2 is in a linear region, and the gate, drain and source voltages of the PMOS tube M2 are equal to the gate, drain and source voltages of the PMOS tube M3, respectively, and the current IM2 of the PMOS tube M2 and the current IM3 of the PMOS tube M3 are in a mirror relationship, and the mirror relationship is:

[0004]

[0005] The preset output terminal voltage is greater than or equal to the first reference signal, IM2 is the current of the PMOS tube M2, IM3 is the current of the PMOS tube M3, (W / L)M2 is the width-to-length ratio of the PMOS tube M2, and (W / L)M3 is the width-to-length ratio of the PMOS tube M3; so that when the input terminal voltage is lower than the preset output terminal voltage, the current of the PMOS tube M2 is:

[0006]

[0007] This avoids the increase in circuit static power consumption caused by current mirror mismatch.

[0008] Those skilled in the art know that the above has very high application value in the field of low power consumption and lithium batteries, which is manifested as: when VIN is low, M2 is limited by M4, and the static power consumption of the circuit will not increase due to current mirror mismatch. In order to improve the response data and load capacity, the second-stage amplifier of the low-power LDO currently on the market, under normal circumstances, the load current of the second stage is: using the P-tube current mirror to copy the current of the power tube; but the above-mentioned prior art has the following disadvantages:

[0009] Under no-load conditions, when VIN is low, the overall current is small, that is, the response speed of the op amp is slow, and VOUT overcharge problems will occur, including:

[0010] When VIN is slowly started, VOUT will be overcharged;

[0011] In the case of hot swapping with residual power in VIN, VOUT will be overcharged. Summary of the invention

[0012] In view of the above-mentioned deficiencies in the current power management chip technology field, the present invention provides an LDO circuit and method for improving output overcharging, so as to prevent the output voltage from overcharging when the output voltage is slow started and hot-swapped under no-load.

[0013] To achieve the above object, the embodiments of the present invention adopt the following technical solutions:

[0014] An LDO circuit for improving output overcharge, comprising: a first amplifier, a first NMOS tube, a second PMOS tube, a low static power consumption circuit, a fourth PMOS tube, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor, and an external input voltage , the first reference voltage and output voltage , the first amplifier is connected to the low static power consumption circuit through the first NMOS tube, the first voltage-dividing sampling resistor and the second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, and it is characterized in that it also includes a comparator, wherein the comparator is connected to the low static power consumption circuit through the fourth PMOS tube, and controls the opening and closing of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube.

[0015] According to one aspect of the present invention, the first NMOS tube is a common source amplifier, the source is grounded, the drain is connected to the drain of the fourth PMOS tube and the low static power consumption circuit, the gate is connected to the output end of the first amplifier, and based on the first voltage signal and the bias current provided by the low static power consumption, the gate drive voltage is output; the source of the second PMOS tube is connected to the external input voltage, the gate is connected to the low static power consumption circuit, and the drain is connected to the first voltage divider sampling resistor.

[0016] According to one aspect of the present invention, the low static power consumption circuit includes a first PMOS tube, a third PMOS tube and a second amplifier, the source of the first PMOS tube is connected to the source of the second PMOS tube and to the external input voltage, the gate is connected to the gate of the second PMOS tube, and the drain is connected to the source of the third PMOS tube; the source of the third PMOS tube is connected to the drain of the first PMOS tube and the input end of the second amplifier, the gate is connected to the output end of the second amplifier, and the drain is connected to the drain of the fourth PMOS tube and the drain of the first NMOS tube.

[0017] According to one aspect of the present invention, the second amplifier and the third PMOS tube form a buffer, and control the drain follower output voltage of the first PMOS tube based on the output voltage to avoid the increase of circuit static power consumption due to current mirror mismatch.

[0018] According to one aspect of the present invention, the source of the fourth PMOS tube is connected to the source of the third PMOS tube, the drain is connected to the driving voltage, and the gate is connected to the output end of the comparator. When the fourth PMOS tube is turned on, it quickly pulls up the driving voltage.

[0019] According to one aspect of the present invention, a loop formed by the first amplifier, the first NMOS tube, the bias current provided by the low static power consumption circuit, the second PMOS tube, the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor constitutes a negative feedback loop, one end of the first voltage-dividing sampling resistor is connected to the low static power consumption circuit and the drain of the second PMOS tube, the other end of the first voltage-dividing sampling resistor is connected to one end of the second voltage-dividing sampling resistor and outputs a feedback voltage signal; the other end of the second voltage-dividing sampling resistor is grounded; the negative feedback loop makes the first reference voltage consistent with the feedback voltage, and then sets the output voltage through the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor, and the output voltage is: .

[0020] A method for improving slow start output overcharging under no-load, the method comprising the following steps: the comparator is connected to a low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison between a second reference voltage and a driving voltage; the first amplifier outputs a first voltage signal based on a first reference voltage and a feedback voltage, and outputs a driving voltage through a first NMOS tube and the low static power consumption circuit; the second PMOS tube generates and controls the output voltage based on an external input voltage and the driving voltage.

[0021] According to one aspect of the present invention, in no-load slow start, when the external input voltage exceeds the minimum operating voltage, the negative feedback loop pulls the drive voltage down to the full power tube, then the drive voltage is lower than the second reference voltage, and the comparator outputs a high level, and the fourth PMOS tube of the switch is in the cut-off state; when the external input voltage is about to be higher than the output voltage set by the first sampling voltage divider resistor and the second sampling voltage divider resistor, the negative feedback loop starts to pull up the drive voltage, and the comparator detects that the drive voltage is higher than the second reference voltage and outputs a low level, and turns on the fourth PMOS tube of the switch, so that the power tube is quickly adjusted.

[0022] A method for improving residual power hot-swap output overcharging under no-load conditions, the method comprising the following steps: the comparator is connected to a low static power consumption circuit via a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison between a second reference voltage and a drive voltage; the first amplifier outputs a first voltage signal based on a first reference voltage and a feedback voltage, and outputs a drive voltage via a first NMOS tube and the low static power consumption circuit; the second PMOS tube generates and controls the output voltage based on an external input voltage and the drive voltage.

[0023] According to one aspect of the present invention, under the condition that the external input voltage is unplugged during no-load hot plugging, when the external input voltage is lower than the output voltage set by the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor, the negative feedback loop pulls the driving voltage down to the point where the power tube is fully on, and the driving voltage is lower than the second reference voltage, and the comparator outputs a high level, and the fourth PMOS tube of the switch is in a cut-off state; when the external input voltage is hot plugged and powered on, the feedback loop starts to pull up the driving voltage and make it higher than the second reference voltage, and the comparator detects it and outputs a low level, and turns on the fourth PMOS tube of the switch, so that the power tube is quickly adjusted to improve output voltage overcharging.

[0024] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A circuit structure diagram of an LDO circuit for improving output overcharge according to the present invention;

[0027] Figure 2 A circuit structure diagram of the prior art of an LDO circuit for improving output overcharge according to the present invention;

[0028] Figure 3 This is a no-load hot-swap simulation effect diagram of an LDO circuit for improving output overcharge according to the present invention;

[0029] Figure 4 This is a simulation effect diagram of a no-load external input voltage slow start of an LDO circuit for improving output overcharge according to the present invention;

[0030] Figure 5 This is a diagram showing the effect of the static current of an LDO circuit for improving output overcharge according to the present invention changing with the external input voltage;

[0031] Figure 6 This is a no-load hot-swap simulation effect diagram of an LDO circuit for improving output overcharge according to the present invention without adding a comparison circuit;

[0032] Figure 7 This is a simulation effect diagram of a no-load external input voltage slow start-up without adding a comparison circuit for an LDO circuit for improving output overcharge according to the present invention;

[0033] Figure 8 FIG. 4 is a fourth embodiment of an LDO circuit for improving output overcharge according to the present invention;

[0034] Fig. 9 FIG. 5 is a fifth embodiment of an LDO circuit for improving output overcharge according to the present invention. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] Embodiment 1:

[0037] like Figure 1 As shown, an LDO circuit for improving output overcharge, the circuit includes: a first amplifier, a first NMOS transistor , the second PMOS tube , low static power consumption circuit, fourth PMOS tube switch , the first voltage-dividing sampling resistor , the second voltage-dividing sampling resistor and comparators, and external input voltage Power supply, ground voltage GND, first reference voltage and output voltage The first amplifier is connected to the low static power consumption circuit through the first NMOS tube, and the first voltage-dividing sampling resistor and the second voltage-dividing sampling resistor are connected to the low static power consumption circuit to generate a feedback voltage. The first amplifier is based on the first reference voltage and feedback voltage , output voltage control signal . It is a common source amplifier, with the source connected to ground and the drain connected to The drain and the low static power consumption circuit, the gate is connected to the output end of the first amplifier, and based on and low quiescent power consumption provide bias current, output gate drive voltage . The gate is connected to the output of the comparator, and the drain is connected to The drain and the low static power consumption circuit are connected, and the source is connected to the low static power consumption circuit. The source is connected to the external input voltage, the gate is connected to the low static power consumption circuit, and the drain is connected to the , Based on external input voltage and drive voltage Control output voltage size. One end is connected to the low static power consumption circuit and The drain, The other end of the connection One end of the feedback voltage signal ; The other end of the first amplifier is grounded. , bias current provided by low static power circuit, , and The loop formed forms a negative feedback loop, which makes the reference voltage and feedback voltage Agree, then pass and Setting the Output Voltage , the output voltage is: The output voltage set by the voltage-dividing resistor is a preset output voltage. The comparator is based on a second reference voltage generated inside a circuit. and drive voltage For comparison, go to control switch on and off.

[0038] The low static power consumption circuit comprises , and the second amplifier, Source access The source is connected to the external input voltage, and the gate is connected to The gate and drain are connected , The source of Source access The drain and input of the second amplifier and controls , the gate is connected to the output of the second amplifier, and the drain is connected The drain and The drain of the second amplifier and A buffer is formed based on the output voltage and control The drain follower output voltage , avoiding the increase of circuit static power consumption caused by current mirror mismatch.

[0039] In no load Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback loop will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when When the voltage is about to exceed the preset output voltage, the negative feedback loop starts to slowly pull up Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharging situation has been greatly improved.

[0040] In the no-load hot-swap external input voltage unplug condition, when removing the Afterwards, when Below preset After that, the negative feedback loop pulls down , so that the power tube is fully turned on and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled up, so that the power tube is adjusted quickly and the output voltage is improved. Higher than the preset When the power tube is adjusted, The overcharge condition is greatly improved. The no-load condition includes the case where no load is connected, and the case where the load is connected to the output voltage but the switch turns off the load.

[0041] like Figure 3 As shown, Under the condition of inconsistent hot plug speed, When removing After that, it is powered by the input capacitor. Since the static power consumption of LDO is small and constant under no-load condition, The performance is uniform power loss; the above hot plug overcharge, when When the residual power is higher than 3.24V, the negative feedback amplifier is still in normal regulation state, so unchanged; when When it is lower than 3.24V, Begin to follow The above simulation effect diagram shows the change of the decline When powered on at 3uS speed, When it drops to the range of 2.99-3.24V, Overcharge will occur, and The closer to the preset When the overcharge is greater, as shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0042] like Figure 4 As shown, At a speed of 10mS, it rises from 0V to 4.3V. The overcharge is small, the maximum overcharge amplitude is 3.256V, and the overcharge duration is about 27mS before returning to the preset .

[0043] like Figure 5 As shown, the horizontal axis is , the vertical axis is the static current of the entire LDO circuit. =3.25V, IQ is maximum, the maximum is 1.54uA (normal =4.3V, IQ=748nA).

[0044] like Figure 6 As shown, Residual power hot-swap conditions and Figure 3 However, due to the lack of comparison circuit, the circuit response speed is slow. After overcharging occurs, the power tube remains in the off state until Falling to preset After that, negative feedback releases the power tube, so in the simulation diagram, After overcharging, it will last for 3-4 seconds.

[0045] like Figure 7 As shown, At a speed of 10mS, it rises from 0V to 4.3V. Overcharge occurs, the maximum overcharge amplitude is 3.33V, and the overcharge duration is about 421mS before returning to the preset value. .

[0046] By changing part of the structure in this embodiment, the new embodiment can obtain the same function and effect.

[0047] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

[0048] Embodiment 2:

[0049] like Figure 1 As shown, a method for improving slow start output overcharging under no-load condition is provided. This embodiment is based on the LDO circuit of the first embodiment. The specific method steps of this embodiment are as follows:

[0050] S1: Under no-load Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback loop will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise.

[0051] S2: When The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up Voltage.

[0052] S3: When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharging situation has been greatly improved.

[0053] A new embodiment of the LDO circuit structure can be obtained by replacing and changing part of the structure of the LDO circuit in this embodiment. The new embodiment has the same function and effect.

[0054] As in the fourth embodiment, the comparator circuit is changed. The comparator comprises: , , , , current source , and . The source is grounded, the gate and drain are connected The source of The gate and drain are connected The gate of The source terminal , drain connected The gate of The drain is connected to and with The gate is connected to .in , Based on current source , generates a reference voltage , used to do The gate voltage of Based on current source , and Voltage, generated The drain voltage ; Generating output voltage , As The switch control signal. Overcharge is about to occur, and negative feedback is pulling high In the process, when Detected Voltage higher than back, Shutdown, The voltage is high, Cut off, thus The voltage goes low and the switch If turned on, is short-circuited. Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. The no-load hot-swap condition includes a condition where no load is connected, and a condition where the load is connected to the output voltage but the switch turns off the load.

[0055] As in the fifth embodiment, the comparator circuit is changed. The comparator comprises: , , , and current source . The source is grounded and the gate is The gate of The drain of the gate is connected at the same time; The source is grounded and the drain is connected The drain; The gate of the , source connected to current source ; The gate drive voltage , source connected to current source , drain connected The drain of the current source is connected to the first voltage signal; Connect to external input voltage .in , , , and current source A five-tube amplifier is formed, and the five-tube amplifier is based on the second reference voltage and drive voltage For comparison, the output voltage . In no-load Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled up, so that the power tube is adjusted quickly and the output voltage is improved. Higher than the preset When the power tube is adjusted, The overcharge condition is greatly improved. The no-load condition includes the condition where no load is connected, and the condition where the load is connected to the output voltage but the switch turns off the load.

[0056] like Figure 3 As shown, Under the condition of inconsistent hot plug speed, When removing After that, it is powered by the input capacitor. Since the static power consumption of LDO is small and constant under no-load condition, The performance is uniform power loss; the above hot plug overcharge, when When the residual power is higher than 3.24V, the negative feedback amplifier is still in normal regulation state, so unchanged; when When it is lower than 3.24V, Begin to follow The above simulation effect diagram shows the change of the decline When powered on at 3uS speed, When it drops to the range of 2.99-3.24V, Overcharge will occur, and The closer to the preset When the overcharge is greater, as shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0057] like Figure 4 As shown, At a speed of 10mS, it rises from 0V to 4.3V. The overcharge is small, the maximum overcharge amplitude is 3.256V, and the overcharge duration is about 27mS before returning to the preset .

[0058] like Figure 6 As shown, Residual power hot-swap conditions and Figure 3 However, due to the lack of comparison circuit, the circuit response speed is slow. After overcharging occurs, the power tube remains in the off state until Falling to preset After that, negative feedback releases the power tube, so in the simulation diagram, After overcharging, it will last for 3-4 seconds.

[0059] like Figure 7 As shown, At a speed of 10mS, it rises from 0V to 4.3V. Overcharge occurs, the maximum overcharge amplitude is 3.33V, and the overcharge duration is about 421mS before returning to the preset value. .

[0060] By changing part of the structure in this embodiment, the new embodiment can obtain the same function and effect.

[0061] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

[0062] Embodiment three:

[0063] like Figure 1 As shown, a method for improving the overcharging of residual power hot-swap output under no-load condition is provided. This embodiment is based on the LDO circuit of the first embodiment. The specific method steps of this embodiment are as follows: S1: hot-swap the output under no-load condition. Under unplug condition, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise.

[0064] S2: When The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up Voltage.

[0065] S3: When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled up, so that the power tube is adjusted quickly and the output voltage is improved. Higher than the preset Since the power tube has been adjusted, The overcharging situation has been greatly improved.

[0066] A new embodiment of the LDO circuit structure can be obtained by replacing and changing part of the structure of the LDO circuit in this embodiment. The new embodiment has the same function and effect.

[0067] As in the fourth embodiment, the comparator circuit is changed. The comparator comprises: , , , , current source , and . The source is grounded, the gate and drain are connected The source of The gate and drain are connected The gate of The source terminal , drain connected The gate of The drain is connected to and with The gate is connected to .in , Based on current source , generates a reference voltage , used to do The gate voltage of Based on current source , , and Voltage, generated The drain voltage ; Generating output voltage , As The switch control signal. Overcharge is about to occur, and negative feedback is pulling high In the process, when Detected Voltage higher than back, Shutdown, The voltage is high, Cut off, thus The voltage goes low and the switch If turned on, is short-circuited. Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch At the end state; when When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects that the voltage is higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset When the power tube is adjusted, The overcharge condition is greatly improved. The no-load hot-swap condition includes a condition where no load is connected, and a condition where the load is connected to the output voltage but the switch turns off the load.

[0068] As in the fifth embodiment, the comparator circuit is changed. The comparator comprises: , , , and current source . The source is grounded and the gate is The gate of The drain of the gate is connected at the same time; The source is grounded and the drain is connected The drain; The gate of the , source connected to current source ; The gate drive voltage , source connected to current source , drain connected The drain of the current source is connected to the first voltage signal; Connect to external input voltage .in , , , and current source A five-tube amplifier is formed, and the five-tube amplifier is based on the second reference voltage and drive voltage For comparison, the output voltage . In no-load Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled up, so that the power tube is adjusted quickly and the output voltage is improved. Higher than the preset When the power tube is adjusted, The overcharge condition is greatly improved. The no-load condition includes the condition where no load is connected, and the condition where the load is connected to the output voltage but the switch turns off the load.

[0069] like Figure 3 As shown, Under the condition of inconsistent hot plug speed, When removing After that, it is powered by the input capacitor. Since the static power consumption of LDO is small and constant under no-load condition, The performance is uniform power loss; the above hot plug overcharge, when When the residual power is higher than 3.24V, the negative feedback amplifier is still in normal regulation state, so unchanged; when When it is lower than 3.24V, Begin to follow The above simulation effect diagram shows the change of the decline When powered on at 3uS speed, When it drops to the range of 2.99-3.24V, Overcharge will occur, and The closer to the preset When the overcharge is greater, as shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0070] like Figure 4 As shown, At a speed of 10mS, it rises from 0V to 4.3V. The overcharge is small, the maximum overcharge amplitude is 3.256V, and the overcharge duration is about 27mS before returning to the preset .

[0071] like Figure 6 As shown, Residual power hot-swap conditions and Figure 3 However, due to the lack of comparison circuit, the circuit response speed is slow. After overcharging occurs, the power tube remains in the off state until Falling to preset After that, negative feedback releases the power tube, so in the simulation diagram, After overcharging, it will last for 3-4 seconds.

[0072] like Figure 7 As shown, At a speed of 10mS, it rises from 0V to 4.3V. Overcharge occurs, the maximum overcharge amplitude is 3.33V, and the overcharge duration is about 421mS before returning to the preset value. .

[0073] By changing part of the structure in this embodiment, the new embodiment can obtain the same function and effect.

[0074] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

[0075] Embodiment 4:

[0076] like Figure 8 As shown, an LDO circuit for improving output overcharge, the circuit comprises: a first amplifier, , , low static power circuit, switch , , and comparators, and external power supplies Power supply, ground voltage GND, reference voltage and external output voltage The first amplifier is connected to the low static power consumption circuit through the first NMOS tube, and the first voltage-dividing sampling resistor and the second voltage-dividing sampling resistor are connected to the low static power consumption circuit to generate a feedback voltage. The first amplifier is based on the first reference voltage and feedback voltage , output voltage control signal . It is a common source amplifier, with the source connected to ground and the drain connected to The drain and the low static power consumption circuit, the gate is connected to the output end of the first amplifier, and based on and low quiescent power consumption provide bias current, output gate drive voltage . The gate is connected to the output of the comparator, and the drain is connected to The drain and the low static power consumption circuit are connected, and the source is connected to the low static power consumption circuit. The source is connected to the external input voltage, the gate is connected to the low static power consumption circuit, and the drain is connected to the , Based on external input voltage and drive voltage Control output voltage size. One end is connected to the low static power consumption circuit and The drain, The other end of the connection One end of the feedback voltage signal ; The other end of the first amplifier is grounded. , bias current provided by low static power circuit, , and The loop formed forms a negative feedback loop, which makes the reference voltage and feedback voltage Agree, then pass and Setting the Output Voltage , the output voltage is: The comparator controls the switch The low static power consumption circuit includes , and the second amplifier, Source access The source is connected to the external input voltage, and the gate is connected to The gate and drain are connected , The source of Source access The drain and input of the second amplifier and controls , the gate is connected to the output of the second amplifier, and the drain is connected The drain and The drain of the second amplifier and A buffer is formed based on the output voltage and control The drain follower output voltage , avoiding the increase of circuit static power consumption caused by current mirror mismatch.

[0077] In this embodiment, the comparator includes: , , , , current source , and . The source is grounded, the gate and drain are connected The source of The gate and drain are connected The gate of The source terminal , drain connected The gate of The drain is connected to and with The gate is connected to .in , Based on current source , generates a reference voltage , used to do The gate voltage of Based on current source , and Voltage, generated The drain voltage ; Generating output voltage , As The switch control signal. Overcharge is about to occur, and negative feedback is pulling high In the process, when Detected Voltage higher than back, Shutdown, The voltage is high, Cut off, thus The voltage goes low and the switch If turned on, is short-circuited. Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset When the power tube is adjusted, The overcharging situation has been greatly improved.

[0078] Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset When the power tube is adjusted, The overcharge condition is greatly improved. The no-load hot-swap condition includes a condition where no load is connected, and a condition where the load is connected to the output voltage but the switch turns off the load.

[0079] like Figure 3 As shown, Under the condition of inconsistent hot plug speed, When removing After that, it is powered by the input capacitor. Since the static power consumption of LDO is small and constant under no-load condition, The performance is uniform power loss; the above hot plug overcharge, when When the residual power is higher than 3.24V, the negative feedback amplifier is still in normal regulation state, so unchanged; when When it is lower than 3.24V, Begin to follow The above simulation effect diagram shows the change of the decline When powered on at 3uS speed, When it drops to the range of 2.99-3.24V, Overcharge will occur, and The closer to the preset When the overcharge is greater, as shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0080] like Figure 4 As shown, At a speed of 10mS, it rises from 0V to 4.3V. The overcharge is small, the maximum overcharge amplitude is 3.256V, and the overcharge duration is about 27mS before returning to the preset .

[0081] like Figure 6 As shown, Residual power hot-swap conditions and Figure 3 However, due to the lack of comparison circuit, the circuit response speed is slow. After overcharging occurs, the power tube remains in the off state until Falling to preset After that, negative feedback releases the power tube, so in the simulation diagram, After overcharging, it will last for 3-4 seconds.

[0082] like Figure 7 As shown, At a speed of 10mS, it rises from 0V to 4.3V. Overcharge occurs, the maximum overcharge amplitude is 3.33V, and the overcharge duration is about 421mS before returning to the preset value. .

[0083] By changing part of the structure in this embodiment, the new embodiment can obtain the same function and effect.

[0084] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

[0085] Embodiment five:

[0086] like Fig. 9 As shown, an LDO circuit for improving output overcharge, the circuit comprises: a first amplifier, , , low static power circuit, switch , , and comparators, and external power supplies Power supply, ground voltage GND, reference voltage and external output voltage The first amplifier is based on the first reference voltage and feedback voltage , output voltage control signal . It is a common source amplifier, with the source connected to ground and the drain connected to The drain and the low static power consumption circuit, the gate is connected to the output end of the first amplifier, and based on and low quiescent power consumption provide bias current, output gate drive voltage . The gate is connected to the output of the comparator, and the drain is connected to The drain and the low static power consumption circuit are connected, and the source is connected to the low static power consumption circuit. The source is connected to the external input voltage, the gate is connected to the low static power consumption circuit, and the drain is connected to the , Based on external input voltage and drive voltage Control output voltage size. One end is connected to the low static power consumption circuit and The drain, The other end of the connection One end of the feedback voltage signal ; The other end of the first amplifier is grounded. , bias current provided by low static power circuit, , and The loop formed forms a negative feedback loop, which makes the reference voltage and feedback voltage Agree, then pass and Setting the Output Voltage , the output voltage is: The comparator controls the switch The low static power consumption circuit includes , and the second amplifier, Source access The source is connected to the external input voltage, and the gate is connected to The gate and drain are connected , The source of Source access The drain and input of the second amplifier and controls , the gate is connected to the output of the second amplifier, and the drain is connected The drain and The drain of the second amplifier and A buffer is formed based on the output voltage and control The drain follower output voltage , avoiding the increase of circuit static power consumption caused by current mirror mismatch.

[0087] In this embodiment, the comparator includes: , , , and current source . The source is grounded and the gate is The gate of The drain of the gate is connected at the same time; The source is grounded and the drain is connected The drain; The gate of the , source connected to current source ; The gate drive voltage , source connected to current source , drain connected The drain of the current source is connected to the first voltage signal; Connect to external input voltage .in , , , and current source A five-tube amplifier is formed, and the five-tube amplifier is based on the second reference voltage and drive voltage For comparison, the output voltage .

[0088] In no load Slow start, Slowly rise, when After exceeding the minimum operating voltage, the negative feedback amplifier will Pull down to the power tube fully through, at this time, Voltage below , the comparator outputs a high level, the switch In a closed state, For low, Rise and follow rise; when The voltage is about to exceed the preset When the voltage is high, the negative feedback loop starts to slowly pull up voltage, the preset is the output voltage set by the voltage divider resistor; when The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled high, so that the power tube is adjusted quickly. Higher than the preset When the power tube is adjusted, The overcharging situation has been greatly improved.

[0089] Under no-load hot-swap conditions, when the Afterwards, when Below preset After that, the negative feedback pulls down , so that the power tube is fully turned on, and follow Decline; at this time, Voltage below , the comparator outputs a high level, the switch In the cut-off state; When hot-swap power is applied, the negative feedback loop starts to pull high Voltage; When The voltage increases, but not to the point where it limits the power tube regulation. During the process, the comparator detects Voltage higher than When the comparator outputs a low level, the switch turn on becomes a gate-drain connected load, greatly enhancing Tube pull up Ability to quickly The voltage is pulled up, so that the power tube is adjusted quickly and the output voltage is improved. Higher than the preset Since the power tube has been adjusted, The overcharge condition is greatly improved. The no-load condition includes the condition where no load is connected, and the condition where the load is connected to the output voltage but the switch turns off the load.

[0090] like Figure 3 As shown, Under the condition of inconsistent hot plug speed, When removing After that, it is powered by the input capacitor. Since the static power consumption of LDO is small and constant under no-load condition, The performance is uniform power loss; the above hot plug overcharge, when When the residual power is higher than 3.24V, the negative feedback amplifier is still in normal regulation state, so unchanged; when When it is lower than 3.24V, Begin to follow The above simulation effect diagram shows the change of the decline When powered on at 3uS speed, When it drops to the range of 2.99-3.24V, Overcharge will occur, and The closer to the preset When the overcharge is greater, as shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0091] As shown in the figure above, Maximum overcharge: 3.4V (normal =4.3V, =3.25V).

[0092] like Figure 4 As shown, At a speed of 10mS, it rises from 0V to 4.3V. The overcharge is small, the maximum overcharge amplitude is 3.256V, and the overcharge duration is about 27mS before returning to the preset .

[0093] like Figure 6 As shown, Residual power hot-swap conditions and Figure 3 However, due to the lack of comparison circuit, the circuit response speed is slow. After overcharging occurs, the power tube remains in the off state until Falling to preset After that, negative feedback releases the power tube, so in the simulation diagram, After overcharging, it will last for 3-4 seconds.

[0094] like Figure 7 As shown, At a speed of 10mS, it rises from 0V to 4.3V. Overcharge occurs, the maximum overcharge amplitude is 3.33V, and the overcharge duration is about 421mS before returning to the preset value. .

[0095] By changing part of the structure in this embodiment, the new embodiment can obtain the same function and effect.

[0096] Advantages of the implementation of the present invention: The present invention connects a low static power consumption circuit through a first NMOS tube through a first amplifier, a first voltage-dividing sampling resistor and a second voltage-dividing sampling resistor are connected to the low static power consumption circuit and generate a feedback voltage, a comparator is connected to the low static power consumption circuit through a fourth PMOS tube, and controls the on and off of the fourth PMOS tube switch controller based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the driving voltage is modulated by the comparator circuit to control the power tube to improve the output voltage overcharging during slow startup under no-load and improve the output voltage overcharging during no-load hot plugging.

[0097] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the art within the technical scope disclosed in the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. An LDO circuit for improving output overcharge, comprising: A first amplifier, a first NMOS tube, a second PMOS tube, a low static power consumption circuit, a fourth PMOS tube, and a first voltage-dividing sampling resistor And the second voltage divider sampling resistor , and the external input voltage , the first reference voltage and output voltage , the first amplifier is connected to the low static power consumption circuit through the first NMOS tube, the first voltage-dividing sampling resistor and the second voltage-dividing sampling resistor are connected to the low static power consumption circuit and the second PMOS tube and generate a feedback voltage, characterized in that it also includes a comparator, wherein the comparator is connected to the low static power consumption circuit through the fourth PMOS tube, and controls the opening and closing of the fourth PMOS tube based on a comparison of a second reference voltage and a driving voltage generated inside a circuit; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs a driving voltage through the first NMOS tube and the low static power consumption circuit, and the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage; the low static power consumption The circuit includes a first PMOS tube, a third PMOS tube and a second amplifier. The source of the first PMOS tube is connected to the source of the second PMOS tube and to an external input voltage, the gate is connected to the gate of the second PMOS tube, and the drain is connected to the source of the third PMOS tube; the source of the third PMOS tube is connected to the drain of the first PMOS tube and the input end of the second amplifier, the gate is connected to the output end of the second amplifier, and the drain is connected to the drain of the fourth PMOS tube and the drain of the first NMOS tube; the source of the fourth PMOS tube is connected to the source of the third PMOS tube, the drain is connected to the driving voltage, and the gate is connected to the output end of the comparator. When the fourth PMOS tube is turned on, the driving voltage is quickly pulled up.

2. The LDO circuit for improving output overcharge according to claim 1, characterized in that: The first NMOS tube is a common source amplifier, the source of which is grounded, the drain of which is connected to the drain of the fourth PMOS tube and the low static power consumption circuit, the gate of which is connected to the output end of the first amplifier, and outputs a gate drive voltage based on the first voltage signal and the bias current provided by the low static power consumption circuit; the source of the second PMOS tube is connected to the external input voltage, the gate of which is connected to the low static power consumption circuit, and the drain of which is connected to the first voltage divider sampling resistor.

3. The LDO circuit for improving output overcharge according to claim 1, characterized in that: The second amplifier and the third PMOS tube form a buffer, and control the drain follower output voltage of the first PMOS tube based on the output voltage, thereby avoiding an increase in circuit static power consumption due to current mirror mismatch.

4. The LDO circuit for improving output overcharge according to claim 1, characterized in that: The loop formed by the first amplifier, the first NMOS tube, the low static power consumption circuit, the second PMOS tube, the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor constitutes a negative feedback loop, one end of the first voltage-dividing sampling resistor is connected to the low static power consumption circuit and the drain of the second PMOS tube, the other end of the first voltage-dividing sampling resistor is connected to one end of the second voltage-dividing sampling resistor and outputs a feedback voltage signal; the other end of the second voltage-dividing sampling resistor is grounded; the negative feedback loop makes the first reference voltage consistent with the feedback voltage, and then sets the output voltage through the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor, and the output voltage is: 。 5. A method for improving slow start output overcharge under no-load, based on the LDO circuit according to any one of claims 1 to 4, characterized in that: The method comprises the following steps: the comparator is connected to the low static power consumption circuit via a fourth PMOS tube, and controls the opening and closing of the fourth PMOS tube based on comparison between the second reference voltage and the driving voltage; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs the driving voltage via the first NMOS tube and the low static power consumption circuit; the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage.

6. A method for improving slow start output overcharge under no-load condition according to claim 5, characterized in that: In the no-load slow start, when the external input voltage exceeds the minimum operating voltage, the driving voltage is pulled down to the second PMOS tube fully turned on, then the driving voltage is lower than the second reference voltage, and the comparator outputs a high level, and the fourth PMOS tube is in the cut-off state; when the external input voltage is about to be higher than the output voltage set by the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor, the driving voltage is pulled up, and the comparator detects that the driving voltage is higher than the second reference voltage and outputs a low level, and turns on the fourth PMOS tube, so that the second PMOS tube is quickly adjusted.

7. A method for improving residual power hot-swap output overcharging under no-load conditions, implemented based on the LDO circuit described in any one of claims 1 to 4, characterized in that: The method comprises the following steps: the comparator is connected to the low static power consumption circuit via a fourth PMOS tube, and controls the opening and closing of the fourth PMOS tube based on comparison between the second reference voltage and the driving voltage; the first amplifier outputs a first voltage signal based on the first reference voltage and the feedback voltage, and outputs the driving voltage via the first NMOS tube and the low static power consumption circuit; the second PMOS tube generates and controls the output voltage based on the external input voltage and the driving voltage.

8. A method for improving overcharging of residual power hot-swap output under no-load condition according to claim 7, characterized in that: Under the condition of no-load hot-swap external input voltage being unplugged, when the external input voltage is lower than the output voltage set by the first sampling voltage-dividing resistor and the second sampling voltage-dividing resistor, the driving voltage is pulled down to the second PMOS tube being fully on, then the driving voltage is lower than the second reference voltage, and the comparator outputs a high level, and the fourth PMOS tube is in a cut-off state; when the external input voltage is hot-swapped and powered on, the driving voltage is pulled up to be higher than the second reference voltage, the comparator detects it and outputs a low level, and turns on the fourth PMOS tube, so that the second PMOS tube is quickly adjusted to improve the output voltage overcharge.

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