Task processing method, device and system, electronic equipment and storage medium
By establishing a task processing system between the master node and the child node, and using unified interface and scheduling center services, the problem of complex deployment and low resource utilization in large-model language inference is solved, and task execution efficiency and GPU resource compatibility is improved , realizes cluster scheduling across chips and nodes.
Patent Information
- Application Number
- CN202411354000.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2024-12-27
AI Technical Summary
In the large-model language reasoning scenario, the existing technology has problems such as complex deployment, low scheduling efficiency and low resource utilization, especially when facing complex inference scenarios, the overall operating performance is not high.
By establishing a task processing system between the master node and the child node, using a unified interface to obtain target task instructions, cluster scheduling across chips and cross nodes is realized, resource utilization is improved, and task allocation and processing is performed through scheduling center services and task execution services. .
It improves task execution efficiency, improves GPU resources compatibility and user experience, solves different problems of each chip interface, realizes cluster scheduling across chips and cross-nodes, and improves resource utilization.
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Figure CN119201398A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a task processing method, device, system, electronic device and storage medium. Background Art
[0002] With the development and progress of the times, artificial intelligence technology has exploded, and various manufacturers have launched their own graphics processing unit (GPU) chips or boards, but the deployment and use methods are different and incompatible. In the current large-model language reasoning scenario, the use of large-model language reasoning is mainly carried out through self-developed API interfaces and single-node single-resource deployment solutions. When facing complex reasoning scenarios, there may be problems such as complex deployment and low scheduling efficiency, and the overall operating performance is not high. Summary of the invention
[0003] In view of this, the present invention provides a task processing method, device, system, electronic device and storage medium to solve the problem of low execution efficiency of reasoning tasks.
[0004] In a first aspect, the present invention provides a task processing method, which is applied to a master node, and the method comprises:
[0005] Get target task instructions;
[0006] In response to the target task instruction, query the subnode to distribute the target task instruction to the target subnode;
[0007] The target subnode receives the task processing result returned by the target subnode, processes the target task instruction, and generates the task processing result.
[0008] The task processing method provided in this embodiment includes obtaining a target task instruction; in response to the target task instruction, querying the subnode to assign the target task instruction to the target subnode; receiving the task processing result returned by the target subnode, the target subnode processes the target task instruction, and generates a task processing result. The core of the present invention is to realize the reasoning of large models processed by GPU resources, perform reasoning operations based on the AI computing power of the chip, execute the target task instruction, obtain the target task instruction based on a unified first interface, improve the compatibility of the chip, avoid the problem of different chip interfaces, and provide a web interface to enhance the user experience. The master node can schedule the task execution resources of each subnode, realize cluster scheduling across chips and nodes, improve task execution efficiency, and improve resource utilization.
[0009] In an optional implementation, the obtaining of the target task instruction includes:
[0010] The target task request is determined based on the first interface in response to parameter setting and model setting operations on the task release page.
[0011] In an optional implementation, querying the subnode in response to the target task instruction to distribute the target task instruction to the target subnode includes:
[0012] Determine the target subnode based on the task processing status of the subnode, wherein the task processing status includes at least one of the task processing quantity and the task response time;
[0013] The target task instruction is sent to the target child node.
[0014] In a second aspect, the present invention provides a task processing method, applied to a child node, the method comprising:
[0015] Receive the target task instruction sent by the master node, and process the target task instruction to generate a task processing result;
[0016] The task processing result is sent to the master node.
[0017] In an optional implementation, the processing the target task instruction to generate a task processing result includes:
[0018] Starting at least one task execution service based on the target task instruction, wherein the task execution service corresponds to at least one board;
[0019] Parsing the target task instruction based on the task execution service to obtain a parsed target task instruction, wherein the parsed target task instruction at least includes a target task parameter;
[0020] The target model is called based on the second interface to execute the parsed target task instruction and generate a task processing result, wherein the target model corresponds to the target task instruction.
[0021] In a third aspect, the present invention provides a task processing system, the system comprising:
[0022] A master node, configured to execute the task processing method described in any one of the first aspects above;
[0023] A subnode, the subnode is communicatively connected to the main node, and is used to execute the task processing method described in any one of the second aspects above.
[0024] In an optional implementation, a scheduling center service is deployed on the master node, and the scheduling center service is used to receive a request sent by the child node, and the request includes at least one of a registration request and a heartbeat message;
[0025] At least one task execution service is deployed on the child node, and the task execution service is used to register the task execution service on the child node with the scheduling center service on the master node;
[0026] The dispatch center service is used to control the processing status of the target task instruction based on the instruction quantity threshold;
[0027] The master node is provided with a first interface for receiving target task instructions;
[0028] The subnode is provided with a second interface for calling the target model to execute the parsed target task instruction;
[0029] A heartbeat service is deployed on the master node and the child node respectively, and the heartbeat service on the master node is used to receive the heartbeat information sent by the child node;
[0030] The master node confirms the control state of the child node based on the heartbeat information, including:
[0031] Receive the heartbeat information sent by the child node based on a preset time interval;
[0032] When the time interval between receiving two adjacent heartbeat messages is greater than the preset time interval, it is determined that the task execution service on the child node is offline;
[0033] Delete the offline task execution service in the scheduling center service.
[0034] In a fourth aspect, the present invention provides an electronic device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the method of the first aspect or any corresponding embodiment thereof, the second aspect or any corresponding embodiment thereof by executing the computer instructions.
[0035] In a fifth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to cause a computer to execute the method of the first aspect or any corresponding embodiment thereof, the second aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0037] Figure 1 is a schematic diagram of a task processing system according to an embodiment of the present invention;
[0038] Figure 2 is a flowchart of a task processing method according to an embodiment of the present invention;
[0039] Figure 3 is a flowchart of a task processing method according to an embodiment of the present invention;
[0040] Figure 4 is a structural block diagram of a task processing device according to an embodiment of the present invention;
[0041] Figure 5 It is a schematic diagram of the hardware structure of the electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0042] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0043] At present, with the rapid development of artificial intelligence technology, especially the rise of generative large language models, the demand for GPU computing power is increasing dramatically. The use of common GPU boards in large model language reasoning is mainly implemented through self-developed APIs (Application Programming Interfaces). These interfaces enable developers to apply GPU resources to the training and reasoning process of large models. The deployment scheme of GPU boards in large model reasoning is mainly single-node and single-resource. When faced with large-scale and high-concurrency reasoning requirements, problems such as low resource utilization and poor scalability may be encountered. Based on this, an embodiment of the present invention provides a task processing system, which includes a main node and a sub-node. Both the main node and the sub-node can be used to execute a task processing method, such as Figure 1 shown.
[0044] Both the master node and the sub-node are servers. The master node is a scheduling control node, and can also be used as a sub-node for computing. The master node is a master node, and the sub-node is a slave node. There are one or more sub-nodes in the task processing system. The master node and the sub-node can communicate with each other for data transmission, task execution, etc.
[0045] A scheduling center service is deployed on the main node, and the scheduling center service is used to receive requests sent by child nodes, and the requests include at least one of registration requests and heartbeat information; at least one task execution service is deployed on the child node, and the task execution service is used to register the task execution service on the child node with the scheduling center service on the main node; the scheduling center service is used to control the processing status of the target task instruction based on the instruction quantity threshold; a first interface is deployed on the main node, and is used to receive the target task instruction; a second interface is deployed on the child node, and is used to call the target model to execute the parsed target task instruction; heartbeat services are deployed on the main node and the child node respectively, and the heartbeat service on the main node is used to receive the heartbeat information sent by the child node.
[0046] The scheduling center service created on the master node is always online and can receive registration requests, heartbeat information, etc. sent by the child node at any time. At least one task execution service (worker service) is deployed on the child node. The task execution service is a component running on the child node, responsible for executing the tasks issued by the master node. The worker service on the child node is always online. The child node registers the worker service on the child node with the scheduling center service by sending a registration request to the master node. There is a corresponding relationship between each worker service and the child node, and each worker service and child node can be set with a corresponding identification number. Each worker service can correspond to one or more GPU boards according to the size of the model. The worker service can receive the inference request sent by the master node and execute the inference task. The scheduling center service of the master node can set the maximum number of requests that can be received at the same time, that is, the instruction number threshold. If the instruction number threshold is exceeded, it will block and wait, and release a resource when the worker service on the child node completes a request. A first interface is deployed on the main node, and a second interface is deployed on the child node. The first interface is a standard OpenAI interface, which can be used to receive target task instructions. The use of a unified interface can solve the problem of different chip interfaces. A second interface is deployed on the child node. The second interface is a self-developed API, which can be used to call the inference model corresponding to the worker service, so that the inference model executes and outputs the result according to the parsed target task instructions. After receiving the target task instruction, the child node will perform the first phase of the first interface request parsing processing on the target task instruction, thereby decoupling from the first interface and obtaining the parsed target task instruction. The parsed target task instruction only contains parameter information, user request problem information, and scheduling information.
[0047] In some optional embodiments, the master node confirms the control status of the child node based on the heartbeat information, including: receiving the heartbeat information sent by the child node based on a preset time interval; determining that the task execution service on the child node is offline when the time interval between receiving two adjacent heartbeat information is greater than the preset time interval; and deleting the offline task execution service in the scheduling center service.
[0048] Create heartbeat services on the master node and child node respectively, and send counting requests to each other at regular intervals to ensure that the service is online. If there is a heartbeat timeout, that is, the time interval between the master node receiving two consecutive heartbeat messages is greater than the preset time interval, the scheduling center service on the master node will delete the task execution service corresponding to the child node, that is, the task execution service is offline. After that, the child node will no longer receive the target task instruction from the master node. If the task execution service on the child node can also provide reasoning services, the task execution service can be manually specified at the application layer to execute the target task instruction for reasoning operations. By re-registering the child node and the task execution service to the scheduling center service of the master node, the task execution service can be put back online.
[0049] The master node and the sub-node both store their own logs. The master node stores the dispatch center service log, interface log, and web service log, and the sub-node stores the task execution service log.
[0050] The task processing system provided by the embodiment of the present invention provides an integrated scheduling control center node, namely a master node, which can be used to implement integrated computing, realize multi-task concurrency, and set various scheduling strategies.
[0051] According to an embodiment of the present invention, a task processing method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0052] In this embodiment, a task processing method is provided, which can be used for the master node in the above task processing system. Figure 2 is a flowchart of a task processing method according to an embodiment of the present invention. Figure 2 As shown, the process includes the following steps:
[0053] Step S101, obtaining target task instructions.
[0054] A scheduling center service is deployed on the master node. The scheduling center service is always online and can receive registration requests, heartbeat information, etc. sent by the child nodes at any time. Through the web service created on the master node, a corresponding web interface is provided to the outside world. Users can issue target task instructions through the web interface. The target task instructions may include model parameters, basic setting parameters, etc. The target task instruction is an inference task instruction in this embodiment. By issuing the target task instruction, the corresponding model can be called to perform the inference operation and return the inference result. The scheduling center service of the master node can receive multiple task instructions at the same time. There is an upper limit to the number of task instructions that can be received. If the upper limit is reached, it will be blocked and waited until the child node completes the task and releases a corresponding resource.
[0055] Specifically, step S101 includes: determining a target task request based on the first interface in response to parameter setting and model setting operations on the task release page.
[0056] The task publishing interface is a web interface set on the main node. The task publishing interface includes an input box and a send button. Users can chat questions and answers on the task publishing interface. Model settings and parameter settings can be performed on the interface to generate target task requests. Among them, the set parameter values will affect the model's answer to the same question. Exemplarily, the parameter values may include temperature, max_tokens, etc. Taking the parameter temperature as an example, when the temperature is set to a lower level (for example, 0.1), the model's answer tends to be more certain, consistent, and highly repeatable. When the temperature is set to a higher level (for example, 1), the model's answer is more diverse and creative. Max_tokens affects the maximum number of output tokens for the answer. The first interface is an external unified interface, through which task requests can be received.
[0057] Step S102 , in response to the target task instruction, query the child node to distribute the target task instruction to the target child node.
[0058] After receiving the target task instruction, it will be forwarded to the scheduling service center of the main node. The scheduling center will query the sub-node according to the scheduling strategy, determine the target sub-node, and assign the target task instruction to the target sub-node. Each sub-node is registered in the scheduling center service of the main node. The sub-node is selected according to the parameters in the target task instruction. Specifically, the corresponding model can be determined according to the model parameters, thereby determining the sub-node corresponding to the model. The task execution service corresponding to the model is also registered in the scheduling center service.
[0059] Step S103: receiving the task processing result returned by the target child node.
[0060] After sending the target task instruction to the target sub-node, the target sub-node processes the target task instruction and generates a task processing result. After generating the task processing result, the target sub-node sends the task processing result to the main node, and the main node can display the task processing result on the web interface.
[0061] The task processing method provided in this embodiment includes obtaining a target task instruction; in response to the target task instruction, querying the subnode to assign the target task instruction to the target subnode; receiving the task processing result returned by the target subnode, the target subnode processes the target task instruction, and generates a task processing result. The core of the present invention is to realize the reasoning of large models processed by GPU resources, perform reasoning operations based on the AI computing power of the chip, execute the target task instruction, obtain the target task instruction based on a unified first interface, improve the compatibility of the chip, avoid the problem of different chip interfaces, and provide a web interface to enhance the user experience. The master node can schedule the task execution resources of each subnode, realize cluster scheduling across chips and nodes, improve task execution efficiency, and improve resource utilization.
[0062] In this embodiment, a task processing method is provided, which can be used for the master node in the above task processing system. The method includes the following steps:
[0063] Step S201, obtain the target task instruction. For details, see Figure 2 Step S101 of the illustrated embodiment will not be described in detail here.
[0064] Step S202 , in response to the target task instruction, query the child node to distribute the target task instruction to the target child node.
[0065] Specifically, the above step S202 includes:
[0066] Step S2021, determining a target child node based on the task processing status of the child node.
[0067] The task processing status includes at least one of the task processing quantity and the task response time.
[0068] After receiving the target task instruction, the master node schedules the sub-nodes registered in the scheduling center based on the scheduling center service, and can determine the target sub-node according to the set scheduling strategy.
[0069] The actual usage of all currently registered task execution services is queried through the scheduling strategy, and the task execution service with the least number of tasks processed or the shortest task response time is selected in the subnode to determine the target task execution service, and then determine the target subnode corresponding to the target task execution service. The task execution service will record the response time to the instruction and the number of requests executed after each task execution.
[0070] It should be noted that the task processing quantity and task response time included in the task processing status disclosed in this embodiment are only examples. The scheduling strategy for the sub-nodes can be selected according to actual conditions. The task processing status can also include other influencing factors.
[0071] Step S2022, sending the target task instruction to the target child node.
[0072] After the target subnode is determined, the target task instruction is sent to the target subnode.
[0073] In some implementations, it also includes parsing the target task instructions, and the process is described below. When a user initiates a request, the request will go through an internal transfer process. During this process, the request will be processed in the master node in the first stage, that is, parsing the key information in the first interface request format. The process includes extracting parameter information in the request, user problem information, and possible scheduling information. After completing this step, the system has been decoupled from the first interface, and subsequent processing will no longer depend on the specific implementation and response of the first interface.
[0074] After internal transit processing, the key information in the request (such as parameters, questions, scheduling information, etc.) is passed to the target sub-node. Therefore, the format of the target task instruction received by the target sub-node may be different from the target task instruction received by the main node. The target task instruction received by the target sub-node includes parsed parameter information, which may include model settings, parameter settings, etc.
[0075] Step S203: receiving the task processing result returned by the target child node.
[0076] For details, please see Figure 1 Step S103 of the illustrated embodiment will not be described in detail here.
[0077] In this embodiment, a task processing method is provided, which can be used for a sub-node in the above task processing system. Figure 3 is a flowchart of a task processing method according to an embodiment of the present invention. Figure 3 As shown, the process includes the following steps:
[0078] Step S301, receiving a target task instruction sent by a master node, and processing the target task instruction to generate a task processing result.
[0079] After receiving the target task instruction, the target subnode calls the corresponding task execution service, processes the target task instruction based on the model corresponding to the task execution service, and generates a task processing result.
[0080] Specifically, in the above step S301, the target task instruction is processed to generate a task processing result including:
[0081] Step S3011: start at least one task execution service based on the target task instruction.
[0082] Among them, the task execution service corresponds to at least one board. After the target subnode receives the target task instruction, it starts at least one task execution service according to the requirements of the target task instruction. One or more task execution services are deployed on the target subnode, and each task execution service corresponds to at least one GPU board according to the model size.
[0083] Step S3012: parsing the target task instruction based on the task execution service to obtain the parsed target task instruction.
[0084] After receiving the target task instruction, the task execution service on the target subnode parses the target task instruction. The parsed target task instruction includes at least target task parameters, which may include model parameter information, user request information, and scheduling information.
[0085] Step S3013: calling the target model based on the second interface to execute the parsed target task instruction and generate a task processing result.
[0086] The target model corresponds to the target task instruction. The target model corresponding to the target task instruction is called through the second interface, and the target model generates a task processing result based on the parsed instruction.
[0087] Step S302, sending the task processing result to the master node.
[0088] A task processing method provided by the present invention is summarized as follows. In the task processing method provided by this embodiment, the scheduling center service is started on the master node. The self-developed scheduling algorithm is essentially decoupled from the actual application business. After receiving the request, the scheduling algorithm will sort all the current online worker services according to different scheduling strategies such as the number of requests or request response time according to different application scenarios, and provide the current optimal resources to the request for reasoning. Each worker service and the scheduling center have a heartbeat detection mechanism. If the heartbeat stops or times out, the worker service will be disconnected and no longer participate in scheduling, that is, it will not receive requests unless it is registered again. On the computing node (child node) (the master node can also be a computing node at the same time), 1 to N self-developed worker services are started on demand. Each worker service corresponds to 1 to N boards according to the model size. Each worker service is registered with the scheduling center and is always maintained with the scheduling center through the heartbeat mechanism. If the heartbeat stops or times out, the worker service will be disconnected, and subsequent requests will not be scheduled to the worker unless it is successfully registered again. Externally, it is implemented through a unified first interface and web interface. Internally, the software stack task execution service (worker service) is connected through the self-developed API of each chip. Users can conduct quick chat questions and answers on the web interface, select the model to be used, and set basic parameters. The service sends the received request to the self-developed scheduling system to distribute it to the specified worker service for reasoning, and then returns the reasoning result. The worker services of different chips are generally deployed in different containers. Each chip can be deployed on an adapted server, and the requests received from the outside can be distributed to different chips through the self-developed scheduling system, or they can be scheduled to the same chip.
[0089] As a cross-chip integrated framework solution, this method solves the cross-chip compatibility problem. By providing a unified external interface, it solves the problem of different chip interfaces, unifies the scheduling algorithm and connects each chip, solves the cross-chip and cross-node cluster scheduling problem, adapts to multiple models, reduces the difficulty of adaptation and maintenance costs, and speeds up the efficiency and speed of application deployment. This technical solution can be applied to GPU hardware or other hardware resource scenarios, flexibly and simplifies processing, improves resource utilization, optimizes user experience, and accelerates the implementation of user applications.
[0090] In this embodiment, a task processing device is also provided, which is used to implement the above-mentioned embodiments and implementation methods, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.
[0091] This embodiment provides a task processing device, which is arranged in a master node, such as Figure 4 As shown, including:
[0092] The instruction acquisition module 401 is used to acquire the target task instruction;
[0093] The instruction distribution module 402 is used to query the sub-node in response to the target task instruction to distribute the target task instruction to the target sub-node;
[0094] The result receiving module 403 is used to receive the task processing result returned by the target sub-node. The target sub-node processes the target task instruction and generates the task processing result.
[0095] In some optional implementations, the instruction acquisition module 401 includes:
[0096] The request determination unit is used to determine the target task request based on the first interface in response to the parameter setting and model setting operations on the task release page.
[0097] In some optional implementations, the result receiving module 403 includes:
[0098] A subnode determination unit, configured to determine a target subnode based on a task processing state of the subnode, wherein the task processing state includes at least one of a task processing quantity and a task response time;
[0099] An instruction sending unit is used to send the target task instruction to the target sub-node.
[0100] This embodiment provides a task processing device, which is arranged in a subnode and includes:
[0101] The instruction receiving module is used to receive the target task instruction sent by the master node and process the target task instruction to generate a task processing result;
[0102] The result sending module is used to send the task processing result to the master node.
[0103] In some optional implementations, the instruction receiving module includes:
[0104] A service starting unit, used to start at least one task execution service based on the target task instruction, wherein the task execution service corresponds to at least one board;
[0105] An instruction parsing unit, configured to parse the target task instruction based on the task execution service to obtain a parsed target task instruction, wherein the parsed target task instruction at least includes a target task parameter;
[0106] The instruction execution unit is used to call the target model based on the second interface to execute the parsed target task instruction and generate a task processing result, wherein the target model corresponds to the target task instruction.
[0107] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.
[0108] The task processing device in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.
[0109] An embodiment of the present invention further provides an electronic device having the above-mentioned task processing device.
[0110] See also Figure 5 , Figure 5 is a schematic diagram of the structure of an electronic device provided by an optional embodiment of the present invention, such as Figure 5 As shown, the electronic device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process instructions executed in the electronic device, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple electronic devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 5 A processor 10 is taken as an example.
[0111] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.
[0112] The memory 20 stores instructions executable by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.
[0113] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the electronic device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0114] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.
[0115] The electronic device further comprises a communication interface 30 for the electronic device to communicate with other devices or a communication network.
[0116] The embodiment of the present invention also provides a computer-readable storage medium. The method according to the embodiment of the present invention can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.
[0117] A part of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the existence of the computer program instruction in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc., and accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium accessible to the computer.
[0118] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.
Claims
1. A task processing method, characterized in that: Applied to the master node, the method comprises: Get target task instructions; In response to the target task instruction, query the subnode to distribute the target task instruction to the target subnode; The target subnode receives the task processing result returned by the target subnode, processes the target task instruction, and generates the task processing result.
2. The method according to claim 1, characterized in that The obtaining of the target task instruction comprises: The target task request is determined based on the first interface in response to parameter setting and model setting operations on the task release page.
3. The method according to claim 2, characterized in that In response to the target task instruction, querying the subnode to distribute the target task instruction to the target subnode includes: Determine the target subnode based on the task processing status of the subnode, wherein the task processing status includes at least one of the task processing quantity and the task response time; The target task instruction is sent to the target child node.
4. A task processing method, characterized in that: Applied to a child node, the method comprises: Receive the target task instruction sent by the master node, and process the target task instruction to generate a task processing result; The task processing result is sent to the master node.
5. The method according to claim 4, characterized in that The processing of the target task instruction to generate a task processing result includes: Starting at least one task execution service based on the target task instruction, wherein the task execution service corresponds to at least one board; Parsing the target task instruction based on the task execution service to obtain a parsed target task instruction, wherein the parsed target task instruction at least includes a target task parameter; The target model is called based on the second interface to execute the parsed target task instruction and generate a task processing result, wherein the target model corresponds to the target task instruction.
6. A task processing system, characterized in that: The system comprises: A master node, configured to execute the task processing method according to any one of claims 1 to 3; A subnode, the subnode is communicatively connected to the main node, and is used to execute the task processing method described in any one of claims 4 to 5.
7. The system according to claim 6, characterized in that A scheduling center service is deployed on the master node, and the scheduling center service is used to receive a request sent by the child node, and the request includes at least one of a registration request and a heartbeat message; At least one task execution service is deployed on the child node, and the task execution service is used to register the task execution service on the child node with the scheduling center service on the master node; The dispatch center service is used to control the processing status of the target task instruction based on the instruction quantity threshold; The master node is provided with a first interface for receiving target task instructions; The subnode is provided with a second interface for calling the target model to execute the parsed target task instruction; A heartbeat service is deployed on the master node and the child node respectively, and the heartbeat service on the master node is used to receive the heartbeat information sent by the child node; The master node confirms the control state of the child node based on the heartbeat information, including: Receive the heartbeat information sent by the child node based on a preset time interval; When the time interval between receiving two adjacent heartbeat messages is greater than the preset time interval, it is determined that the task execution service on the child node is offline; Delete the offline task execution service in the scheduling center service.
8. A task processing device, characterized in that: The device comprises: An instruction acquisition module, used to acquire target task instructions; An instruction distribution module, for querying the sub-node in response to the target task instruction, so as to distribute the target task instruction to the target sub-node; The result receiving module is used to receive the task processing result returned by the target sub-node. The target sub-node processes the target task instruction and generates the task processing result.
9. An electronic device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the task processing method according to any one of claims 1 to 5 by executing the computer instructions.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the task processing method according to any one of claims 1 to 5.