Data reading method and device and electronic device

Abstract

The invention discloses a data reading method and device and an electronic device.The method comprises the steps that a first virtual address corresponding to first equipment is determined according to a physical address of an on-chip memory, and the first equipment accesses the on-chip memory based on the first virtual address; writing first data in the on-chip memory based on the first virtual address; and under the condition that the first data is successfully written, first notification information is sent to second equipment which is about to receive the first data, so that the second equipment reads the first data in the on-chip memory based on a second virtual address corresponding to the second equipment, and the first notification information is used for indicating the second equipment to receive the first data. By the adoption of the technical scheme, the problem that in the prior art, data can only be transmitted in a microkernel operating system depending on an IPC message, but the IPC message can only transmit data with few bytes at a time, and the transmission requirement of large data volume cannot be met is solved.

Description

Technical Field

[0001] The present application relates to the field of big data, and more specifically, to a method, device and electronic device for reading data. Background Art

[0002] With the widespread application of microkernel operating systems in actual products, users have increased their demand for the interaction between kernel-state data and user-state data of microkernel operating systems. For example, the recording of kernel fault information and software crash information can help solve code quality problems in actual product applications; thread running status information helps application software manage threads, thereby improving software stability.

[0003] The microkernel operating system stores the core system scheduling, memory management and other parts in the kernel state, and places non-core functions such as storage management and peripheral management in the user state, so that the system has a more compact size and reduces the redundancy generated by the system, improving the overall stability and real-time performance of the system. Since it is a modular structure, each function can form a module independently, so the interaction between the modules needs to be realized through the inter-process communication (IPC) message mechanism. At the same time, modularization facilitates the operation of adding and deleting system functions, has a certain degree of flexibility, and will not cause the overall system to crash due to the modification of a function or the occurrence of an error, thereby improving the reliability of the system.

[0004] Microkernel operating systems are widely used in the embedded field because of their high reliability, high real-time performance and high security. Compared with macrokernel operating systems, the driver layer of microkernel operating systems is located in the user state, and peripheral data can directly interact with upper-level components or applications in the user state, thereby improving the efficiency of peripheral data transmission and the real-time performance of the system. Data transmission from kernel state to user state can only rely on IPC messages, but IPC messages are based on general registers for data transmission, and can only transmit a few bytes of data at a time, which cannot meet the transmission requirements of large amounts of data between kernel state and user state. This will result in some useful data in kernel state, such as kernel fault information, software crash information, thread running status information, etc., being unable to be obtained by user state applications.

[0005] Regarding related technologies, in a microkernel operating system, data can only be transmitted by relying on IPC messages. However, IPC messages can only transmit a small number of bytes of data at a time and cannot meet the transmission needs of larger amounts of data. Currently, no effective solution has been proposed.

[0006] Therefore, it is necessary to improve the related technology to overcome the above-mentioned defects in the related technology. Summary of the invention

[0007] The embodiments of the present application provide a data reading method, device and electronic device, so as to solve the problem that at least in the prior art, data can only be transmitted by relying on IPC messages in a microkernel operating system, but IPC messages can only transmit a small number of bytes of data at a time and cannot meet the transmission requirements of larger data volumes.

[0008] According to one aspect of an embodiment of the present application, a method for reading data is provided, including: determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address; writing first data in the on-chip memory based on the first virtual address; and, when the first data is successfully written, sending a first notification message to a second device to receive the first data, so that the second device reads the first data in the on-chip memory based on the second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0009] In an exemplary embodiment, determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory includes: sending a mapping request carrying the physical address to a memory management unit, so that the memory management unit maps the physical address to a target page in a virtual address space, and determines the first virtual address according to information of the target page; and receiving a first response message sent by the memory management unit to determine the first virtual address according to the first response message.

[0010] In an exemplary embodiment, writing the first data in the on-chip memory based on the first virtual address includes: determining whether other data is stored in the on-chip memory when accessing the on-chip memory based on the first virtual address; if other data is stored in the on-chip memory, performing a deletion operation to delete the other data; and writing the first data in the on-chip memory after completing the deletion operation.

[0011] In an exemplary embodiment, before writing the first data in the on-chip memory based on the first virtual address, the method also includes: sending a first permission request to the on-chip memory, wherein the first permission request is used to request write permission; when it is determined according to second response information of the on-chip memory that the on-chip memory allows the first device to write data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0012] In an exemplary embodiment, after locking the target state identification bit, the method further includes: determining whether the first data is successfully written in the on-chip memory; and unlocking the target state identification bit if it is determined that the first data is successfully written in the on-chip memory.

[0013] In an exemplary embodiment, before or after sending a first notification message to a second device to receive the first data, the method further includes: receiving a second notification message sent by the second device, wherein the second notification message is used to indicate that the first device receives the second data; accessing the on-chip memory based on the first virtual address, and reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification message, wherein the data length is the data length of the second data; and writing the second data into a database of the first device.

[0014] In an exemplary embodiment, before reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification information, the method also includes: sending a second permission request to the on-chip memory, wherein the second permission request is used to request read permission; when it is determined according to third response information of the on-chip memory that the on-chip memory allows the first device to read data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0015] In an exemplary embodiment, after writing the first data in the on-chip memory based on the first virtual address, the method further includes: determining whether other data exists in the on-chip memory before writing the first data in the on-chip memory; and performing a cache clearing operation if the other data exists in the on-chip memory.

[0016] According to another aspect of an embodiment of the present application, a data reading device is also provided, including: a determination module, used to determine a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address; a writing module, used to write first data in the on-chip memory based on the first virtual address; and a sending module, used to send a first notification message to a second device to receive the first data if the first data is successfully written, so that the second device reads the first data in the on-chip memory based on the second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0017] According to another aspect of the embodiments of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the above-mentioned data reading method when running.

[0018] According to another aspect of an embodiment of the present application, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the data reading method through the computer program.

[0019] Through the present application, the first device can access the on-chip memory based on the first virtual address, and the first virtual address can be determined according to the physical address of the on-chip memory. In the case where the first data is successfully written in the on-chip memory based on the first virtual address, a first notification message for indicating that the second device receives the first data is sent to the second device to receive the first data, so that the second device reads the first data in the on-chip memory based on the second virtual address corresponding to the second device. In other words, in the case where the first device successfully writes the first data in the on-chip memory based on the first virtual address, the second device can read the first data in the on-chip memory based on the second virtual address according to the first notification message sent by the first device. The above technical solution is adopted to solve the problem in the related technology that in the microkernel operating system, data can only be transmitted by relying on IPC messages, but IPC messages can only transmit a small number of bytes of data at a time, which cannot meet the transmission requirements of a large amount of data. Thus, the technical effect of meeting the transmission requirements of a large amount of data is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The exemplary embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0021] Figure 1 It is a hardware structure block diagram of a computer terminal of a data reading method according to an embodiment of the present application;

[0022] Figure 2 is a flow chart of a method for reading data according to an embodiment of the present application;

[0023] Figure 3 is a schematic diagram of kernel-mode and user-mode virtual address conversion according to an exemplary embodiment of the present application;

[0024] Figure 4 is a flowchart of a solution for transmitting kernel state and user state data based on OCM according to an exemplary embodiment of the present application;

[0025] Figure 5It is a structural block diagram of a data reading device according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0027] It should be noted that the terms and "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] The method embodiments provided in the embodiments of the present application can be executed in a computer terminal or a similar computing device. Taking running on a computer terminal as an example, Figure 1 1 is a hardware structure block diagram of a computer terminal of a data reading method according to an embodiment of the present application. Figure 1 As shown, the computer terminal may include one or more ( Figure 1 Only one is shown in the figure) processor 102 (processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data. In an exemplary embodiment, the computer terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above-mentioned computer terminal. Figure 1 More or fewer components as shown, or with Figure 1 Equivalent functions or comparisons shown Figure 1 A different configuration with more features is shown.

[0029] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the data reading method in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0030] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0031] In this embodiment, a method for reading data is provided. Figure 2 : is a flow chart of a method for reading data according to an embodiment of the present application, the flow includes the following steps:

[0032] Step S202, determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address;

[0033] Step S204, writing first data into the on-chip memory based on the first virtual address;

[0034] Step S206, when the first data is successfully written, a first notification message is sent to a second device to receive the first data, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0035] Through the above steps, the first device can access the on-chip memory based on the first virtual address, and the first virtual address can be determined according to the physical address of the on-chip memory. In the case where the first data is successfully written in the on-chip memory based on the first virtual address, a first notification message for indicating that the second device receives the first data is sent to the second device to receive the first data, so that the second device reads the first data in the on-chip memory based on the second virtual address corresponding to the second device. In other words, in the case where the first device successfully writes the first data in the on-chip memory based on the first virtual address, the second device can read the first data in the on-chip memory based on the second virtual address according to the first notification message sent by the first device. The above technical solution is adopted to solve the problem in the related technology that in the microkernel operating system, data can only be transmitted by relying on IPC messages, but IPC messages can only transmit a small number of bytes of data at a time, which cannot meet the transmission requirements of a large amount of data. Thus, the technical effect of meeting the transmission requirements of a large amount of data is achieved.

[0036] Optionally, in order to better understand how to determine the first virtual address corresponding to the first device according to the physical address of the on-chip memory in the above step S202, step S202 can be implemented through the following technical solution: sending a mapping request carrying the physical address to the memory management unit, so that the memory management unit maps the physical address to the target page in the virtual address space, and determines the first virtual address according to the information of the target page; receiving the first response information sent by the memory management unit to determine the first virtual address according to the first response information.

[0037] Typically, a central processing unit (CPU) has a memory management unit (MMU), which is an important component of an operating system and can improve the stability and security of the system. The main function of the memory management unit is to achieve the conversion between virtual addresses and physical addresses, while providing functions such as access rights control and cache management. In an embodiment of the present application, after the memory management unit receives a mapping request carrying a physical address, it can map to a target page in the virtual address space based on the physical address, and then determine the first virtual address.

[0038] After completing the operation of determining the first virtual address corresponding to the first device according to the physical address of the on-chip memory, in order to better understand how to write the first data in the on-chip memory based on the first virtual address, step S204 can be implemented by the following technical solution: writing the first data in the on-chip memory based on the first virtual address, including: when accessing the on-chip memory based on the first virtual address, determining whether other data is stored in the on-chip memory; when other data is stored in the on-chip memory, performing a deletion operation to delete the other data; when completing the deletion operation, writing the first data in the on-chip memory.

[0039] Since there may be a large amount of written data in the on-chip memory, but these spaces are not released immediately. Therefore, before writing the first data, it is necessary to delete other data stored in the on-chip memory, and then write the first data in the on-chip memory. Writing the first data to the deleted location can better utilize the storage space and avoid fragmentation. In the embodiment of the present application. Specifically:

[0040] First, it is necessary to confirm whether other data is stored in the on-chip memory. If there is no other data, the first data can be written directly; if there is other data, the other data needs to be deleted. After confirming that the other data has been deleted, the first data is written to the on-chip memory.

[0041] Optionally, before writing the first data in the on-chip memory based on the first virtual address, the method also includes: sending a first permission request to the on-chip memory, wherein the first permission request is used to request write permission; when it is determined according to second response information of the on-chip memory that the on-chip memory allows the first device to write data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0042] It is understandable that before writing the first data into the on-chip memory, the target state flag of the on-chip memory (Off-Chip Memory, referred to as OCM) may be determined and locked. Specifically:

[0043] Before writing the first data into the on-chip memory, it is necessary to determine whether the on-chip memory allows the first device to write data. If the on-chip memory allows the first device to write data, the target identification bit of the on-chip memory can be determined according to the type information of the first device. The type information of the first device may include: user state and kernel state. The target state identification bit may be OCM state identification position 1. When OCM state identification position 1 is in a locked state, other processes may be prevented from modifying the data in the on-chip memory.

[0044] That is to say, when the on-chip memory allows the first device to write data, and the status flag position corresponding to the user state is 1, and the status flag position corresponding to the kernel state is 0, assuming that the first device is in user state, the user state applies for write permission to the on-chip memory, and the status flag position of the OCM needs to be locked to 1; assuming that the first device is in kernel state, the kernel state applies for write permission to the on-chip memory, and the status flag position of the OCM needs to be locked to 0.

[0045] Furthermore, after the target state identification bit is locked, it is determined whether the first data is successfully written into the on-chip memory; if it is determined that the first data is successfully written into the on-chip memory, the target state identification bit is unlocked.

[0046] For example, when the on-chip memory allows the first device to write data, and the status flag position corresponding to the user state is 1, and the status flag position corresponding to the kernel state is 0, assuming that the first device is in user state, the status flag position of OCM needs to be set to 0 to unlock; assuming that the first device is in kernel state, the status flag position of OCM needs to be set to 1 to unlock.

[0047] Optionally, before or after sending the first notification information to the second device to receive the first data, the method also includes: receiving second notification information sent by the second device, wherein the second notification information is used to indicate that the first device receives the second data; accessing the on-chip memory based on the first virtual address, and reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification information, wherein the data length is the data length of the second data; and writing the second data into the database of the first device.

[0048] According to the above technical solution, a message sent by the second device indicating that the first device receives the second data can also be received, the data length of the second data can be determined, and then the second data of the data length can be read in the storage space of the OCM, and the second data can be written into the database of the first device. For example, when the first device is in user mode, the second data is written into the user's program.

[0049] Optionally, before reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification information, the method also includes: sending a second permission request to the on-chip memory, wherein the second permission request is used to request read permission; when it is determined according to third response information of the on-chip memory that the on-chip memory allows the first device to read data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0050] Before reading the second data in the storage space of the OCM, a second request permission needs to be sent to the on-chip memory to request read permission. When it is determined that the on-chip memory allows the first device to read data, the target state identification bit of the on-chip memory is determined according to the type information of the first device, and the target state identification bit is locked.

[0051] The first device can be in user state or kernel state, that is, it can transmit data from kernel state to user state, or it can transmit data from user state to kernel state.

[0052] In one embodiment, after the memory state successfully reads the second data in the on-chip memory, the target state bit is unlocked.

[0053] Optionally, after writing the first data in the on-chip memory based on the first virtual address, the method further includes: determining whether other data exists in the on-chip memory before writing the first data in the on-chip memory; and performing a cache clearing operation if the other data exists in the on-chip memory.

[0054] Before writing the first data, cache data of other data may exist in the on-chip memory. In this case, a cache clearing operation needs to be performed to delete the cache data of other data.

[0055] Obviously, the above described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. In order to better understand the above data reading method, the above process is described below in conjunction with the embodiments, but it is not intended to limit the technical solutions of the embodiments of the present application.

[0056] Before understanding the technical solution of the data reading method, we first need to understand the virtual address conversion principle between the memory state and the data station. Figure 3 is a schematic diagram of the kernel state and user state virtual address conversion principle according to an exemplary embodiment of the present application, such as Figure 3 As shown:

[0057] Figure 3The ROM in it is read-only memory; RAM is random access memory.

[0058] The kernel-state virtual address of the microkernel operating system uses the base address register 1 of the MMU and the kernel-state address translation table to implement the mapping of the kernel-state virtual address to the peripheral physical address; the user-state virtual address uses the base address register 0 of the MMU and the user-state address translation table to implement the mapping of the user-state virtual address to the peripheral physical address.

[0059] The microkernel operating system uses the MMU memory management unit to allow both user state and kernel state to use continuous virtual addresses, and to achieve physical isolation of kernel state and user state virtual addresses, preventing them from accessing each other, thereby improving system stability and security.

[0060] In the prior art, a CPU processor will provide a certain capacity of on-chip memory. The on-chip memory has a fixed physical address, and both the kernel state and the user state can use the memory management unit to map to obtain their respective virtual addresses based on the fixed physical address in the on-chip memory. At the same time, both the kernel state and the user state can realize bidirectional data transmission through read and write operations on the on-chip memory.

[0061] The exemplary embodiment of the present application proposes a method for transmitting kernel-mode and user-mode data based on on-chip storage based on the working mechanism of the memory management unit and the memory management characteristics of the microkernel operating system. Specifically:

[0062] Figure 4 is a flowchart of a solution for transmitting data between kernel state and user state based on OCM according to an exemplary embodiment of the present application, such as Figure 4 As shown:

[0063] Step S401, the user state obtains the OCM virtual address va_user, the kernel state obtains the OCM virtual address va_kernel, and the OCM size size_total;

[0064] Whether in user state or kernel state, external data can only be accessed through virtual addresses in a microkernel operating system. In the user state, MMU is used to map the OCM physical address, and then the OCM virtual address va_user (equivalent to the first virtual address of the embodiment of the present application) is obtained; the kernel state uses MMU to map the OCM physical address, and then the OCM virtual address va_kernel (equivalent to the second virtual address of the embodiment of the present application) is obtained. The address length of the virtual address of the user state / kernel state can also be obtained.

[0065] Step S402, obtain the OCM read and write permissions and lock the OCM, then write data, and send an ipc notification message after the reading and writing are completed;

[0066] On the one hand, when it is necessary to transfer data from kernel state to user state, kernel state applies for OCM write permission (equivalent to the first permission request in the embodiment of the present application), and locks the OCM state flag position to 1 (equivalent to the target state identification bit in the embodiment of the present application), and then writes the data of the first length to the va_kernel virtual address, and then performs a flush cache operation to ensure that the data is successfully written into OCM. Further, the OCM state flag position is unlocked, and a first data transmission completion message (equivalent to the second notification information in the embodiment of the present application) is sent to inform the user state data that the operation of writing the first length data into OCM has been completed.

[0067] On the other hand, when data needs to be transferred from the user state to the kernel state, the user state applies for the OCM write permission, and locks the OCM state flag position to 1, and then writes the data of the second length to the va_user virtual address, and then performs a flush cache operation to ensure that the data is successfully written into the OCM. Further, the OCM state flag position is unlocked, and a second data transmission completion message is sent to inform the kernel state that the operation of writing the second length data into the OCM has been completed.

[0068] Step S403, after receiving the i pc completion notification message, read the data, then release the OCM read and write permissions and unlock the OCM.

[0069] On the one hand, when the user state receives the first data transmission completion message, apply for OCM read permission and lock the OCM status flag position 1, then read the first length data at the va_user virtual address to read the data from OCM to the user state program, and then unlock the OCM status flag position 1, thus realizing the transmission of kernel state data to user state.

[0070] On the other hand, when the kernel state receives the second data transmission completion message, apply for the OCM read permission and lock the OCM status flag position 1, then read the second length data at the va_kernel virtual address to read the data from OCM to the kernel state program, and then unlock the OCM status flag position 1, thus realizing the transmission of user state data to kernel state.

[0071] The technical solution of the kernel state and user state data exchange based on OCM in the exemplary embodiment of the present application has little impact on the real-time, security and stability of the microkernel operating system, and is suitable for the microkernel operating system kernel state and user state to transmit a large amount of data. Further, through the above-mentioned technical solution for data conversion between kernel state and user state, an IPC message can transmit more than one megabyte of data at a time, which can meet the data transmission requirements of kernel state and user state under most microkernel operating systems, and thus solve the problem in the prior art that in a microkernel operating system, data can only be transmitted by relying on IPC messages, but IPC messages can only transmit a small number of bytes of data at a time, which cannot meet the transmission requirements of a large amount of data.

[0072] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods of each embodiment of the present application.

[0073] In the present embodiment, a data reading device is also provided, which is used to implement the above-mentioned embodiments and preferred embodiments, and the descriptions that have been made will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware of a predetermined function. Although the equipment described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware is also possible and conceived.

[0074] Figure 5 is a structural block diagram of a data reading device according to an embodiment of the present application, the device comprising:

[0075] A determination module 52, configured to determine a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address;

[0076] A writing module 54, configured to write first data into the on-chip memory based on the first virtual address;

[0077] The sending module 56 is used to send a first notification message to a second device to receive the first data when the first data is successfully written, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0078] Through the present application, the first device can access the on-chip memory based on the first virtual address, and the first virtual address can be determined according to the physical address of the on-chip memory. In the case where the first data is successfully written in the on-chip memory based on the first virtual address, a first notification message for indicating that the second device receives the first data is sent to the second device to receive the first data, so that the second device reads the first data in the on-chip memory based on the second virtual address corresponding to the second device. In other words, in the case where the first device successfully writes the first data in the on-chip memory based on the first virtual address, the second device can read the first data in the on-chip memory based on the second virtual address according to the first notification message sent by the first device. The above technical solution is adopted to solve the problem in the related technology that in the microkernel operating system, data can only be transmitted by relying on IPC messages, but IPC messages can only transmit a small number of bytes of data at a time, which cannot meet the transmission requirements of a large amount of data. Thus, the technical effect of meeting the transmission requirements of a large amount of data is achieved.

[0079] In an exemplary embodiment, the determination module 52 is also used to send a mapping request carrying the physical address to the memory management unit, so that the memory management unit maps the physical address to a target page in the virtual address space, and determines the first virtual address according to the information of the target page; and receives a first response message sent by the memory management unit to determine the first virtual address according to the first response message.

[0080] In an exemplary embodiment, the write module 54 is also used to determine whether other data is stored in the on-chip memory when accessing the on-chip memory based on the first virtual address; if other data is stored in the on-chip memory, perform a deletion operation to delete the other data; and when the deletion operation is completed, write the first data in the on-chip memory.

[0081] In an exemplary embodiment, the device also includes: a first sending module, used to send a first permission request to the on-chip memory, wherein the first permission request is used to request write permission; when it is determined according to second response information of the on-chip memory that the on-chip memory allows the first device to write data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0082] In an exemplary embodiment, the device further includes: a first sending module, configured to determine whether the first data is successfully written into the on-chip memory; and unlocking the target state identification bit if it is determined that the first data is successfully written into the on-chip memory.

[0083] In an exemplary embodiment, the device also includes: a receiving module, used to receive a second notification message sent by the second device, wherein the second notification message is used to indicate that the first device receives second data; accessing the on-chip memory based on the first virtual address, and reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification message, wherein the data length is the data length of the second data; and writing the second data into a database of the first device.

[0084] In an exemplary embodiment, the device also includes: a second sending module, used to send a second permission request to the on-chip memory, wherein the second permission request is used to request read permission; when it is determined according to third response information of the on-chip memory that the on-chip memory allows the first device to read data, determining the corresponding target state identification bit of the on-chip memory according to type information of the first device, wherein the type information includes: user state, kernel state; and locking the target state identification bit.

[0085] In an exemplary embodiment, the write module is further used to determine whether other data exists in the on-chip memory before writing the first data in the on-chip memory; if the other data exists in the on-chip memory, perform a cache clearing operation.

[0086] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0087] S1, determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address;

[0088] S2, writing first data into the on-chip memory based on the first virtual address;

[0089] S3. When the first data is successfully written, a first notification message is sent to a second device to receive the first data, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0090] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0091] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0092] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0093] Optionally, in this embodiment, the processor may be configured to perform the following steps through a computer program:

[0094] S1, determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address;

[0095] S2, writing first data into the on-chip memory based on the first virtual address;

[0096] S3. When the first data is successfully written, a first notification message is sent to a second device to receive the first data, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

[0097] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0098] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0099] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0100] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for reading data, characterized in that: include: Determine a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address; writing first data in the on-chip memory based on the first virtual address; When the first data is successfully written, a first notification message is sent to a second device to receive the first data, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

2. The data reading method according to claim 1, characterized in that: Determining a first virtual address corresponding to a first device according to a physical address of an on-chip memory includes: Sending a mapping request carrying the physical address to a memory management unit, so that the memory management unit maps the physical address to a target page in a virtual address space, and determines the first virtual address according to information of the target page; Receive first response information sent by the memory management unit to determine the first virtual address according to the first response information.

3. The data reading method according to claim 1, characterized in that: Writing first data in the on-chip memory based on the first virtual address includes: In a case where the on-chip memory is accessed based on the first virtual address, determining whether other data is stored in the on-chip memory; In the case where other data is stored in the on-chip memory, performing a deletion operation to delete the other data; When the deletion operation is completed, first data is written into the on-chip memory.

4. The method for reading data according to claim 1, characterized in that: Before writing the first data in the on-chip memory based on the first virtual address, the method further includes: sending a first permission request to the on-chip memory, wherein the first permission request is used to request a write permission; In the case where it is determined according to the second response information of the on-chip memory that the on-chip memory allows the first device to write data, determining the corresponding target state identification bit of the on-chip memory according to the type information of the first device, wherein the type information includes: user state and kernel state; The target state identification bit is locked.

5. The method for reading data according to claim 4, characterized in that: After locking the target state identification bit, the method further includes: determining whether first data is successfully written into the on-chip memory; When it is determined that the first data is successfully written into the on-chip memory, the target state identification bit is unlocked.

6. The method for reading data according to claim 1, characterized in that: Before or after sending the first notification information to the second device to receive the first data, the method further includes: receiving second notification information sent by the second device, wherein the second notification information is used to instruct the first device to receive second data; accessing the on-chip memory based on the first virtual address, and reading the second data in the storage space of the on-chip memory according to the data length carried in the second notification information, wherein the data length is the data length of the second data; The second data is written into a database of the first device.

7. The data reading method according to claim 6, characterized in that: Before reading the second data from the storage space of the on-chip memory according to the data length carried in the second notification information, the method further includes: Sending a second permission request to the on-chip memory, wherein the second permission request is used to request a read permission; In the case where it is determined according to the third response information of the on-chip memory that the on-chip memory allows the first device to read data, determining the corresponding target state identification bit of the on-chip memory according to the type information of the first device, wherein the type information includes: user state and kernel state; The target state identification bit is locked.

8. The method for reading data according to claim 1, characterized in that: After writing the first data in the on-chip memory based on the first virtual address, the method further includes: determining whether other data exists in the on-chip memory before writing the first data in the on-chip memory; In the case that the other data exists in the on-chip memory, a cache clearing operation is performed.

9. A data reading device, characterized in that: include: a determination module, configured to determine a first virtual address corresponding to a first device according to a physical address of an on-chip memory, wherein the first device accesses the on-chip memory based on the first virtual address; a writing module, configured to write first data into the on-chip memory based on the first virtual address; A sending module is used to send a first notification message to a second device to receive the first data when the first data is successfully written, so that the second device reads the first data in the on-chip memory based on a second virtual address corresponding to the second device, wherein the first notification message is used to instruct the second device to receive the first data.

10. An electronic device comprising a memory and a processor, characterized in that: A computer program is stored in the memory, and the processor is configured to execute the method according to any one of claims 1 to 8 through the computer program.

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