Superconducting IDC-L chip

Abstract

The invention provides a superconducting IDC-L chip, which comprises a dielectric substrate and a metal layer arranged on the dielectric substrate, and is characterized in that the metal layer is provided with an IDC-L resonant cavity and a coplanar waveguide center conductor transmission line; the coplanar waveguide central conductor transmission line divides the metal layer into two coplanar waveguide ground planes; the coplanar waveguide center conductor transmission line and the coplanar waveguide ground plane are connected with an external signal source through a microwave cable, and then IDC-L resonant cavity signals are read through capacitive coupling. According to the IDC-L chip disclosed by the invention, the IDC-L chip can be magnetically coupled with atoms; due to the inductance area of the IDC-L resonant cavity, the magnetic field is more concentrated, magnetic coupling of atoms and the resonant cavity is more facilitated, and the accuracy is higher; the resonant cavity can maintain a low-energy and few-photon resonant state, and stable coupling between atoms and the resonant cavity is ensured; the distribution of the electromagnetic field is smoother, and the situation of local malformation of the electromagnetic field is avoided.

Description

Technical Field

[0001] The invention relates to the technical field of superconducting chips, in particular to a superconducting IDC-L chip which can be used for strong magnetic coupling with atoms. Background Art

[0002] Superconducting planar resonant cavities play a key role in the fields of microwave and quantum information technology, especially in the design of quantum computing and ultra-high frequency filters. Superconducting materials, due to their zero resistance at low temperatures, enable the resonant cavity to achieve an extremely high quality factor (Q value), thereby significantly reducing energy loss. Its metal layer is generally made of metal materials such as Nb, Al, Ta, and Ti. When it transforms from a normal metal to a superconductor, the key parameters such as resistance, capacitance, and inductance in its resonant cavity structure also obtain corresponding low-loss and stable characteristics, thereby obtaining a stable characteristic frequency and forming a stable magnetic field in a specific area, thereby achieving magnetic coupling with atomic groups at low temperatures.

[0003] Currently, the more common intermediate medium used to achieve strong coupling with atoms is the traditional coplanar waveguide (CPW) resonant cavity. A planar resonant cavity of a specific frequency is realized by setting the central conductor width and gap width of the CPW cavity and the capacitive or inductive coupling strength at both ends, thereby transferring the atoms to the area with the strongest magnetic or electric field, thereby achieving coupling between the resonant cavity and the atoms. However, for the CPW resonant cavity, currently only strong electric coupling of a single Rydberg state atom can be achieved.

[0004] Since it is still relatively difficult for a CPW cavity to achieve strong magnetic coupling with atoms, there is an urgent need for a superconducting chip that can achieve strong magnetic coupling with atoms. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides a superconducting IDC-L chip to solve the problem of weak magnetic coupling between the coplanar waveguide resonant cavity and atoms in the prior art.

[0006] The technical solution of the present invention is: a superconducting IDC-L chip, comprising a dielectric substrate and a metal layer arranged on the dielectric substrate, wherein the metal layer is provided with an IDC-L resonant cavity and a coplanar waveguide central conductor transmission line; and the coplanar waveguide central conductor transmission line divides the metal layer into two coplanar waveguide ground planes; the coplanar waveguide central conductor transmission line and the coplanar waveguide ground plane are connected to an external signal source through a microwave cable, and then the IDC-L resonant cavity signal is read through capacitive coupling.

[0007] Preferably, the IDC-L resonant cavity comprises two symmetrically arranged interdigital capacitors and inductors, and the two interdigital capacitors are connected together via the inductor.

[0008] Preferably, the inductor is of a rectangular structure and is arranged on a side of the IDC-L resonant cavity away from the coplanar waveguide central conductor transmission line.

[0009] Preferably, the current on one side of the IDC-L resonant cavity close to the coplanar waveguide transmission line converges at the inductor at the central position and flows upward step by step, so that the current close to the inductor reaches the maximum current intensity in the IDC-L resonant cavity, thereby concentrating the magnetic field in the rectangular inductor area.

[0010] Preferably, the inductor is set in a grounding manner, and the inductor is short-circuited with the ground, and the capacitors on both sides of the inductor form interdigital capacitors with the ground, which can make the distribution of the electromagnetic field smoother, avoid local deformity of the electromagnetic field, and make the resonant frequency of the resonant cavity basically unaffected by other surrounding structures.

[0011] Preferably, the coplanar waveguide ground plane, the coplanar waveguide center conductor transmission line and the IDC-L resonant cavity are located on the same surface of the dielectric substrate, and the coplanar waveguide center conductor transmission line is located between the coplanar waveguide ground planes.

[0012] Preferably, the interdigital capacitors of the IDC-L resonant cavity are coupled with the coplanar waveguide central conductor transmission line to realize signal transmission, thereby obtaining the required magnetic field strength of the strong magnetic coupling level and the internal quality factor of the resonant cavity.

[0013] Preferably, the quality factor of the IDC-L resonant cavity is maintained at least 5*10 4 .

[0014] Preferably, the dielectric substrate is a silicon substrate or a sapphire substrate.

[0015] Preferably, the thickness of the dielectric substrate is 100um-430um.

[0016] Preferably, the metal layer is made of niobium, tantalum or niobium nitride.

[0017] Preferably, the thickness of the metal layer is 200 nm.

[0018] Preferably, the present invention also provides a method for preparing a superconducting IDC-L chip, comprising the following steps:

[0019] S1), selecting a dielectric substrate with a thickness of 100-430 microns, and using an ozone generator (UV) to clean the dielectric substrate at 120° C. for 10-15 minutes;

[0020] S2), sputtering a 200-nanometer metal layer on the cleaned dielectric substrate by magnetron sputtering technology;

[0021] S3), a layer of photoresist is evenly applied on the metal layer by a coating machine, and then heated at 120° C. for 90 seconds, and then cooled using an inert gas gun;

[0022] S4), using a laser direct writing device to expose the pattern of the IDC-L resonant cavity and the coplanar waveguide central conductor transmission line on the photoresist layer, so as to perform subsequent etching and remove the unnecessary parts in the design, thereby obtaining the actual designed structure;

[0023] S5), using developer and water to develop for 35 seconds and fix for 30 seconds respectively, and then using an inert gas gun to blow dry the water stains on the IDC-L chip; and then heating and drying at 120°C for 2 minutes;

[0024] S6), using an ion etching device to perform gas dry etching on the thick baked pattern for 4-6 minutes to obtain an IDC-L resonant cavity (3) and a coplanar waveguide central conductor transmission line (4);

[0025] S7), use a glue stripping machine to perform glue stripping treatment on the etched IDC-L chip for 10 minutes; use a glue spreader to spread two layers of protective glue on the IDC-L chip after glue stripping;

[0026] S8) Soak the IDC-L chip in methyl pyrrolidone (NMP) solution at 80°C for 4 to 6 hours to completely remove the photoresist on the surface of the film, then rinse the IDC-L chip with isopropyl alcohol (IPA) to remove the NMP, then blow dry with an inert air gun and load it into a chip box; then use an ozone generator (UV) to treat it for 10 minutes.

[0027] Preferably, in step S1), the dielectric substrate is a silicon substrate or a sapphire substrate.

[0028] Preferably, in step S2), the material of the metal layer is niobium material, tantalum material or niobium nitride.

[0029] The beneficial effects of the present invention are:

[0030] 1. The IDC-L chip of the present invention can achieve magnetic coupling with atoms;

[0031] 2. The size of the IDC-L chip of the present invention is much smaller than the space occupied by the conventional coplanar waveguide resonant cavity;

[0032] 3. The processing accuracy of the IDC-L resonant cavity of the present invention is 10 microns; and the inductance region of the IDC-L resonant cavity of the present invention makes the magnetic field more concentrated, and a larger magnetic field is more conducive to the magnetic coupling between atoms and the resonant cavity, and the plane magnetic field at a certain height has high uniformity, and its better magnetic field uniformity is also more conducive to the calculation of the strength of magnetic coupling between atoms and the resonant cavity, and the accuracy is higher;

[0033] 4. The metal layer of the superconducting IDC-L chip of the present invention uses superconducting materials, so that the resonant cavity can maintain a low-energy, low-photon resonant state, ensuring stable coupling between atoms and the resonant cavity;

[0034] 5. The inductor part of the IDC-L resonant cavity of the present invention is short-circuited to the ground, and the capacitors on both sides are connected to the ground to form an interdigitated capacitor structure, which can make the distribution of the electromagnetic field smoother, avoid the local deformation of the electromagnetic field, and make the resonant frequency of the resonant cavity basically unaffected by other surrounding structures;

[0035] 6. The input and output of the signal in the IDC-L chip of the present invention are realized by coupling between the central conductor of the coplanar waveguide transmission line and the IDC-L resonant cavity; and the internal quality factor of the IDC-L resonant cavity is ensured to be at least 5*10 4 above. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a schematic diagram of the structure of the IDC-L chip of the present invention;

[0037] Figure 2 It is a schematic diagram of the structure of the IDC-L resonant cavity of the present invention;

[0038] Figure 3 It is a schematic diagram of magnetic coupling of the superconducting IDC-L chip of the present invention;

[0039] Figure 4 Schematic diagram of the structure of the Z-chip in an embodiment of the present invention;

[0040] In the figure, 1- dielectric substrate; 2- metal layer; 3- IDC-L resonant cavity; 4- coplanar waveguide central conductor transmission line; 5- coplanar waveguide ground plane;

[0041] 31-interdigital capacitor; 32-inductor;

[0042] 10-IDC-L chip; 20-Z-chip;

[0043] 201-substrate; 202-Z chip capture line; 203-Z chip bonding area. DETAILED DESCRIPTION

[0044] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings:

[0045] Example 1

[0046] like Figure 1 and 2 As shown, this embodiment provides a superconducting IDC-L chip, including a dielectric substrate 1, and a metal layer 2 arranged on the dielectric substrate 1, on which the metal layer 2 is provided an IDC-L resonant cavity 3 and a coplanar waveguide central conductor transmission line 4; and the coplanar waveguide central conductor transmission line 4 divides the metal layer 2 into two coplanar waveguide ground planes 5; the coplanar waveguide central conductor transmission line 4 and the coplanar waveguide ground plane 5 are connected to an external signal source through a microwave cable, and then the IDC-L resonant cavity 3 signal is read through capacitive coupling. The processing accuracy of the IDC-L resonant cavity 3 in this embodiment is 10 microns.

[0047] As preferred in this embodiment, Figure 2 As shown, in addition, the IDC-L resonant cavity 3 described in this embodiment is essentially an RLC circuit. The IDC-L resonant cavity 3 includes two symmetrically arranged interdigital capacitors 31, and the two interdigital capacitors 31 are connected together through an inductor 32.

[0048] As preferred in this embodiment, Figure 2 As shown, the inductor 32 is a rectangular structure and is arranged on a side of the IDC-L resonant cavity 3 away from the coplanar waveguide central conductor transmission line 4 .

[0049] As preferred in this embodiment, Figure 2 As shown, the current on one side of the IDC-L resonant cavity 3 close to the coplanar waveguide transmission line 4 converges at the inductor 32 at the central position and flows upward step by step, so that the current close to the inductor 32 reaches the maximum current intensity in the IDC-L resonant cavity 3, thereby concentrating the magnetic field in the rectangular inductor 32 area.

[0050] As preferred in this embodiment, Figure 2 As shown, the inductor 32 is set in a grounding manner. The inductor 32 is short-circuited with the ground, and the capacitors on both sides of the inductor 32 form a forked capacitor 31 with the ground, which can make the distribution of the electromagnetic field smoother, avoid local deformity of the electromagnetic field, and make the resonant frequency of the resonant cavity basically unaffected by other surrounding structures.

[0051] As preferred in this embodiment, Figure 1 As shown, the coplanar waveguide ground plane 5, the coplanar waveguide central conductor transmission line 4 and the IDC-L resonant cavity 3 are located on the same surface of the dielectric substrate 1, and the coplanar waveguide central conductor transmission line 4 is located between the two coplanar waveguide ground planes 5.

[0052] As a preferred embodiment of the present invention, the interdigital capacitor 31 of the IDC-L resonant cavity 3 is coupled with the coplanar waveguide central conductor transmission line 4 to realize signal transmission, so as to obtain the required magnetic field strength of the strong magnetic coupling level and the internal quality factor of the resonant cavity. In the present embodiment, the quality factor of the IDC-L resonant cavity is maintained at least at 5*10 4 above.

[0053] As a preferred embodiment of the present invention, the dielectric substrate 1 is a silicon substrate or a sapphire substrate, and the thickness of the dielectric substrate 1 is 100um-430um. The present embodiment preferably uses a sapphire substrate with a C section and a thickness of 100 microns.

[0054] As a preferred embodiment of the present invention, the material of the metal layer is niobium, tantalum or niobium nitride, and the thickness of the metal layer is 200 nm. In the present embodiment, metal niobium is preferably used.

[0055] As a preferred embodiment of the present invention, the IDC-L resonant cavity 3 has a resonant frequency. When the resonant frequency is consistent with the frequency of the ground state of the rubidium atom, the resonance between the IDC-L resonant cavity 3 and the atom can be achieved, thereby realizing magnetic coupling. When the magnetic field is strong enough, the quality factor is large enough, and the dissipation of the resonant cavity is small enough, a strong coupling level of magnetic coupling can be achieved.

[0056] During use of this embodiment, the coplanar waveguide ground plane 5 is bonded to the external ground plane, and then the coplanar waveguide central conductor transmission line 4 is bonded to the microwave cable. Then, the temperature of the chip is lowered to 4K, and the IDC-L resonant cavity 3 is excited by capacitive coupling at a specific frequency by inputting a microwave signal to achieve a resonant state; Figure 3 As shown, the atomic clusters are transferred to the vicinity of the IDC-L resonant cavity 3 where the magnetic field is stronger through the Z-chip 20 below the IDC-L chip 10 to achieve magnetic coupling between the atoms and the IDC-L resonant cavity; the principle of the Z-chip 20 transferring atomic clusters is to create a micromagnetic trap to capture the rubidium (Rb) atomic clusters 100 microns to 200 microns above the IDC-L resonant cavity 3.

[0057] The structure of the Z-chip 20 used in this embodiment is as follows: Figure 4 As shown, it includes a substrate 201 and a Z-shaped structure layer arranged on the substrate 201, wherein the Z-shaped structure layer is formed by sputtering metal niobium, and the Z-shaped structure layer includes two Z-chip bonding areas 203, and the two Z-chip bonding areas 203 are connected by a Z-chip capture line 202.

[0058] Example 2

[0059] This embodiment provides a method for preparing a superconducting IDC-L chip, comprising the following steps:

[0060] S1), select a dielectric substrate 1 with a thickness of 100-430 microns, and this embodiment uses a 2-inch sapphire substrate, and use an ozone generator (UV) to clean the dielectric substrate 1 at 120° C. for 10 to 15 minutes;

[0061] S2), sputtering a 200-nanometer metal layer 2 on the cleaned dielectric substrate 1 by magnetron sputtering technology, wherein the metal layer 2 is a niobium film or a tantalum film;

[0062] S3), a layer of photoresist is evenly applied on the metal layer 2 by a coating machine, and then heated at 120° C. for 90 seconds, and then cooled using an inert gas gun;

[0063] S4), before laser direct writing, upload the chip design drawing to the operating end of the laser direct writing device. The size of the chip or chip array cannot exceed the size of the substrate. After setting the exposure dose of 20% and the laser power of 70mW, the laser direct writing can be started. This step can expose the pattern of the IDC-L resonant cavity 3 and the coplanar waveguide central conductor transmission line 4 on the photoresist layer, so as to perform subsequent etching and remove the unnecessary parts in the design, thereby obtaining the actual designed structure;

[0064] S5) The pattern cannot be directly observed on the chip just exposed, and it is necessary to use developer and water to develop for 35 seconds and fix for 30 seconds respectively, and then use an inert gas gun to blow dry the water stains on the substrate; then heat and dry it at 120℃ for 2 minutes;

[0065] S6), using ion etching equipment to perform gas dry etching on the thick baked metal layer 2 for 4-6 minutes;

[0066] S7), use a glue stripping machine to perform glue stripping treatment on the etched IDC-L chip for 10 minutes; use a glue spreader to spread two layers of protective glue on the IDC-L chip after glue stripping;

[0067] S8) Soak the IDC-L chip in methyl pyrrolidone (NMP) solution at 80°C for 4 to 6 hours to completely remove the photoresist on the surface of the film, then rinse the IDC-L chip with isopropyl alcohol (IPA) to remove the NMP, then blow dry with an inert air gun and load it into a chip box; then use an ozone generator (UV) to treat it for 10 minutes.

[0068] The above embodiments and descriptions are only for illustrating the principles and best embodiments of the present invention. Without departing from the spirit and scope of the present invention, the present invention may be subject to various changes and improvements, all of which fall within the scope of the present invention to be protected.

Claims

1. A superconducting IDC-L chip, characterized in that: The invention comprises a dielectric substrate (1) and a metal layer (2) arranged on the dielectric substrate (1); an IDC-L resonant cavity (3) and a coplanar waveguide central conductor transmission line (4) are arranged on the metal layer (2); and the coplanar waveguide central conductor transmission line (4) divides the metal layer (2) into two coplanar waveguide ground planes (5); the coplanar waveguide central conductor transmission line (4) and the coplanar waveguide ground plane (5) are connected to an external signal source via a microwave cable, and then the signal of the IDC-L resonant cavity (3) is read via capacitive coupling.

2. A superconducting IDC-L chip according to claim 1, characterized in that: The IDC-L resonant cavity (3) comprises two symmetrically arranged interdigital capacitors (31), and the two interdigital capacitors (31) are connected together via an inductor (32).

3. A superconducting IDC-L chip according to claim 2, characterized in that: The inductor (32) is a rectangular structure and is arranged on a side of the IDC-L resonant cavity (3) away from the coplanar waveguide central conductor transmission line (4).

4. A superconducting IDC-L chip according to claim 3, characterized in that: The current on one side of the IDC-L resonant cavity (3) close to the coplanar waveguide transmission line (4) converges at the inductor (32) at the central position and flows upward step by step, so that the current close to the inductor (32) reaches the maximum current intensity in the IDC-L resonant cavity (3), so as to concentrate the magnetic field in the rectangular inductor (32) area.

5. A superconducting IDC-L chip according to claim 4, characterized in that: The inductor (32) is arranged in a grounding manner. The inductor (32) is short-circuited with the ground, and the capacitors on both sides of the inductor (32) and the ground form interdigital capacitors (31).

6. A superconducting IDC-L chip according to claim 5, characterized in that: The interdigital capacitors (31) of the IDC-L resonant cavity (3) are coupled with the coplanar waveguide central conductor transmission line (4) to achieve signal transmission.

7. A superconducting IDC-L chip according to claim 6, characterized in that: The quality factor in the IDC-L resonant cavity (3) is maintained at least 5*10 4 above.

8. A superconducting IDC-L chip according to claim 1, characterized in that: The coplanar waveguide ground plane (5), the coplanar waveguide central conductor transmission line (4) and the IDC-L resonant cavity (3) are located on the same surface of the dielectric substrate (1), and the coplanar waveguide central conductor transmission line (4) is located between two coplanar waveguide ground planes (5).

9. A superconducting IDC-L chip according to claim 1, characterized in that: The dielectric substrate (1) is a silicon substrate or a sapphire substrate, and the thickness of the dielectric substrate (1) is 100um-430um; The material of the metal layer (2) is niobium material, tantalum material or niobium nitride, and the thickness of the metal layer (2) is 200 nm.

10. A method for preparing the superconducting IDC-L chip according to any one of claims 1 to 9, characterized in that: The following steps are involved: S1), selecting a dielectric substrate (1) with a thickness of 100-430 microns, and using an ozone generator (UV) to clean the dielectric substrate (1) at 120° C. for 10-15 minutes; S2), sputtering a 200-nanometer metal layer (2) on the cleaned dielectric substrate (1) by magnetron sputtering technology; S3), applying a layer of photoresist on the metal layer (2) by means of a coating machine, heating at 120° C. for 90 seconds, and then cooling using an inert gas gun; S4), using a laser direct writing device to expose the patterns of the IDC-L resonant cavity (3) and the coplanar waveguide central conductor transmission line (4) on the photoresist; S5), using developer and clean water to develop for 35 seconds and fix for 30 seconds respectively, and then using an inert gas gun to blow dry the water stains on the substrate; and then heating and drying at 120°C for 2 minutes; S6), using an ion etching device to perform gas dry etching on the thick baked pattern for 4-6 minutes; obtaining an IDC-L resonant cavity (3) and a coplanar waveguide central conductor transmission line (4); S7), use a glue stripping machine to perform glue stripping treatment on the etched IDC-L chip for 10 minutes, and use a glue spreader to spread two layers of protective glue on the IDC-L chip after the glue stripping; S8) Soak the IDC-L chip in methyl pyrrolidone (NMP) solution at 80°C for 4 to 6 hours to completely remove the photoresist on the surface of the film, then rinse the IDC-L chip with isopropyl alcohol (IPA) to remove the NMP, then blow dry with an inert air gun and load it into a chip box; then use an ozone generator (UV) to treat it for 10 minutes.

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