Back contact solar cell and preparation method thereof

Abstract

The invention discloses a back contact solar cell and a preparation method thereof. The back contact solar cell comprises a semiconductor substrate; the first doping layer is arranged in the first region; the insulating layer is arranged on the partial surface, deviating from the semiconductor substrate, of the first doping layer, and is arranged on one side, close to the second region, of the first doping layer in the width direction; the first conducting layer is arranged on the partial surface, deviating from the semiconductor substrate, of the first doping layer and is arranged on one side, deviating from the insulating layer in the width direction, of the first doping layer; the second doping layer is arranged in the second area, extends to the surface, deviating from the first doping layer, of the insulating layer in the width direction and exceeds the insulating layer, and a gap is formed between the second doping layer exceeding the insulating layer and the first doping layer; and the second conductive layer is arranged on at least part of the surface, deviating from the semiconductor substrate, of the second doped layer. According to the structure, np region insulation can be realized, np region insulation process steps are reduced, and the insulation effect between the np regions is improved.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cells, and in particular relates to a back contact solar cell and a preparation method thereof. Background Art

[0002] Solar cells are devices that directly convert light energy into electrical energy. After decades of development, crystalline silicon solar cells currently have an absolute advantage in the photovoltaic cell market, mainly because of the wide source of raw materials for solar cells, high reliability, high power generation efficiency, and low cost. Crystalline silicon cells currently include passivated emitter and rear cells (PERC), tunnel oxide passivated contact cells (TOPcon) and heterojunction cells (SHJ) and other types. Among them, crystalline silicon-amorphous silicon heterojunction solar cells (SHJ) have gradually become one of the mainstream technologies of crystalline silicon cells due to their symmetrical structure, high open circuit voltage, low process temperature, and excellent temperature characteristics. They have received great attention from the industry and academia. At present, the efficiency of its certified large-area cell devices has reached 26.3%. In addition, the efficiency of TOPcon cells has also reached 25.7%, and TOPcon cells also have the advantage of low cost. However, there are still some problems with SHJ and TOPcon cells. The light-entering surface of the cell is blocked by the grid line, which reduces the cell's absorption of sunlight, so the short-circuit current loss of the cell is large, which is also a problem faced by almost all silicon-based solar cells at present. Therefore, the research on solar cells without electrodes on the light-entering surface is particularly important. Based on this point of view, back-contact solar cells can solve this problem because their electrodes are all set on the back of the cell, which can minimize the short-circuit current loss caused by the upper surface. In this cell structure, there are no grid lines on the front, and the entire area is used to absorb sunlight; the back of the cell is provided with an electron selective transport layer and a hole selective transport layer. The mainstream arrangement currently used is the "comb-like" interdigitated back contact arrangement, referred to as IBC solar cells. Therefore, the back-contact heterojunction solar cell (SHJ-IBC) can be referred to as HBC cell, and the back-contact tunneling oxide passivation contact cell (TOPcon-IBC) can be referred to as TBC.

[0003] At present, the process of isolating the p-region and n-region on the back of this type of back-contact cell is called the pn-region insulation process. The existing technology usually uses photolithography and wet etching processes to achieve the insulation of the np region. This method is mature, but the cost is high and it is not suitable for large-scale mass production. In addition, the photolithography and wet etching processes also have the problem of unclean etching, resulting in poor insulation effect of the np region, thereby affecting the parallel resistance and conversion efficiency of the solar cell.

[0004] There are also patents that use laser processing to achieve insulation in the np region. Compared with the first photolithography method, the laser insulation method can greatly save costs and has great advantages. However, there will still be equipment cost investment, and the process development is relatively difficult, and the laser will cause certain damage to the passivation layer. In addition, the laser processing technology also has the problem of unclean etching, resulting in poor insulation effect in the np region, which affects the parallel resistance and conversion efficiency of the solar cell. Summary of the invention

[0005] The present invention aims to solve at least one of the technical problems in the related art to a certain extent. To this end, the purpose of the present invention is to provide a back-contact solar cell and a method for preparing the same. The structure of the present invention can save the np region insulation process step, reduce the investment cost of equipment and consumables, greatly reduce the process time, reduce the time cost, and also reduce the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the film layer concave insulation method of the present invention is significantly greater than the insulation resistance of the traditional photolithography scheme, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0006] In one aspect of the present invention, the present invention provides a back-contact solar cell. According to an embodiment of the present invention, the back-contact solar cell comprises:

[0007] A semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface opposite to each other, the first surface comprising a first region and a second region adjacent to each other;

[0008] a first doped layer, the first doped layer being disposed in the first region;

[0009] an insulating layer, the insulating layer being disposed on a portion of a surface of the first doped layer away from the semiconductor substrate, and the insulating layer being disposed on a side of the first doped layer close to the second region along a width direction;

[0010] A first conductive layer, wherein the first conductive layer is disposed on a portion of a surface of the first doped layer away from the semiconductor substrate, and the first conductive layer is disposed on a side of the first doped layer away from the insulating layer along a width direction;

[0011] a second doping layer, wherein the conductivity type of the second doping layer is opposite to that of the first doping layer, the second doping layer is arranged in the second region, and extends along the width direction to a surface of the insulating layer away from the first doping layer and exceeds the insulating layer, and a gap is formed between the second doping layer exceeding the insulating layer and the first doping layer;

[0012] A second conductive layer is provided on at least a portion of a surface of the second doped layer away from the semiconductor substrate.

[0013] According to the back contact solar cell of the embodiment of the present invention, the structure of the present invention can save the np region insulation process step, reduce the investment cost of equipment and consumables, greatly reduce the process time, reduce the time cost, and also reduce the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the film layer concave insulation method of the present invention is significantly greater than the insulation resistance of the traditional photolithography scheme, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0014] In addition, the back contact solar cell according to the above embodiment of the present invention may also have the following additional technical features:

[0015] In some embodiments of the present invention, the back-contact solar cell further includes: a first passivation layer, the first passivation layer is arranged in the first region, the first doped layer is arranged on the surface of the first passivation layer away from the semiconductor substrate; and / or, a second passivation layer, the second passivation layer is arranged in the second region and extends along the width direction to the surface of the insulating layer away from the first doped layer and beyond the insulating layer, a gap is formed between the second passivation layer exceeding the insulating layer and the first doped layer, and the second doped layer is arranged on the surface of the second passivation layer away from the semiconductor substrate.

[0016] In some embodiments of the present invention, the back-contact solar cell further includes: a first electrode, which is arranged on a side of the first conductive layer away from the first doped layer; and / or a second electrode, which is arranged on a side of the second conductive layer away from the second doped layer.

[0017] In some embodiments of the present invention, the back-contact solar cell further includes: a third passivation layer disposed on the second surface; and an anti-reflection layer disposed on a side of the third passivation layer away from the semiconductor substrate.

[0018] In some embodiments of the present invention, the first doping layer is an N-type doping layer, and the second doping layer is a P-type doping layer; or, the first doping layer is a P-type doping layer, and the second doping layer is an N-type doping layer.

[0019] In some embodiments of the present invention, the thickness of the insulating layer is 10 nm-1000 nm.

[0020] In some embodiments of the present invention, the width of the second doping layer beyond the insulating layer is 30 nm-100 μm.

[0021] In another aspect of the present invention, the present invention provides a method for preparing a back-contact solar cell. According to an embodiment of the present invention, the method comprises:

[0022] Providing a semiconductor substrate, the semiconductor substrate having a first surface and a second surface opposite to each other, the first surface including a first region and a second region adjacent to each other;

[0023] sequentially forming a first doping layer and an insulating layer on the first surface, removing the first doping layer and the insulating layer in the second region, and forming a first opening;

[0024] forming a second doping layer on a surface of the prepared first intermediate battery cell facing away from the second surface;

[0025] Removing a portion of the second doped layer on a surface of the insulating layer away from the first doped layer to expose a portion of the insulating layer to form a second opening, wherein the second opening is located at an end of the insulating layer away from the second region along the width direction;

[0026] removing the exposed insulating layer, and continuing to remove the insulating layer along the width direction close to the second region, leaving a portion of the insulating layer, so as to form a gap between the second doped layer and the first doped layer;

[0027] A conductive layer is deposited on the surface of the prepared second intermediate battery cell away from the second surface, the conductive layer deposited on the surface of the first doped layer is the first conductive layer, and the conductive layer deposited on the surface of the second doped layer is the second conductive layer.

[0028] According to the method of the embodiment of the present invention, by forming a gap between the first doped layer and the second doped layer, a cliff structure of the film layer is naturally formed between the first doped layer and the second doped layer after depositing the conductive film, thereby achieving insulation between the P region and the N region, eliminating the np region insulation process step, reducing the investment cost of equipment and consumables, and greatly reducing the process time, reducing the time cost, and also reducing the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the method of the present invention using the film layer concave insulation method is significantly greater than the insulation resistance of the traditional photolithography solution, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0029] In some embodiments of the present invention, the method further includes: forming a first passivation layer, a first doping layer and an insulating layer on the first surface in sequence, removing the first passivation layer, the first doping layer and the insulating layer in the second region to form the first opening; forming a second passivation layer and a second doping layer in sequence on a surface of the prepared first intermediate battery cell away from the second surface; removing a portion of the second passivation layer and the second doping layer on the surface of the insulating layer away from the first doping layer to expose a portion of the insulating layer to form the second opening, and the second opening is located at one end of the insulating layer away from the second region in the width direction.

[0030] In some embodiments of the present invention, a laser or wet etching method is used to remove a portion of the second passivation layer and the second doping layer on the surface of the insulating layer away from the first doping layer to form the second opening; and / or, an acidic etching solution is used to remove the exposed insulating layer, and an acidic etching solution is used to continue to remove the insulating layer along the width direction close to the second region, leaving the remaining portion of the insulating layer to form a gap between the second doping layer and the first doping layer.

[0031] In some embodiments of the present invention, the mass concentration of the acidic etching solution is 2%-50%.

[0032] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0034] Figure 1 A schematic structural diagram of a back-contact solar cell according to an embodiment of the present invention;

[0035] Figure 2 This is a schematic structural diagram of the middle battery cell formed in step S200 of an embodiment of the present invention;

[0036] Figure 3 This is a schematic structural diagram of the middle battery cell formed in step S200 of an embodiment of the present invention;

[0037] Figure 4 This is a schematic structural diagram of the middle battery cell formed in step S300 of an embodiment of the present invention;

[0038] Figure 5 A schematic diagram of the structure of the middle battery sheet formed in step S400 of an embodiment of the present invention;

[0039] Figure 6 This is a schematic structural diagram of the middle battery cell formed in step S500 of an embodiment of the present invention;

[0040] Figure 7 A schematic structural diagram of an intermediate battery cell formed in step S600 of an embodiment of the present invention;

[0041] Figure 8 A schematic diagram of the structure of the middle battery sheet formed in step S700 of an embodiment of the present invention;

[0042] Fig. 9 for Figure 7 SEM image of the battery cell with the structure shown.

[0043] Figure annotation:

[0044] 1-semiconductor substrate, 2-first passivation layer, 3-first doping layer, 4-insulating layer, 5-first opening, 6-second passivation layer, 7-second doping layer, 8-second opening, 9-gap, 10-first conductive layer, 11-second conductive layer, 12-first electrode, 13-second electrode, 14-third passivation layer, 15-anti-reflection layer. DETAILED DESCRIPTION

[0045] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0046] In one aspect of the present invention, the present invention provides a back contact solar cell. Figure 1The back-contact solar cell comprises: a semiconductor substrate 1, wherein the semiconductor substrate 1 comprises a first surface A and a second surface B opposite to each other, wherein the first surface A comprises a first region A1 and a second region A2 adjacent to each other; a first doping layer 3, wherein the first doping layer 3 is arranged in the first region A1; an insulating layer 4, wherein the insulating layer 4 is arranged on a surface of the first doping layer 3 which is away from the semiconductor substrate 1, and the insulating layer 4 is arranged on a side of the first doping layer 3 which is close to the second region A2 along the width direction; and a first conductive layer 10, wherein the first conductive layer 10 is arranged on a portion of the first doping layer 3 which is away from the semiconductor substrate 1. surface, and the first conductive layer 10 is arranged on the side of the first doped layer 3 away from the insulating layer 4 along the width direction (i.e., the X direction); the second doped layer 7, the second doped layer 7 is opposite to the first doped layer 3 in conductivity type, the second doped layer 7 is arranged in the second area A2, and extends along the width direction to the surface of the insulating layer 4 away from the first doped layer 3 and exceeds the insulating layer 4, and a gap 9 is formed between the second doped layer 7 and the first doped layer 3 that exceeds the insulating layer 4; the second conductive layer 11, the second conductive layer 11 is arranged on at least part of the surface of the second doped layer 7 away from the semiconductor substrate 1. Therefore, the structure of the present invention can save the np region insulation process step, reduce the investment cost of equipment and consumables, greatly reduce the process time, reduce the time cost, and also reduce the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the film layer concave insulation method of the present invention is significantly greater than the insulation resistance of the traditional photolithography scheme, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0047] The following is a detailed description of the principle by which the back contact solar cell proposed in the present invention can achieve the above beneficial effects:

[0048] In the prior art, photolithography and wet etching processes or laser processes are generally used to achieve insulation of the np region. However, the photolithography and wet etching processes are complicated. After depositing the conductive layer in a specific area, it is generally necessary to expose the TCO part that needs to be etched through processes such as coating photoresist, printing exposure, and development, and then remove the exposed TCO through wet etching to achieve insulation between the P region and the N region. This method is complex, costly, and takes a long time to process, and is not suitable for large-scale mass production. The laser process generally deposits a complete conductive film in the P region and the N region first, and then uses a laser process to etch away the conductive film adjacent to the P region and the N region to form insulation between the P region and the N region. However, the equipment cost of the laser process is high, the process development is difficult, and the laser has certain damage to the passivation layer. In addition, the photolithography and wet etching processes and the laser process all inevitably have the problem of unclean etching, resulting in poor insulation effect in the np region, thereby affecting the parallel resistance and conversion efficiency of the solar cell.

[0049] In order to solve this technical problem, the present invention introduces a gap 9 between the first doping layer 3 and the second doping layer 7, and after depositing the conductive film, a cliff structure of the film layer is naturally formed between the first doping layer 3 and the second doping layer 7, thereby realizing the insulation between the P region and the N region, eliminating the np region insulation process step, reducing the investment cost of equipment and consumables, and greatly reducing the process time, reducing the time cost, and also reducing the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the film layer concave insulation method of the present invention is significantly greater than the insulation resistance of the traditional photolithography scheme, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0050] In addition, the back-contact solar cell of the present invention is not limited to back-contact cells such as HBC and TBC, but can also be applied to all full back-contact cells.

[0051] According to some specific embodiments of the present invention, Figure 1 The back contact solar cell further includes: a first passivation layer 2, the first passivation layer 2 is arranged in the first region A1, the first doping layer 3 is arranged on the surface of the first passivation layer 2 away from the semiconductor substrate 1; and / or, a second passivation layer 6, the second passivation layer 6 is arranged in the second region A2, and extends along the width direction to the surface of the insulating layer 4 away from the first doping layer 3 and beyond the insulating layer 4, a gap 9 is formed between the second passivation layer 6 beyond the insulating layer 4 and the first doping layer 3, and the second doping layer 7 is arranged on the surface of the second passivation layer 6 away from the semiconductor substrate 1. The first passivation layer 2 and the second passivation layer 6 can further ensure a good surface passivation effect on the silicon-based surface.

[0052] In the embodiment of the present invention, the material of the semiconductor substrate 1 can be selected from materials such as silicon (Si) or germanium (Ge) or materials such as gallium arsenide (GaAs). In terms of conductivity type, the semiconductor substrate 1 can be an N-type semiconductor substrate 1 or a P-type semiconductor substrate 1. It should be noted that the first surface A of the semiconductor substrate 1 refers to the backlight surface, and the second surface B of the semiconductor substrate 1 refers to the light-facing surface.

[0053] In an embodiment of the present invention, the first doping layer 3 may be an N-type doping layer, and the second doping layer 7 may be a P-type doping layer; or, the first doping layer 3 may be a P-type doping layer, and the second doping layer 7 may be an N-type doping layer. As some specific examples, the first passivation layer 2 may be an intrinsic amorphous silicon layer, and the first doping layer 3 may be an N-type amorphous silicon layer. As some specific examples, the thickness of the first passivation layer 2 may be 1-50nm (for example, 1 / 10 / 20 / 30 / 40 / 50nm), and the thickness of the first doping layer 3 may be 1-100nm (for example, 1 / 10 / 20 / 30 / 40 / 50 / 60 / 70 / 80 / 90 / 100nm).

[0054] As some specific examples, the second passivation layer 6 may be an intrinsic amorphous silicon layer, and the second doping layer 7 may be a P-type amorphous silicon layer. As some specific examples, the thickness of the second passivation layer 6 may be 1-50 nm (for example, 1 / 10 / 20 / 30 / 40 / 50 nm), and the thickness of the second doping layer 7 may be 1-100 nm (for example, 1 / 10 / 20 / 30 / 40 / 50 / 60 / 70 / 80 / 90 / 100 nm).

[0055] In the embodiment of the present invention, the material of the insulating layer 4 is not particularly limited. For example, SiN x Or SiO x Materials, or materials with insulating properties such as silicon oxynitride.

[0056] According to some further specific embodiments of the present invention, the thickness of the insulating layer 4 can be 10nm-1000nm, for example, 10 / 100 / 200 / 300 / 400 / 500 / 600 / 7000 / 800 / 900 / 1000nm. By limiting the thickness of the insulating layer 4 within the above range, the insulation between the N-type doped region and the P-type doped region can be further effectively ensured, and the problem of the final solar cell being too thick can be avoided. The inventors found that if the thickness of the insulating layer 4 is too small, an effective cliff structure cannot be formed, and the conductive layer deposited on the surface of the N-type doped region is easy to contact the conductive layer deposited on the surface of the P-type doped region, and the N-type doped region cannot be effectively separated from the P-type doped region, so the insulation between the P region and the N region cannot be effectively achieved; if the thickness of the insulating layer 4 is too large, the final solar cell will be too thick.

[0057] According to some other specific embodiments of the present invention, the width of the second doping layer 7 beyond the insulating layer 4 can be 30nm-100μm, for example, 30 / 100 / 200 / 300 / 400 / 500 / 600 / 700 / 800 / 900 / 1000nm, 10 / 20 / 30 / 40 / 50 / 60 / 70 / 80 / 90 / 100μm, thus, by limiting the width of the second doping layer 7 beyond the insulating layer 4 within the above range, the insulation between the N-type doping region and the P-type doping region can be further effectively ensured. The inventors found that if the width of the second doping layer 7 beyond the insulating layer 4 is too small, the conductive layer on the surface of the first doping layer 3 may be deposited along the edge of the insulating layer 4 to the surface of the second doping layer 7, resulting in the inability to effectively achieve the insulation between the P region and the N region; if the width of the second doping layer 7 beyond the insulating layer 4 is too large, it is unnecessary, resulting in unnecessary process waste.

[0058] In the embodiment of the present invention, the specific materials of the first conductive layer 10 and the second conductive layer 11 are not particularly limited. As some specific examples, the materials of the first conductive layer 10 and the second conductive layer 11 are independently selected from at least one of indium tin oxide, aluminum zinc oxide, indium hydroxide-doped indium oxide, and indium tungsten oxide. In some examples, the thickness of the first conductive layer 10 and the second conductive layer 11 can be independently 10nm-500nm (for example, 10 / 50 / 100 / 200 / 300 / 400 / 500nm).

[0059] According to some further specific embodiments of the present invention, Figure 1 The back-contact solar cell further includes: a first electrode 12, which is disposed on a side of the first conductive layer 10 away from the first doped layer 3; and / or a second electrode 13, which is disposed on a side of the second conductive layer 11 away from the second doped layer 7. The first electrode 12 and the second electrode 13 can each independently be a grid line formed by screen printing or electroplating, and the material thereof can be a conductive material such as silver or copper.

[0060] According to some further specific embodiments of the present invention, Figure 1 , the back-contact solar cell also includes: a third passivation layer 14, the third passivation layer 14 is arranged on the second surface B; an anti-reflection layer 15, the anti-reflection layer 15 is arranged on the side of the third passivation layer 14 away from the semiconductor substrate 1. The anti-reflection layer 15 has the function of serving as an anti-reflection film and a protective film, and also has the function of serving as a passivation film for suppressing photocarrier recombination. The third passivation layer 14 has the function of suppressing photocarrier recombination at the bonding interface with the second surface B. As some specific examples, the third passivation layer 14 can be an intrinsic amorphous silicon layer, and its thickness can be 1-50nm (for example, it can be 1 / 10 / 20 / 30 / 40 / 50nm). The anti-reflection layer 15 can be SiN x Or SiOx The material may have a thickness of 10-500 nm (for example, 10 / 50 / 100 / 200 / 300 / 400 / 500 nm).

[0061] In the appended Figure 1 , X represents the width direction of the back contact solar cell, and Y represents the thickness direction of the back contact solar cell.

[0062] In another aspect of the present invention, the present invention provides a method for preparing a back-contact solar cell. According to an embodiment of the present invention, the method comprises:

[0063] S100: Provide semiconductor substrate

[0064] In this step, a semiconductor substrate 1 is provided. The semiconductor substrate 1 may be an N-type substrate or a P-type substrate. The semiconductor substrate 1 has a first surface A and a second surface B opposite to each other. The first surface A includes a first region A1 and a second region A2 adjacent to each other. Figure 1 The first surface A of the semiconductor substrate 1 refers to the backlight surface, and the second surface B of the semiconductor substrate 1 refers to the frontlight surface. The material of the semiconductor substrate 1 can be selected from materials such as silicon (Si) or germanium (Ge) or materials such as gallium arsenide (GaAs).

[0065] S200: forming a first doping layer and an insulating layer in sequence on the first surface A, and removing the first doping layer and the insulating layer in the second area A2

[0066] Specifically, firstly, the first doping layer 3 and the insulating layer 4 can be sequentially deposited on the first surface A of the semiconductor substrate 1 by CVD. Figure 2 As shown above, the thickness of the first doping layer 3 can be 1-100nm, and the thickness of the insulating layer 4 can be 10-1000nm. Then, the first doping layer 3 and the insulating layer 4 on the surface of the second area A2 are removed according to the pattern by laser or wet etching to form a first opening 5, as shown in the attached figure. Figure 3 shown.

[0067] S300: forming a second doping layer on the surface of the prepared first intermediate cell away from the second surface B

[0068] Specifically, the second doping layer 7 may be deposited on the surface of the first intermediate cell sheet formed in step S200 away from the second surface B by CVD. Figure 4 As shown above, the thickness of the second doping layer 7 can be 1-100 nm.

[0069] S400: removing a portion of the second doped layer away from the surface of the insulating layer of the first doped layer to expose a portion of the insulating layer

[0070] Specifically, a portion of the second doped layer on the surface of the insulating layer away from the first doped layer can be removed according to a pattern by laser or wet etching to expose a portion of the insulating layer to form a second opening 8, and the second opening is located at an end of the insulating layer away from the second region along the width direction, as shown in the attached Figure 5 shown.

[0071] S500: removing the exposed insulating layer, and continuing to remove the insulating layer along the width direction close to the second area A2, and the remaining insulating layer

[0072] Specifically, the insulating layer 4 exposed by the second opening can be removed by wet etching, and the unexposed inner insulating layer 4 can be further etched to form a gap 9 between the second doped layer 7 and the first doped layer 3, that is, to form a concave structure. Figure 6 shown.

[0073] The wet etching solution here can be an acid solution, such as HF solution, and the mass concentration of the HF solution can range from 2% to 50%. The etching solution is not limited to the HF solution used here, and other acidic etching solutions can also be used.

[0074] According to some specific embodiments of the present invention, the thickness of the concave structure (i.e., the thickness of the insulating layer 4) can be 10nm-1000nm. By limiting the thickness of the concave structure within the above range, the insulation between the N-type doped region and the P-type doped region can be further effectively ensured, and the problem of the final solar cell being too thick can be avoided.

[0075] According to some further specific embodiments of the present invention, the width of the concave structure (i.e., the width of the second doping layer 7 exceeding the insulating layer 4) can be 30nm-100μm. Therefore, by limiting the width of the concave structure within the above range, the insulation between the N-type doping region and the P-type doping region can be further effectively ensured.

[0076] S600: Depositing a conductive layer on the surface of the prepared second intermediate battery sheet away from the second surface B

[0077] Specifically, a conductive layer may be deposited on the surface of the second intermediate cell sheet formed in step S500 away from the second surface B by PVD. The conductive layer deposited on the surface of the first doped layer 3 is the first conductive layer 10, and the conductive layer deposited on the surface of the second doped layer 7 is the second conductive layer 11. Figure 7 As shown above, the thickness of the first conductive layer 10 and the second conductive layer 11 can be independently 10 nm to 500 nm.

[0078] According to some specific embodiments of the present invention, the method further includes:

[0079] Before forming the first doping layer 3 on the first surface A, the first passivation layer 2 is first formed on the first surface A, that is, the first passivation layer 2, the first doping layer 3 and the insulating layer 4 are sequentially formed on the first surface A, and the first passivation layer 2, the first doping layer 3 and the insulating layer 4 are removed from the second area A2 to form a first opening. Figure 2 and 3 shown.

[0080] Before forming the second doping layer 7 on the surface of the first intermediate battery cell away from the second surface B, the second passivation layer 6 is first formed on the second surface B, that is, the second passivation layer 6 and the second doping layer 7 are sequentially formed on the surface of the first intermediate battery cell away from the second surface B. Figure 4 shown.

[0081] The second passivation layer and the second doping layer are partially removed from the surface of the insulating layer away from the first doping layer to expose a portion of the insulating layer to form a second opening, and the second opening is located at an end of the insulating layer away from the second region along the width direction, as shown in the attached Figure 5 shown.

[0082] As some specific examples, the second passivation layer 6 may be an intrinsic amorphous silicon layer, and the second doping layer 7 may be a P-type amorphous silicon layer. As some specific examples, the thickness of the second passivation layer 6 may be 1-50 nm, and the thickness of the second doping layer 7 may be 1-100 nm.

[0083] Furthermore, the method further comprises:

[0084] S700: Form a first electrode 12 (e.g., gate line) on a side of the first conductive layer 10 away from the first doping layer 3 by screen printing or electroplating, and form a second electrode 13 (e.g., gate line) on a side of the second conductive layer 11 away from the second doping layer 7, as shown in the attached figure. Figure 8 The electrode material can be a conductive material such as silver or copper.

[0085] Furthermore, the method further comprises:

[0086] S800: forming a third passivation layer 14 on the second surface B. The third passivation layer 14 may be an intrinsic amorphous silicon layer, and its thickness may be 1-50 nm. Figure 1 shown.

[0087] An anti-reflection layer 15 is formed on the side of the third passivation layer 14 facing away from the semiconductor substrate 1. The anti-reflection layer 15 may be SiN x Or SiO x The thickness of the material can be 10-500nm.

[0088] According to the method of the embodiment of the present invention, by forming a gap 9 between the first doping layer 3 and the second doping layer 7, a cliff structure of the film layer is naturally formed between the first doping layer 3 and the second doping layer 7 after depositing the conductive film, thereby achieving insulation between the P region and the N region, eliminating the np region insulation process step, reducing the investment cost of equipment and consumables, and greatly reducing the process time, reducing the time cost, and also reducing the damage of the laser to the passivation layer. In addition, the insulation resistance of the np region obtained by the method of the present invention using the film layer concave insulation method is significantly greater than the insulation resistance of the traditional photolithography solution, which effectively solves the problem of unclean etching in the prior art and effectively improves the parallel resistance and conversion efficiency of the solar cell.

[0089] The embodiments of the present invention are described in detail below. It should be noted that the embodiments described below are exemplary and are only used to explain the present invention, and cannot be interpreted as limiting the present invention. In addition, if not explicitly stated, all reagents used in the following embodiments are commercially available, or can be synthesized according to this article or known methods, and the reaction conditions not listed are also easily available to those skilled in the art.

[0090] Example 1

[0091] This embodiment provides a solar cell, and the preparation method thereof is as follows:

[0092] like Figure 2 , providing a semiconductor substrate, the semiconductor substrate having a first surface A (back side) and a second surface B (front side) opposite to each other, the first surface A including adjacent first regions A1 and second regions A2. Using CVD, a first intrinsic amorphous silicon layer, an N-type amorphous silicon layer and an insulating layer are sequentially deposited on the back side of the crystalline silicon substrate. The thickness of the first intrinsic amorphous silicon layer is 10 nm, the thickness of the N-type amorphous silicon layer is 30 nm, and the thickness of the insulating layer is 100 nm. The material of the insulating layer is SiN x .

[0093] like Figure 3 , use laser to remove the film layer on the surface of the second area A2 according to the pattern to form the first opening 5.

[0094] like Figure 4 A second intrinsic amorphous silicon layer and a P-type amorphous silicon layer are sequentially deposited on the back side using CVD, wherein the second intrinsic amorphous silicon layer has a thickness of 10 nm and the P-type amorphous silicon layer has a thickness of 30 nm.

[0095] like Figure 5 , using a laser method to remove a portion of the second intrinsic amorphous silicon layer and the P-type amorphous silicon layer on the surface of the insulating layer according to a pattern, to form a second opening 8.

[0096] like Figure 6The insulating layer exposed at the second opening is removed by using a wet etching solution, and the unexposed inner insulating layer is further etched to form an inner concave portion, the inner width of the inner concave portion being 30 nm. The wet etching solution is HF solution with a mass concentration of 25%.

[0097] like Figure 7 , a TCO layer is deposited on the back side using PVD, and the thickness of the TCO layer is 150nm. Due to the concave structure of the insulating layer, the concave part cannot be covered with the TCO film when the TCO is plated, thus achieving the insulation effect of the np region.

[0098] right Figure 7 The structure shown was subjected to SEM testing. Fig. 9 As shown, from Fig. 9 It can be seen that the concave insulating layer causes the TCOs on both sides to be disconnected, thus achieving an insulating effect in the np region.

[0099] like Figure 8 The first gate line and the second gate line are prepared by screen printing.

[0100] like Figure 1 , a third intrinsic amorphous silicon layer and SiN are sequentially deposited on the front side of the crystalline silicon substrate using CVD x layer, wherein the thickness of the third intrinsic amorphous silicon layer is 10 nm; SiN x The thickness of the layer is 200 nm.

[0101] Example 2

[0102] This embodiment provides a solar cell. The difference between this embodiment and embodiment 1 is that:

[0103] The thickness of the insulating layer is 60 nm, and the inward width D of the concave portion is 100 nm.

[0104] Example 3

[0105] This embodiment provides a solar cell. The difference between this embodiment and embodiment 1 is that:

[0106] The thickness of the insulating layer is 200 nm, and the inward width D of the concave portion is 10 μm.

[0107] Example 4

[0108] This embodiment provides a solar cell. The difference between this embodiment and embodiment 1 is that:

[0109] The thickness of the insulating layer is 300 nm, and the inward width D of the concave portion is 80 μm.

[0110] Example 5

[0111] This embodiment provides a solar cell. The difference between this embodiment and embodiment 1 is that:

[0112] The thickness of the insulating layer is 400 nm, and the inward width D of the concave portion is 100 μm.

[0113] Example 6

[0114] This embodiment provides a solar cell. The difference between this embodiment and embodiment 1 is that:

[0115] For example, the first intrinsic amorphous silicon layer, the second intrinsic amorphous silicon layer and the third intrinsic amorphous silicon layer are all replaced with SiO x layer, replacing the N-type amorphous silicon layer with an N-type doped polysilicon layer, and replacing the P-type amorphous silicon layer with a P-type doped polysilicon layer.

[0116] Comparative Example 1

[0117] This comparative example provides a method for preparing a HBC solar cell, comprising the following steps:

[0118] A semiconductor substrate is provided, wherein the semiconductor substrate has a first surface (back surface) and a second surface (front surface) opposite to each other, wherein the first surface includes a first region and a second region adjacent to each other. A first intrinsic amorphous silicon layer and an N-type amorphous silicon layer are sequentially deposited on the back surface of the crystalline silicon substrate using CVD. The thickness of the first intrinsic amorphous silicon layer is 10 nm, and the thickness of the N-type amorphous silicon layer is 30 nm.

[0119] The film layer on the surface of the second area is removed according to the pattern by using a laser to form a first opening.

[0120] A second intrinsic amorphous silicon layer and a P-type amorphous silicon layer are sequentially deposited on the back side by using CVD, wherein the second intrinsic amorphous silicon layer has a thickness of 10 nm and the P-type amorphous silicon layer has a thickness of 30 nm.

[0121] The second intrinsic amorphous silicon layer and the P-type amorphous silicon layer corresponding to the first region are removed by laser to form a second opening.

[0122] Then, PVD is used to deposit a TCO layer on the back side. The thickness of the TCO layer is 150nm. After processes such as photoresist coating, printing exposure, and development, the TCO part that needs to be etched is exposed. Then, wet etching is used to remove the TCO that needs to be disconnected to form an insulating effect between NPs.

[0123] The first gate line and the second gate line are prepared by screen printing.

[0124] The third intrinsic amorphous silicon layer and SiN are sequentially deposited on the front side of the crystalline silicon substrate using CVD. x layer, wherein the thickness of the third intrinsic amorphous silicon layer is 10 nm; SiN xThe thickness of the layer is 200 nm.

[0125] The insulation resistance between the N-doped region and the P-doped region of the solar cells prepared in Examples 1-6 and Comparative Example 1 was tested respectively, and the parallel resistance and energy conversion efficiency Eta of the solar cells prepared in Examples 1-6 and Comparative Example 1 were tested respectively. The results are shown in Table 1.

[0126] Table 1

[0127] Insulation resistance Parallel resistance Transformation efficiency Eta Example 1 40MΩ 200Ω 24％ Example 2 10MΩ 100Ω 23.7％ Example 3 40MΩ 200Ω 24％ Example 4 40MΩ 200Ω 24％ Example 5 40MΩ 200Ω 24％ Example 6 40MΩ 200Ω 24％ Comparative Example 1 5MΩ 20Ω 23％

[0128] It can be seen that the insulation resistance between the N-doped region and the P-doped region of Examples 1-6 is significantly improved compared with Comparative Example 1. And compared with Comparative Example 1, the parallel resistance and conversion efficiency Eta of the solar cells of Examples 1-6 are significantly improved.

[0129] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0130] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A back contact solar cell, characterized in that: include: A semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface opposite to each other, the first surface comprising a first region and a second region adjacent to each other; a first doped layer, the first doped layer being disposed in the first region; an insulating layer, the insulating layer being disposed on a portion of a surface of the first doped layer away from the semiconductor substrate, and the insulating layer being disposed on a side of the first doped layer close to the second region along a width direction; A first conductive layer, wherein the first conductive layer is disposed on a portion of a surface of the first doped layer away from the semiconductor substrate, and the first conductive layer is disposed on a side of the first doped layer away from the insulating layer along a width direction; a second doping layer, wherein the conductivity type of the second doping layer is opposite to that of the first doping layer, the second doping layer is arranged in the second region, and extends along the width direction to a surface of the insulating layer away from the first doping layer and exceeds the insulating layer, and a gap is formed between the second doping layer exceeding the insulating layer and the first doping layer; A second conductive layer is provided on at least a portion of a surface of the second doped layer away from the semiconductor substrate.

2. The back contact solar cell according to claim 1, characterized in that: Also includes: a first passivation layer, wherein the first passivation layer is disposed in the first region, and the first doping layer is disposed on a surface of the first passivation layer away from the semiconductor substrate; And / or, a second passivation layer, the second passivation layer is arranged in the second region and extends along the width direction to the surface of the insulating layer away from the first doped layer and exceeds the insulating layer, a gap is formed between the second passivation layer exceeding the insulating layer and the first doped layer, and the second doped layer is arranged on the surface of the second passivation layer away from the semiconductor substrate.

3. The back contact solar cell according to claim 2, characterized in that: Also includes: a first electrode, the first electrode being disposed on a side of the first conductive layer away from the first doping layer; and / or, a second electrode, wherein the second electrode is disposed on a side of the second conductive layer away from the second doped layer.

4. The back contact solar cell according to claim 3, characterized in that: Also includes: a third passivation layer, the third passivation layer being disposed on the second surface; An anti-reflection layer is provided on a side of the third passivation layer away from the semiconductor substrate.

5. The back-contact solar cell according to any one of claims 1 to 4, characterized in that: The first doped layer is an N-type doped layer, and the second doped layer is a P-type doped layer; Alternatively, the first doped layer is a P-type doped layer, and the second doped layer is an N-type doped layer.

6. The back-contact solar cell according to any one of claims 1 to 4, characterized in that: The thickness of the insulating layer is 10nm-1000nm.

7. The back-contact solar cell according to any one of claims 1 to 4, characterized in that: The width of the second doping layer beyond the insulating layer is 30 nm-100 μm.

8. A method for preparing a back contact solar cell, characterized in that: include: Providing a semiconductor substrate, the semiconductor substrate having a first surface and a second surface opposite to each other, the first surface including a first region and a second region adjacent to each other; sequentially forming a first doping layer and an insulating layer on the first surface, removing the first doping layer and the insulating layer in the second region, and forming a first opening; forming a second doping layer on a surface of the prepared first intermediate battery cell facing away from the second surface; Removing a portion of the second doped layer on a surface of the insulating layer away from the first doped layer to expose a portion of the insulating layer to form a second opening, wherein the second opening is located at an end of the insulating layer away from the second region along the width direction; removing the exposed insulating layer, and continuing to remove the insulating layer along the width direction close to the second region, leaving a portion of the insulating layer, so as to form a gap between the second doped layer and the first doped layer; A conductive layer is deposited on the surface of the prepared second intermediate battery cell away from the second surface, the conductive layer deposited on the surface of the first doped layer is the first conductive layer, and the conductive layer deposited on the surface of the second doped layer is the second conductive layer.

9. The method according to claim 8, characterized in that Also includes: sequentially forming a first passivation layer, a first doping layer, and an insulating layer on the first surface, and removing the first passivation layer, the first doping layer, and the insulating layer in the second region to form the first opening; sequentially forming a second passivation layer and a second doping layer on a surface of the prepared first intermediate battery cell facing away from the second surface; The second passivation layer and the second doping layer are partially removed from the surface of the insulating layer away from the first doping layer to expose a portion of the insulating layer to form the second opening, and the second opening is located at one end of the insulating layer away from the second region along the width direction.

10. The method according to claim 9, characterized in that Using a laser or wet etching method to remove a portion of the second passivation layer and the second doping layer on the surface of the insulating layer away from the first doping layer, to form the second opening; And / or, using an acidic etching solution to remove the exposed insulating layer, and using the acidic etching solution to continue removing the insulating layer along the width direction close to the second region, leaving a remaining portion of the insulating layer, so as to form a gap between the second doped layer and the first doped layer.

11. The method according to claim 10, characterized in that The mass concentration of the acidic etching solution is 2%-50%.

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