Charging and discharging circuit and related device

Abstract

The embodiment of the invention provides a charging and discharging circuit and a related device. The circuit comprises a first battery, an NMOS module comprising one or more NMOS, a second battery and a control unit, the control unit is used for controlling the NMOS module to be linearly conducted when the equipment is started and the voltage difference value of the battery is greater than a first threshold value; the control unit is also used for controlling the NMOS module to be conducted when the equipment is started and the voltage difference value is smaller than or equal to a first threshold value; the control unit comprises a voltage stabilizing module used for stabilizing the voltage of the control end of the NMOS module, a first module and a voltage dividing module used for carrying out voltage dividing processing on the voltage output by the first module. The first module is used for boosting the voltage of the first battery when the equipment is started up and providing the voltage for the control end of the NMOS module; when the battery voltage difference is large, the linear conduction resistance value of the NMOS module on the path from the battery to the charging chip is large, so that the battery voltage is balanced, and the battery safety is improved. The first module has a boosting function, so that the use of a power supply with relatively high voltage is reduced.

Description

Technical Field

[0001] The present application relates to the field of terminal technology, and in particular to charging and discharging circuits and related devices. Background Art

[0002] With the development and progress of society, mobile phones, tablet computers and other terminal devices have become an indispensable part of people's lives. Terminal devices are usually equipped with batteries for the convenience of users.

[0003] Currently, terminal devices use a solution of multiple batteries to increase the charging speed of the terminal devices. Exemplarily, the terminal devices can use a parallel charging and parallel discharging method to achieve fast charging of the terminal devices.

[0004] However, in this method, there may be a large voltage difference between the batteries, resulting in mutual charging, which in turn causes battery safety issues. Summary of the invention

[0005] The embodiment of the present application provides a charging and discharging circuit and related devices, which are applied to the field of terminal technology. When the battery voltage difference is large, the linear conduction resistance of the NMOS module on the path from the battery to the charging chip is large, so as to balance the battery voltage and improve battery safety. The first module has a boost function to reduce the use of a power supply with a larger voltage.

[0006] In the first aspect, an embodiment of the present application proposes a charging and discharging circuit. The charging and discharging circuit includes: a first battery, a second battery, an NMOS module and a control unit; the NMOS module includes one or more NMOS, and the NMOS module is controlled by the control unit; the control unit is used to control the NMOS module to be in a linear conduction state when the terminal device is turned on and the voltage difference between the first battery and the second battery is greater than a first threshold value, so as to reduce the voltage difference between the first battery and the second battery; wherein, when the NMOS module is in a linear conduction state, one or more NMOS in the NMOS module operate in a linear region; the control unit is also used to control the NMOS module to be in a conduction state when the terminal device is turned on and the voltage difference between the first battery and the second battery is less than or equal to the first threshold value;

[0007] The control unit includes: a first module with a boosting function, a first voltage dividing module, a second voltage dividing module and a voltage stabilizing module; the other end of the first module is connected to one end of the first voltage dividing module, and the other end of the first voltage dividing module is connected to the control end of the NMOS module; one end of the second voltage dividing module is connected to the other end of the first voltage dividing module, and the other end of the second voltage dividing module is grounded, one end of the voltage stabilizing module is connected to the control end of the NMOS module, and the other end of the voltage stabilizing module is grounded; the first module is used to boost the input voltage when the terminal device is turned on, and provide voltage for the control end of the NMOS module; the first voltage dividing module and the second voltage dividing module are used to divide the voltage output by the first module when the terminal device is turned on, so that the NMOS module is in a linear conduction state or a conduction state; the voltage stabilizing module is used to stabilize the voltage of the gate control end of the NMOS module.

[0008] In this way, when the voltage difference between the first battery and the second battery is large, the linear conduction resistance of the NMOS module on the path from the second battery to the charging chip is large, so as to balance the battery voltage and improve battery safety. The first module has a boost function, which can reduce the use of power sources with higher voltages and reduce power consumption. Compared with PMOS, NMOS modules have a smaller area and a lower price.

[0009] Optionally, the first voltage-dividing module includes: a first resistor R1, the second voltage-dividing module includes: a second resistor R2 and a switch tube M1, and the voltage-stabilizing module includes a capacitor C1; the first module is connected to one end of R1, and the other end of R1 is connected to the control end of the NMOS module; one end of R2 is connected to the other end of R1, and the other end of R2 is connected to the drain of M1; the source of M1 is grounded, one end of C1 is connected to the control end of the NMOS module, and the other end of C1 is grounded; when the voltage difference between the first battery and the second battery is greater than the first threshold value, the switch tube M1 is used to alternate between on and off, so that the NMOS module is in a linear on state; when the voltage difference between the first battery and the second battery is less than or equal to the first threshold value, the switch tube M1 is used to be continuously turned on, so that the NMOS module is in a conducting state.

[0010] In this way, voltage division is achieved through two resistors and a switch tube, and the state of the NMOS module is adjusted. The working process is simple and easy to implement.

[0011] Optionally, the first module includes: a voltage adjustment module; the input end of the voltage adjustment module is connected to the first battery, and the output end of the voltage adjustment module is connected to the first voltage divider module; the voltage adjustment module is used to boost the voltage output by the first battery so that the NMOS in the NMOS module is in a linear conduction state or a conduction state.

[0012] In this way, the voltage of the first battery is used for voltage boosting, and no other power source needs to be added, thereby reducing power consumption.

[0013] Optionally, the first module also includes: a control logic and a feedback module; the control logic is used to adjust the voltage output by the voltage adjustment module based on the voltage at the input end of the voltage adjustment module and the error between the first voltage and the voltage at the control end of the NMOS module; the first voltage is a preset voltage at the control end of the NMOS module; the feedback module is used to feed back the error between the preset voltage and the voltage at the control end of the NMOS module to the control logic; the preset voltage is the voltage at the control end of the NMOS module in a preset power-on scenario.

[0014] In this way, the output voltage of the first module can be adjusted in real time based on the voltage at the control end of the NMOS module, and the voltage at the control end of the NMOS module can be precisely controlled so that the voltage is more stable.

[0015] Optionally, the second voltage divider module also includes: a switch tube M2; the source of M2 is grounded, and the drain of M2 is connected to the gate of M1; M2 is used to alternate between on and off when the terminal device is turned on and the voltage difference between the first battery and the second battery is greater than a first threshold, so that M2 alternates between off and on; M2 is also used to shut down when the terminal device is turned on and the voltage difference between the first battery and the second battery is less than or equal to the first threshold, so that M2 is turned on.

[0016] In this way, when the device is turned off, the voltage at the gate of M2 is a low voltage, and M2 is turned off, which is relatively simple to implement.

[0017] Optionally, the second voltage-dividing module further includes a second interface and a third resistor R3, wherein the third resistor is located between the gate of M1 and the second interface; and the second interface is used to provide a voltage for the gate of M1.

[0018] In this way, the situation where the second interface is directly grounded can be reduced.

[0019] Optionally, the control unit further includes a fourth resistor R4 and a third interface, the fourth resistor is located between the third interface and the gate of M2; the third interface is used to provide voltage to the gate of M2; the fourth resistor is used to protect the switch tube M2.

[0020] In this way, the situation where the switch tube M2 is damaged due to the excessive voltage output by the third interface can be reduced.

[0021] Optionally, the control module is further used to control the NMOS module to be in a shut-down state when the terminal device is shut down, so that the second battery does not supply power.

[0022] In this way, when the terminal device is turned off, the second device is not powered.

[0023] Optionally, the NMOS module includes a switch tube U1 and a switch tube U2; the source of U1 is connected to the first battery, the source of U2 is connected to the second battery, the drain of U1 is connected to the drain of U2, the gate of U1 is connected to the gate of U2, and the gate of U1 is connected to the control unit.

[0024] It is understandable that when the charging and discharging circuit adopts a high-power NMOS tube, using only one NMOS tube may cause the first battery and the second battery to be turned on through the parasitic diode on the high-power NMOS tube. In order to prevent the first battery and the second battery from being turned on through the parasitic diode, two high-power NMOS can be used to implement the above-mentioned charging and discharging circuit, and the sources of the two NMOS tubes are coupled, or the drains are coupled.

[0025] Optionally, when the terminal device is turned off, the output voltage V1 of the first module satisfies: V1×resistance of the second voltage divider unit÷(resistance of the first voltage divider unit+resistance of the second voltage divider unit)≤(threshold voltage of U2+discharge cut-off voltage of the second battery). The discharge cut-off voltage is the lowest voltage at which the second battery does not work externally, or it can be understood that when the battery is discharged, the voltage drops to the lowest operating voltage value at which the battery is not suitable for further discharge.

[0026] It can be understood that V1×the resistance value of the second voltage dividing unit÷(the resistance value of the first voltage dividing unit+the resistance value of the second voltage dividing unit) corresponds to the third value described below.

[0027] In some embodiments, V1×resistance of R2÷(resistance of R1+resistance of R2)≤(threshold voltage of U2+discharge cut-off voltage of the second battery).

[0028] In this way, U2 can remain off when the terminal device is turned off.

[0029] Optionally, the NMOS module includes a switch tube U3; the gate of U3 is connected to the control unit, the source of U3 is connected to the second battery, the drain of U3 is connected to the first battery, and the drain of U3 is also used to connect to the charging chip to charge the first battery and / or the second battery.

[0030] In this way, one NMOS realizes voltage balancing of the first battery and the second battery. The structure is simple, easy to implement, small in size, and small in area.

[0031] Optionally, the charging and discharging circuit also includes: a charging chip, which is connected to the NMOS module; the charging chip is used to charge the first battery and / or the second battery; when the NMOS module includes U1 and U2, the charging chip is connected to the drain of U1; when the NMOS module includes U3, the charging chip is connected to the drain of U3.

[0032] In some embodiments, the first module is an existing module of the terminal device, and there is no need to add a module with a boost function, thereby saving circuit area and cost. For example, the first module may be a PMU module used as a driver, etc.

[0033] In a second aspect, an embodiment of the present application provides a terminal device, which may also be referred to as a terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), etc. The terminal device may be a mobile phone, a smart TV, a wearable device, a tablet computer (Pad), a computer with wireless transceiver function, a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in self-driving, a wireless terminal in remote medical surgery, a wireless terminal in smart grid, a wireless terminal in transportation safety, a wireless terminal in smart city, a wireless terminal in smart home, etc.

[0034] The terminal device comprises: a load, and any charge-discharge circuit of the first aspect, wherein the charge-discharge circuit is used to supply power to the load.

[0035] In a third aspect, an embodiment of the present application provides a chip, the chip comprising any charging and discharging circuit of the first aspect.

[0036] It should be understood that the second to third aspects of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 is a schematic diagram of the structure of a charging and discharging circuit in a possible design;

[0038] Figure 2 A schematic diagram of the structure of a charging and discharging circuit provided in an embodiment of the present application;

[0039] Figure 3 A schematic diagram of the structure of an NMOS module provided in an embodiment of the present application;

[0040] Figure 4This is a schematic diagram of the structure of a control unit according to an embodiment of the present application;

[0041] Figure 5A A schematic diagram of the current direction of a control unit according to an embodiment of the present application;

[0042] Figure 5B A waveform diagram of a voltage signal of a second interface according to an embodiment of the present application;

[0043] Figure 5C A schematic diagram of the current direction of a control unit according to an embodiment of the present application;

[0044] Figure 5D A schematic diagram of the current direction of a control unit according to an embodiment of the present application;

[0045] Figure 6 This is a schematic diagram of the structure of a control unit according to an embodiment of the present application;

[0046] Figure 7 A schematic diagram of the structure of an NMOS module provided in an embodiment of the present application;

[0047] Figure 8 A schematic diagram of the structure of a first module provided in an embodiment of the present application;

[0048] Fig. 9 A schematic diagram of the structure of a terminal device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] To facilitate understanding of the embodiments of the present application, some terms involved in the present application are first briefly explained.

[0050] 1. Other terms

[0051] In the embodiments of the present application, words such as "first" and "second" are used to distinguish the same or similar items with substantially the same functions and effects. For example, the first chip and the second chip are only used to distinguish different chips, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0052] It should be noted that in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0053] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, a--c, bc, or abc, where a, b, c can be single or multiple.

[0054] 2. Terminal equipment

[0055] The terminal device of the embodiment of the present application may also be any form of electronic device. For example, the electronic device may include a handheld device, a vehicle-mounted device, etc. For example, some electronic devices are: mobile phones, tablet computers, PDAs, laptop computers, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, vehicle-mounted devices, wearable devices, terminal devices in 5G networks or future evolved public land mobile communication networks (public land mobile The embodiments of the present application do not limit this.

[0056] As an example but not limitation, in the embodiments of the present application, the electronic device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also powerful functions achieved through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include full-featured, large-sized, and fully or partially independent of smartphones, such as smart watches or smart glasses, as well as devices that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various types of smart bracelets and smart jewelry for vital sign monitoring.

[0057] In addition, in the embodiments of the present application, the electronic device can also be a terminal device in the Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network that interconnects people and machines and things.

[0058] The electronic devices in the embodiments of the present application may also be referred to as: terminal equipment, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0059] In an embodiment of the present application, the electronic device or each network device includes a hardware layer, an operating system layer running on the hardware layer, and an application layer running on the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and a memory (also called main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as Linux operating system, Unix operating system, Android operating system, iOS operating system, or Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0060] Terminal devices are usually equipped with batteries for user convenience, but the power consumption of terminal devices is fast and the charging frequency is high.

[0061] Some terminal devices use multiple batteries connected in parallel to increase the charging speed of the terminal devices. However, when multiple batteries are connected in parallel, current mutual charging may occur, resulting in battery safety issues and low battery reliability.

[0062] For example, Figure 1 Figure 1 is a schematic diagram of a possible charging and discharging circuit design. Figure 1 As shown, the circuit includes: a charging chip 101, a battery 102, a battery 2 103 and a load 104. The charging chip 101 is connected to the battery 102, the battery 102 and the battery 2 103 are connected in parallel, and the battery 1 102 and the battery 2 103 are coupled to the load 103 through the charging chip 101.

[0063] The charging chip 101 is used to charge the battery 1 102 and the battery 2 103. In some possible scenarios, the charging chip 101 is connected to a power adapter, and the power adapter can convert alternating current into direct current to charge the battery 1 102 and the battery 2 103.

[0064] Battery 1 102 and battery 2 103 are used to supply power to load 104 .

[0065] The load 104 may be a processor, a memory, a communication interface, etc., or may be a power management integrated circuit (power management IC, PMIC), or a system on chip (system on chip, SoC), etc. The embodiment of the present application does not limit the specific structure of the load 104.

[0066] It should be noted that Figure 1 In the circuit shown, battery 1 102 and battery 2 103 are directly connected. When the voltage difference between battery 1 102 and battery 2 103 is too large, battery 1 102 and battery 2 103 may be directly connected, and the current value between battery 1 102 and battery 2 103 is too large, causing damage to components in the circuit. When the current value between battery 1 102 and battery 2 103 is greater than the current value that the battery can withstand, the battery may be damaged.

[0067] In view of this, an embodiment of the present application provides a charge and discharge circuit, which isolates parallel-connected batteries through NMOS to reduce direct conduction between batteries.

[0068] For example, Figure 2 This is a schematic diagram of a charging and discharging circuit provided in an embodiment of the present application. Figure 2 As shown, the charging and discharging circuit includes: a charging chip 201 , a first battery 202 , a second battery 203 , a load 204 , an NMOS module 205 and a control unit 206 .

[0069] The charging chip 201 is used to charge the first battery 202 and the second battery 203. In some possible scenarios, the charging chip 201 is connected to a power adapter, and the power adapter can convert alternating current into direct current to charge the first battery 202 and the second battery 203.

[0070] The first battery 202 and the second battery 203 are used to supply power to the load 204. The discharge cut-off voltage of the first battery 202 is greater than or equal to the discharge cut-off voltage of the second battery. The discharge cut-off voltage is the minimum operating voltage value when the battery is discharged and the voltage drops to a level where the battery is not suitable for further discharge.

[0071] It is understandable that the discharge cut-off voltage is the load voltage of the battery when the discharge is terminated as specified by the manufacturer. Depending on different battery types, different discharge conditions, requirements for battery capacity, and battery life requirements, the discharge cut-off voltage of the battery specified by the manufacturer is also different. This embodiment of the application is not limited to this.

[0072] The load 204 may be a processor, a memory, a communication interface, etc., or may be a power management integrated circuit (power management IC, PMIC), or a system on a chip (system on a chip, SoC), etc. The embodiment of the present application does not limit the specific structure of the load 204.

[0073] The NMOS module 205 is used to control the NMOS module to be in a linear conduction state when the voltage difference between the first battery and the second battery is greater than a first threshold value, so as to reduce the voltage difference between the first battery and the second battery.

[0074] In the embodiment of the present application, the first threshold value can be set according to the safety range of the voltage difference between the first battery and the second battery. The embodiment of the present application does not limit the specific value of the first threshold value. The threshold voltage in the embodiment of the present application can also be called the turn-on voltage, the conduction threshold voltage, etc.

[0075] A first end of the NMOS module 205 is connected to the first battery, a second end of the NMOS module 205 is connected to the second battery, and a third end of the NMOS module 205 is connected to the control unit.

[0076] In some embodiments, the NMOS module 205 includes an NMOS. The source of the NMOS is connected to the second battery, the drain of the NMOS is connected to the first battery, and the gate of the NMOS is connected to the control unit. The specific control method is similar to the following, and will not be described in detail here.

[0077] In some other embodiments, the NMOS module 205 includes two NMOSs.

[0078] For example, Figure 3 FIG. 2 is a schematic diagram of the structure of an NMOS module 205 provided in an embodiment of the present application. Figure 3 As shown, the NMOS module 205 includes a first NMOS transistor U1 and a second NMOS transistor U2. The source of U1 is connected to the first battery 202, the source of U2 is connected to the second battery 203, the drain of U1 is connected to the drain of U2, and the gates of U1 and U2 are both connected to the control unit 206.

[0079] It can be understood that when the absolute value of the voltage difference between the first battery and the second battery is greater than or equal to the first threshold, U1 and U2 both operate in the linear region to balance the voltages of the first battery and the second battery. When the voltage difference between the first battery and the second battery is less than the first threshold, U1 and U2 are both turned on. When the terminal device is turned off, U1 and U2 are both turned off.

[0080] It is understandable that the embodiment of the present application uses NMOS to control the connection between the first battery 202 and the second battery 203. Compared with PMOS, NMOS occupies a smaller area, which is conducive to the miniaturization of terminal equipment.

[0081] Based on the above embodiment, the NMOS module 205 further includes a fifth resistor R5. One end of the fifth resistor R5 is connected to the first battery 202, and the other end of the fifth resistor R5 is connected to the second battery 203. The fifth resistor R5 can perform low current hardware balancing on the first battery and the second battery when the terminal device is in the off state.

[0082] The control unit 206 is used to control the NMOS module 205 to disconnect the first battery from the second battery when it is detected that the voltage difference between the first battery and the second battery is greater than a first threshold.

[0083] In the embodiment of the present application, the first threshold value may be 200 mV, or 100 mV or any other value. The embodiment of the present application does not limit the specific value of the first threshold value.

[0084] For example, Figure 4 This is a schematic diagram of the structure of a control unit in an embodiment of the present application. Figure 4 As shown, the control unit includes: a first module 401 , a first voltage dividing module 402 , a second voltage dividing module 403 and a voltage stabilizing module 404 .

[0085] The other end of the first module 401 is connected to one end of the first voltage divider module 402, and the other end of the first voltage divider module 401 is connected to the control end of the NMOS module; one end of the second voltage divider module 403 is connected to the other end of the first voltage divider module 402, the second voltage divider module 403 is grounded, one end of the voltage stabilizing module 404 is connected to the control end of the NMOS module, and the other end of the voltage stabilizing module 404 is grounded;

[0086] The first module 401 is used to boost the voltage of the first battery when the terminal device is turned on, so as to provide voltage for the control terminal of the NMOS module.

[0087] In some embodiments, the first module 401 is further configured to not process the voltage output by the first battery when the terminal device is turned on, so that the NMOS in the NMOS module is in an off state.

[0088] The first voltage dividing module 402 and the second voltage dividing module 403 are used to divide the voltage output by the first module when the terminal device is turned on, so that the NMOS module is in a linear conduction state or a conduction state.

[0089] The voltage stabilizing module 404 is used to stabilize the voltage at the control end of the NMOS module.

[0090] In this way, when the voltage difference is large, the parallel batteries are isolated through the NMOS module to reduce the direct conduction between the batteries. Figure 4 The control unit in the circuit shown includes a module with a voltage boosting function, and requires a smaller voltage of the power supply, which can reduce the use of a power supply with a larger voltage and reduce the power consumption of the terminal device.

[0091] For example, Figure 4 As shown, the first voltage dividing module 402 includes a first resistor R1, the second voltage dividing module 403 includes a second resistor R2 and a switch tube M1, and the voltage stabilizing module 404 includes a capacitor C1.

[0092] The first module 401 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the NMOS module 205 (for example, the gate of U1); one end of the second resistor R2 is connected to the other end of the first resistor R1, and the other end of the second resistor R2 is connected to the drain of the switch tube M1; the gate of the switch tube M1 is connected to the second interface 402, the source of the switch tube M1 is grounded, one end of the capacitor C1 is connected to the NMOS module 205 (for example, the gate of U1), and the other end of the capacitor C1 is grounded.

[0093] When the voltage difference between the first battery and the second battery is greater than the first threshold, the switch tube M1 is used to alternate between on and off, so that the NMOS module is in a linear on state;

[0094] When the voltage difference between the first battery and the second battery is less than or equal to the first threshold, the switch tube M1 is further configured to be continuously turned on, so that the NMOS module is in a conducting state.

[0095] In some embodiments, the gate of the switch tube M1 is connected to the second interface 405. The second interface 405 is used to output a waveform of alternating high and low levels when the absolute value of the difference between the voltage of the first battery 202 and the voltage of the second battery 203 is greater than or equal to the first threshold, so that the NMOS in the NMOS module is in a linear conduction state. The second interface 402 is also used to output a low level when the absolute value of the difference between the voltage of the first battery 202 and the voltage of the second battery 203 is less than the first threshold, so that the NMOS in the NMOS module is in a conduction state.

[0096] The second interface 402 may be an input / output interface (I / O interface), for example, a general purpose input / output interface (GPIO interface). The GPIO interface may be an interface on a system IO power supply. The embodiment of the present application does not limit the specific module corresponding to the second interface.

[0097] The first resistor R1 and the second resistor R2 are used to divide the voltage output by the first module when M1 is turned on, so that the NMOS in the NMOS module is in a linear on state or off state.

[0098] In some embodiments, the first module can output a voltage of 7V-8.5V, the resistance of the first resistor R1 is 510K, the resistance of the second module R2 is 200K, the capacitance of the capacitor C1 is 100nF, the threshold voltage of U1 is 1V, the threshold voltage of U2 is 1V, and the threshold voltage of M1 is 1V.

[0099] The switch tube M1 is used to alternately turn on and off when the absolute value of the voltage difference between the first battery and the second battery is greater than or equal to the first threshold. The switch tube M1 is used to turn on when the absolute value of the voltage difference between the first battery and the second battery is less than the first threshold. The switch tube M1 is also used to turn on when the terminal device is turned off.

[0100] The capacitor C1 is used to perform alternating charging and discharging when the absolute value of the voltage difference between the first battery and the second battery is greater than or equal to a first threshold value, so that the voltage of the control end of the NMOS module is stable.

[0101] The embodiment of the present application does not limit the specific structures of the first module 401 , the first voltage dividing module 402 , the second voltage dividing module 403 and the voltage stabilizing module 404 .

[0102] Combine the following Figure 5A-5D right Figure 4 The control flow of the circuit shown is described below.

[0103] When the terminal device is in shutdown state, the second interface 402 continuously outputs a high level, the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is greater than or equal to the threshold voltage of the switch tube M1, and the switch tube M1 is in the on state.

[0104] When the terminal device is in the shutdown state, the first module 401 does not perform a voltage boost process, and the output voltage is the second value. The second value is the same as the voltage Vbatt1 of the first battery. The first resistor R1 and the second resistor R2 divide the voltage at the first module 401, and the voltage at the gate of U1 conducted by the first module 401 is the third value. The voltage value of the third value is equal to Vbatt1*R2 / (R1+R2). The third value is less than the second value Vbatt1.

[0105] The first module 401 charges the capacitor C1 via the first resistor R1. The voltage of the fully charged capacitor C1 is equal to the third value. The voltage at the gate of U1 is the voltage value output after the boost processing of the first module, that is, the first value; the voltage at the source of U1 is the voltage Vbatt1 of the first battery 202. The difference between the voltage at the gate of U1 and the voltage at the source of U1 is less than or equal to the threshold voltage of U1, and U1 is in the off state.

[0106] Adaptively, the voltage at the gate of U1 is a third value, which is smaller than the voltage Vbatt1 of the first battery 202 .

[0107] It is understandable that if Figure 5A As shown, the voltage at the source of U1 is the voltage Vbatt1 of the first battery 202; the voltage at the gate of U1 is a second value, which is less than Vbatt1, and the difference between the voltage at the gate of U1 and the voltage at the source of U1 is less than the threshold voltage of U1, and U1 is in the off state.

[0108] In the embodiment of the present application, in the shutdown state, U1 is turned off, which can reduce the direct conduction between the first battery and the second battery. When the voltage difference between the first battery and the second battery is too large, the direct conduction between the two batteries can be reduced, thereby reducing the damage to the components in the path between the two batteries. When the voltage difference between the first battery and the second battery is too large, the current in the path is reduced to be greater than the charge and discharge current value of the battery itself, thereby reducing the damage to the battery.

[0109] In the embodiment of the present application, the third value is less than the sum of Vbatt2 and the threshold voltage, and the third value is less than Vbatt1. In this way, in different situations, U2 is in the off state.

[0110] In some embodiments, the third value is the same as the discharge cut-off voltage of the second battery. Thus, in different situations, U2 is in the off state.

[0111] Specifically, in possible situation one, the second battery 203 is in working state, and the voltage of the second battery 203 is greater than the discharge cut-off voltage, then the voltage at the source of U2 is the voltage Vbatt2 of the second battery 203; the voltage at the gate of U2 is the same as the voltage at the gate of U1, which is the third value, and the third value is Vbatt1*R2 / (R1+R2), and the third value is less than Vbatt1.

[0112] In the embodiment of the present application, the third value is less than the sum of the discharge cut-off voltage of the second battery and the threshold voltage of U2. In this way, the difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, and U2 is in the off state.

[0113] In the second possible situation, the second battery 203 is in an over-discharge state, and the voltage of the second battery 203 is less than the discharge cut-off voltage. The second battery 203 does not output voltage to the charging chip 201. The fifth resistor R5 can conduct the first battery 202 and the second battery 203, and the voltage of the source of the second NMOS U2 is the voltage Vbatt1 of the first battery 202. The voltage at the gate of U2 is the second value; the difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, and U2 is in the off state.

[0114] The over-discharge state can be understood as a state of no power, or can be understood as the voltage of the second battery being lower than the discharge cut-off voltage, etc.

[0115] In possible situation three, the voltage of the second battery 203 is equal to the discharge cut-off voltage. The difference between the voltage at the gate of U2 and the voltage at the source of U2 is zero, which is less than the threshold voltage of U2, and U2 is in the off state.

[0116] Take the discharge cut-off voltage of the second battery as 2.5V and the voltage of the first battery 202 as 4.5V as an example. If the voltage of the second battery is greater than 2.5V, the voltage at the source of U2 is greater than 2.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state; if the voltage of the second battery is less than 2.5V, the voltage at the source of U2 is the voltage of the first battery 202, that is, 4.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state; if the voltage of the second battery is 2.5V, the voltage at the source of U2 is 2.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state.

[0117] In this way, in the shutdown state, U1 and U2 are both turned off, which can reduce the direct conduction between the first battery and the second battery. When the voltage difference between the first battery and the second battery is too large, the direct conduction between the two batteries can be reduced, thereby reducing the damage to the components in the path between the two batteries. When the voltage difference between the first battery and the second battery is too large, the current in the path is reduced to a value greater than the charge and discharge current of the battery itself, thereby reducing the damage to the battery.

[0118] It is understandable that when the terminal device is powered on, the states of the first battery and the second battery are divided into two situations, namely, a large pressure difference scenario and a small pressure difference scenario. Adaptively, each of the two scenarios corresponds to a control flow.

[0119] In a scenario where the voltage difference is large, the second interface 402 outputs a waveform with alternating high and low levels (eg Figure 5B As shown in FIG. 1 , the capacitor C1 is charged and discharged alternately, so that U1 works in the linear region and is in a linear conduction state, so that the voltage of the first battery 202 and the voltage of the second battery 203 are constantly approaching, and the absolute value of the difference between the two gradually decreases. In the scenario where the voltage difference is small, the second interface continuously outputs a low level, and U1 is in a conduction state, so that the battery and the mobile terminal work normally.

[0120] Specifically, when the terminal device is in the power-on state, the first module boosts the voltage output by the first battery, and the processed voltage is a first value. The first value is greater than the voltage Vbatt1 output by the first battery. The voltage output by the first module 401 is transmitted to the gate of U1 through the first resistor R1.

[0121] When the second interface 402 outputs a low level, the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is zero, which is less than the threshold voltage of the switch tube M1, and the switch tube M1 is in the off state (eg Figure 5C shown).

[0122] It is understandable that the switch tube M1 is in the off state, the first resistor R1 and the second resistor R2 have no voltage dividing function, and the first module 401 charges the capacitor C1. The voltage at the gate of U1 is the voltage of the capacitor C1. The voltage at the source of U1 is the voltage Vbatt1 of the first battery 202.

[0123] When the difference between the voltage of capacitor C1 and the voltage Vbatt1 of the first battery 202 is greater than the threshold voltage of U1, U1 is turned on; when the difference between the voltage of capacitor C1 and the voltage Vbatt1 of the first battery 202 is less than or equal to the threshold voltage of U1, U1 is turned off. Or it can be understood that whether U1 is in the on state or the off state depends on the voltage of capacitor C1.

[0124] It can be understood that the voltage at the source of U2 is the voltage Vbatt2 of the second battery. The voltage at the gate of U2 is the same as the voltage at the gate of U1, both of which are the voltage of capacitor C1. Similarly, whether U2 is in the on state or the off state depends on the voltage of capacitor C1.

[0125] When the second interface 402 outputs a high level, the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is greater than or equal to the threshold voltage of the switch tube M1, and the switch tube M1 is turned on.

[0126] The first module 401 performs a voltage boost process on the voltage output by the first battery, and the processed voltage is a first value. The first resistor R1 and the second resistor R2 perform a voltage divider process on the voltage output by the first module 401. The voltage transmitted from the first module 401 to the gate of U1 is a fourth value, which is less than the first value.

[0127] If the difference between the voltage at the gate of U1 and the voltage at the source of U1 is less than the threshold voltage of U1, U1 is in the off state. The voltage at the source of U2 is the voltage Vbatt2 of the second battery. The voltage at the gate of U2 is the same as the voltage at the gate of U1, both of which are the voltage of capacitor C1. If the difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, U2 is in the off state.

[0128] It can be understood that when the switch tube M1 is turned on, the capacitor C1 can be discharged through the second resistor R2 and the switch tube M1. The voltage at the gate of U1 is equal to the voltage of the capacitor C1, and the voltage of the capacitor C1 is less than the voltage at the first module 401 (such as Figure 5D shown).

[0129] It should be noted that during the process of charging and discharging the capacitor C1, the voltage of the capacitor C1 fluctuates slowly (that is, the voltage of the capacitor C1 does not change strongly). The capacitor C1 is charged and discharged so that the voltage of the capacitor C1 is stabilized. After the capacitor C1 is stabilized, the capacitor C1 has a voltage value.

[0130] During the process of charging and discharging the capacitor C1, the voltage of the capacitor C1 increases continuously, and the voltage of the gate G of the MOS tube U1 and the voltage of the gate G of the MOS tube U2 also increase continuously (because the voltage of the gate G of the MOS tube U1 and the voltage of the gate G of the MOS tube U2 are both the voltage of the capacitor C1), so that U1 and U2 are both in a linear conduction state; and then the voltage of the first battery and the voltage of the second battery are continuously approached, so that the absolute value of the difference between the voltage of the first battery and the voltage of the second battery gradually decreases.

[0131] In the scenario of small voltage difference, the second interface 402 continuously outputs low level. The difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is zero, which is less than the threshold voltage of the switch tube M1, and the switch tube M1 is in the off state.

[0132] When the terminal device is in the power-on state, the first module performs a voltage boost process on the voltage output by the first battery, and the processed voltage is a first value. The first value is greater than the voltage Vbatt1 output by the first battery. The voltage output by the first module 401 is transmitted to the gate of U1 through the first resistor R1.

[0133] It can be understood that the switch tube M1 is in the off state, the first resistor R1 and the second resistor R2 have no voltage dividing function, and the first module 401 charges the capacitor C1. The voltage of the capacitor C1 after it is fully charged is equal to the first value. The voltage at the gate of U1 is the first value; the voltage at the source of U1 is the voltage Vbatt1 of the first battery 202. (As shown in FIG. Figure 5C (shown)

[0134] The difference between the voltage at the gate of U1 and the voltage at the source of U1 is greater than the threshold voltage of U1, and U1 is in the on state.

[0135] The voltage at the source of U2 is the voltage Vbatt2 of the second battery 203. The difference between the voltage at the gate of U2 and the voltage at the source of U2 is greater than the threshold voltage of U2, and U2 is in the on state.

[0136] Figure 4 In the circuit shown, when the voltage difference is large, U1 and U2 are both in a linear conduction state to balance the voltage of the first battery and the voltage of the second battery; when the voltage difference is small, U1 and U2 are both turned on, so that the first battery, the second battery, the load, etc. can operate normally.

[0137] In summary, Figure 4 The circuit shown isolates the parallel batteries through NMOS when the voltage difference is large, reducing the direct conduction between the batteries. In addition, the source of the switch tube M1 is grounded. When the switch tube M1 is turned on, the voltage at the gate is small, and the voltage of the required power supply is small, which is easy to implement. Figure 4 The control unit in the circuit shown requires a power supply with a smaller voltage, which can reduce the use of a power supply with a larger voltage and reduce the power consumption of the terminal device.

[0138] For example, Figure 6 FIG. 1 is a schematic diagram of another control unit in an embodiment of the present application. Figure 6 As shown, the control unit includes: a first module 601 , a first voltage dividing module 602 , a second voltage dividing module 603 and a voltage stabilizing module 604 .

[0139] The structures and functions of the first voltage dividing module 602 , the second voltage dividing module 603 and the voltage stabilizing module 604 may refer to the above corresponding descriptions and will not be described again here.

[0140] like Figure 6 As shown, the first voltage dividing module 602 includes a first resistor R1, the second voltage dividing module 603 includes a second resistor R2, a switch tube M1 and a switch tube M2, and the voltage stabilizing module 604 includes a capacitor C1.

[0141] One end of the first resistor R1 is connected to the first module 401, and the other end of the first resistor R1 is connected to the gate of U1; one end of the second resistor R2 is connected to the other end of the first resistor R1, and the other end of the second resistor R2 is connected to the drain of the switch tube M1; the gate of the switch tube M1 is connected to the drain of the switch tube M2, the source of the switch tube M1 is grounded, the gate of the switch tube M2 is connected to the third interface 403, and the source of the switch tube M2 is grounded; one end of the capacitor C1 is connected to the gate of U1, and the other end of the capacitor C1 is grounded.

[0142] The functions of the first module 601 , the first resistor R1 , the second resistor R2 , and the capacitor C1 can refer to the above corresponding descriptions, which will not be repeated here.

[0143] In some embodiments, the second voltage dividing module 603 further includes: a second interface 605, and the second interface 605 is used to supply power to the gate of M1. The second interface 602 is used to output a continuous high level signal to the gate of M1.

[0144] In some embodiments, the second voltage divider module 603 further includes: a third interface 606, and the third interface 606 is used to output a high-low level alternating signal to control M2 to be turned on and off alternately when the absolute value of the difference between the voltage of the first battery 202 and the voltage of the second battery 203 is greater than or equal to the first threshold value. In this way, M2 is turned on and off alternately, and then M1 is turned on and off alternately, and the capacitor C1 is charged and discharged alternately, so that the NMOS in the NMOS module is in a linear conduction state.

[0145] The third interface 606 is also used to output a high level signal when the absolute value of the difference between the voltage of the first battery 202 and the voltage of the second battery 203 is less than the first threshold value, so as to control M1 to be turned off through M2. In this way, M1 is turned off through M2, and the first module supplies power to the capacitor C1, so that the NMOS in the NMOS module is in a conducting state.

[0146] The third interface 606 is also used to output a low level signal when the terminal device is turned off, so as to control M1 to be turned on through M2, so that the NMOS in the NMOS module is in the off state.

[0147] The following is a summary of the different states of the terminal equipment. Figure 6The working process of the control unit in the circuit is explained.

[0148] When the terminal device is in the shutdown state, the third interface 606 has no output, a low level, the difference between the voltage at the gate of the switch tube M2 and the voltage at the source of the switch tube M2 is less than the threshold voltage of the switch tube M2, and the switch tube M2 is in the off state.

[0149] The second interface 605 outputs a high level, the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is greater than or equal to the threshold voltage of the switch tube M2, and the switch tube M1 is in the on state.

[0150] When the terminal device is in the shutdown state, the first module 401 does not work, and the output voltage is the second value. The first resistor R1 and the second resistor R2 divide the voltage at the first module 401, and the voltage at the gate of U1 conducted by the first module 401 is the third value. The third value is less than the second value.

[0151] The first module 401 charges the capacitor C1 via the first resistor R1. The voltage of the fully charged capacitor C1 is equal to the third value. The voltage at the gate of U1 is the first value; the voltage at the source of U1 is the voltage Vbatt1 of the first battery 202. The difference between the voltage at the gate of U1 and the voltage at the source of U1 is less than or equal to the threshold voltage of U1, and U1 is in the off state.

[0152] In the embodiment of the present application, in the shutdown state, U1 is turned off, which can reduce the direct conduction between the first battery and the second battery. When the voltage difference between the first battery and the second battery is too large, the direct conduction between the two batteries can be reduced, thereby reducing the damage to the components in the path between the two batteries. When the voltage difference between the first battery and the second battery is too large, the current in the path is reduced to be greater than the charge and discharge current value of the battery itself, thereby reducing the damage to the battery.

[0153] In some embodiments, the third value is the same as the discharge cut-off voltage of the second battery. Thus, in different situations, U2 is in the off state.

[0154] Specifically, in possible situation one, the second battery 203 is in working state, and the voltage of the second battery 203 is greater than the discharge cut-off voltage, then the voltage at the source of U2 is the voltage Vbatt2 of the second battery 203; the voltage at the gate of U2 is the same as the voltage at the gate of U1, which is the third value, less than Vbatt1.

[0155] The difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, and U2 is in the off state.

[0156] In possible situation 2, the second battery 203 is in an over-discharge state, and the voltage of the second battery 203 is less than the discharge cut-off voltage. The protection board corresponding to the second battery 203 is turned off, and the second battery 203 does not output voltage. The fifth resistor R5 can conduct the first battery 202 and the second battery 203, and the voltage of the source of the second NMOS U2 is the voltage Vbatt1 of the first battery 202. The voltage at the gate of U2 is the second value; the difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, and U2 is in the off state.

[0157] The over-discharge state can be understood as a state of no power, or can be understood as being lower than the discharge cut-off voltage, etc.

[0158] In possible situation three, the voltage of the second battery 203 is equal to the discharge cut-off voltage. The difference between the voltage at the gate of U2 and the voltage at the source of U2 is zero, which is less than the threshold voltage of U2, and U2 is in the off state.

[0159] Take the discharge cut-off voltage as 2.5V and the voltage of the first battery 202 as 4.5V as an example. If the voltage of the second battery is greater than 2.5V, the voltage at the source of U2 is greater than 2.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state; if the voltage of the second battery is less than 2.5V, the voltage at the source of U2 is the voltage of the first battery 202, that is, 4.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state; if the voltage of the second battery is 2.5V, the voltage at the source of U2 is 2.5V. The voltage at the gate of U2 is 2.5V. At this time, U2 is in the off state.

[0160] In this way, in the shutdown state, U1 and U2 are both turned off, which can reduce the direct conduction between the first battery and the second battery. When the voltage difference between the first battery and the second battery is too large, the direct conduction between the two batteries can be reduced, thereby reducing the damage to the components in the path between the two batteries. When the voltage difference between the first battery and the second battery is too large, the current in the path is reduced to a value greater than the charge and discharge current of the battery itself, thereby reducing the damage to the battery.

[0161] It is understandable that when the terminal device is powered on, the states of the first battery and the second battery are divided into two situations, namely, a large pressure difference scenario and a small pressure difference scenario. Adaptively, each of the two scenarios corresponds to a control flow.

[0162] In a scenario with a large voltage difference, the third interface 606 outputs a waveform with alternating high and low levels, and the second interface continuously outputs a high level. The switch tube M1 is controlled to be turned on or off based on the on and off of the switch tube M2, thereby controlling the alternating charging and discharging of the capacitor C1, so that U1 operates in the linear region and is in a linear conduction state, so that the voltage of the first battery 202 and the voltage of the second battery 203 are constantly approaching, and the absolute value of the difference between the two gradually decreases.

[0163] In a scenario where the voltage difference is small, the third interface continuously outputs a low level, the second interface continuously outputs a high level, and U1 is in an on state, so that the battery and the mobile terminal work normally.

[0164] Specifically, when the terminal device is in the power-on state, the first module boosts the voltage output by the first battery, and the processed voltage is a first value. The first value is greater than the voltage Vbatt1 output by the first battery. The voltage output by the first module 401 is transmitted to the gate of U1 through the first resistor R1.

[0165] When the third interface outputs a high level, the difference between the voltage at the gate of the switch tube M2 and the voltage at the source of the switch tube M2 is greater than the threshold voltage of M2, and the switch tube M2 is in the on state. Since the switch tube M2 is turned on and the source of the switch tube M2 is grounded, the gate voltage of the switch tube M1 is 0; the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is zero, which is less than the threshold voltage of the switch tube M1, and the switch tube M1 is in the off state.

[0166] It is understandable that the switch tube M1 is in the off state, the first resistor R1 and the second resistor R2 have no voltage dividing function, and the first module 601 charges the capacitor C1. The voltage at the gate of U1 is the voltage of the capacitor C1. The voltage at the source of U1 is the voltage Vbatt1 of the first battery 202.

[0167] When the difference between the voltage of capacitor C1 and the voltage Vbatt1 of the first battery 202 is greater than the threshold voltage of U1, U1 is turned on; when the difference between the voltage of capacitor C1 and the voltage Vbatt1 of the first battery 202 is less than or equal to the threshold voltage of U1, U1 is turned off. Or it can be understood that whether U1 is in the on state or the off state depends on the voltage of capacitor C1.

[0168] It can be understood that the voltage at the source of U2 is the voltage Vbatt2 of the second battery. The voltage at the gate of U2 is the same as the voltage at the gate of U1, both of which are the voltage of capacitor C1. Similarly, whether U2 is in the on state or the off state depends on the voltage of capacitor C1.

[0169] When the third interface outputs a low level, the difference between the voltage at the gate of the switch tube M2 and the voltage at the source of the switch tube M2 is smaller than the threshold voltage of M2, and the switch tube M2 is in the off state.

[0170] Since the switch tube M2 is turned off, the voltage output by the second interface 402 is transmitted to the gate of the switch tube M1. The difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is greater than or equal to the threshold voltage of the switch tube M1, and the switch tube M1 is turned on.

[0171] The first module 401 performs a voltage boost process on the voltage output by the first battery, and the processed voltage is a first value. The first resistor R1 and the second resistor R2 perform a voltage divider process on the voltage output by the first module 601. The voltage transmitted from the first module 401 to the gate of U1 is a fourth value, which is less than the first value.

[0172] If the difference between the voltage at the gate of U1 and the voltage at the source of U1 is less than the threshold voltage of U1, U1 is in the off state. The voltage at the source of U2 is the voltage Vbatt2 of the second battery. The voltage at the gate of U2 is the same as the voltage at the gate of U1, both of which are the voltage of capacitor C1. If the difference between the voltage at the gate of U2 and the voltage at the source of U2 is less than the threshold voltage of U2, U2 is in the off state.

[0173] It is understandable that when the switch tube M1 is turned on, the capacitor C1 can be discharged through the second resistor R2 and the switch tube M1. The voltage at the gate of U1 is equal to the voltage of the capacitor C1, and the voltage of the capacitor C1 is less than the voltage at the first module 401.

[0174] It should be noted that during the process of charging and discharging the capacitor C1, the voltage of the capacitor C1 fluctuates slowly (that is, the voltage of the capacitor C1 does not change strongly). The capacitor C1 is charged and discharged so that the voltage of the capacitor C1 is stabilized. After the capacitor C1 is stabilized, the capacitor C1 has a voltage value.

[0175] During the charging and discharging process of capacitor C1, the voltage of capacitor C1 continues to increase, and the voltage at the gate of U1 and the voltage at the gate of U2 also continue to increase (because the voltage at the gate of U1 and the voltage at the gate of U2 are both the voltage of capacitor C1), so that U1 and U2 are both in a linear conduction state; and then the voltage of the first battery and the voltage of the second battery are continuously approaching each other, so that the absolute value of the difference between the output voltage and the output voltage of v2 gradually decreases.

[0176] In the scenario where the voltage difference is small, the third interface 606 continuously outputs a high level. The difference between the voltage at the gate of the switch tube M2 and the voltage at the source of the switch tube M2 is greater than the threshold voltage of M2, and the switch tube M2 is in the on state. Since the switch tube M2 is turned on and the source of the switch tube M2 is grounded, the gate voltage of the switch tube M1 is 0; the difference between the voltage at the gate of the switch tube M1 and the voltage at the source of the switch tube M1 is zero, which is less than the threshold voltage of the switch tube M1, and the switch tube M1 is in the off state.

[0177] The voltage at the source of U2 is the voltage Vbatt2 of the second battery 203. The difference between the voltage at the gate of U2 and the voltage at the source of U2 is greater than the threshold voltage of U2, and U2 is in the on state.

[0178] When the voltage difference is large, U1 and U2 are both in a linear conduction state to balance the voltage of the first battery and the voltage of the second battery; when the voltage difference is small, U1 and U2 are both turned on, so that the first battery, the second battery, the load, etc. can operate normally.

[0179] In summary, Figure 6 The circuit shown isolates the parallel batteries through NMOS when the voltage difference is large, reducing the direct conduction between the batteries. In addition, the source of the switch tube M1 is grounded. When the switch tube M1 is turned on, the voltage at the gate is small, and the voltage of the required power supply is small, which is easy to implement. Figure 6 The control unit in the circuit shown requires a power supply with a smaller voltage, which can reduce the use of a power supply with a larger voltage and reduce the power consumption of the terminal device.

[0180] Understandably, Figure 4 In the control unit shown, different voltage signals of the second interface control the on or off of M1; the second interface needs to output a high level in the shutdown state, and after startup, it outputs alternating high and low levels when the voltage difference between the first battery and the second battery is large, and outputs a low level when the voltage difference between the first battery and the second battery is small. It is difficult to achieve the need to output a high level in the shutdown state. Compared with Figure 4 The control unit shown, Figure 6 The control unit shown in the figure adds an interface and a switch tube M2. In this way, the second interface is a normally powered interface, and the conduction or shutdown of M1 and M2 is controlled by different voltage signals of the third interface. The third interface outputs a low level in the off state, and outputs alternating high and low levels when the pressure difference is large after startup, and outputs a high level when the pressure difference is small. In this way, the second interface outputs a fixed smaller voltage, and the third interface outputs a low voltage in the off state, which is relatively simple to implement.

[0181] Figure 6 In the illustrated embodiment, the third interface 606 may be an interface on a GPIO (or referred to as a “pin”).

[0182] The second interface 605 can be used as an interface for powering a chip in a terminal device. The chip can be a power management chip, or any other type of chip, etc., which is not limited in the embodiments of the present application. Exemplarily, the second interface can be an interface for powering the IO of the power management chip. Exemplarily, the LDO of the system includes two interfaces, one interface for inputting a battery voltage, and the other interface for outputting a 1.8V voltage to power the IO of the power management chip of the system.

[0183] exist Figure 6 Based on the embodiment shown, the control unit further includes a third resistor R3. The third resistor R3 is used to protect the second interface 605. The third resistor R3 is located between the second interface 402 and the gate of the switch tube M1.

[0184] For example, Figure 6 As shown, one end of the third resistor R3 is connected to the second interface 402 , and the other end of the third resistor R3 is connected to the drain of the switch tube M2 .

[0185] In this way, the situation where the second interface 605 is directly grounded can be reduced.

[0186] exist Figure 6 Based on the embodiment shown, the control unit further includes a fourth resistor R4. The fourth resistor R4 is used to protect the switch tube M2. The fourth resistor R3 is located between the third interface 403 and the gate of the switch tube M2.

[0187] For example, Figure 7 As shown, one end of the fourth resistor R3 is connected to the third interface 403, and the other end of the fourth resistor R4 is connected to the gate of the switch tube M2.

[0188] In this way, the situation where the switch tube M2 is damaged due to the excessive voltage output by the third interface 606 can be reduced.

[0189] Based on the above embodiment, the NMOS module 205 further includes a fifth resistor R5. One end of the fifth resistor R5 is connected to the first battery 202, and the other end of the fifth resistor R5 is connected to the second battery 203. The fifth resistor R5 can perform low current hardware balancing on the first battery and the second battery when the terminal device is in the off state.

[0190] The above workflow is to illustrate the control process of the control unit by taking the NMOS module including two NMOS transistors as an example. In some embodiments, the NMOS module includes one NMOS transistor. For example, Figure 7As shown, the NMOS module 205 includes a third NMOS tube U3 . The drain (D pole) of U3 is connected to the first battery 202 , the source (S pole) of U3 is connected to the second battery 203 , and the gate (G pole) of U3 is connected to the control unit 206 .

[0191] It can be understood that when the absolute value of the voltage difference between the first battery and the second battery is greater than or equal to the first threshold, U3 operates in the linear region. When the voltage difference between the first battery and the second battery is less than the first threshold, U3 is turned on. When the terminal device is turned off, U3 is turned off.

[0192] When the NMOS module includes an NMOS tube U3, the control flow of the control unit can refer to the above description of U2, which will not be repeated here.

[0193] Above Figure 2-Figure 7 In the embodiment shown, when the first module is turned off, the output voltage is a first value; when the first module is turned on, the output voltage is a second value. Figure 8 This is a schematic diagram of the structure of a first module provided in an embodiment of the present application. Figure 8 As shown, the first module includes: a control logic 801 , a voltage adjustment module 802 and a feedback module 803 .

[0194] The control logic 801 is used to adjust the voltage output by the voltage adjustment module 802 based on the voltage input by the voltage adjustment module 802 and the error between the preset voltage and the voltage at the control end of the NMOS module. The preset voltage is the voltage at the control end of the NMOS module in a preset startup scenario.

[0195] The voltage adjustment module 802 is used to boost the voltage input to the first module (the voltage output by the first battery) so that the NMOS in the NMOS module is in a linear conduction state or a conduction state.

[0196] like Figure 8 As shown, the voltage adjustment module 802 includes: a switch tube A1, a switch tube A2 and an inductor.

[0197] When the terminal device is turned on, the switch tube A1 is turned on, and the switch tube A2 is turned on and off alternately. When the switch tube A2 is turned on, the voltage input by the first module (the voltage of the first battery) flows through the inductor L1 and the switch tube A2. In this process, the current on the inductor increases linearly at a certain ratio, and the inductor stores energy. When the switch tube A2 is turned off, due to the current retention characteristics of the inductor, the current flowing through the inductor slowly changes from the value when charging is completed to 0. The inductor L1 charges the capacitor C1, the voltage difference across the capacitor C1 increases, and the voltage output by the voltage adjustment module 802 is greater than the voltage input by the voltage adjustment module 802.

[0198] When the terminal device is turned off, the switch tube A1 is turned on and the switch tube A2 is turned off.

[0199] The feedback module 803 is used to feed back the error between the preset voltage and the voltage at the third terminal of the NMOS module to the control logic 803 .

[0200] like Figure 8 As shown, the feedback module 803 includes: an error amplifier and a comparator. The error amplifier and the comparator are used to obtain the error between the preset voltage and the voltage at the third pole of the NMOS module.

[0201] It is understandable that the first module continuously outputs a fixed voltage in the power-on state. The first module may be an existing module in the terminal device, for example, a module used as a driver (power management unit, PMU), etc., which is not limited in the embodiment of the present application.

[0202] In this way, there is no need to add a module with a boost function, thus saving circuit area and cost.

[0203] The above embodiment is described by taking two batteries connected in parallel as an example. If the terminal device uses three or more batteries connected in parallel, the NMOS module in the above circuit and the control unit for controlling the NMOS module are included between any two batteries. The embodiment of the present application does not limit the number of batteries connected in parallel in the terminal device.

[0204] An embodiment of the present application provides a terminal device, which includes: a processor and a memory; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory, so that the terminal device executes the above method.

[0205] For example, Fig. 9 This is a schematic diagram of the structure of a terminal device provided in an embodiment of the present application. Fig. 9As shown, the terminal device includes: the terminal device may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0206] It is to be understood that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the terminal device. In other embodiments of the present application, the terminal device may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.

[0207] The processor 110 may include one or more processing units, for example, the processor 110 may include an application processor (AP), a modem processor, a graphics processor (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0208] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0209] The processor 110 may also be provided with a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may store instructions or data that the processor 110 has just used or cyclically used. If the processor 110 needs to use the instruction or data again, it may be directly called from the memory. This avoids repeated access, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0210] In some embodiments, the processor 110 may include one or more interfaces. The interface may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0211] It is understandable that the interface connection relationship between the modules illustrated in the embodiment of the present invention is only a schematic illustration and does not constitute a structural limitation on the terminal device. In other embodiments of the present application, the terminal device may also adopt different interface connection methods in the above embodiments, or a combination of multiple interface connection methods.

[0212] The charging management module 140 is used to receive charging input from a charger. The charger can be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 can receive charging input from a wired charger through the USB interface 130. In some wireless charging embodiments, the charging management module 140 can receive wireless charging input through a wireless charging coil of a terminal device. While the charging management module 140 is charging the battery 142, it can also power the electronic device through the power management module 141.

[0213] The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140, and supplies power to the processor 110, the internal memory 121, the display screen 194, the camera 193, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle number, battery health status (leakage, impedance), etc. In some other embodiments, the power management module 141 can also be set in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 can also be set in the same device.

[0214] It can be understood that the battery in the charging and discharging circuit in the above embodiment corresponds to Fig. 9 The terminal device includes at least two batteries 142. The charging interface corresponds to the USB interface 130. The power management module 141 includes the charging and discharging circuits shown in the above embodiments. In some embodiments, the power management module 141 is located in the processor.

[0215] The terminal device implements the display function through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, which connects the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or change display information.

[0216] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), Miniled, MicroLed, Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the terminal device may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0217] The terminal device can realize the shooting function through ISP, camera 193, video codec, GPU, display screen 194 and application processor.

[0218] ISP is used to process the data fed back by camera 193. For example, when taking a photo, the shutter is opened, and the light is transmitted to the camera photosensitive element through the lens. The light signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to ISP for processing and converts it into an image visible to the naked eye. ISP can also perform algorithm optimization on the noise, brightness, and skin color of the image. ISP can also optimize the exposure, color temperature and other parameters of the shooting scene. In some embodiments, ISP can be set in camera 193.

[0219] The camera 193 is used to capture static images or videos. In some embodiments, the terminal device may include 1 or N cameras 193, where N is a positive integer greater than 1. The types of the multiple cameras 193 may be different. For example, the camera 193 may include a camera for acquiring color images or a TOF camera, etc. In the embodiment of the present application, the camera may be understood as a camera. The camera includes: an AO camera, a TOF camera, etc. in the embodiment of the present application.

[0220] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the terminal device. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function. For example, files such as music and videos can be stored in the external memory card.

[0221] The internal memory 121 can be used to store computer executable program codes, and the executable program codes include instructions. The internal memory 121 can include a program storage area and a data storage area.

[0222] The terminal device can implement audio functions such as music playing and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the earphone interface 170D, and the application processor.

[0223] The button 190 includes a power button, a volume button, etc. The button 190 may be a mechanical button. It may also be a touch button. The terminal device may receive the button input and generate a key signal input related to the user settings and function control of the terminal device. The indicator 192 may be an indicator light, which may be used to indicate the charging status, power change, message, missed call, notification, etc.

[0224] In addition, on top of the above components, the device also runs an operating system, such as an iOS operating system, an Android operating system, or a Windows operating system, etc. Applications can be installed and run on the operating system.

[0225] The software system of the terminal device can adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservice architecture, or a cloud architecture, etc., which will not be elaborated here.

[0226] The embodiment of the present application provides a terminal device, which includes a load and the charging and discharging circuit provided in the above embodiment, wherein the charging and discharging circuit is used to supply power to the load.

[0227] The embodiment of the present application provides a chip, which includes the charging and discharging circuit provided in the above embodiment.

[0228] The embodiment of the present application provides a chip. The chip includes a processor, and the processor is used to call a computer program in a memory to execute the technical solution in the above embodiment. Its implementation principle and technical effect are similar to those of the above related embodiments, and will not be repeated here.

[0229] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program. The above method is implemented when the computer program is executed by the processor. The method described in the above embodiment can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the function can be stored as one or more instructions or codes on a computer-readable medium or transmitted on a computer-readable medium. Computer-readable media can include computer storage media and communication media, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium that can be accessed by a computer.

[0230] In one possible implementation, a computer-readable medium may include RAM, ROM, compact disc read-only memory (CD-ROM) or other optical disk storage, disk storage or other magnetic storage devices, or any other medium that is intended to carry or store the required program code in the form of instructions or data structures and can be accessed by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave) is used to transmit software from a website, server or other remote source, the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology such as infrared, radio and microwave are included in the definition of medium. Disks and optical disks as used herein include optical disks, laser disks, optical disks, digital versatile disks (DVD), floppy disks and Blu-ray disks, where disks usually reproduce data magnetically, while optical disks reproduce data optically using lasers. Combinations of the above should also be included in the scope of computer-readable media.

[0231] An embodiment of the present application provides a computer program product, which includes a computer program. When the computer program is executed, the computer executes the above method.

[0232] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable device to generate a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0233] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0234] The above specific implementation methods further illustrate the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A charging and discharging circuit, characterized in that: Applied to terminal equipment, the charging and discharging circuit includes: a first battery, a second battery, an NMOS module and a control unit; the NMOS module includes one or more NMOSs, and the NMOS module is controlled by the control unit; The control unit is used to control the NMOS module to be in a linear conduction state when the terminal device is turned on and the voltage difference between the first battery and the second battery is greater than a first threshold value, so as to reduce the voltage difference between the first battery and the second battery; Wherein, when the NMOS module is in the linear conduction state, one or more NMOS in the NMOS module operates in the linear region; The control unit is further configured to control the NMOS module to be in the on state when the terminal device is turned on and the voltage difference between the first battery and the second battery is less than or equal to the first threshold; The control unit comprises: a first module with a voltage boosting function, a first voltage dividing module, a second voltage dividing module and a voltage stabilizing module; The other end of the first module is connected to one end of the first voltage divider module, and the other end of the first voltage divider module is connected to the control end of the NMOS module; one end of the second voltage divider module is connected to the other end of the first voltage divider module, and the other end of the second voltage divider module is grounded; one end of the voltage stabilizing module is connected to the control end of the NMOS module, and the other end of the voltage stabilizing module is grounded; The first module is used to boost the input voltage when the terminal device is turned on, so as to provide voltage for the control end of the NMOS module; The first voltage dividing module and the second voltage dividing module are used to divide the voltage output by the first module when the terminal device is turned on, so that the NMOS module is in the linear conduction state or the conduction state; The voltage stabilizing module is used to stabilize the voltage of the control end of the NMOS module.

2. The charge and discharge circuit according to claim 1, characterized in that: The first voltage dividing module includes: a first resistor R1, the second voltage dividing module includes: a second resistor R2 and a switch tube M1, and the voltage stabilizing module includes a capacitor C1; The first module is connected to one end of the R1, and the other end of the R1 is connected to the control end of the NMOS module; one end of the R2 is connected to the other end of the R1, and the other end of the R2 is connected to the drain of the M1; the source of the M1 is grounded, one end of the C1 is connected to the control end of the NMOS module, and the other end of the C1 is grounded; When the voltage difference between the first battery and the second battery is greater than the first threshold, the M1 is used to alternate between on and off, so that the NMOS module is in the linear on state; When the voltage difference between the first battery and the second battery is less than or equal to the first threshold, the switch tube M1 is used to be continuously turned on, so that the NMOS module is in the on state.

3. The charge and discharge circuit according to claim 1 or 2, characterized in that: The first module includes: a voltage adjustment module; an input end of the voltage adjustment module is connected to the first battery, and an output end of the voltage adjustment module is connected to the first voltage dividing module; The voltage adjustment module is used to boost the voltage output by the first battery so that the NMOS in the NMOS module is in a linear conduction state or a conduction state.

4. The charge and discharge circuit according to claim 3, characterized in that: The first module also includes: a control logic and feedback module; The control logic is used to adjust the voltage output by the voltage adjustment module based on the voltage at the input end of the voltage adjustment module and the error between the first voltage and the voltage at the control end of the NMOS module; the first voltage is a preset voltage at the control end of the NMOS module; The feedback module is used to feed back to the control logic the error between a preset voltage and a voltage at the control end of the NMOS module, wherein the preset voltage is the voltage at the control end of the NMOS module in a preset startup scenario.

5. The charge and discharge circuit according to any one of claims 1 to 4, characterized in that: The second voltage dividing module further includes: a switch tube M2; the source of the M2 is grounded, and the drain of the M2 is connected to the gate of the M1; The M2 is used to alternate between being turned on and off when the terminal device is turned on and the voltage difference between the first battery and the second battery is greater than the first threshold, so that the M2 alternates between being turned off and on; The M2 is also used to turn off when the terminal device is turned on and the voltage difference between the first battery and the second battery is less than or equal to the first threshold, so that the M2 is turned on.

6. The charge and discharge circuit according to claim 5, characterized in that: The second voltage dividing module further includes a second interface and a third resistor R3, and the third resistor is located between the gate of M1 and the second interface; The second interface is used to provide a voltage to the gate of M1.

7. The charge and discharge circuit according to claim 5 or 6, characterized in that: The control unit further includes a fourth resistor R4 and a third interface, wherein the fourth resistor is located between the third interface and the gate of M2; The third interface is used to provide a voltage to the gate of M2; The fourth resistor is used to protect the M2.

8. The charge and discharge circuit according to any one of claims 1 to 7, characterized in that: The control module is further configured to control the NMOS module to be in an off state when the terminal device is turned off, so that the second battery does not supply power.

9. The charge and discharge circuit according to any one of claims 1 to 8, characterized in that: The NMOS module includes a switch tube U1 and a switch tube U2; The source of U1 is connected to the first battery, the source of U2 is connected to the second battery, the drain of U1 is connected to the drain of U2, the gate of U1 is connected to the gate of U2, and the gate of U1 is connected to the control unit.

10. The charge and discharge circuit according to claim 9, characterized in that: When the terminal device is turned off, the output voltage V1 of the first module satisfies: the V1×resistance of the second voltage divider unit÷(resistance of the first voltage divider unit+resistance of the second voltage divider unit)≤(threshold voltage of U2+discharge cut-off voltage of the second battery).

11. The charge and discharge circuit according to any one of claims 1 to 8, characterized in that: The NMOS module includes a switch tube U3; The gate of U3 is connected to the control unit, the source of U3 is connected to the second battery, and the drain of U3 is connected to the first battery.

12. The charge and discharge circuit according to any one of claims 1 to 11, characterized in that: The charging and discharging circuit further includes: a charging chip, wherein the charging chip is connected to the NMOS module; The charging chip is used to charge the first battery and / or the second battery; When the NMOS module includes U1 and U2, the charging chip is connected to the drain of U1; When the NMOS module includes U3, the charging chip is connected to the drain of U3.

13. A terminal device, characterized in that: include: A load, and a charging and discharging circuit as described in any one of claims 1 to 12, wherein the charging and discharging circuit is used to supply power to the load.

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